git-svn-id: https://rt-thread.googlecode.com/svn/trunk@76 bbd45198-f89e-11dd-88c7-29a3b14d5316

This commit is contained in:
wuyangyong 2009-10-08 15:21:08 +00:00
parent 088b3a75ca
commit f8fd0fd5de
6 changed files with 893 additions and 1169 deletions

View File

@ -138,6 +138,7 @@ void rt_hw_timer_handler(void)
/**
* This function will initial STM32 Radio board.
*/
extern void FSMC_SRAM_Init(void);
void rt_hw_board_init()
{
NAND_IDTypeDef NAND_ID;

View File

@ -1,279 +0,0 @@
;******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
;* File Name : cortexm3_macro.s
;* Author : MCD Application Team
;* Version : V1.1
;* Date : 11/26/2007
;* Description : Instruction wrappers for special Cortex-M3 instructions.
;*******************************************************************************
; THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
; CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
;*******************************************************************************
THUMB
REQUIRE8
PRESERVE8
AREA |.text|, CODE, READONLY, ALIGN=2
; Exported functions
EXPORT __WFI
EXPORT __WFE
EXPORT __SEV
EXPORT __ISB
EXPORT __DSB
EXPORT __DMB
EXPORT __SVC
EXPORT __MRS_CONTROL
EXPORT __MSR_CONTROL
EXPORT __MRS_PSP
EXPORT __MSR_PSP
EXPORT __MRS_MSP
EXPORT __MSR_MSP
EXPORT __SETPRIMASK
EXPORT __RESETPRIMASK
EXPORT __SETFAULTMASK
EXPORT __RESETFAULTMASK
EXPORT __BASEPRICONFIG
EXPORT __GetBASEPRI
EXPORT __REV_HalfWord
EXPORT __REV_Word
;*******************************************************************************
; Function Name : __WFI
; Description : Assembler function for the WFI instruction.
; Input : None
; Return : None
;*******************************************************************************
__WFI
WFI
BX r14
;*******************************************************************************
; Function Name : __WFE
; Description : Assembler function for the WFE instruction.
; Input : None
; Return : None
;*******************************************************************************
__WFE
WFE
BX r14
;*******************************************************************************
; Function Name : __SEV
; Description : Assembler function for the SEV instruction.
; Input : None
; Return : None
;*******************************************************************************
__SEV
SEV
BX r14
;*******************************************************************************
; Function Name : __ISB
; Description : Assembler function for the ISB instruction.
; Input : None
; Return : None
;*******************************************************************************
__ISB
ISB
BX r14
;*******************************************************************************
; Function Name : __DSB
; Description : Assembler function for the DSB instruction.
; Input : None
; Return : None
;*******************************************************************************
__DSB
DSB
BX r14
;*******************************************************************************
; Function Name : __DMB
; Description : Assembler function for the DMB instruction.
; Input : None
; Return : None
;*******************************************************************************
__DMB
DMB
BX r14
;*******************************************************************************
; Function Name : __SVC
; Description : Assembler function for the SVC instruction.
; Input : None
; Return : None
;*******************************************************************************
__SVC
SVC 0x01
BX r14
;*******************************************************************************
; Function Name : __MRS_CONTROL
; Description : Assembler function for the MRS instruction.
; Input : None
; Return : - r0 : Cortex-M3 CONTROL register value.
;*******************************************************************************
__MRS_CONTROL
MRS r0, CONTROL
BX r14
;*******************************************************************************
; Function Name : __MSR_CONTROL
; Description : Assembler function for the MSR instruction.
; Input : - r0 : Cortex-M3 CONTROL register new value.
; Return : None
;*******************************************************************************
__MSR_CONTROL
MSR CONTROL, r0
ISB
BX r14
;*******************************************************************************
; Function Name : __MRS_PSP
; Description : Assembler function for the MRS instruction.
; Input : None
; Return : - r0 : Process Stack value.
;*******************************************************************************
__MRS_PSP
MRS r0, PSP
BX r14
;*******************************************************************************
; Function Name : __MSR_PSP
; Description : Assembler function for the MSR instruction.
; Input : - r0 : Process Stack new value.
; Return : None
;*******************************************************************************
__MSR_PSP
MSR PSP, r0 ; set Process Stack value
BX r14
;*******************************************************************************
; Function Name : __MRS_MSP
; Description : Assembler function for the MRS instruction.
; Input : None
; Return : - r0 : Main Stack value.
;*******************************************************************************
__MRS_MSP
MRS r0, MSP
BX r14
;*******************************************************************************
; Function Name : __MSR_MSP
; Description : Assembler function for the MSR instruction.
; Input : - r0 : Main Stack new value.
; Return : None
;*******************************************************************************
__MSR_MSP
MSR MSP, r0 ; set Main Stack value
BX r14
;*******************************************************************************
; Function Name : __SETPRIMASK
; Description : Assembler function to set the PRIMASK.
; Input : None
; Return : None
;*******************************************************************************
__SETPRIMASK
CPSID i
BX r14
;*******************************************************************************
; Function Name : __RESETPRIMASK
; Description : Assembler function to reset the PRIMASK.
; Input : None
; Return : None
;*******************************************************************************
__RESETPRIMASK
CPSIE i
BX r14
;*******************************************************************************
; Function Name : __SETFAULTMASK
; Description : Assembler function to set the FAULTMASK.
; Input : None
; Return : None
;*******************************************************************************
__SETFAULTMASK
CPSID f
BX r14
;*******************************************************************************
; Function Name : __RESETFAULTMASK
; Description : Assembler function to reset the FAULTMASK.
; Input : None
; Return : None
;*******************************************************************************
__RESETFAULTMASK
CPSIE f
BX r14
;*******************************************************************************
; Function Name : __BASEPRICONFIG
; Description : Assembler function to set the Base Priority.
; Input : - r0 : Base Priority new value
; Return : None
;*******************************************************************************
__BASEPRICONFIG
MSR BASEPRI, r0
BX r14
;*******************************************************************************
; Function Name : __GetBASEPRI
; Description : Assembler function to get the Base Priority value.
; Input : None
; Return : - r0 : Base Priority value
;*******************************************************************************
__GetBASEPRI
MRS r0, BASEPRI_MAX
BX r14
;*******************************************************************************
; Function Name : __REV_HalfWord
; Description : Reverses the byte order in HalfWord(16-bit) input variable.
; Input : - r0 : specifies the input variable
; Return : - r0 : holds tve variable value after byte reversing.
;*******************************************************************************
__REV_HalfWord
REV16 r0, r0
BX r14
;*******************************************************************************
; Function Name : __REV_Word
; Description : Reverses the byte order in Word(32-bit) input variable.
; Input : - r0 : specifies the input variable
; Return : - r0 : holds tve variable value after byte reversing.
;*******************************************************************************
__REV_Word
REV r0, r0
BX r14
END
;******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE*****

View File

@ -259,7 +259,8 @@ static rt_err_t rt_dm9000_init(rt_device_t dev)
/* see what we've got */
lnk = phy_read(17) >> 12;
rt_kprintf("operating at ");
switch (lnk) {
switch (lnk)
{
case 1:
rt_kprintf("10M half duplex ");
break;
@ -313,11 +314,11 @@ static rt_size_t rt_dm9000_write (rt_device_t dev, rt_off_t pos, const void* buf
static rt_err_t rt_dm9000_control(rt_device_t dev, rt_uint8_t cmd, void *args)
{
switch(cmd)
switch (cmd)
{
case NIOCTL_GADDR:
/* get mac address */
if(args) rt_memcpy(args, dm9000_device.dev_addr, 6);
if (args) rt_memcpy(args, dm9000_device.dev_addr, 6);
else return -RT_ERROR;
break;
@ -351,7 +352,8 @@ rt_err_t rt_dm9000_tx( rt_device_t dev, struct pbuf* p)
while (len > 0)
{
DM9000_outw(DM9000_DATA_BASE, *ptr);
ptr ++; len -= 2;
ptr ++;
len -= 2;
}
}
@ -417,7 +419,8 @@ struct pbuf *rt_dm9000_rx(rt_device_t dev)
while (len > 0)
{
*data = DM9000_inw(DM9000_DATA_BASE);
data ++; len -= 2;
data ++;
len -= 2;
}
}
}
@ -441,7 +444,8 @@ struct pbuf *rt_dm9000_rx(rt_device_t dev)
{
rt_kprintf("rx fifo error\n");
}
if (rx_status & 0x200) {
if (rx_status & 0x200)
{
rt_kprintf("rx crc error\n");
}
if (rx_status & 0x8000)
@ -489,7 +493,7 @@ static void NVIC_Configuration(void)
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
/* Enable the EXTI0 Interrupt */
NVIC_InitStructure.NVIC_IRQChannel = EXTI15_10_IRQn;
NVIC_InitStructure.NVIC_IRQChannel = EXTI9_5_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

View File

@ -21,150 +21,149 @@ GRPOPT 7,(Filesystem),0,0,0
GRPOPT 8,(LwIP),0,0,0
GRPOPT 9,(mp3),0,0,0
OPTFFF 1,1,1,1,0,0,0,0,<.\application.c><application.c>
OPTFFF 1,2,1,0,0,100,115,0,<.\board.c><board.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,44,0,0,0,58,0,0,0,8,4,0,0,183,1,0,0 }
OPTFFF 1,1,1,0,0,0,0,0,<.\application.c><application.c>
OPTFFF 1,2,1,83886083,0,151,167,0,<.\board.c><board.c> { 44,0,0,0,2,0,0,0,3,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,44,0,0,0,58,0,0,0,8,4,0,0,183,1,0,0 }
OPTFFF 1,3,1,0,0,0,0,0,<.\startup.c><startup.c>
OPTFFF 1,4,2,0,0,0,0,0,<.\cortexm3_macro.s><cortexm3_macro.s>
OPTFFF 1,5,1,385875968,0,347,356,0,<.\stm32f10x_it.c><stm32f10x_it.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,110,0,0,0,145,0,0,0,74,4,0,0,14,2,0,0 }
OPTFFF 1,6,5,0,0,30,44,0,<.\stm32f10x_conf.h><stm32f10x_conf.h> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,132,0,0,0,174,0,0,0,96,4,0,0,43,2,0,0 }
OPTFFF 1,7,5,268435456,0,0,0,0,<.\rtconfig.h><rtconfig.h>
OPTFFF 1,8,1,822083584,0,169,172,0,<.\usart.c><usart.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,132,0,0,0,174,0,0,0,96,4,0,0,43,2,0,0 }
OPTFFF 1,9,1,2,0,2990,2999,0,<.\sdcard.c><sdcard.c> { 44,0,0,0,2,0,0,0,3,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,0,0,0,0,0,0,0,0,220,3,0,0,125,1,0,0 }
OPTFFF 1,10,1,0,0,0,0,0,<.\rtc.c><rtc.c>
OPTFFF 1,11,1,0,0,0,0,0,<.\mp3.c><mp3.c>
OPTFFF 1,12,1,939524096,0,102,118,0,<.\wm8753.c><wm8753.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,22,0,0,0,29,0,0,0,242,3,0,0,154,1,0,0 }
OPTFFF 1,13,1,0,0,0,0,0,<.\wav.c><wav.c>
OPTFFF 1,14,1,922746880,0,483,492,0,<.\dm9000.c><dm9000.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,44,0,0,0,58,0,0,0,8,4,0,0,183,1,0,0 }
OPTFFF 1,15,1,0,0,0,0,0,<.\fsmc_nand.c><fsmc_nand.c>
OPTFFF 1,16,1,0,0,0,0,0,<.\fsmc_sram.c><fsmc_sram.c>
OPTFFF 1,17,1,0,0,0,0,0,<.\fmt0371\fmt0371.c><fmt0371.c>
OPTFFF 2,18,1,0,0,0,0,0,<..\..\src\clock.c><clock.c>
OPTFFF 2,19,1,0,0,0,0,0,<..\..\src\idle.c><idle.c>
OPTFFF 2,20,1,0,0,0,0,0,<..\..\src\ipc.c><ipc.c>
OPTFFF 2,21,1,0,0,0,0,0,<..\..\src\mempool.c><mempool.c>
OPTFFF 2,22,1,0,0,0,0,0,<..\..\src\mem.c><mem.c>
OPTFFF 2,23,1,0,0,0,0,0,<..\..\src\object.c><object.c>
OPTFFF 2,24,1,0,0,0,0,0,<..\..\src\scheduler.c><scheduler.c>
OPTFFF 2,25,1,0,0,0,0,0,<..\..\src\thread.c><thread.c>
OPTFFF 2,26,1,0,0,0,0,0,<..\..\src\timer.c><timer.c>
OPTFFF 2,27,1,0,0,0,0,0,<..\..\src\irq.c><irq.c>
OPTFFF 2,28,1,0,0,0,0,0,<..\..\src\kservice.c><kservice.c>
OPTFFF 2,29,1,0,0,0,0,0,<..\..\src\device.c><device.c>
OPTFFF 2,30,1,0,0,0,0,0,<..\..\src\slab.c><slab.c>
OPTFFF 3,31,1,0,0,0,0,0,<..\..\libcpu\arm\stm32\stack.c><stack.c>
OPTFFF 3,32,1,0,0,0,0,0,<..\..\libcpu\arm\stm32\interrupt.c><interrupt.c>
OPTFFF 3,33,1,0,0,0,0,0,<..\..\libcpu\arm\stm32\cpu.c><cpu.c>
OPTFFF 3,34,1,0,0,0,0,0,<..\..\libcpu\arm\stm32\serial.c><serial.c>
OPTFFF 3,35,2,0,0,0,0,0,<..\..\libcpu\arm\stm32\context_rvds.S><context_rvds.S>
OPTFFF 3,36,2,0,0,0,0,0,<..\..\libcpu\arm\stm32\start_rvds.s><start_rvds.s>
OPTFFF 3,37,1,0,0,0,0,0,<..\..\libcpu\arm\stm32\fault.c><fault.c>
OPTFFF 3,38,2,0,0,0,0,0,<..\..\libcpu\arm\stm32\fault_rvds.S><fault_rvds.S>
OPTFFF 4,39,1,218103808,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c><misc.c>
OPTFFF 4,40,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c><stm32f10x_adc.c>
OPTFFF 4,41,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c><stm32f10x_bkp.c>
OPTFFF 4,42,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c><stm32f10x_can.c>
OPTFFF 4,43,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c><stm32f10x_crc.c>
OPTFFF 4,44,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c><stm32f10x_dac.c>
OPTFFF 4,45,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c><stm32f10x_dbgmcu.c>
OPTFFF 4,46,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c><stm32f10x_dma.c>
OPTFFF 4,47,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c><stm32f10x_exti.c>
OPTFFF 4,48,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c><stm32f10x_flash.c>
OPTFFF 4,49,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c><stm32f10x_fsmc.c>
OPTFFF 4,50,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c><stm32f10x_gpio.c>
OPTFFF 4,51,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c><stm32f10x_i2c.c>
OPTFFF 4,52,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c><stm32f10x_iwdg.c>
OPTFFF 4,53,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c><stm32f10x_pwr.c>
OPTFFF 4,54,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c><stm32f10x_rcc.c>
OPTFFF 4,55,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c><stm32f10x_rtc.c>
OPTFFF 4,56,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c><stm32f10x_sdio.c>
OPTFFF 4,57,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c><stm32f10x_spi.c>
OPTFFF 4,58,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c><stm32f10x_tim.c>
OPTFFF 4,59,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c><stm32f10x_usart.c>
OPTFFF 4,60,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
OPTFFF 5,61,1,0,0,0,0,0,<.\Libraries\CMSIS\Core\CM3\core_cm3.c><core_cm3.c>
OPTFFF 5,62,1,167772160,0,0,0,0,<.\Libraries\CMSIS\Core\CM3\system_stm32f10x.c><system_stm32f10x.c>
OPTFFF 6,63,1,0,0,0,0,0,<..\..\finsh\finsh_compiler.c><finsh_compiler.c>
OPTFFF 6,64,1,0,0,0,0,0,<..\..\finsh\finsh_error.c><finsh_error.c>
OPTFFF 6,65,1,0,0,0,0,0,<..\..\finsh\finsh_heap.c><finsh_heap.c>
OPTFFF 6,66,1,0,0,0,0,0,<..\..\finsh\finsh_init.c><finsh_init.c>
OPTFFF 6,67,1,0,0,0,0,0,<..\..\finsh\finsh_node.c><finsh_node.c>
OPTFFF 6,68,1,0,0,0,0,0,<..\..\finsh\finsh_ops.c><finsh_ops.c>
OPTFFF 6,69,1,0,0,0,0,0,<..\..\finsh\finsh_parser.c><finsh_parser.c>
OPTFFF 6,70,1,0,0,0,0,0,<..\..\finsh\finsh_token.c><finsh_token.c>
OPTFFF 6,71,1,0,0,0,0,0,<..\..\finsh\finsh_var.c><finsh_var.c>
OPTFFF 6,72,1,0,0,0,0,0,<..\..\finsh\finsh_vm.c><finsh_vm.c>
OPTFFF 6,73,1,0,0,0,0,0,<..\..\finsh\shell.c><shell.c>
OPTFFF 6,74,1,0,0,0,0,0,<..\..\finsh\symbol.c><symbol.c>
OPTFFF 6,75,1,0,0,0,0,0,<..\..\finsh\cmd.c><cmd.c>
OPTFFF 7,76,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_init.c><dfs_init.c>
OPTFFF 7,77,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_fs.c><dfs_fs.c>
OPTFFF 7,78,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_raw.c><dfs_raw.c>
OPTFFF 7,79,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_util.c><dfs_util.c>
OPTFFF 7,80,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_cache.c><dfs_cache.c>
OPTFFF 7,81,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_posix.c><dfs_posix.c>
OPTFFF 7,82,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\base\efs.c><efs.c>
OPTFFF 7,83,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\base\extract.c><extract.c>
OPTFFF 7,84,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\base\partition.c><partition.c>
OPTFFF 7,85,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\base\plibc.c><plibc.c>
OPTFFF 7,86,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\dir.c><dir.c>
OPTFFF 7,87,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fat.c><fat.c>
OPTFFF 7,88,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\file.c><file.c>
OPTFFF 7,89,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fs.c><fs.c>
OPTFFF 7,90,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ls.c><ls.c>
OPTFFF 7,91,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\time.c><time.c>
OPTFFF 7,92,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ui.c><ui.c>
OPTFFF 8,93,1,0,0,0,0,0,<..\..\net\lwip\src\core\dhcp.c><dhcp.c>
OPTFFF 8,94,1,0,0,0,0,0,<..\..\net\lwip\src\core\dns.c><dns.c>
OPTFFF 8,95,1,0,0,0,0,0,<..\..\net\lwip\src\core\init.c><init.c>
OPTFFF 8,96,1,0,0,0,0,0,<..\..\net\lwip\src\core\netif.c><netif.c>
OPTFFF 8,97,1,0,0,0,0,0,<..\..\net\lwip\src\core\pbuf.c><pbuf.c>
OPTFFF 8,98,1,0,0,0,0,0,<..\..\net\lwip\src\core\raw.c><raw.c>
OPTFFF 8,99,1,0,0,0,0,0,<..\..\net\lwip\src\core\stats.c><stats.c>
OPTFFF 8,100,1,0,0,0,0,0,<..\..\net\lwip\src\core\sys.c><sys.c>
OPTFFF 8,101,1,0,0,0,0,0,<..\..\net\lwip\src\core\tcp.c><tcp.c>
OPTFFF 8,102,1,0,0,0,0,0,<..\..\net\lwip\src\core\tcp_in.c><tcp_in.c>
OPTFFF 8,103,1,0,0,0,0,0,<..\..\net\lwip\src\core\tcp_out.c><tcp_out.c>
OPTFFF 8,104,1,0,0,0,0,0,<..\..\net\lwip\src\core\udp.c><udp.c>
OPTFFF 8,105,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\autoip.c><autoip.c>
OPTFFF 8,106,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\icmp.c><icmp.c>
OPTFFF 8,107,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\igmp.c><igmp.c>
OPTFFF 8,108,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\inet.c><inet.c>
OPTFFF 8,109,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\inet_chksum.c><inet_chksum.c>
OPTFFF 8,110,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\ip.c><ip.c>
OPTFFF 8,111,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\ip_addr.c><ip_addr.c>
OPTFFF 8,112,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\ip_frag.c><ip_frag.c>
OPTFFF 8,113,1,0,0,0,0,0,<..\..\net\lwip\src\core\snmp\msg_in.c><msg_in.c>
OPTFFF 8,114,1,0,0,0,0,0,<..\..\net\lwip\src\core\snmp\msg_out.c><msg_out.c>
OPTFFF 8,115,1,0,0,0,0,0,<..\..\net\lwip\src\api\api_lib.c><api_lib.c>
OPTFFF 8,116,1,0,0,0,0,0,<..\..\net\lwip\src\api\api_msg.c><api_msg.c>
OPTFFF 8,117,1,0,0,0,0,0,<..\..\net\lwip\src\api\err.c><err.c>
OPTFFF 8,118,1,0,0,0,0,0,<..\..\net\lwip\src\api\netbuf.c><netbuf.c>
OPTFFF 8,119,1,0,0,0,0,0,<..\..\net\lwip\src\api\netdb.c><netdb.c>
OPTFFF 8,120,1,0,0,0,0,0,<..\..\net\lwip\src\api\netifapi.c><netifapi.c>
OPTFFF 8,121,1,0,0,0,0,0,<..\..\net\lwip\src\api\tcpip.c><tcpip.c>
OPTFFF 8,122,1,0,0,0,0,0,<..\..\net\lwip\src\netif\etharp.c><etharp.c>
OPTFFF 8,123,1,0,0,0,0,0,<..\..\net\lwip\src\netif\ethernetif.c><ethernetif.c>
OPTFFF 8,124,1,0,0,0,0,0,<..\..\net\lwip\src\netif\loopif.c><loopif.c>
OPTFFF 8,125,1,0,0,0,0,0,<..\..\net\lwip\src\arch\sys_arch_init.c><sys_arch_init.c>
OPTFFF 8,126,1,0,0,0,0,0,<..\..\net\lwip\src\arch\sys_arch.c><sys_arch.c>
OPTFFF 8,127,1,0,0,0,0,0,<..\..\net\lwip\src\api\sockets.c><sockets.c>
OPTFFF 8,128,1,0,0,0,0,0,<..\..\net\lwip\src\core\memp_tiny.c><memp_tiny.c>
OPTFFF 9,129,1,0,0,0,0,0,<.\mp3\mp3dec.c><mp3dec.c>
OPTFFF 9,130,1,0,0,0,0,0,<.\mp3\mp3tabs.c><mp3tabs.c>
OPTFFF 9,131,1,0,0,0,0,0,<.\mp3\real\bitstream.c><bitstream.c>
OPTFFF 9,132,1,0,0,0,0,0,<.\mp3\real\buffers.c><buffers.c>
OPTFFF 9,133,1,0,0,0,0,0,<.\mp3\real\dct32.c><dct32.c>
OPTFFF 9,134,1,0,0,0,0,0,<.\mp3\real\dequant.c><dequant.c>
OPTFFF 9,135,1,0,0,0,0,0,<.\mp3\real\dqchan.c><dqchan.c>
OPTFFF 9,136,1,0,0,0,0,0,<.\mp3\real\huffman.c><huffman.c>
OPTFFF 9,137,1,0,0,0,0,0,<.\mp3\real\hufftabs.c><hufftabs.c>
OPTFFF 9,138,1,0,0,0,0,0,<.\mp3\real\imdct.c><imdct.c>
OPTFFF 9,139,1,0,0,0,0,0,<.\mp3\real\scalfact.c><scalfact.c>
OPTFFF 9,140,1,0,0,0,0,0,<.\mp3\real\stproc.c><stproc.c>
OPTFFF 9,141,1,0,0,0,0,0,<.\mp3\real\subband.c><subband.c>
OPTFFF 9,142,1,0,0,0,0,0,<.\mp3\real\trigtabs.c><trigtabs.c>
OPTFFF 9,143,2,0,0,0,0,0,<.\mp3\real\arm\asmpoly_thumb2.s><asmpoly_thumb2.s>
OPTFFF 9,144,2,0,0,0,0,0,<.\mp3\real\arm\asmmisc.s><asmmisc.s>
OPTFFF 1,4,1,385875968,0,0,0,0,<.\stm32f10x_it.c><stm32f10x_it.c>
OPTFFF 1,5,5,0,0,0,0,0,<.\stm32f10x_conf.h><stm32f10x_conf.h>
OPTFFF 1,6,5,268435456,0,0,0,0,<.\rtconfig.h><rtconfig.h>
OPTFFF 1,7,1,822083584,0,0,0,0,<.\usart.c><usart.c>
OPTFFF 1,8,1,0,0,0,0,0,<.\sdcard.c><sdcard.c>
OPTFFF 1,9,1,0,0,0,0,0,<.\rtc.c><rtc.c>
OPTFFF 1,10,1,0,0,0,0,0,<.\mp3.c><mp3.c>
OPTFFF 1,11,1,939524096,0,0,0,0,<.\wm8753.c><wm8753.c>
OPTFFF 1,12,1,0,0,0,0,0,<.\wav.c><wav.c>
OPTFFF 1,13,1,922746880,0,0,0,0,<.\dm9000.c><dm9000.c>
OPTFFF 1,14,1,0,0,0,0,0,<.\fsmc_nand.c><fsmc_nand.c>
OPTFFF 1,15,1,486539264,0,0,0,0,<.\fsmc_sram.c><fsmc_sram.c>
OPTFFF 1,16,1,0,0,0,0,0,<.\fmt0371\fmt0371.c><fmt0371.c>
OPTFFF 2,17,1,0,0,0,0,0,<..\..\src\clock.c><clock.c>
OPTFFF 2,18,1,0,0,0,0,0,<..\..\src\idle.c><idle.c>
OPTFFF 2,19,1,0,0,0,0,0,<..\..\src\ipc.c><ipc.c>
OPTFFF 2,20,1,0,0,0,0,0,<..\..\src\mempool.c><mempool.c>
OPTFFF 2,21,1,0,0,0,0,0,<..\..\src\mem.c><mem.c>
OPTFFF 2,22,1,0,0,0,0,0,<..\..\src\object.c><object.c>
OPTFFF 2,23,1,0,0,0,0,0,<..\..\src\scheduler.c><scheduler.c>
OPTFFF 2,24,1,0,0,0,0,0,<..\..\src\thread.c><thread.c>
OPTFFF 2,25,1,0,0,0,0,0,<..\..\src\timer.c><timer.c>
OPTFFF 2,26,1,0,0,0,0,0,<..\..\src\irq.c><irq.c>
OPTFFF 2,27,1,0,0,0,0,0,<..\..\src\kservice.c><kservice.c>
OPTFFF 2,28,1,0,0,0,0,0,<..\..\src\device.c><device.c>
OPTFFF 2,29,1,0,0,0,0,0,<..\..\src\slab.c><slab.c>
OPTFFF 3,30,1,0,0,0,0,0,<..\..\libcpu\arm\stm32\stack.c><stack.c>
OPTFFF 3,31,1,0,0,0,0,0,<..\..\libcpu\arm\stm32\interrupt.c><interrupt.c>
OPTFFF 3,32,1,0,0,0,0,0,<..\..\libcpu\arm\stm32\cpu.c><cpu.c>
OPTFFF 3,33,1,0,0,0,0,0,<..\..\libcpu\arm\stm32\serial.c><serial.c>
OPTFFF 3,34,2,0,0,0,0,0,<..\..\libcpu\arm\stm32\context_rvds.S><context_rvds.S>
OPTFFF 3,35,2,0,0,0,0,0,<..\..\libcpu\arm\stm32\start_rvds.s><start_rvds.s>
OPTFFF 3,36,1,0,0,0,0,0,<..\..\libcpu\arm\stm32\fault.c><fault.c>
OPTFFF 3,37,2,0,0,0,0,0,<..\..\libcpu\arm\stm32\fault_rvds.S><fault_rvds.S>
OPTFFF 4,38,1,218103808,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c><misc.c>
OPTFFF 4,39,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c><stm32f10x_adc.c>
OPTFFF 4,40,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c><stm32f10x_bkp.c>
OPTFFF 4,41,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c><stm32f10x_can.c>
OPTFFF 4,42,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c><stm32f10x_crc.c>
OPTFFF 4,43,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c><stm32f10x_dac.c>
OPTFFF 4,44,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c><stm32f10x_dbgmcu.c>
OPTFFF 4,45,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c><stm32f10x_dma.c>
OPTFFF 4,46,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c><stm32f10x_exti.c>
OPTFFF 4,47,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c><stm32f10x_flash.c>
OPTFFF 4,48,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c><stm32f10x_fsmc.c>
OPTFFF 4,49,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c><stm32f10x_gpio.c>
OPTFFF 4,50,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c><stm32f10x_i2c.c>
OPTFFF 4,51,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c><stm32f10x_iwdg.c>
OPTFFF 4,52,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c><stm32f10x_pwr.c>
OPTFFF 4,53,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c><stm32f10x_rcc.c>
OPTFFF 4,54,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c><stm32f10x_rtc.c>
OPTFFF 4,55,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c><stm32f10x_sdio.c>
OPTFFF 4,56,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c><stm32f10x_spi.c>
OPTFFF 4,57,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c><stm32f10x_tim.c>
OPTFFF 4,58,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c><stm32f10x_usart.c>
OPTFFF 4,59,1,0,0,0,0,0,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
OPTFFF 5,60,1,0,0,0,0,0,<.\Libraries\CMSIS\Core\CM3\core_cm3.c><core_cm3.c>
OPTFFF 5,61,1,167772160,0,0,0,0,<.\Libraries\CMSIS\Core\CM3\system_stm32f10x.c><system_stm32f10x.c>
OPTFFF 6,62,1,0,0,0,0,0,<..\..\finsh\finsh_compiler.c><finsh_compiler.c>
OPTFFF 6,63,1,0,0,0,0,0,<..\..\finsh\finsh_error.c><finsh_error.c>
OPTFFF 6,64,1,0,0,0,0,0,<..\..\finsh\finsh_heap.c><finsh_heap.c>
OPTFFF 6,65,1,0,0,0,0,0,<..\..\finsh\finsh_init.c><finsh_init.c>
OPTFFF 6,66,1,0,0,0,0,0,<..\..\finsh\finsh_node.c><finsh_node.c>
OPTFFF 6,67,1,0,0,0,0,0,<..\..\finsh\finsh_ops.c><finsh_ops.c>
OPTFFF 6,68,1,0,0,0,0,0,<..\..\finsh\finsh_parser.c><finsh_parser.c>
OPTFFF 6,69,1,0,0,0,0,0,<..\..\finsh\finsh_token.c><finsh_token.c>
OPTFFF 6,70,1,0,0,0,0,0,<..\..\finsh\finsh_var.c><finsh_var.c>
OPTFFF 6,71,1,0,0,0,0,0,<..\..\finsh\finsh_vm.c><finsh_vm.c>
OPTFFF 6,72,1,0,0,0,0,0,<..\..\finsh\shell.c><shell.c>
OPTFFF 6,73,1,0,0,0,0,0,<..\..\finsh\symbol.c><symbol.c>
OPTFFF 6,74,1,0,0,0,0,0,<..\..\finsh\cmd.c><cmd.c>
OPTFFF 7,75,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_init.c><dfs_init.c>
OPTFFF 7,76,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_fs.c><dfs_fs.c>
OPTFFF 7,77,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_raw.c><dfs_raw.c>
OPTFFF 7,78,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_util.c><dfs_util.c>
OPTFFF 7,79,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_cache.c><dfs_cache.c>
OPTFFF 7,80,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_posix.c><dfs_posix.c>
OPTFFF 7,81,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\base\efs.c><efs.c>
OPTFFF 7,82,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\base\extract.c><extract.c>
OPTFFF 7,83,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\base\partition.c><partition.c>
OPTFFF 7,84,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\base\plibc.c><plibc.c>
OPTFFF 7,85,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\dir.c><dir.c>
OPTFFF 7,86,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fat.c><fat.c>
OPTFFF 7,87,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\file.c><file.c>
OPTFFF 7,88,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fs.c><fs.c>
OPTFFF 7,89,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ls.c><ls.c>
OPTFFF 7,90,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\time.c><time.c>
OPTFFF 7,91,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ui.c><ui.c>
OPTFFF 8,92,1,0,0,0,0,0,<..\..\net\lwip\src\core\dhcp.c><dhcp.c>
OPTFFF 8,93,1,0,0,0,0,0,<..\..\net\lwip\src\core\dns.c><dns.c>
OPTFFF 8,94,1,0,0,0,0,0,<..\..\net\lwip\src\core\init.c><init.c>
OPTFFF 8,95,1,0,0,0,0,0,<..\..\net\lwip\src\core\netif.c><netif.c>
OPTFFF 8,96,1,0,0,0,0,0,<..\..\net\lwip\src\core\pbuf.c><pbuf.c>
OPTFFF 8,97,1,0,0,0,0,0,<..\..\net\lwip\src\core\raw.c><raw.c>
OPTFFF 8,98,1,0,0,0,0,0,<..\..\net\lwip\src\core\stats.c><stats.c>
OPTFFF 8,99,1,0,0,0,0,0,<..\..\net\lwip\src\core\sys.c><sys.c>
OPTFFF 8,100,1,0,0,0,0,0,<..\..\net\lwip\src\core\tcp.c><tcp.c>
OPTFFF 8,101,1,0,0,0,0,0,<..\..\net\lwip\src\core\tcp_in.c><tcp_in.c>
OPTFFF 8,102,1,0,0,0,0,0,<..\..\net\lwip\src\core\tcp_out.c><tcp_out.c>
OPTFFF 8,103,1,0,0,0,0,0,<..\..\net\lwip\src\core\udp.c><udp.c>
OPTFFF 8,104,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\autoip.c><autoip.c>
OPTFFF 8,105,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\icmp.c><icmp.c>
OPTFFF 8,106,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\igmp.c><igmp.c>
OPTFFF 8,107,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\inet.c><inet.c>
OPTFFF 8,108,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\inet_chksum.c><inet_chksum.c>
OPTFFF 8,109,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\ip.c><ip.c>
OPTFFF 8,110,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\ip_addr.c><ip_addr.c>
OPTFFF 8,111,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\ip_frag.c><ip_frag.c>
OPTFFF 8,112,1,0,0,0,0,0,<..\..\net\lwip\src\core\snmp\msg_in.c><msg_in.c>
OPTFFF 8,113,1,0,0,0,0,0,<..\..\net\lwip\src\core\snmp\msg_out.c><msg_out.c>
OPTFFF 8,114,1,0,0,0,0,0,<..\..\net\lwip\src\api\api_lib.c><api_lib.c>
OPTFFF 8,115,1,0,0,0,0,0,<..\..\net\lwip\src\api\api_msg.c><api_msg.c>
OPTFFF 8,116,1,0,0,0,0,0,<..\..\net\lwip\src\api\err.c><err.c>
OPTFFF 8,117,1,0,0,0,0,0,<..\..\net\lwip\src\api\netbuf.c><netbuf.c>
OPTFFF 8,118,1,0,0,0,0,0,<..\..\net\lwip\src\api\netdb.c><netdb.c>
OPTFFF 8,119,1,0,0,0,0,0,<..\..\net\lwip\src\api\netifapi.c><netifapi.c>
OPTFFF 8,120,1,0,0,0,0,0,<..\..\net\lwip\src\api\tcpip.c><tcpip.c>
OPTFFF 8,121,1,0,0,0,0,0,<..\..\net\lwip\src\netif\etharp.c><etharp.c>
OPTFFF 8,122,1,0,0,0,0,0,<..\..\net\lwip\src\netif\ethernetif.c><ethernetif.c>
OPTFFF 8,123,1,0,0,0,0,0,<..\..\net\lwip\src\netif\loopif.c><loopif.c>
OPTFFF 8,124,1,0,0,0,0,0,<..\..\net\lwip\src\arch\sys_arch_init.c><sys_arch_init.c>
OPTFFF 8,125,1,0,0,0,0,0,<..\..\net\lwip\src\arch\sys_arch.c><sys_arch.c>
OPTFFF 8,126,1,0,0,0,0,0,<..\..\net\lwip\src\api\sockets.c><sockets.c>
OPTFFF 8,127,1,0,0,0,0,0,<..\..\net\lwip\src\core\memp_tiny.c><memp_tiny.c>
OPTFFF 9,128,1,0,0,0,0,0,<.\mp3\mp3dec.c><mp3dec.c>
OPTFFF 9,129,1,0,0,0,0,0,<.\mp3\mp3tabs.c><mp3tabs.c>
OPTFFF 9,130,1,0,0,0,0,0,<.\mp3\real\bitstream.c><bitstream.c>
OPTFFF 9,131,1,0,0,0,0,0,<.\mp3\real\buffers.c><buffers.c>
OPTFFF 9,132,1,0,0,0,0,0,<.\mp3\real\dct32.c><dct32.c>
OPTFFF 9,133,1,0,0,0,0,0,<.\mp3\real\dequant.c><dequant.c>
OPTFFF 9,134,1,0,0,0,0,0,<.\mp3\real\dqchan.c><dqchan.c>
OPTFFF 9,135,1,0,0,0,0,0,<.\mp3\real\huffman.c><huffman.c>
OPTFFF 9,136,1,0,0,0,0,0,<.\mp3\real\hufftabs.c><hufftabs.c>
OPTFFF 9,137,1,0,0,0,0,0,<.\mp3\real\imdct.c><imdct.c>
OPTFFF 9,138,1,0,0,0,0,0,<.\mp3\real\scalfact.c><scalfact.c>
OPTFFF 9,139,1,0,0,0,0,0,<.\mp3\real\stproc.c><stproc.c>
OPTFFF 9,140,1,16777216,0,0,0,0,<.\mp3\real\subband.c><subband.c>
OPTFFF 9,141,1,0,0,0,0,0,<.\mp3\real\trigtabs.c><trigtabs.c>
OPTFFF 9,142,2,0,0,0,0,0,<.\mp3\real\arm\asmpoly_thumb2.s><asmpoly_thumb2.s>
OPTFFF 9,143,2,0,0,0,0,0,<.\mp3\real\arm\asmmisc.s><asmmisc.s>
TARGOPT 1, (RT-Thread STM32 Radio)

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@ -16,7 +16,6 @@ Group (mp3)
File 1,1,<.\application.c><application.c>
File 1,1,<.\board.c><board.c>
File 1,1,<.\startup.c><startup.c>
File 1,2,<.\cortexm3_macro.s><cortexm3_macro.s>
File 1,1,<.\stm32f10x_it.c><stm32f10x_it.c>
File 1,5,<.\stm32f10x_conf.h><stm32f10x_conf.h>
File 1,5,<.\rtconfig.h><rtconfig.h>
@ -213,7 +212,7 @@ Options 1,0,0 // Target 'RT-Thread STM32 Radio'
OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }
OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,8,0,0,8,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,0,1,0,0,0,0,0,0,0,0,0,0 }
RV_STAVEC ()
ADSCCFLG { 5,0,0,4,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSCCFLG { 5,32,0,4,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSCMISC ()
ADSCDEFN (USE_STDPERIPH_DRIVER, STM32F10X_HD,)
ADSCUDEF ()

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@ -200,9 +200,9 @@ void wm8753_send(rt_uint16_t s_data)
u8 i;
wm_sclk_0;
for(i=0;i<16;i++)
for (i=0;i<16;i++)
{
if(s_data & 0x8000)
if (s_data & 0x8000)
{
wm_sdin_1;
}
@ -229,13 +229,13 @@ static rt_err_t wm8753_init (rt_device_t dev)
wm8753_send(23<<9 | 1<<1 | 1 ); // 打开左右调音台电源
/* 设置时钟及PLL  */
#define MCLK1DIV2 0
#define pll1_N 11
#define pll1_K 0x1288CE
#define MCLK1DIV2 0
#define pll1_N 11
#define pll1_K 0x1288CE
#if pll1_K > 0x3FFFFF
#warning MAX bit(21:0)
#endif
#if pll1_K > 0x3FFFFF
#warning MAX bit(21:0)
#endif
wm8753_send(53<<9 | 1<<5 | MCLK1DIV2<<3 | 1<<2 | 1<<1 | 1 );
wm8753_send(54<<9 | pll1_N<<5 | (pll1_K>>18) );