From f80e61d6ff51c4e047be15a0be8b73fbd0544780 Mon Sep 17 00:00:00 2001 From: Meco Man <920369182@qq.com> Date: Tue, 14 Mar 2023 21:13:07 -0400 Subject: [PATCH] [stm32][pwm] fix the timer clock enable problem --- bsp/stm32/libraries/HAL_Drivers/drv_pwm.c | 23 ++-- bsp/stm32/libraries/HAL_Drivers/drv_tim.c | 129 +++++++++++++++++++++- bsp/stm32/libraries/HAL_Drivers/drv_tim.h | 2 + 3 files changed, 141 insertions(+), 13 deletions(-) diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c b/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c index 9b84a633e7..f499a1c4dc 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c @@ -24,8 +24,6 @@ #define MIN_PERIOD 3 #define MIN_PULSE 2 -extern void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); - enum { #ifdef BSP_USING_PWM1 @@ -380,19 +378,14 @@ static rt_err_t stm32_hw_pwm_init(struct stm32_pwm *device) #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; #endif - if (HAL_TIM_Base_Init(tim) != HAL_OK) { LOG_E("%s pwm init failed", device->name); result = -RT_ERROR; goto __exit; } - if (HAL_TIM_PWM_Init(tim) != HAL_OK) - { - LOG_E("%s pwm init failed", device->name); - result = -RT_ERROR; - goto __exit; - } + + stm32_tim_enable_clock(tim); clock_config.ClockSource = TIM_CLOCKSOURCE_INTERNAL; if (HAL_TIM_ConfigClockSource(tim, &clock_config) != HAL_OK) @@ -402,6 +395,13 @@ static rt_err_t stm32_hw_pwm_init(struct stm32_pwm *device) goto __exit; } + if (HAL_TIM_PWM_Init(tim) != HAL_OK) + { + LOG_E("%s pwm init failed", device->name); + result = -RT_ERROR; + goto __exit; + } + if(IS_TIM_MASTER_INSTANCE(tim->Instance)) { master_config.MasterOutputTrigger = TIM_TRGO_RESET; @@ -463,6 +463,7 @@ static rt_err_t stm32_hw_pwm_init(struct stm32_pwm *device) } /* pwm pin configuration */ + void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); HAL_TIM_MspPostInit(tim); /* enable update request source */ @@ -472,7 +473,7 @@ __exit: return result; } -static void pwm_get_channel(void) +static void stm32_pwm_get_channel(void) { #ifdef BSP_USING_PWM1_CH1 stm32_pwm_obj[PWM1_INDEX].channel |= 1 << 0; @@ -616,7 +617,7 @@ static int stm32_pwm_init(void) int i = 0; int result = RT_EOK; - pwm_get_channel(); + stm32_pwm_get_channel(); for (i = 0; i < sizeof(stm32_pwm_obj) / sizeof(stm32_pwm_obj[0]); i++) { diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_tim.c b/bsp/stm32/libraries/HAL_Drivers/drv_tim.c index 0bae7735dc..704dedca07 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_tim.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_tim.c @@ -52,8 +52,133 @@ void stm32_tim_pclkx_doubler_get(rt_uint32_t *pclk1_doubler, rt_uint32_t *pclk2_ { *pclk2_doubler = 2; } -#endif -#endif +#endif /* !(defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)) */ +#endif /* defined(SOC_SERIES_STM32MP1) */ +} + +void stm32_tim_enable_clock(TIM_HandleTypeDef* htim_base) +{ + RT_ASSERT(htim_base != RT_NULL); + + if(RT_FALSE); +#ifdef TIM1 + else if(htim_base->Instance==TIM1) + { + __HAL_RCC_TIM1_CLK_ENABLE(); + } +#endif /* TIM1 */ +#ifdef TIM2 + else if(htim_base->Instance==TIM2) + { + __HAL_RCC_TIM2_CLK_ENABLE(); + } +#endif /* TIM2 */ +#ifdef TIM3 + else if(htim_base->Instance==TIM3) + { + __HAL_RCC_TIM3_CLK_ENABLE(); + } +#endif /* TIM3 */ +#ifdef TIM4 + else if(htim_base->Instance==TIM4) + { + __HAL_RCC_TIM4_CLK_ENABLE(); + } +#endif /* TIM4 */ +#ifdef TIM5 + else if(htim_base->Instance==TIM5) + { + __HAL_RCC_TIM5_CLK_ENABLE(); + } +#endif /* TIM5 */ +#ifdef TIM6 + else if(htim_base->Instance==TIM6) + { + __HAL_RCC_TIM6_CLK_ENABLE(); + } +#endif /* TIM6 */ +#ifdef TIM7 + else if(htim_base->Instance==TIM7) + { + __HAL_RCC_TIM7_CLK_ENABLE(); + } +#endif /* TIM7 */ +#ifdef TIM8 + else if(htim_base->Instance==TIM8) + { + __HAL_RCC_TIM8_CLK_ENABLE(); + } +#endif /* TIM8 */ +#ifdef TIM9 + else if(htim_base->Instance==TIM9) + { + __HAL_RCC_TIM9_CLK_ENABLE(); + } +#endif /* TIM9 */ +#ifdef TIM10 + else if(htim_base->Instance==TIM10) + { + __HAL_RCC_TIM10_CLK_ENABLE(); + } +#endif /* TIM10 */ +#ifdef TIM11 + else if(htim_base->Instance==TIM11) + { + __HAL_RCC_TIM11_CLK_ENABLE(); + } +#endif /* TIM11 */ +#ifdef TIM12 + else if(htim_base->Instance==TIM12) + { + __HAL_RCC_TIM12_CLK_ENABLE(); + } +#endif /* TIM12 */ +#ifdef TIM13 + else if(htim_base->Instance==TIM13) + { + __HAL_RCC_TIM13_CLK_ENABLE(); + } +#endif /* TIM13 */ +#ifdef TIM14 + else if(htim_base->Instance==TIM14) + { + __HAL_RCC_TIM14_CLK_ENABLE(); + } +#endif /* TIM14 */ +#ifdef TIM15 + else if(htim_base->Instance==TIM15) + { + __HAL_RCC_TIM15_CLK_ENABLE(); + } +#endif /* TIM15 */ +#ifdef TIM16 + else if(htim_base->Instance==TIM16) + { + __HAL_RCC_TIM16_CLK_ENABLE(); + } +#endif /* TIM16 */ +#ifdef TIM17 + else if(htim_base->Instance==TIM17) + { + __HAL_RCC_TIM17_CLK_ENABLE(); + } +#endif /* TIM17 */ +#ifdef TIM18 + else if(htim_base->Instance==TIM18) + { + __HAL_RCC_TIM18_CLK_ENABLE(); + } +#endif /* TIM18 */ +#ifdef TIM19 + else if(htim_base->Instance==TIM19) + { + __HAL_RCC_TIM19_CLK_ENABLE(); + } +#endif /* TIM19 */ + else + { + RT_ASSERT(RT_TRUE); + } } #ifdef BSP_USING_TIM diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_tim.h b/bsp/stm32/libraries/HAL_Drivers/drv_tim.h index ffd42655c3..dcc852dc56 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_tim.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_tim.h @@ -12,7 +12,9 @@ #define __DRV_TIM_H__ #include +#include void stm32_tim_pclkx_doubler_get(rt_uint32_t *pclk1_doubler, rt_uint32_t *pclk2_doubler); +void stm32_tim_enable_clock(TIM_HandleTypeDef* htim_base); #endif /* __DRV_TIM_H__ */