diff --git a/bsp/sparkfun-redv/applications/led/led.c b/bsp/sparkfun-redv/applications/led/led.c index 849bb51bac..46aacd8978 100644 --- a/bsp/sparkfun-redv/applications/led/led.c +++ b/bsp/sparkfun-redv/applications/led/led.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2020, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -56,4 +56,4 @@ void led_set(rt_uint8_t val) void led_toggle(void) { _led_toggle(USER_LED_OFFSET); -} \ No newline at end of file +} diff --git a/bsp/sparkfun-redv/applications/led/led.h b/bsp/sparkfun-redv/applications/led/led.h index 5fc3fecb67..620da43bc6 100644 --- a/bsp/sparkfun-redv/applications/led/led.h +++ b/bsp/sparkfun-redv/applications/led/led.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2020, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/sparkfun-redv/applications/main.c b/bsp/sparkfun-redv/applications/main.c index fb2d8947e0..99b3e24de8 100644 --- a/bsp/sparkfun-redv/applications/main.c +++ b/bsp/sparkfun-redv/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2020, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -14,7 +14,7 @@ int main(void) { rt_kprintf("Hello, World!\n"); - + led_init(); while (1) @@ -60,4 +60,4 @@ static void give_me_five(void) } #ifdef FINSH_USING_MSH MSH_CMD_EXPORT(give_me_five, Show the SiFive logo) -#endif \ No newline at end of file +#endif diff --git a/bsp/sparkfun-redv/drivers/drv_usart.c b/bsp/sparkfun-redv/drivers/drv_usart.c index 6588892ae9..2ef34b31b4 100644 --- a/bsp/sparkfun-redv/drivers/drv_usart.c +++ b/bsp/sparkfun-redv/drivers/drv_usart.c @@ -37,7 +37,7 @@ static rt_err_t usart_configure(struct rt_serial_device *serial, { RT_ASSERT(serial != RT_NULL); RT_ASSERT(cfg != RT_NULL); - + GPIO_REG(GPIO_IOF_SEL) &= ~IOF0_UART0_MASK; GPIO_REG(GPIO_IOF_EN) |= IOF0_UART0_MASK; diff --git a/bsp/sparkfun-redv/drivers/interrupt.c b/bsp/sparkfun-redv/drivers/interrupt.c index 30c5279a62..789bbf4b37 100644 --- a/bsp/sparkfun-redv/drivers/interrupt.c +++ b/bsp/sparkfun-redv/drivers/interrupt.c @@ -62,13 +62,13 @@ rt_isr_handler_t rt_hw_interrupt_handle(rt_uint32_t vector, void *param) void rt_hw_interrupt_init(void) { int idx; - + /* config interrupt vector*/ asm volatile( "la t0, trap_entry\n" "csrw mtvec, t0" ); - + /* enable global interrupt*/ PLIC_init(&g_plic, PLIC_CTRL_ADDR, @@ -86,8 +86,8 @@ void rt_hw_interrupt_init(void) irq_desc[idx].counter = 0; #endif } - - // enable machine external interrupt + + // enable machine external interrupt set_csr(mie, MIP_MEIP); } @@ -132,7 +132,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, } /** - * This function will be call when external machine-level + * This function will be call when external machine-level * interrupt from PLIC occurred. */ void handle_m_ext_interrupt(void) diff --git a/bsp/sparkfun-redv/drivers/interrupt.h b/bsp/sparkfun-redv/drivers/interrupt.h index 506634e667..6c420ab2d1 100644 --- a/bsp/sparkfun-redv/drivers/interrupt.h +++ b/bsp/sparkfun-redv/drivers/interrupt.h @@ -33,5 +33,5 @@ rt_uint32_t rt_hw_interrupt_get_active(rt_uint32_t fiq_irq); void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id); rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, void *param, const char *name); - + #endif diff --git a/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/fe300prci/fe300prci_driver.c b/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/fe300prci/fe300prci_driver.c index 8eeaafc081..e1c90203c9 100644 --- a/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/fe300prci/fe300prci_driver.c +++ b/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/fe300prci/fe300prci_driver.c @@ -6,15 +6,15 @@ #include "fe300prci/fe300prci_driver.h" #include -#define rdmcycle(x) { \ - uint32_t lo, hi, hi2; \ - __asm__ __volatile__ ("1:\n\t" \ - "csrr %0, mcycleh\n\t" \ - "csrr %1, mcycle\n\t" \ - "csrr %2, mcycleh\n\t" \ - "bne %0, %2, 1b\n\t" \ - : "=r" (hi), "=r" (lo), "=r" (hi2)) ; \ - *(x) = lo | ((uint64_t) hi << 32); \ +#define rdmcycle(x) { \ + uint32_t lo, hi, hi2; \ + __asm__ __volatile__ ("1:\n\t" \ + "csrr %0, mcycleh\n\t" \ + "csrr %1, mcycle\n\t" \ + "csrr %2, mcycleh\n\t" \ + "bne %0, %2, 1b\n\t" \ + : "=r" (hi), "=r" (lo), "=r" (hi2)) ; \ + *(x) = lo | ((uint64_t) hi << 32); \ } uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq) @@ -34,49 +34,49 @@ uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq) do { start_mtime = CLINT_REG(CLINT_MTIME); } while (start_mtime == tmp); - + uint64_t start_mcycle; rdmcycle(&start_mcycle); - + while (CLINT_REG(CLINT_MTIME) < end_mtime) ; - + uint64_t end_mcycle; rdmcycle(&end_mcycle); uint32_t difference = (uint32_t) (end_mcycle - start_mcycle); uint64_t freq = ((uint64_t) difference * mtime_freq) / mtime_ticks; return (uint32_t) freq & 0xFFFFFFFF; - + } - + void PRCI_use_hfrosc(int div, int trim) { // Make sure the HFROSC is running at its default setting // It is OK to change this even if we are running off of it. - + PRCI_REG(PRCI_HFROSCCFG) = (ROSC_DIV(div) | ROSC_TRIM(trim) | ROSC_EN(1)); while ((PRCI_REG(PRCI_HFROSCCFG) & ROSC_RDY(1)) == 0); - + PRCI_REG(PRCI_PLLCFG) &= ~PLL_SEL(1); } void PRCI_use_pll(int refsel, int bypass, - int r, int f, int q, int finaldiv, - int hfroscdiv, int hfrosctrim) + int r, int f, int q, int finaldiv, + int hfroscdiv, int hfrosctrim) { // Ensure that we aren't running off the PLL before we mess with it. if (PRCI_REG(PRCI_PLLCFG) & PLL_SEL(1)) { // Make sure the HFROSC is running at its default setting PRCI_use_hfrosc(4, 16); } - + // Set PLL Source to be HFXOSC if desired. uint32_t config_value = 0; config_value |= PLL_REFSEL(refsel); - + if (bypass) { // Bypass config_value |= PLL_BYPASS(1); @@ -87,14 +87,14 @@ void PRCI_use_pll(int refsel, int bypass, // Set our Final output divide to divide-by-1: PRCI_REG(PRCI_PLLDIV) = (PLL_FINAL_DIV_BY_1(1) | PLL_FINAL_DIV(0)); } else { - + // To overclock, use the hfrosc if (hfrosctrim >= 0 && hfroscdiv >= 0) { PRCI_use_hfrosc(hfroscdiv, hfrosctrim); } - + // Set DIV Settings for PLL - + // (Legal values of f_REF are 6-48MHz) // Set DIVR to divide-by-2 to get 8MHz frequency @@ -132,7 +132,7 @@ void PRCI_use_pll(int refsel, int bypass, // So wait 4 ticks of RTC. uint32_t now = CLINT_REG(CLINT_MTIME); while (CLINT_REG(CLINT_MTIME) - now < 4) ; - + // Now it is safe to check for PLL Lock while ((PRCI_REG(PRCI_PLLCFG) & PLL_LOCK(1)) == 0); @@ -146,7 +146,7 @@ void PRCI_use_pll(int refsel, int bypass, if (refsel) { PRCI_REG(PRCI_HFROSCCFG) &= ~ROSC_EN(1); } - + } void PRCI_use_default_clocks() @@ -160,15 +160,15 @@ void PRCI_use_default_clocks() void PRCI_use_hfxosc(uint32_t finaldiv) { - + PRCI_use_pll(1, // Use HFXTAL - 1, // Bypass = 1 - 0, // PLL settings don't matter - 0, // PLL settings don't matter - 0, // PLL settings don't matter - finaldiv, - -1, - -1); + 1, // Bypass = 1 + 0, // PLL settings don't matter + 0, // PLL settings don't matter + 0, // PLL settings don't matter + finaldiv, + -1, + -1); } // This is a generic function, which @@ -199,20 +199,20 @@ uint32_t PRCI_set_hfrosctrim_for_f_cpu(uint32_t f_cpu, PRCI_freq_target target ) uint32_t desired_hfrosc_freq = (f_cpu/ 16); PRCI_use_hfrosc(hfroscdiv, hfrosctrim); - + // Ignore the first run (for icache reasons) uint32_t cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ); cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ); uint32_t prev_freq = cpu_freq; - + while ((cpu_freq < desired_hfrosc_freq) && (hfrosctrim < 0x1F)){ prev_trim = hfrosctrim; prev_freq = cpu_freq; hfrosctrim ++; PRCI_use_hfrosc(hfroscdiv, hfrosctrim); cpu_freq = PRCI_measure_mcycle_freq(3000, RTC_FREQ); - } + } // We couldn't go low enough if (prev_freq > desired_hfrosc_freq){ @@ -220,7 +220,7 @@ uint32_t PRCI_set_hfrosctrim_for_f_cpu(uint32_t f_cpu, PRCI_freq_target target ) cpu_freq = PRCI_measure_mcycle_freq(1000, RTC_FREQ); return cpu_freq; } - + // We couldn't go high enough if (cpu_freq < desired_hfrosc_freq){ PRCI_use_pll(0, 0, 1, 31, 1, 1, hfroscdiv, prev_trim); diff --git a/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/fe300prci/fe300prci_driver.h b/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/fe300prci/fe300prci_driver.h index 8cfe152d34..61a83939c4 100644 --- a/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/fe300prci/fe300prci_driver.h +++ b/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/fe300prci/fe300prci_driver.h @@ -8,15 +8,15 @@ #include typedef enum prci_freq_target { - + PRCI_FREQ_OVERSHOOT, PRCI_FREQ_CLOSEST, PRCI_FREQ_UNDERSHOOT } PRCI_freq_target; -/* Measure and return the approximate frequency of the - * CPU, as given by measuring the mcycle counter against +/* Measure and return the approximate frequency of the + * CPU, as given by measuring the mcycle counter against * the mtime ticks. */ uint32_t PRCI_measure_mcycle_freq(uint32_t mtime_ticks, uint32_t mtime_freq); @@ -34,7 +34,7 @@ void PRCI_use_hfxosc(uint32_t finaldiv); /* Safely switch over to the PLL using the given * settings. - * + * * Note that not all combinations of the inputs are actually * legal, and this function does not check for their * legality ("safely" means that this function won't turn off @@ -43,30 +43,30 @@ void PRCI_use_hfxosc(uint32_t finaldiv); */ void PRCI_use_pll(int refsel, int bypass, - int r, int f, int q, int finaldiv, - int hfroscdiv, int hfrosctrim); + int r, int f, int q, int finaldiv, + int hfroscdiv, int hfrosctrim); /* Use the default clocks configured at reset. * This is ~16Mhz HFROSC and turns off the LFROSC - * (on the current FE310 Dev Platforms, an external LFROSC is + * (on the current FE310 Dev Platforms, an external LFROSC is * used as it is more power efficient). */ void PRCI_use_default_clocks(); /* This routine will adjust the HFROSC trim - * while using HFROSC as the clock source, + * while using HFROSC as the clock source, * measure the resulting frequency, then - * use it as the PLL clock source, - * in an attempt to get over, under, or close to the - * requested frequency. It returns the actual measured - * frequency. + * use it as the PLL clock source, + * in an attempt to get over, under, or close to the + * requested frequency. It returns the actual measured + * frequency. * - * Note that the requested frequency must be within the - * range supported by the PLL so not all values are - * achievable with this function, and not all + * Note that the requested frequency must be within the + * range supported by the PLL so not all values are + * achievable with this function, and not all * are guaranteed to actually work. The PLL * is rated higher than the hardware. - * + * * There is no check on the desired f_cpu frequency, it * is up to the user to specify something reasonable. */ @@ -76,4 +76,4 @@ uint32_t PRCI_set_hfrosctrim_for_f_cpu(uint32_t f_cpu, PRCI_freq_target target); //__END_DECLS #endif - + diff --git a/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/plic/plic_driver.c b/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/plic/plic_driver.c index b27d7a559e..8d3c563ed4 100644 --- a/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/plic/plic_driver.c +++ b/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/plic/plic_driver.c @@ -25,18 +25,18 @@ void PLIC_init ( uint32_t num_priorities ) { - + this_plic->base_addr = base_addr; this_plic->num_sources = num_sources; this_plic->num_priorities = num_priorities; - + // Disable all interrupts (don't assume that these registers are reset). unsigned long hart_id = read_csr(mhartid); volatile_memzero((uint8_t*) (this_plic->base_addr + PLIC_ENABLE_OFFSET + (hart_id << PLIC_ENABLE_SHIFT_PER_TARGET)), (num_sources + 8) / 8); - + // Set all priorities to 0 (equal priority -- don't assume that these are reset). volatile_memzero ((uint8_t *)(this_plic->base_addr + PLIC_PRIORITY_OFFSET), @@ -49,13 +49,13 @@ void PLIC_init ( (hart_id << PLIC_THRESHOLD_SHIFT_PER_TARGET)); *threshold = 0; - + } void PLIC_set_threshold (plic_instance_t * this_plic, - plic_threshold threshold){ + plic_threshold threshold){ - unsigned long hart_id = read_csr(mhartid); + unsigned long hart_id = read_csr(mhartid); volatile plic_threshold* threshold_ptr = (plic_threshold*) (this_plic->base_addr + PLIC_THRESHOLD_OFFSET + (hart_id << PLIC_THRESHOLD_SHIFT_PER_TARGET)); @@ -63,7 +63,7 @@ void PLIC_set_threshold (plic_instance_t * this_plic, *threshold_ptr = threshold; } - + void PLIC_enable_interrupt (plic_instance_t * this_plic, plic_source source){ @@ -79,7 +79,7 @@ void PLIC_enable_interrupt (plic_instance_t * this_plic, plic_source source){ } void PLIC_disable_interrupt (plic_instance_t * this_plic, plic_source source){ - + unsigned long hart_id = read_csr(mhartid); volatile uint8_t * current_ptr = (volatile uint8_t *) (this_plic->base_addr + PLIC_ENABLE_OFFSET + @@ -88,7 +88,7 @@ void PLIC_disable_interrupt (plic_instance_t * this_plic, plic_source source){ uint8_t current = *current_ptr; current = current & ~(( 1 << (source & 0x7))); *current_ptr = current; - + } void PLIC_set_priority (plic_instance_t * this_plic, plic_source source, plic_priority priority){ @@ -103,7 +103,7 @@ void PLIC_set_priority (plic_instance_t * this_plic, plic_source source, plic_pr } plic_source PLIC_claim_interrupt(plic_instance_t * this_plic){ - + unsigned long hart_id = read_csr(mhartid); volatile plic_source * claim_addr = (volatile plic_source * ) @@ -112,16 +112,16 @@ plic_source PLIC_claim_interrupt(plic_instance_t * this_plic){ (hart_id << PLIC_CLAIM_SHIFT_PER_TARGET)); return *claim_addr; - + } void PLIC_complete_interrupt(plic_instance_t * this_plic, plic_source source){ - + unsigned long hart_id = read_csr(mhartid); volatile plic_source * claim_addr = (volatile plic_source *) (this_plic->base_addr + PLIC_CLAIM_OFFSET + (hart_id << PLIC_CLAIM_SHIFT_PER_TARGET)); *claim_addr = source; - + } diff --git a/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/plic/plic_driver.h b/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/plic/plic_driver.h index 58ee9f90fa..52d12d840f 100644 --- a/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/plic/plic_driver.h +++ b/bsp/sparkfun-redv/freedom-e-sdk/bsp/drivers/plic/plic_driver.h @@ -14,7 +14,7 @@ typedef struct __plic_instance_t uint32_t num_sources; uint32_t num_priorities; - + } plic_instance_t; typedef uint32_t plic_source; @@ -29,22 +29,22 @@ void PLIC_init ( ); void PLIC_set_threshold (plic_instance_t * this_plic, - plic_threshold threshold); - + plic_threshold threshold); + void PLIC_enable_interrupt (plic_instance_t * this_plic, - plic_source source); + plic_source source); void PLIC_disable_interrupt (plic_instance_t * this_plic, - plic_source source); - + plic_source source); + void PLIC_set_priority (plic_instance_t * this_plic, - plic_source source, - plic_priority priority); + plic_source source, + plic_priority priority); plic_source PLIC_claim_interrupt(plic_instance_t * this_plic); void PLIC_complete_interrupt(plic_instance_t * this_plic, - plic_source source); + plic_source source); //__END_DECLS diff --git a/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/coreplexip-arty.h b/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/coreplexip-arty.h index eedcaa5d4a..6ad7681411 100644 --- a/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/coreplexip-arty.h +++ b/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/coreplexip-arty.h @@ -78,9 +78,9 @@ // This gives the mapping from inputs to LOCAL interrupts. -#define LOCAL_INT_SW_0 0 +#define LOCAL_INT_SW_0 0 #define LOCAL_INT_SW_1 1 -#define LOCAL_INT_SW_2 2 +#define LOCAL_INT_SW_2 2 #define LOCAL_INT_SW_3 3 #define LOCAL_INT_BTN_0 4 #define LOCAL_INT_BTN_1 5 diff --git a/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/coreplexip-e51-arty/init.c b/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/coreplexip-e51-arty/init.c index de048a9df7..180a23210a 100644 --- a/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/coreplexip-e51-arty/init.c +++ b/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/coreplexip-e51-arty/init.c @@ -1 +1 @@ -../coreplexip-e31-arty/init.c \ No newline at end of file +../coreplexip-e31-arty/init.c diff --git a/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/coreplexip-e51-arty/platform.h b/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/coreplexip-e51-arty/platform.h index 311ca369b4..86dd22df27 100644 --- a/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/coreplexip-e51-arty/platform.h +++ b/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/coreplexip-e51-arty/platform.h @@ -1 +1 @@ -../coreplexip-e31-arty/platform.h \ No newline at end of file +../coreplexip-e31-arty/platform.h diff --git a/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/hifive1.h b/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/hifive1.h index 0db2f0f321..5474549389 100644 --- a/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/hifive1.h +++ b/bsp/sparkfun-redv/freedom-e-sdk/bsp/env/hifive1.h @@ -47,16 +47,16 @@ #define PIN_SPI1_MISO (12u) #define PIN_SPI1_MOSI (11u) #define PIN_SPI1_SS0 (10u) -#define PIN_SPI1_SS1 (14u) +#define PIN_SPI1_SS1 (14u) #define PIN_SPI1_SS2 (15u) #define PIN_SPI1_SS3 (16u) #define SS_PIN_TO_CS_ID(x) \ - ((x==PIN_SPI1_SS0 ? 0 : \ - (x==PIN_SPI1_SS1 ? 1 : \ - (x==PIN_SPI1_SS2 ? 2 : \ - (x==PIN_SPI1_SS3 ? 3 : \ - -1))))) + ((x==PIN_SPI1_SS0 ? 0 : \ + (x==PIN_SPI1_SS1 ? 1 : \ + (x==PIN_SPI1_SS2 ? 2 : \ + (x==PIN_SPI1_SS3 ? 3 : \ + -1))))) // These buttons are present only on the Freedom E300 Arty Dev Kit. diff --git a/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/devices/clint.h b/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/devices/clint.h index cd3e0c7a34..e6639eabf5 100644 --- a/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/devices/clint.h +++ b/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/devices/clint.h @@ -11,4 +11,4 @@ #define CLINT_MTIME 0xBFF8 #define CLINT_MTIME_size 0x8 -#endif /* _SIFIVE_CLINT_H */ +#endif /* _SIFIVE_CLINT_H */ diff --git a/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/devices/prci.h b/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/devices/prci.h index 1a3de58d29..6c5400210e 100644 --- a/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/devices/prci.h +++ b/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/devices/prci.h @@ -12,9 +12,9 @@ #define PRCI_PROCMONCFG (0x00F0) /* Fields */ -#define ROSC_DIV(x) (((x) & 0x2F) << 0 ) +#define ROSC_DIV(x) (((x) & 0x2F) << 0 ) #define ROSC_TRIM(x) (((x) & 0x1F) << 16) -#define ROSC_EN(x) (((x) & 0x1 ) << 30) +#define ROSC_EN(x) (((x) & 0x1 ) << 30) #define ROSC_RDY(x) (((x) & 0x1 ) << 31) #define XOSC_EN(x) (((x) & 0x1) << 30) diff --git a/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/devices/spi.h b/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/devices/spi.h index 916d86be26..8f79d96ef2 100644 --- a/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/devices/spi.h +++ b/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/devices/spi.h @@ -57,8 +57,8 @@ #define SPI_INSN_CMD_CODE(x) (((x) & 0xff) << 16) #define SPI_INSN_PAD_CODE(x) (((x) & 0xff) << 24) -#define SPI_TXFIFO_FULL (1 << 31) -#define SPI_RXFIFO_EMPTY (1 << 31) +#define SPI_TXFIFO_FULL (1 << 31) +#define SPI_RXFIFO_EMPTY (1 << 31) /* Values */ diff --git a/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/smp.h b/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/smp.h index 8e34388c04..04c4e0f6fb 100644 --- a/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/smp.h +++ b/bsp/sparkfun-redv/freedom-e-sdk/bsp/include/sifive/smp.h @@ -12,16 +12,16 @@ #define NONSMP_HART 0 #endif -/* If your test cannot handle multiple-threads, use this: +/* If your test cannot handle multiple-threads, use this: * smp_disable(reg1) */ -#define smp_disable(reg1, reg2) \ - csrr reg1, mhartid ;\ - li reg2, NONSMP_HART ;\ - beq reg1, reg2, hart0_entry ;\ -42: ;\ - wfi ;\ - j 42b ;\ +#define smp_disable(reg1, reg2) \ + csrr reg1, mhartid ;\ + li reg2, NONSMP_HART ;\ + beq reg1, reg2, hart0_entry ;\ +42: ;\ + wfi ;\ + j 42b ;\ hart0_entry: /* If your test needs to temporarily block multiple-threads, do this: @@ -31,35 +31,35 @@ hart0_entry: * ... multi-threaded work ... */ -#define smp_pause(reg1, reg2) \ - li reg2, 0x8 ;\ - csrw mie, reg2 ;\ - csrr reg2, mhartid ;\ +#define smp_pause(reg1, reg2) \ + li reg2, 0x8 ;\ + csrw mie, reg2 ;\ + csrr reg2, mhartid ;\ bnez reg2, 42f -#define smp_resume(reg1, reg2) \ - li reg1, CLINT_CTRL_ADDR ;\ -41: ;\ - li reg2, 1 ;\ - sw reg2, 0(reg1) ;\ - addi reg1, reg1, 4 ;\ - li reg2, CLINT_END_HART_IPI ;\ - blt reg1, reg2, 41b ;\ -42: ;\ - wfi ;\ - csrr reg2, mip ;\ - andi reg2, reg2, 0x8 ;\ - beqz reg2, 42b ;\ - li reg1, CLINT_CTRL_ADDR ;\ - csrr reg2, mhartid ;\ - slli reg2, reg2, 2 ;\ - add reg2, reg2, reg1 ;\ - sw zero, 0(reg2) ;\ -41: ;\ - lw reg2, 0(reg1) ;\ - bnez reg2, 41b ;\ - addi reg1, reg1, 4 ;\ - li reg2, CLINT_END_HART_IPI ;\ +#define smp_resume(reg1, reg2) \ + li reg1, CLINT_CTRL_ADDR ;\ +41: ;\ + li reg2, 1 ;\ + sw reg2, 0(reg1) ;\ + addi reg1, reg1, 4 ;\ + li reg2, CLINT_END_HART_IPI ;\ + blt reg1, reg2, 41b ;\ +42: ;\ + wfi ;\ + csrr reg2, mip ;\ + andi reg2, reg2, 0x8 ;\ + beqz reg2, 42b ;\ + li reg1, CLINT_CTRL_ADDR ;\ + csrr reg2, mhartid ;\ + slli reg2, reg2, 2 ;\ + add reg2, reg2, reg1 ;\ + sw zero, 0(reg2) ;\ +41: ;\ + lw reg2, 0(reg1) ;\ + bnez reg2, 41b ;\ + addi reg1, reg1, 4 ;\ + li reg2, CLINT_END_HART_IPI ;\ blt reg1, reg2, 41b #endif