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[pin][5.0.0] 修正pin框架数据类型使用不当 (#6934)

This commit is contained in:
Zxy 2023-02-27 10:17:51 +08:00 committed by GitHub
parent 93d572dee6
commit f5798d9917
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GPG Key ID: 4AEE18F83AFDEB23
4 changed files with 54 additions and 54 deletions
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12
bsp/qemu-virt64-aarch64/drivers/drv_gpio.c
View File

@ -51,7 +51,7 @@ rt_inline void pl061_write8(rt_ubase_t offset, rt_uint8_t value)
HWREG8(pl061_gpio_base + offset) = value;
}
static void pl061_pin_mode(struct rt_device *device, rt_base_t pin, rt_base_t mode)
static void pl061_pin_mode(struct rt_device *device, rt_base_t pin, rt_uint8_t mode)
{
int value;
rt_uint8_t gpiodir;
@ -101,17 +101,17 @@ static void pl061_pin_mode(struct rt_device *device, rt_base_t pin, rt_base_t mo
#endif
}
static void pl061_pin_write(struct rt_device *device, rt_base_t pin, rt_base_t value)
static void pl061_pin_write(struct rt_device *device, rt_base_t pin, rt_uint8_t value)
{
pl061_write8(BIT(pin + 2), !!value << pin);
}
static int pl061_pin_read(struct rt_device *device, rt_base_t pin)
static rt_int8_t pl061_pin_read(struct rt_device *device, rt_base_t pin)
{
return !!pl061_read8((BIT(pin + 2)));
}
static rt_err_t pl061_pin_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args), void *args)
static rt_err_t pl061_pin_attach_irq(struct rt_device *device, rt_base_t pin, rt_uint8_t mode, void (*hdr)(void *args), void *args)
{
rt_uint8_t gpiois, gpioibe, gpioiev;
rt_uint8_t bit = BIT(mode);
@ -199,7 +199,7 @@ static rt_err_t pl061_pin_attach_irq(struct rt_device *device, rt_int32_t pin, r
return RT_EOK;
}
static rt_err_t pl061_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
static rt_err_t pl061_pin_detach_irq(struct rt_device *device, rt_base_t pin)
{
if (pin < 0 || pin >= PL061_GPIO_NR)
{
@ -212,7 +212,7 @@ static rt_err_t pl061_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
return RT_EOK;
}
static rt_err_t pl061_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
static rt_err_t pl061_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled)
{
rt_uint8_t mask = BIT(pin);
rt_uint8_t gpioie;

16
bsp/stm32/libraries/HAL_Drivers/drv_gpio.c
View File

@ -199,7 +199,7 @@ static rt_base_t stm32_pin_get(const char *name)
return pin;
}
static void stm32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
static void stm32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
{
GPIO_TypeDef *gpio_port;
uint16_t gpio_pin;
@ -213,11 +213,11 @@ static void stm32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
}
}
static int stm32_pin_read(rt_device_t dev, rt_base_t pin)
static rt_int8_t stm32_pin_read(rt_device_t dev, rt_base_t pin)
{
GPIO_TypeDef *gpio_port;
uint16_t gpio_pin;
int value = PIN_LOW;
GPIO_PinState value = PIN_LOW;
if (PIN_PORT(pin) < PIN_STPORT_MAX)
{
@ -229,7 +229,7 @@ static int stm32_pin_read(rt_device_t dev, rt_base_t pin)
return value;
}
static void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
static void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
{
GPIO_InitTypeDef GPIO_InitStruct;
@ -301,8 +301,8 @@ rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
return &pin_irq_map[mapindex];
};
static rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args)
static rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_base_t pin,
rt_uint8_t mode, void (*hdr)(void *args), void *args)
{
rt_base_t level;
rt_int32_t irqindex = -1;
@ -341,7 +341,7 @@ static rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
return RT_EOK;
}
static rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
static rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_base_t pin)
{
rt_base_t level;
rt_int32_t irqindex = -1;
@ -373,7 +373,7 @@ static rt_err_t stm32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
}
static rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
rt_uint32_t enabled)
rt_uint8_t enabled)
{
const struct pin_irq_map *irqmap;
rt_base_t level;

46
components/drivers/include/drivers/pin.h
View File

@ -49,44 +49,44 @@ struct rt_device_pin
struct rt_device_pin_mode
{
rt_uint16_t pin;
rt_uint16_t mode;
rt_base_t pin;
rt_uint8_t mode; /* e.g. PIN_MODE_OUTPUT */
};
struct rt_device_pin_status
struct rt_device_pin_value
{
rt_uint16_t pin;
rt_uint16_t status;
rt_base_t pin;
rt_uint8_t value; /* PIN_LOW or PIN_HIGH */
};
struct rt_pin_irq_hdr
{
rt_int16_t pin;
rt_uint16_t mode;
rt_base_t pin;
rt_uint8_t mode; /* e.g. PIN_IRQ_MODE_RISING */
void (*hdr)(void *args);
void *args;
};
struct rt_pin_ops
{
void (*pin_mode)(struct rt_device *device, rt_base_t pin, rt_base_t mode);
void (*pin_write)(struct rt_device *device, rt_base_t pin, rt_base_t value);
int (*pin_read)(struct rt_device *device, rt_base_t pin);
rt_err_t (*pin_attach_irq)(struct rt_device *device, rt_int32_t pin,
rt_uint32_t mode, void (*hdr)(void *args), void *args);
rt_err_t (*pin_detach_irq)(struct rt_device *device, rt_int32_t pin);
rt_err_t (*pin_irq_enable)(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled);
void (*pin_mode)(struct rt_device *device, rt_base_t pin, rt_uint8_t mode);
void (*pin_write)(struct rt_device *device, rt_base_t pin, rt_uint8_t value);
rt_int8_t (*pin_read)(struct rt_device *device, rt_base_t pin);
rt_err_t (*pin_attach_irq)(struct rt_device *device, rt_base_t pin,
rt_uint8_t mode, void (*hdr)(void *args), void *args);
rt_err_t (*pin_detach_irq)(struct rt_device *device, rt_base_t pin);
rt_err_t (*pin_irq_enable)(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled);
rt_base_t (*pin_get)(const char *name);
};
int rt_device_pin_register(const char *name, const struct rt_pin_ops *ops, void *user_data);
void rt_pin_mode(rt_base_t pin, rt_base_t mode);
void rt_pin_write(rt_base_t pin, rt_base_t value);
int rt_pin_read(rt_base_t pin);
rt_err_t rt_pin_attach_irq(rt_int32_t pin, rt_uint32_t mode,
void (*hdr)(void *args), void *args);
rt_err_t rt_pin_detach_irq(rt_int32_t pin);
rt_err_t rt_pin_irq_enable(rt_base_t pin, rt_uint32_t enabled);
/* Get pin number by name,such as PA.0,P0.12 */
void rt_pin_mode(rt_base_t pin, rt_uint8_t mode);
void rt_pin_write(rt_base_t pin, rt_uint8_t value);
rt_int8_t rt_pin_read(rt_base_t pin);
rt_base_t rt_pin_get(const char *name);
rt_err_t rt_pin_attach_irq(rt_base_t pin, rt_uint8_t mode,
void (*hdr)(void *args), void *args);
rt_err_t rt_pin_detach_irq(rt_base_t pin);
rt_err_t rt_pin_irq_enable(rt_base_t pin, rt_uint8_t enabled);
#ifdef __cplusplus
}

34
components/drivers/misc/pin.c
View File

@ -15,33 +15,33 @@
static struct rt_device_pin _hw_pin;
static rt_ssize_t _pin_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{
struct rt_device_pin_status *status;
struct rt_device_pin_value *value;
struct rt_device_pin *pin = (struct rt_device_pin *)dev;
/* check parameters */
RT_ASSERT(pin != RT_NULL);
status = (struct rt_device_pin_status *)buffer;
if (status == RT_NULL || size != sizeof(*status))
value = (struct rt_device_pin_value *)buffer;
if (value == RT_NULL || size != sizeof(*value))
return 0;
status->status = pin->ops->pin_read(dev, status->pin);
value->value = pin->ops->pin_read(dev, value->pin);
return size;
}
static rt_ssize_t _pin_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
{
struct rt_device_pin_status *status;
struct rt_device_pin_value *value;
struct rt_device_pin *pin = (struct rt_device_pin *)dev;
/* check parameters */
RT_ASSERT(pin != RT_NULL);
status = (struct rt_device_pin_status *)buffer;
if (status == RT_NULL || size != sizeof(*status))
value = (struct rt_device_pin_value *)buffer;
if (value == RT_NULL || size != sizeof(*value))
return 0;
pin->ops->pin_write(dev, (rt_base_t)status->pin, (rt_base_t)status->status);
pin->ops->pin_write(dev, (rt_base_t)value->pin, (rt_base_t)value->value);
return size;
}
@ -101,7 +101,7 @@ int rt_device_pin_register(const char *name, const struct rt_pin_ops *ops, void
return 0;
}
rt_err_t rt_pin_attach_irq(rt_int32_t pin, rt_uint32_t mode,
rt_err_t rt_pin_attach_irq(rt_base_t pin, rt_uint8_t mode,
void (*hdr)(void *args), void *args)
{
RT_ASSERT(_hw_pin.ops != RT_NULL);
@ -112,7 +112,7 @@ rt_err_t rt_pin_attach_irq(rt_int32_t pin, rt_uint32_t mode,
return -RT_ENOSYS;
}
rt_err_t rt_pin_detach_irq(rt_int32_t pin)
rt_err_t rt_pin_detach_irq(rt_base_t pin)
{
RT_ASSERT(_hw_pin.ops != RT_NULL);
if (_hw_pin.ops->pin_detach_irq)
@ -122,7 +122,7 @@ rt_err_t rt_pin_detach_irq(rt_int32_t pin)
return -RT_ENOSYS;
}
rt_err_t rt_pin_irq_enable(rt_base_t pin, rt_uint32_t enabled)
rt_err_t rt_pin_irq_enable(rt_base_t pin, rt_uint8_t enabled)
{
RT_ASSERT(_hw_pin.ops != RT_NULL);
if (_hw_pin.ops->pin_irq_enable)
@ -133,25 +133,25 @@ rt_err_t rt_pin_irq_enable(rt_base_t pin, rt_uint32_t enabled)
}
/* RT-Thread Hardware PIN APIs */
void rt_pin_mode(rt_base_t pin, rt_base_t mode)
void rt_pin_mode(rt_base_t pin, rt_uint8_t mode)
{
RT_ASSERT(_hw_pin.ops != RT_NULL);
_hw_pin.ops->pin_mode(&_hw_pin.parent, pin, mode);
}
void rt_pin_write(rt_base_t pin, rt_base_t value)
void rt_pin_write(rt_base_t pin, rt_uint8_t value)
{
RT_ASSERT(_hw_pin.ops != RT_NULL);
_hw_pin.ops->pin_write(&_hw_pin.parent, pin, value);
}
int rt_pin_read(rt_base_t pin)
rt_int8_t rt_pin_read(rt_base_t pin)
{
RT_ASSERT(_hw_pin.ops != RT_NULL);
return _hw_pin.ops->pin_read(&_hw_pin.parent, pin);
}
/* Get pin number by name, such as PA.0, P0.12 */
rt_base_t rt_pin_get(const char *name)
{
RT_ASSERT(_hw_pin.ops != RT_NULL);
@ -284,7 +284,7 @@ static void _pin_cmd_mode(int argc, char *argv[])
static void _pin_cmd_read(int argc, char *argv[])
{
rt_base_t pin;
rt_base_t value;
rt_uint8_t value;
if (argc < 3)
{
_pin_cmd_print_usage();
@ -319,7 +319,7 @@ static void _pin_cmd_read(int argc, char *argv[])
static void _pin_cmd_write(int argc, char *argv[])
{
rt_base_t pin;
rt_base_t value;
rt_uint8_t value;
if (argc < 4)
{
_pin_cmd_print_usage();