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This commit is contained in:
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commit
f18dfa0850
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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@ -65,16 +65,16 @@ void timer0_isr(int vector, void *param)
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void timer0_init(void)
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{
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TMR0CON = BIT(7); //TIE
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TMR0CNT = 0;
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TMR0CON = BIT(7); //TIE
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TMR0CNT = 0;
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rt_hw_interrupt_install(IRQ_TMR0_VECTOR, timer0_isr, RT_NULL, "tick");
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rt_hw_interrupt_install(IRQ_TMR0_VECTOR, timer0_isr, RT_NULL, "tick");
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}
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void timer0_cfg(uint32_t ticks)
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{
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TMR0PR = (uint32_t)(ticks - 1UL); //1ms interrupt
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TMR0CON |= BIT(0); // EN
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TMR0PR = (uint32_t)(ticks - 1UL); //1ms interrupt
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TMR0CON |= BIT(0); // EN
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}
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void hal_mdelay(uint32_t ms)
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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|
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Date Author Notes
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@ -139,7 +139,7 @@ void saia_volume_set(rt_uint8_t volume)
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{
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if (volume > 100)
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volume = 100;
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uint32_t dvol = volume * 327; // max is 0x7ffff
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LOG_D("dvol=0x%x", dvol);
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DACVOLCON = dvol | (0x02 << 16); // dac fade in
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@ -155,7 +155,7 @@ static rt_err_t sound_getcaps(struct rt_audio_device *audio, struct rt_audio_cap
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rt_err_t result = RT_EOK;
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struct sound_device *snd_dev = RT_NULL;
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RT_ASSERT(audio != RT_NULL);
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RT_ASSERT(audio != RT_NULL);
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snd_dev = (struct sound_device *)audio->parent.user_data;
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switch (caps->main_type)
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@ -231,7 +231,7 @@ static rt_err_t sound_getcaps(struct rt_audio_device *audio, struct rt_audio_cap
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break;
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}
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return RT_EOK;
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return RT_EOK;
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}
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static rt_err_t sound_configure(struct rt_audio_device *audio, struct rt_audio_caps *caps)
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@ -320,14 +320,14 @@ static rt_err_t sound_configure(struct rt_audio_device *audio, struct rt_audio_c
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break;
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}
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return RT_EOK;
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return RT_EOK;
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}
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static rt_err_t sound_init(struct rt_audio_device *audio)
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{
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struct sound_device *snd_dev = RT_NULL;
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RT_ASSERT(audio != RT_NULL);
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RT_ASSERT(audio != RT_NULL);
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snd_dev = (struct sound_device *)audio->parent.user_data;
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adpll_init(0);
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@ -337,14 +337,14 @@ static rt_err_t sound_init(struct rt_audio_device *audio)
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saia_frequency_set(snd_dev->replay_config.samplerate);
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saia_channels_set(snd_dev->replay_config.channels);
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return RT_EOK;
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return RT_EOK;
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}
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static rt_err_t sound_start(struct rt_audio_device *audio, int stream)
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{
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struct sound_device *snd_dev = RT_NULL;
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RT_ASSERT(audio != RT_NULL);
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RT_ASSERT(audio != RT_NULL);
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snd_dev = (struct sound_device *)audio->parent.user_data;
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if (stream == AUDIO_STREAM_REPLAY)
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@ -369,8 +369,8 @@ static rt_err_t sound_stop(struct rt_audio_device *audio, int stream)
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{
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struct sound_device *snd_dev = RT_NULL;
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RT_ASSERT(audio != RT_NULL);
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snd_dev = (struct sound_device *)audio->parent.user_data;
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RT_ASSERT(audio != RT_NULL);
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snd_dev = (struct sound_device *)audio->parent.user_data;
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if (stream == AUDIO_STREAM_REPLAY)
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{
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@ -387,7 +387,7 @@ rt_size_t sound_transmit(struct rt_audio_device *audio, const void *writeBuf, vo
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rt_size_t tmp_size = size / 4;
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rt_size_t count = 0;
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RT_ASSERT(audio != RT_NULL);
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RT_ASSERT(audio != RT_NULL);
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snd_dev = (struct sound_device *)audio->parent.user_data;
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while (tmp_size-- > 0) {
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@ -395,14 +395,14 @@ rt_size_t sound_transmit(struct rt_audio_device *audio, const void *writeBuf, vo
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AUBUFDATA = ((const uint32_t *)writeBuf)[count++];
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}
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return size;
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return size;
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}
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static void sound_buffer_info(struct rt_audio_device *audio, struct rt_audio_buf_info *info)
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{
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struct sound_device *snd_dev = RT_NULL;
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RT_ASSERT(audio != RT_NULL);
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RT_ASSERT(audio != RT_NULL);
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snd_dev = (struct sound_device *)audio->parent.user_data;
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/**
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@ -425,7 +425,7 @@ static struct rt_audio_ops ops =
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.init = sound_init,
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.start = sound_start,
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.stop = sound_stop,
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.transmit = sound_transmit,
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.transmit = sound_transmit,
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.buffer_info = sound_buffer_info,
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};
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@ -443,11 +443,11 @@ void audio_isr(int vector, void *param)
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static int rt_hw_sound_init(void)
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{
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rt_uint8_t *tx_fifo = RT_NULL;
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rt_uint8_t *rx_fifo = RT_NULL;
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rt_uint8_t *tx_fifo = RT_NULL;
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rt_uint8_t *rx_fifo = RT_NULL;
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/* 分配 DMA 搬运 buffer */
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tx_fifo = rt_calloc(1, TX_FIFO_SIZE);
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/* 分配 DMA 搬运 buffer */
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tx_fifo = rt_calloc(1, TX_FIFO_SIZE);
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if(tx_fifo == RT_NULL)
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{
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return -RT_ENOMEM;
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snd_dev.tx_fifo = tx_fifo;
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/* 分配 DMA 搬运 buffer */
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rx_fifo = rt_calloc(1, TX_FIFO_SIZE);
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/* 分配 DMA 搬运 buffer */
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rx_fifo = rt_calloc(1, TX_FIFO_SIZE);
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if(rx_fifo == RT_NULL)
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{
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return -RT_ENOMEM;
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stk--;
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*stk = (rt_uint32_t)0x10003; /* Start address */
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stk--;
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*stk = (rt_uint32_t)tentry; /* Start address */
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*stk = (rt_uint32_t)tentry; /* Start address */
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stk -= 22;
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*stk = (rt_uint32_t)parameter; /* Register a0 parameter*/
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*stk = (rt_uint32_t)parameter; /* Register a0 parameter*/
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stk -= 6;
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*stk = (rt_uint32_t)tp; /* Register thread pointer */
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stk --;
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@ -24,16 +24,16 @@ void set_cpu_irq_comm(void (*irq_hook)(void))
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void cpu_irq_comm_do(void)
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{
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void (*pfnct)(void);
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void (*pfnct)(void);
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uint32_t irq_pend = PICPND & irq_mask;
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for (int i = 0; i < IRQ_TOTAL_NUM; i++) {
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for (int i = 0; i < IRQ_TOTAL_NUM; i++) {
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if (irq_pend & BIT(i)) {
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pfnct = tbl_irq_vector[i];
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if (pfnct) {
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pfnct(); /* call ISR */
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pfnct(); /* call ISR */
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}
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}
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}
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}
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}
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void rt_hw_irq_enable(int vector)
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/**
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* @brief This function will install a interrupt service routine to a interrupt.
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*
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* @param vector
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* @param handler
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* @param param
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* @param name
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* @return rt_isr_handler_t
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*
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* @param vector
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* @param handler
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* @param param
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* @param name
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* @return rt_isr_handler_t
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*/
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rt_isr_handler_t rt_hw_interrupt_install(int vector,
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rt_isr_handler_t handler,
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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|
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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|
|
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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@ -45,7 +45,7 @@ static rt_err_t ab32_adc_enabled(struct rt_adc_device *device, rt_uint32_t chann
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{
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RT_ASSERT(device != RT_NULL);
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hal_adc_enable(enabled);
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hal_adc_enable(enabled);
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return RT_EOK;
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}
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static rt_uint32_t ab32_adc_get_channel(rt_uint32_t channel)
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{
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rt_uint32_t ab32_channel = 0;
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switch (channel)
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{
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case 0:
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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|
|
|
@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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|
|
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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|
|
|
@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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|
|
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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|
|
|
@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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|
|
|
@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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@ -235,8 +235,8 @@ int rt_hw_i2c_init(void)
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ab32_i2c_bus_unlock(&soft_i2c_config[i]);
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LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
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soft_i2c_config[i].bus_name,
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soft_i2c_config[i].scl,
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soft_i2c_config[i].bus_name,
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soft_i2c_config[i].scl,
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soft_i2c_config[i].sda);
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}
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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|
|
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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|
|
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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@ -31,28 +31,28 @@
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#define ADC_CHANNEL_15 (1u << 15)
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/**
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* @}
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*
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*
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*/
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/**
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* @brief Enable ADC
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*
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* @param enable
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*
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* @param enable
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*/
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void hal_adc_enable(uint8_t enable);
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/**
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* @brief Starts conversion of the channels
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*
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*
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* @param channel @ref ADC_channels
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*/
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void hal_adc_start(uint32_t channel);
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/**
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* @brief Poll for conversion complete
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*
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*
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* @param timeout Timeout value in millisecond
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* @return hal_error_t
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* @return hal_error_t
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*/
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hal_error_t hal_adc_poll_for_conversion(uint32_t timeout);
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|
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@ -13,7 +13,7 @@ struct gpio_init
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{
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uint8_t pin;
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uint8_t dir;
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uint8_t de;
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uint8_t de;
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uint8_t pull;
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uint32_t alternate;
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uint32_t af_con; /*!< Alternate function control
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|
|
|
@ -28,7 +28,7 @@
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* G5: tx:PA1 rx:PA0
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* G6: tx:PE0 rx:PE1
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* G7: tx:PF2 rx:map to tx
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*
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*
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* UART1:
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* G1: tx:PA7 rx:PA6
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* G2: tx:PA4 rx:PA3
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|
@ -52,17 +52,17 @@
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* G1: PE7
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* G2: PF2
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* G3: PA3
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*
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*
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* LPWM2:
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* G1: PE6
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* G2: PE0
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* G3: PA2
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*
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*
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* LPWM1:
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* G1: PE5
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* G2: PB4
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* G3: PA1
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*
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*
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* LPWM0:
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* G1: PE4
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* G2: PB3
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@ -76,10 +76,10 @@
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/**
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* TMR5:
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* G1: PE1 PE2 PE3
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*
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*
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* TMR4:
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* G1: PA5 PA6 PA7
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*
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*
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* TMR3:
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* G1: PB0 PB1 PB2
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*/
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|
|
|
@ -39,7 +39,7 @@ struct uart_init
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/**
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* @brief UART handle struction definition
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*
|
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*
|
||||
*/
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struct uart_handle
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{
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|
@ -76,8 +76,8 @@ struct uart_handle
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/** @defgroup UART_Mode UART Transfer Mode
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* @{
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*/
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#define UART_MODE_TX (0x00u) /*!< TX mode */
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#define UART_MODE_TX_RX (0x01u) /*!< RX and TX mode */
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#define UART_MODE_TX (0x00u) /*!< TX mode */
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#define UART_MODE_TX_RX (0x01u) /*!< RX and TX mode */
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/**
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* @}
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|
|
|
@ -105,7 +105,7 @@ void hal_gpio_init(hal_sfr_t gpiox, gpio_init_t gpio_init)
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/**
|
||||
* @brief Read the specified input port pin.
|
||||
*
|
||||
*
|
||||
* @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN).
|
||||
* @param pin This parameter can be GPIO_PIN_x where x can be (0.15).
|
||||
* @return uint8_t The input port pin value.
|
||||
|
@ -117,7 +117,7 @@ uint8_t hal_gpio_read(hal_sfr_t gpiox, uint8_t pin)
|
|||
|
||||
/**
|
||||
* @brief Set or clear the selected data port bit.
|
||||
*
|
||||
*
|
||||
* @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN).
|
||||
* @param pin This parameter can be GPIO_PIN_x where x can be (0.15).
|
||||
* @param state specifies the value to be written to the selected bit.
|
||||
|
@ -135,7 +135,7 @@ void hal_gpio_write(hal_sfr_t gpiox, uint8_t pin, uint8_t state)
|
|||
|
||||
/**
|
||||
* @brief Toggle the specified GPIO pin.
|
||||
*
|
||||
*
|
||||
* @param port GPIO port(GPIOAN, GPIOBN, GPIOEN, GPIOFN).
|
||||
* @param pin This parameter can be GPIO_PIN_x where x can be (0.15).
|
||||
*/
|
||||
|
|
|
@ -232,7 +232,7 @@ static bool sd_go_ready_try(sd_handle_t hsd)
|
|||
case CARD_V1:
|
||||
sdmmc_acmd_op_cond(hsd, 0x00ff8000);
|
||||
break;
|
||||
|
||||
|
||||
case CARD_V2:
|
||||
sdmmc_acmd_op_cond(hsd, 0x40ff8000);
|
||||
break;
|
||||
|
@ -389,8 +389,8 @@ bool hal_sd_read(sd_handle_t hsd, void *buf, uint32_t lba)
|
|||
return true;
|
||||
}
|
||||
}
|
||||
hsd->sdcard.state = HAL_SD_STATE_INVAL;
|
||||
|
||||
hsd->sdcard.state = HAL_SD_STATE_INVAL;
|
||||
|
||||
hal_mdelay(20);
|
||||
}
|
||||
|
||||
|
|
|
@ -18,7 +18,7 @@ enum
|
|||
|
||||
/**
|
||||
* @brief Set the UART baud rate.
|
||||
*
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
* @param baud Baud rate.
|
||||
*/
|
||||
|
@ -33,9 +33,9 @@ void hal_uart_setbaud(hal_sfr_t uartx, uint32_t baud)
|
|||
|
||||
/**
|
||||
* @brief Initialize the UART mode.
|
||||
*
|
||||
*
|
||||
* @param huart UART handle.
|
||||
* @return hal_error_t
|
||||
* @return hal_error_t
|
||||
*/
|
||||
hal_error_t hal_uart_init(struct uart_handle *huart)
|
||||
{
|
||||
|
@ -51,7 +51,7 @@ hal_error_t hal_uart_init(struct uart_handle *huart)
|
|||
|
||||
/**
|
||||
* @brief DeInitialize the UART peripheral.
|
||||
*
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
*/
|
||||
void hal_uart_deinit(hal_sfr_t uartx)
|
||||
|
@ -61,7 +61,7 @@ void hal_uart_deinit(hal_sfr_t uartx)
|
|||
|
||||
/**
|
||||
* @brief Initialize the UART MSP.
|
||||
*
|
||||
*
|
||||
* @param huart UART handle.
|
||||
*/
|
||||
WEAK void HAL_UART_MspInit(struct uart_handle *huart)
|
||||
|
@ -69,9 +69,9 @@ WEAK void HAL_UART_MspInit(struct uart_handle *huart)
|
|||
|
||||
/**
|
||||
* @brief Control the UART peripheral.
|
||||
*
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
* @param cntl
|
||||
* @param cntl
|
||||
* @arg UART_MODULE_ENABLE
|
||||
* @arg UART_BIT9_ENABLE
|
||||
* @arg UART_RXIT_ENABLE
|
||||
|
@ -80,7 +80,7 @@ WEAK void HAL_UART_MspInit(struct uart_handle *huart)
|
|||
* @arg UART_CLK_SRC1
|
||||
* @arg UART_1LINE_ENABLE
|
||||
* @arg UART_RX_ENABLE
|
||||
* @param param
|
||||
* @param param
|
||||
* @arg HAL_DISABLE
|
||||
* @arg HAL_ENABLE
|
||||
*/
|
||||
|
@ -95,7 +95,7 @@ void hal_uart_control(hal_sfr_t uartx, uint32_t cntl, uint32_t param)
|
|||
|
||||
/**
|
||||
* @brief Send a character
|
||||
*
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
* @param data The characters that need to be sent
|
||||
*/
|
||||
|
@ -106,7 +106,7 @@ void hal_uart_write(hal_sfr_t uartx, uint8_t data)
|
|||
|
||||
/**
|
||||
* @brief Receive a character.
|
||||
*
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
* @return uint8_t Received character.
|
||||
*/
|
||||
|
@ -117,12 +117,12 @@ uint8_t hal_uart_read(hal_sfr_t uartx)
|
|||
|
||||
/**
|
||||
* @brief Get the UART flag.
|
||||
*
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
* @param flag
|
||||
* @param flag
|
||||
* @arg UART_FLAG_RXPND
|
||||
* @arg UART_FLAG_TXPND
|
||||
* @return uint32_t
|
||||
* @return uint32_t
|
||||
*/
|
||||
uint32_t hal_uart_getflag(hal_sfr_t uartx, uint32_t flag)
|
||||
{
|
||||
|
@ -132,9 +132,9 @@ uint32_t hal_uart_getflag(hal_sfr_t uartx, uint32_t flag)
|
|||
|
||||
/**
|
||||
* @brief Clear the UART flag.
|
||||
*
|
||||
*
|
||||
* @param uartx This parameter can be UARTxN where x can be (0.2).
|
||||
* @param flag
|
||||
* @param flag
|
||||
* @arg UART_FLAG_RXPND
|
||||
* @arg UART_FLAG_TXPND
|
||||
*/
|
||||
|
@ -145,7 +145,7 @@ void hal_uart_clrflag(hal_sfr_t uartx, uint32_t flag)
|
|||
|
||||
/**
|
||||
* @brief Configure the UART peripheral.
|
||||
*
|
||||
*
|
||||
* @param huart UART handle.
|
||||
*/
|
||||
void uart_config_all(struct uart_handle *huart)
|
||||
|
|
|
@ -17,18 +17,18 @@ typedef enum
|
|||
IRQ_SW_VECTOR = 2,
|
||||
IRQ_TMR0_VECTOR = 3,
|
||||
IRQ_TMR1_VECTOR = 4,
|
||||
IRQ_TMR2_4_5_VECTOR = 5, /*!< Timer 2, 4 and 5 Interrupt */
|
||||
IRQ_IRRX_VECTOR = 6, /*!< Timer 3 and IR receiver Interrupt */
|
||||
IRQ_TMR2_4_5_VECTOR = 5, /*!< Timer 2, 4 and 5 Interrupt */
|
||||
IRQ_IRRX_VECTOR = 6, /*!< Timer 3 and IR receiver Interrupt */
|
||||
IRQ_USB_VECTOR = 7,
|
||||
IRQ_SD_VECTOR = 8,
|
||||
IRQ_AUBUF0_1_VECTOR = 9, /*!< Audio buffer 0 and 1 Interrupt */
|
||||
IRQ_AUBUF0_1_VECTOR = 9, /*!< Audio buffer 0 and 1 Interrupt */
|
||||
IRQ_SDADC_VECTOR = 10,
|
||||
IRQ_AUDEC_VECTOR = 11, /*!< Audio codec, SBC encode and AEC FFT Interrupt */
|
||||
IRQ_SRC_VECTOR = 12, /*!< SRC, PLC and CVSD Interrupt */
|
||||
IRQ_FM_SPDIF_VECTOR = 13, /*!< FM TX, RX and SPDIF RX Interrupt */
|
||||
IRQ_UART0_2_VECTOR = 14, /*!< UART 0 to 2 Interrupt */
|
||||
IRQ_SRC_VECTOR = 12, /*!< SRC, PLC and CVSD Interrupt */
|
||||
IRQ_FM_SPDIF_VECTOR = 13, /*!< FM TX, RX and SPDIF RX Interrupt */
|
||||
IRQ_UART0_2_VECTOR = 14, /*!< UART 0 to 2 Interrupt */
|
||||
IRQ_HSUART_VECTOR = 15,
|
||||
IRQ_RTC_VECTOR = 16, /*!< RTC, LVD and WDT Interrupt */
|
||||
IRQ_RTC_VECTOR = 16, /*!< RTC, LVD and WDT Interrupt */
|
||||
IRQ_I2S_VECTOR = 17,
|
||||
IRQ_TOTAL_NUM = 23,
|
||||
} irq_type;
|
||||
|
|
Loading…
Reference in New Issue