- Remove duplicated line feeds and unnecessary annotations.
- Maintainers information is now corrected. - Withdraw the modification on EXEC_PATH of the gcc toolchain.
This commit is contained in:
0xcccccccccccc
parent
e6b5feae7c
commit
edc4028944
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@ -123,10 +123,9 @@ title TFTPBOOT
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## 6. 联系人信息
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维护人：[bernard][4],[0xcccccccccccc][5]
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维护人：[bernard][4]
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[1]: http://ftp.loongnix.org/loongsonpi/pi_2/doc
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[2]: https://pan.baidu.com/s/17dbdOE4NAJ-qEW7drVRq2w
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[3]: http://ftp.loongnix.org/embedd/ls2k/
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[4]: https://github.com/BernardXiong
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[5]: https://github.com/0xcccccccccccc
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[4]: https://github.com/BernardXiong
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@ -1,20 +1,13 @@
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#include <stdio.h>
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#include <stdlib.h>
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#include <ctype.h>
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#include <rtthread.h>
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#include <drivers/spi.h>
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#include "drv_spi.h"
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#ifdef RT_USING_SPI
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static void spi_init(uint8_t spre_spr, uint8_t copl, uint8_t cpha)
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{
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//rt_kprintf("SPI initiating with spre_spr:%2X ,copl:%2X ,cpha:%2X\n",spre_spr,copl,cpha);
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int d;
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SET_SPI(SPSR, 0xc0 | (spre_spr & 0b00000011));
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SET_SPI(PARAM, 0x40);
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SET_SPI(PARAM2, 0x01);
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@ -23,23 +16,19 @@ static void spi_init(uint8_t spre_spr, uint8_t copl, uint8_t cpha)
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SET_SPI(SOFTCS, 0xff);
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}
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static void spi_set_csn(uint8_t val) //old method
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static void spi_set_csn(uint8_t val)
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{
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SET_SPI(SOFTCS, val);
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}
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// #define RT_USING_SPI_GPIOCS
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#ifdef RT_USING_SPI_GPIOCS
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#include <drivers/pin.h>
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#endif
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static void spi_set_cs(unsigned char cs, int new_status)
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static void spi_set_cs(unsigned char cs, int new_status)
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{
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if (cs < 4)
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{
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unsigned char val = 0;
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val = GET_SPI(SOFTCS);
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val |= 0x01 << cs ; // csen=1
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if (new_status) // cs = 1
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@ -51,20 +40,16 @@ static void spi_set_cs(unsigned char cs, int new_status)
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val &= ~(0x10 << cs); // csn=0
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}
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SET_SPI(SOFTCS, val);
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return ;
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}
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#ifdef RT_USING_SPI_GPIOCS
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else
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{
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//rt_kprintf("[Warnning] GPIOCS is an experimental feature: \n ");
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//rt_kprintf("[Warnning] GPIO%d will be set to OUTPUT with value %d \n ",cs,new_status);
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rt_pin_mode(cs, PIN_MODE_OUTPUT);
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rt_pin_mode(cs, PIN_MODE_OUTPUT); // with RT_USING_SPI_GPIOCS feature enabled, gpio will be used as csn pin.
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rt_pin_write(cs, new_status);
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}
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#endif
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}
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static uint8_t spi_write_for_response(uint8_t data)
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{
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uint8_t val;
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@ -74,33 +59,27 @@ static uint8_t spi_write_for_response(uint8_t data)
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return val;
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}
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static int cmd_spi_init(int argc, char *argv[])
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{
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uint8_t spre_spr, cpol, cpha;
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switch (argc)
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{
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case 2:
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spre_spr = strtoul(argv[1], NULL, 0);
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spi_init(spre_spr, 0, 0);
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break;
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case 4:
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spre_spr = strtoul(argv[1], NULL, 0);
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cpol = strtoul(argv[2], NULL, 0);
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cpha = strtoul(argv[3], NULL, 0);
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spi_init(spre_spr, 0, 0);
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break;
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default:
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printf("\nusage : cmd_spi_init spre_spr <cpol> <cpha>\n(cmd_spi_init 0x4 0x0 0x0)\n0x4:div8 0xb:div4096\n");
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break;
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}
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}
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MSH_CMD_EXPORT(cmd_spi_init, cmd_spi_init);
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static int cmd_spi_set_csn(int argc, char *argv[])
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{
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uint8_t val, csn;
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@ -111,26 +90,22 @@ static int cmd_spi_set_csn(int argc, char *argv[])
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val = strtoul(argv[2], NULL, 0);
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spi_set_cs(csn, val);
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break;
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default:
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printf("usage:cmd_spi_set_csn csn val\n(0xbf for csn1 enable,0xff for csn1 disable)\n");
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break;
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}
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}
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MSH_CMD_EXPORT(cmd_spi_set_csn, cmd_spi_set_csn);
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static int cmd_spi_write(int argc, char *argv[])
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{
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uint8_t data, resp;
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switch (argc)
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{
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case 2:
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data = strtoul(argv[1], NULL, 0);
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resp = spi_write_for_response(data);
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printf("resp:%2X\n", resp);
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break;
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default:
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printf("usage:cmd_spi_write data\n");
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break;
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@ -138,25 +113,20 @@ static int cmd_spi_write(int argc, char *argv[])
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}
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MSH_CMD_EXPORT(cmd_spi_write, cmd_spi_write);
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static rt_err_t configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration);
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static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message *message);
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const static unsigned char SPI_DIV_TABLE[] = {0b0000, 0b0001, 0b0100, 0b0010, 0b0011, 0b0101, 0b0110, 0b0111, 0b1000, 0b1001, 0b1010, 0b1011};
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// 2 4 8 16 32 64 128 256 512 1024 2048 4096
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static rt_err_t configure(struct rt_spi_device *device,
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struct rt_spi_configuration *configuration)
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{
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unsigned char cpol = 0;
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unsigned char cpha = 0;
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RT_ASSERT(NULL != device);
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RT_ASSERT(NULL != configuration);
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// baudrate
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if (configuration->mode & RT_SPI_CPOL) // cpol
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{
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{
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cpha = 0;
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}
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//rt_kprintf("configure: cpol:%d cpha:%d\n",cpol,cpha);
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float spi_max_speed = ((float)APB_MAX_SPEED) / (8.0 / (float)APB_FREQSCALE);
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//rt_kprintf("spi max speed: %ld\n",(unsigned long)spi_max_speed);
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uint64_t div = (uint64_t)(spi_max_speed / (float)configuration->max_hz);
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//rt_kprintf("require speed: %ld\n",configuration->max_hz);
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int ctr = 0;
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while (div != 1 && ctr < 12)
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{
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ctr++;
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div = div >> 1;
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}
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//rt_kprintf("spi speed set to: %ld\n",(unsigned long)((spi_max_speed)/(float)(1<<ctr)));
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spi_init(SPI_DIV_TABLE[ctr], cpol, cpha);
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return RT_EOK;
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}
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static rt_uint32_t xfer(struct rt_spi_device *device,
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struct rt_spi_message *message)
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{
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//rt_kprintf("xfer:\n");
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unsigned char cs = 0;
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rt_uint32_t size = 0;
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const rt_uint8_t *send_ptr = NULL;
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rt_uint8_t *recv_ptr = NULL;
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rt_uint8_t data = 0;
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RT_ASSERT(NULL != device);
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RT_ASSERT(NULL != message);
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cs = (unsigned char)(device->parent.user_data);
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size = message->length;
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//rt_kprintf("[%s] cs=%d\n", __FUNCTION__, cs);
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// take cs
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if (message->cs_take)
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{
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spi_set_cs(cs, 0);
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}
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// send data
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send_ptr = message->send_buf;
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recv_ptr = message->recv_buf;
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@ -232,7 +184,6 @@ static rt_uint32_t xfer(struct rt_spi_device *device,
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{
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data = *send_ptr++;
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}
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if (NULL != recv_ptr)
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{
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*recv_ptr++ = spi_write_for_response(data);
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@ -242,31 +193,24 @@ static rt_uint32_t xfer(struct rt_spi_device *device,
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spi_write_for_response(data);
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}
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}
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// release cs
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if (message->cs_release)
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{
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spi_set_cs(cs, 1);
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}
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return message->length;
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}
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static struct rt_spi_ops loongson_spi_ops =
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{
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.configure = configure,
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.xfer = xfer
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};
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static struct rt_spi_bus loongson_spi;
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static int loongson_spi_init()
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{
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//rt_kprintf("spi_init\n");
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return rt_spi_bus_register(&loongson_spi, "spi", &loongson_spi_ops);
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}
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INIT_BOARD_EXPORT(loongson_spi_init);
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#endif
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@ -1,22 +1,20 @@
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#ifndef DRV_SPI_H
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#define DRV_SPI_H
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#ifndef LS2K_DRV_SPI_H
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#define LS2K_DRV_SPI_H
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#include <rtthread.h>
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#include <rthw.h>
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#define RFEMPTY 1
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// kseg1 byte operation
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#define KSEG1_STORE8(addr,val) *(volatile char *)(0xffffffffa0000000 | addr) = val
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#define KSEG1_LOAD8(addr) *(volatile char *)(0xffffffffa0000000 | addr)
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// clock configurations
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#define APB_MAX_SPEED 125000000U
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#define APB_FREQSCALE (((KSEG1_LOAD8(0xffffffffbfe104d2)>>4)&0x7)+1)
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// base addrs
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#define SPI_BASE 0x1fff0220
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#define PMON_ADDR 0xa1000000
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#define FLASH_ADDR 0x000000
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// bit bias
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#define SPCR 0x0
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#define SPSR 0x1
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#define FIFO 0x2
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@ -26,18 +24,9 @@
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#define PARAM 0x4
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#define SOFTCS 0x5
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#define PARAM2 0x6
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#define RFEMPTY 1
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// SPI controller operaion macros
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#define SET_SPI(addr,val) KSEG1_STORE8(SPI_BASE+addr,val)
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#define GET_SPI(addr) KSEG1_LOAD8(SPI_BASE+addr)
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//void spi_init(uint8_t ,uint8_t,uint8_t);
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//void spi_set_csn(uint8_t);
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//uint8_t spi_write_for_response(uint8_t);
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#endif
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@ -8,18 +8,14 @@
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* 2020-04-05 bigmagic Initial version
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* 2020-10-28 ma Buadrate & Multi-Port support
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*/
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/**
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* @addtogroup ls2k
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*/
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/*@{*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <rthw.h>
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#include "drv_uart.h"
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#define TRUE 1
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#define FALSE 0
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const struct serial_configure config_uart0 = {
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@ -39,21 +35,16 @@ struct rt_uart_ls2k
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};
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static rt_err_t ls2k_uart_set_buad(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct rt_uart_ls2k *uart_dev = RT_NULL;
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rt_err_t ret = RT_EOK;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
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uint64_t brtc = (125000000U) / (16 * (cfg->baud_rate));
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UART_LCR(uart_dev->base) = 0x80; // Activate buadcfg
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UART_LSB(uart_dev->base) = brtc & 0xff;
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UART_MSB(uart_dev->base) = brtc >> 8;
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if (((((short)UART_MSB(uart_dev->base)) << 8) | UART_LSB(uart_dev->base)) != brtc) ret = RT_ERROR;
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UART_LCR(uart_dev->base) = CFCR_8BITS; // Back to normal
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UART_MCR(uart_dev->base) = MCR_IENABLE/* | MCR_DTR | MCR_RTS*/;
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UART_IER(uart_dev->base) = 0;
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@ -61,7 +52,6 @@ static rt_err_t ls2k_uart_set_buad(struct rt_serial_device *serial, struct seria
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static rt_err_t ls2k_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct rt_uart_ls2k *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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ls2k_uart_set_buad(serial, cfg);
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@ -74,40 +64,30 @@ static rt_err_t ls2k_uart_configure(struct rt_serial_device *serial, struct seri
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UART_MCR(uart_dev->base) = 0x3;
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UART_LSR(uart_dev->base) = 0x60;
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UART_MSR(uart_dev->base) = 0xb0;
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return RT_EOK;
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}
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static rt_err_t ls2k_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct rt_uart_ls2k *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT: /* Disable RX IRQ */
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rt_hw_interrupt_mask(uart_dev->IRQ);
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break;
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case RT_DEVICE_CTRL_SET_INT: /* Enable RX IRQ */
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rt_hw_interrupt_umask(uart_dev->IRQ);
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UART_IER(uart_dev->base) |= (IER_IRxE | IER_ILE);
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break;
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default:
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break;
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}
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return RT_EOK;
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}
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static rt_bool_t uart_is_transmit_empty(struct rt_uart_ls2k *uart_dev)
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{
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unsigned char status = UART_LSR(uart_dev->base);
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if (status & (UARTLSR_TE | UARTLSR_TFE))
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{
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return TRUE;
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@ -117,50 +97,35 @@ static rt_bool_t uart_is_transmit_empty(struct rt_uart_ls2k *uart_dev)
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return FALSE;
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}
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}
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static int ls2k_uart_putc(struct rt_serial_device *serial, char c)
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{
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struct rt_uart_ls2k *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
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while (FALSE == uart_is_transmit_empty(uart_dev))
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;
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UART_DAT(uart_dev->base) = c;
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return 1;
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}
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static int ls2k_uart_getc(struct rt_serial_device *serial)
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{
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struct rt_uart_ls2k *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
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if (LSR_RXRDY & UART_LSR(uart_dev->base))
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{
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return UART_DAT(uart_dev->base);
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}
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return -1;
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}
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/* UART interrupt handler */
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static void uart_irq_handler(int vector, void *param)
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{
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struct rt_serial_device *serial = (struct rt_serial_device *)param;
|
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struct rt_uart_ls2k *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
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unsigned char iir = UART_IIR(uart_dev->base);
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/* Find out interrupt reason */
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if ((IIR_RXTOUT & iir) || (IIR_RXRDY & iir))
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{
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|
|
@ -168,9 +133,7 @@ static void uart_irq_handler(int vector, void *param)
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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rt_interrupt_leave();
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}
|
||||
|
||||
}
|
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|
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static const struct rt_uart_ops ls2k_uart_ops =
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{
|
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ls2k_uart_configure,
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||||
|
|
@ -178,7 +141,6 @@ static const struct rt_uart_ops ls2k_uart_ops =
|
|||
ls2k_uart_putc,
|
||||
ls2k_uart_getc,
|
||||
};
|
||||
|
||||
struct rt_uart_ls2k uart_dev0 =
|
||||
{
|
||||
(void *)UARTx_BASE(0),
|
||||
|
|
@ -190,41 +152,30 @@ struct rt_uart_ls2k uart_dev4 =
|
|||
LS2K_UART_4_5_6_7_IRQ,
|
||||
};
|
||||
|
||||
|
||||
struct rt_serial_device serial, serial4;
|
||||
|
||||
|
||||
void rt_hw_uart_init(void)
|
||||
{
|
||||
//UART0_1_ENABLE=0xff;
|
||||
struct rt_uart_ls2k *uart, *uart4;
|
||||
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
||||
|
||||
|
||||
|
||||
uart = &uart_dev0;
|
||||
uart4 = &uart_dev4;
|
||||
|
||||
serial.ops = &ls2k_uart_ops;
|
||||
serial.config = config_uart0;
|
||||
|
||||
serial4.ops = &ls2k_uart_ops;
|
||||
serial4.config = config;
|
||||
|
||||
|
||||
rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial, "UART0");
|
||||
rt_hw_interrupt_install(uart4->IRQ, uart_irq_handler, &serial4, "UART4");
|
||||
|
||||
/* register UART device */
|
||||
rt_hw_serial_register(&serial,
|
||||
"uart0",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
||||
uart);
|
||||
|
||||
rt_hw_serial_register(&serial4,
|
||||
"uart4",
|
||||
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
||||
&uart_dev4);
|
||||
|
||||
}
|
||||
/*@}*/
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@ if os.getenv('RTT_CC'):
|
|||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = "/home/ma/mips-2015.05/bin/"
|
||||
EXEC_PATH = "/opt/mips-2015.05-19-mips-sde-elf-i686-pc-linux-gnu/mips-2015.05/bin/"
|
||||
# EXEC_PATH = r'D:\mgc\embedded\codebench\bin'
|
||||
else:
|
||||
print('================ERROR===========================')
|
||||
|
|
|
|||
Loading…
Reference in New Issue