Merge pull request #1635 from uestczyh222/drv_gpio
[Bsp][STM32F4xx-HAL]fix warning
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commit
ec0e548973
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@ -1580,7 +1580,7 @@ struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
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};
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#define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
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const rt_uint16_t get_pin(uint8_t pin)
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static rt_uint16_t get_pin(uint8_t pin)
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{
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rt_uint16_t gpio_pin = __STM32_PIN_DEFAULT;
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if (pin < ITEM_NUM(pins))
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@ -1590,7 +1590,7 @@ const rt_uint16_t get_pin(uint8_t pin)
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return gpio_pin;
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};
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void stm32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
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static void stm32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
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{
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rt_uint16_t gpio_pin;
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gpio_pin = get_pin(pin);
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@ -1601,7 +1601,7 @@ void stm32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
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HAL_GPIO_WritePin(get_st_gpio(gpio_pin), get_st_pin(gpio_pin), (GPIO_PinState)value);
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}
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int stm32_pin_read(rt_device_t dev, rt_base_t pin)
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static int stm32_pin_read(rt_device_t dev, rt_base_t pin)
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{
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rt_uint16_t gpio_pin;
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gpio_pin = get_pin(pin);
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@ -1612,7 +1612,7 @@ int stm32_pin_read(rt_device_t dev, rt_base_t pin)
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return HAL_GPIO_ReadPin(get_st_gpio(gpio_pin), get_st_pin(gpio_pin));
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}
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void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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static void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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{
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rt_uint16_t gpio_pin;
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GPIO_InitTypeDef GPIO_InitStruct;
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@ -1653,7 +1653,7 @@ void stm32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
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HAL_GPIO_Init(get_st_gpio(gpio_pin), &GPIO_InitStruct);
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}
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rt_inline const struct pin_irq_map *get_pin_irq_map(rt_uint16_t gpio_pin)
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static const struct pin_irq_map *get_pin_irq_map(rt_uint16_t gpio_pin)
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{
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rt_int32_t mapindex = gpio_pin & 0xFF;
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if (mapindex < 0 || mapindex >= ITEM_NUM(pin_irq_map))
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@ -1663,7 +1663,7 @@ rt_inline const struct pin_irq_map *get_pin_irq_map(rt_uint16_t gpio_pin)
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return &pin_irq_map[mapindex];
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};
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rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
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static rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
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rt_uint32_t mode, void (*hdr)(void *args), void *args)
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{
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rt_uint16_t gpio_pin;
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@ -1701,7 +1701,7 @@ rt_err_t stm32_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
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return RT_EOK;
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}
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rt_err_t stm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
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static rt_err_t stm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
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{
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rt_uint16_t gpio_pin;
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rt_base_t level;
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@ -1730,7 +1730,7 @@ rt_err_t stm32_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
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return RT_EOK;
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}
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rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
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static rt_err_t stm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
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rt_uint32_t enabled)
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{
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rt_uint16_t gpio_pin;
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@ -1814,7 +1814,7 @@ int rt_hw_pin_init(void)
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}
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INIT_BOARD_EXPORT(rt_hw_pin_init);
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rt_inline void pin_irq_hdr(uint16_t GPIO_Pin)
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static void pin_irq_hdr(uint16_t GPIO_Pin)
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{
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int irqno = 0;
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for(irqno = 0; irqno < 16; irqno ++)
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