Add more spi mode.
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@ -59,6 +59,11 @@ extern "C"{
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#define RT_SPI_MODE_MASK (RT_SPI_CPHA | RT_SPI_CPOL | RT_SPI_MSB)
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#define RT_SPI_CS_HIGH (1<<4) /* Chipselect active high */
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#define RT_SPI_NO_CS (1<<5) /* No chipselect */
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#define RT_SPI_3WIRE (1<<6) /* SI/SO pin shared */
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#define RT_SPI_READY (1<<7) /* Slave pulls low to pause */
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/**
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* SPI message structure
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*/
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