add lpc17xx porting.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@466 bbd45198-f89e-11dd-88c7-29a3b14d5316
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;/*
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; * File : context_rvds.S
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; * This file is part of RT-Thread RTOS
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; * COPYRIGHT (C) 2009, RT-Thread Development Team
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; *
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; * The license and distribution terms for this file may be
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; * found in the file LICENSE in this distribution or at
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; * http://www.rt-thread.org/license/LICENSE
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; *
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; * Change Logs:
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; * Date Author Notes
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; * 2009-01-17 Bernard first version
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; * 2010-02-04 Magicoe Edit for LPC17xx Series
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; */
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;/**
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; * @addtogroup LPC17
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; */
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;/*@{*/
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NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
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NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
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NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
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NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
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AREA |.text|, CODE, READONLY, ALIGN=2
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THUMB
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REQUIRE8
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PRESERVE8
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IMPORT rt_thread_switch_interrput_flag
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IMPORT rt_interrupt_from_thread
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IMPORT rt_interrupt_to_thread
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;/*
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; * rt_base_t rt_hw_interrupt_disable();
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; */
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rt_hw_interrupt_disable PROC
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EXPORT rt_hw_interrupt_disable
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MRS r0, PRIMASK
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CPSID I
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BX LR
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ENDP
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;/*
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; * void rt_hw_interrupt_enable(rt_base_t level);
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; */
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rt_hw_interrupt_enable PROC
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EXPORT rt_hw_interrupt_enable
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MSR PRIMASK, r0
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BX LR
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ENDP
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;/*
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; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
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; * r0 --> from
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; * r1 --> to
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; */
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rt_hw_context_switch_interrupt
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EXPORT rt_hw_context_switch_interrupt
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rt_hw_context_switch PROC
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EXPORT rt_hw_context_switch
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; set rt_thread_switch_interrput_flag to 1
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LDR r2, =rt_thread_switch_interrput_flag
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LDR r3, [r2]
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CMP r3, #1
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BEQ _reswitch
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MOV r3, #1
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STR r3, [r2]
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LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
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STR r0, [r2]
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_reswitch
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LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
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STR r1, [r2]
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LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
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LDR r1, =NVIC_PENDSVSET
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STR r1, [r0]
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BX LR
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ENDP
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; r0 --> swith from thread stack
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; r1 --> swith to thread stack
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; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
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rt_hw_pend_sv PROC
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EXPORT rt_hw_pend_sv
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; disable interrupt to protect context switch
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MRS r2, PRIMASK
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CPSID I
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; get rt_thread_switch_interrupt_flag
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LDR r0, =rt_thread_switch_interrput_flag
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LDR r1, [r0]
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CBZ r1, pendsv_exit ; pendsv already handled
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; clear rt_thread_switch_interrput_flag to 0
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MOV r1, #0x00
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STR r1, [r0]
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LDR r0, =rt_interrupt_from_thread
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LDR r1, [r0]
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CBZ r1, swtich_to_thread ; skip register save at the first time
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MRS r1, psp ; get from thread stack pointer
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STMFD r1!, {r4 - r11} ; push r4 - r11 register
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LDR r0, [r0]
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STR r1, [r0] ; update from thread stack pointer
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swtich_to_thread
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LDR r1, =rt_interrupt_to_thread
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LDR r1, [r1]
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LDR r1, [r1] ; load thread stack pointer
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LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
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MSR psp, r1 ; update stack pointer
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pendsv_exit
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; restore interrupt
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MSR PRIMASK, r2
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ORR lr, lr, #0x04
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BX lr
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ENDP
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;/*
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; * void rt_hw_context_switch_to(rt_uint32 to);
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; * r0 --> to
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; * this fucntion is used to perform the first thread switch
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; */
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rt_hw_context_switch_to PROC
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EXPORT rt_hw_context_switch_to
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; set to thread
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LDR r1, =rt_interrupt_to_thread
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STR r0, [r1]
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; set from thread to 0
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LDR r1, =rt_interrupt_from_thread
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MOV r0, #0x0
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STR r0, [r1]
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; set interrupt flag to 1
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LDR r1, =rt_thread_switch_interrput_flag
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MOV r0, #1
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STR r0, [r1]
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; set the PendSV exception priority
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LDR r0, =NVIC_SYSPRI2
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LDR r1, =NVIC_PENDSV_PRI
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STR r1, [r0]
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; trigger the PendSV exception (causes context switch)
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LDR r0, =NVIC_INT_CTRL
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LDR r1, =NVIC_PENDSVSET
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STR r1, [r0]
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; enable interrupts at processor level
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CPSIE I
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; never reach here!
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ENDP
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; compatible with old version
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rt_hw_interrupt_thread_switch PROC
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EXPORT rt_hw_interrupt_thread_switch
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BX lr
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NOP
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ENDP
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END
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/*
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* File : cpu.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard first version
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* 2010-02-04 Magicoe Edit for LPC17xx Series
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*/
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#include <rtthread.h>
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/**
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* @addtogroup LPC17xx
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*/
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/*@{*/
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/**
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* reset cpu by dog's time-out
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*
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*/
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void rt_hw_cpu_reset()
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{
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/*NOTREACHED*/
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}
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/**
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* shutdown CPU
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*
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*/
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void rt_hw_cpu_shutdown()
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{
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rt_kprintf("shutdown...\n");
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RT_ASSERT(0);
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}
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/*@}*/
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/*
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* File : fault.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard first version
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*/
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#include <rtthread.h>
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struct stack_contex
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{
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rt_uint32_t r0;
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rt_uint32_t r1;
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rt_uint32_t r2;
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rt_uint32_t r3;
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rt_uint32_t r12;
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rt_uint32_t lr;
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rt_uint32_t pc;
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rt_uint32_t psr;
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};
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extern void rt_hw_interrupt_thread_switch(void);
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extern void list_thread(void);
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extern rt_thread_t rt_current_thread;
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void rt_hw_hard_fault_exception(struct stack_contex* contex)
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{
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rt_kprintf("psr: 0x%08x\n", contex->psr);
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rt_kprintf(" pc: 0x%08x\n", contex->pc);
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rt_kprintf(" lr: 0x%08x\n", contex->lr);
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rt_kprintf("r12: 0x%08x\n", contex->r12);
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rt_kprintf("r03: 0x%08x\n", contex->r3);
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rt_kprintf("r02: 0x%08x\n", contex->r2);
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rt_kprintf("r01: 0x%08x\n", contex->r1);
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rt_kprintf("r00: 0x%08x\n", contex->r0);
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rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name);
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#ifdef RT_USING_FINSH
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list_thread();
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#endif
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while (1);
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}
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;/*
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; * File : fault_rvds.S
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; * This file is part of RT-Thread RTOS
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; * COPYRIGHT (C) 2006, RT-Thread Development Team
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; *
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; * The license and distribution terms for this file may be
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; * found in the file LICENSE in this distribution or at
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; * http://www.rt-thread.org/license/LICENSE
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; *
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; * Change Logs:
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; * Date Author Notes
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; * 2009-01-17 Bernard first version
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; */
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AREA |.text|, CODE, READONLY, ALIGN=2
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THUMB
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REQUIRE8
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PRESERVE8
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IMPORT rt_hw_hard_fault_exception
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rt_hw_hard_fault PROC
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EXPORT rt_hw_hard_fault
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; get current context
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MRS r0, psp ; get fault thread stack pointer
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PUSH {lr}
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BL rt_hw_hard_fault_exception
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POP {lr}
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ORR lr, lr, #0x04
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BX lr
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ENDP
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END
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/*
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* File : interrupt.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard first version
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*/
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#include <rtthread.h>
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/* exception and interrupt handler table */
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rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
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rt_uint32_t rt_thread_switch_interrput_flag;
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/*@}*/
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/*
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* File : stack.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2006-08-23 Bernard the first version
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* 2010-02-04 Magicoe Edit for LPC17xx Series
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*/
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#include <rtthread.h>
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/**
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* @addtogroup LPC17xx
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*/
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/*@{*/
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/**
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* This function will initialize thread stack
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*
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* @param tentry the entry of thread
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* @param parameter the parameter of entry
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* @param stack_addr the beginning stack address
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* @param texit the function will be called when thread exit
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*
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* @return stack address
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*/
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rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
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rt_uint8_t *stack_addr, void *texit)
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{
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unsigned long *stk;
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stk = (unsigned long *)stack_addr;
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*(stk) = 0x01000000L; /* PSR */
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*(--stk) = (unsigned long)tentry; /* entry point, pc */
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*(--stk) = (unsigned long)texit; /* lr */
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*(--stk) = 0; /* r12 */
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*(--stk) = 0; /* r3 */
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*(--stk) = 0; /* r2 */
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*(--stk) = 0; /* r1 */
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*(--stk) = (unsigned long)parameter; /* r0 : argument */
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*(--stk) = 0; /* r11 */
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*(--stk) = 0; /* r10 */
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*(--stk) = 0; /* r9 */
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*(--stk) = 0; /* r8 */
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*(--stk) = 0; /* r7 */
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*(--stk) = 0; /* r6 */
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*(--stk) = 0; /* r5 */
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*(--stk) = 0; /* r4 */
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/* return task's current stack address */
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return (rt_uint8_t *)stk;
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}
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/*@}*/
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@ -0,0 +1,266 @@
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; /*
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; * File : start_rvds.s
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; * This file is part of RT-Thread RTOS
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||||||
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; * COPYRIGHT (C) 2009, RT-Thread Development Team
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||||||
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; *
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||||||
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; * The license and distribution terms for this file may be
|
||||||
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; * found in the file LICENSE in this distribution or at
|
||||||
|
; * http://www.rt-thread.org/license/LICENSE
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||||||
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; *
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; * Change Logs:
|
||||||
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; * Date Author Notes
|
||||||
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; * 2009-09-23 Bernard first implementation
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; * 2010-02-04 Magicoe Edit for LPC17xx Series
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; */
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;* <<< Use Configuration Wizard in Context Menu >>>
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||||||
|
; Amount of memory (in bytes) allocated for Stack
|
||||||
|
; Tailor this value to your application needs
|
||||||
|
; <h> Stack Configuration
|
||||||
|
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||||
|
; </h>
|
||||||
|
|
||||||
|
Stack_Size EQU 0x00000200
|
||||||
|
|
||||||
|
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||||
|
Stack_Mem SPACE Stack_Size
|
||||||
|
__initial_sp
|
||||||
|
; not use external SRAM as data memory
|
||||||
|
|
||||||
|
; <h> Heap Configuration
|
||||||
|
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||||
|
; </h>
|
||||||
|
|
||||||
|
Heap_Size EQU 0x00000000
|
||||||
|
|
||||||
|
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||||
|
__heap_base
|
||||||
|
Heap_Mem SPACE Heap_Size
|
||||||
|
__heap_limit
|
||||||
|
|
||||||
|
PRESERVE8
|
||||||
|
THUMB
|
||||||
|
|
||||||
|
IMPORT rt_hw_hard_fault
|
||||||
|
IMPORT rt_hw_pend_sv
|
||||||
|
IMPORT rt_hw_timer_handler
|
||||||
|
|
||||||
|
; Vector Table Mapped to Address 0 at Reset
|
||||||
|
AREA RESET, DATA, READONLY
|
||||||
|
EXPORT __Vectors
|
||||||
|
EXPORT __Vectors_End
|
||||||
|
EXPORT __Vectors_Size
|
||||||
|
|
||||||
|
__Vectors DCD __initial_sp ; Top of Stack
|
||||||
|
DCD Reset_Handler ; Reset Handler
|
||||||
|
DCD NMI_Handler ; NMI Handler
|
||||||
|
DCD rt_hw_hard_fault ; Hard Fault Handler
|
||||||
|
DCD MemManage_Handler ; MPU Fault Handler
|
||||||
|
DCD BusFault_Handler ; Bus Fault Handler
|
||||||
|
DCD UsageFault_Handler ; Usage Fault Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD SVC_Handler ; SVCall Handler
|
||||||
|
DCD DebugMon_Handler ; Debug Monitor Handler
|
||||||
|
DCD 0 ; Reserved
|
||||||
|
DCD rt_hw_pend_sv ; PendSV Handler in RT-Thread
|
||||||
|
DCD rt_hw_timer_handler ; SysTick Handler in RT-Thread
|
||||||
|
|
||||||
|
; External Interrupts
|
||||||
|
DCD WDT_IRQHandler ; 16: Watchdog Timer
|
||||||
|
DCD TIMER0_IRQHandler ; 17: Timer0
|
||||||
|
DCD TIMER1_IRQHandler ; 18: Timer1
|
||||||
|
DCD TIMER2_IRQHandler ; 19: Timer2
|
||||||
|
DCD TIMER3_IRQHandler ; 20: Timer3
|
||||||
|
DCD UART0_IRQHandler ; 21: UART0
|
||||||
|
DCD UART1_IRQHandler ; 22: UART1
|
||||||
|
DCD UART2_IRQHandler ; 23: UART2
|
||||||
|
DCD UART3_IRQHandler ; 24: UART3
|
||||||
|
DCD PWM1_IRQHandler ; 25: PWM1
|
||||||
|
DCD I2C0_IRQHandler ; 26: I2C0
|
||||||
|
DCD I2C1_IRQHandler ; 27: I2C1
|
||||||
|
DCD I2C2_IRQHandler ; 28: I2C2
|
||||||
|
DCD SPI_IRQHandler ; 29: SPI
|
||||||
|
DCD SSP0_IRQHandler ; 30: SSP0
|
||||||
|
DCD SSP1_IRQHandler ; 31: SSP1
|
||||||
|
DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL)
|
||||||
|
DCD RTC_IRQHandler ; 33: Real Time Clock
|
||||||
|
DCD EINT0_IRQHandler ; 34: External Interrupt 0
|
||||||
|
DCD EINT1_IRQHandler ; 35: External Interrupt 1
|
||||||
|
DCD EINT2_IRQHandler ; 36: External Interrupt 2
|
||||||
|
DCD EINT3_IRQHandler ; 37: External Interrupt 3
|
||||||
|
DCD ADC_IRQHandler ; 38: A/D Converter
|
||||||
|
DCD BOD_IRQHandler ; 39: Brown-Out Detect
|
||||||
|
DCD USB_IRQHandler ; 40: USB
|
||||||
|
DCD CAN_IRQHandler ; 41: CAN
|
||||||
|
DCD DMA_IRQHandler ; 42: General Purpose DMA
|
||||||
|
DCD I2S_IRQHandler ; 43: I2S
|
||||||
|
DCD ENET_IRQHandler ; 44: Ethernet
|
||||||
|
DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer
|
||||||
|
DCD MCPWM_IRQHandler ; 46: Motor Control PWM
|
||||||
|
DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface
|
||||||
|
DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
|
||||||
|
|
||||||
|
__Vectors_End
|
||||||
|
|
||||||
|
__Vectors_Size EQU __Vectors_End - __Vectors
|
||||||
|
|
||||||
|
AREA |.text|, CODE, READONLY
|
||||||
|
|
||||||
|
; Reset handler routine
|
||||||
|
Reset_Handler PROC
|
||||||
|
EXPORT Reset_Handler [WEAK]
|
||||||
|
IMPORT __main
|
||||||
|
|
||||||
|
LDR R1, = __initial_sp ; restore original stack pointer
|
||||||
|
MSR MSP, R1
|
||||||
|
|
||||||
|
LDR R0, =__main
|
||||||
|
BX R0
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
; Dummy Exception Handlers (infinite loops which can be modified)
|
||||||
|
|
||||||
|
NMI_Handler PROC
|
||||||
|
EXPORT NMI_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
HardFault_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT HardFault_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
MemManage_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT MemManage_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
BusFault_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT BusFault_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
UsageFault_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT UsageFault_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
SVC_Handler PROC
|
||||||
|
EXPORT SVC_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
DebugMon_Handler\
|
||||||
|
PROC
|
||||||
|
EXPORT DebugMon_Handler [WEAK]
|
||||||
|
B .
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
Default_Handler PROC
|
||||||
|
|
||||||
|
EXPORT WDT_IRQHandler [WEAK]
|
||||||
|
EXPORT TIMER0_IRQHandler [WEAK]
|
||||||
|
EXPORT TIMER1_IRQHandler [WEAK]
|
||||||
|
EXPORT TIMER2_IRQHandler [WEAK]
|
||||||
|
EXPORT TIMER3_IRQHandler [WEAK]
|
||||||
|
EXPORT UART0_IRQHandler [WEAK]
|
||||||
|
EXPORT UART1_IRQHandler [WEAK]
|
||||||
|
EXPORT UART2_IRQHandler [WEAK]
|
||||||
|
EXPORT UART3_IRQHandler [WEAK]
|
||||||
|
EXPORT PWM1_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C0_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C1_IRQHandler [WEAK]
|
||||||
|
EXPORT I2C2_IRQHandler [WEAK]
|
||||||
|
EXPORT SPI_IRQHandler [WEAK]
|
||||||
|
EXPORT SSP0_IRQHandler [WEAK]
|
||||||
|
EXPORT SSP1_IRQHandler [WEAK]
|
||||||
|
EXPORT PLL0_IRQHandler [WEAK]
|
||||||
|
EXPORT RTC_IRQHandler [WEAK]
|
||||||
|
EXPORT EINT0_IRQHandler [WEAK]
|
||||||
|
EXPORT EINT1_IRQHandler [WEAK]
|
||||||
|
EXPORT EINT2_IRQHandler [WEAK]
|
||||||
|
EXPORT EINT3_IRQHandler [WEAK]
|
||||||
|
EXPORT ADC_IRQHandler [WEAK]
|
||||||
|
EXPORT BOD_IRQHandler [WEAK]
|
||||||
|
EXPORT USB_IRQHandler [WEAK]
|
||||||
|
EXPORT CAN_IRQHandler [WEAK]
|
||||||
|
EXPORT DMA_IRQHandler [WEAK]
|
||||||
|
EXPORT I2S_IRQHandler [WEAK]
|
||||||
|
EXPORT ENET_IRQHandler [WEAK]
|
||||||
|
EXPORT RIT_IRQHandler [WEAK]
|
||||||
|
EXPORT MCPWM_IRQHandler [WEAK]
|
||||||
|
EXPORT QEI_IRQHandler [WEAK]
|
||||||
|
EXPORT PLL1_IRQHandler [WEAK]
|
||||||
|
|
||||||
|
WDT_IRQHandler
|
||||||
|
TIMER0_IRQHandler
|
||||||
|
TIMER1_IRQHandler
|
||||||
|
TIMER2_IRQHandler
|
||||||
|
TIMER3_IRQHandler
|
||||||
|
UART0_IRQHandler
|
||||||
|
UART1_IRQHandler
|
||||||
|
UART2_IRQHandler
|
||||||
|
UART3_IRQHandler
|
||||||
|
PWM1_IRQHandler
|
||||||
|
I2C0_IRQHandler
|
||||||
|
I2C1_IRQHandler
|
||||||
|
I2C2_IRQHandler
|
||||||
|
SPI_IRQHandler
|
||||||
|
SSP0_IRQHandler
|
||||||
|
SSP1_IRQHandler
|
||||||
|
PLL0_IRQHandler
|
||||||
|
RTC_IRQHandler
|
||||||
|
EINT0_IRQHandler
|
||||||
|
EINT1_IRQHandler
|
||||||
|
EINT2_IRQHandler
|
||||||
|
EINT3_IRQHandler
|
||||||
|
ADC_IRQHandler
|
||||||
|
BOD_IRQHandler
|
||||||
|
USB_IRQHandler
|
||||||
|
CAN_IRQHandler
|
||||||
|
DMA_IRQHandler
|
||||||
|
I2S_IRQHandler
|
||||||
|
ENET_IRQHandler
|
||||||
|
RIT_IRQHandler
|
||||||
|
MCPWM_IRQHandler
|
||||||
|
QEI_IRQHandler
|
||||||
|
PLL1_IRQHandler
|
||||||
|
|
||||||
|
B .
|
||||||
|
|
||||||
|
ENDP
|
||||||
|
|
||||||
|
ALIGN
|
||||||
|
|
||||||
|
;*******************************************************************************
|
||||||
|
; User Stack and Heap initialization
|
||||||
|
;*******************************************************************************
|
||||||
|
IF :DEF:__MICROLIB
|
||||||
|
|
||||||
|
EXPORT __initial_sp
|
||||||
|
EXPORT __heap_base
|
||||||
|
EXPORT __heap_limit
|
||||||
|
|
||||||
|
ELSE
|
||||||
|
|
||||||
|
IMPORT __use_two_region_memory
|
||||||
|
EXPORT __user_initial_stackheap
|
||||||
|
|
||||||
|
__user_initial_stackheap
|
||||||
|
|
||||||
|
LDR R0, = Heap_Mem
|
||||||
|
LDR R1, =(Stack_Mem + Stack_Size)
|
||||||
|
LDR R2, = (Heap_Mem + Heap_Size)
|
||||||
|
LDR R3, = Stack_Mem
|
||||||
|
BX LR
|
||||||
|
|
||||||
|
ALIGN
|
||||||
|
|
||||||
|
ENDIF
|
||||||
|
|
||||||
|
END
|
||||||
|
|
||||||
|
;******************* COPYLEFT 2010 Magicoe *****END OF FILE*****
|
||||||
|
|
Loading…
Reference in New Issue