Merge pull request #9212 from polarvid/shell/opt-gctx
[libcpu] trimming ARM64 general context
This commit is contained in:
commit
e955e411b7
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@ -106,18 +106,16 @@ int arch_set_thread_context(void (*exit)(void), void *new_thread_stack,
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struct rt_hw_exp_stack *ori_syscall = rt_thread_self()->user_ctx.ctx;
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RT_ASSERT(ori_syscall != RT_NULL);
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thread_frame = (void *)((long)new_thread_stack - sizeof(struct rt_hw_exp_stack));
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syscall_frame = (void *)((long)new_thread_stack - 2 * sizeof(struct rt_hw_exp_stack));
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new_thread_stack = (rt_ubase_t*)RT_ALIGN_DOWN((rt_ubase_t)new_thread_stack, 16);
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syscall_frame = (void *)((long)new_thread_stack - sizeof(struct rt_hw_exp_stack));
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memcpy(syscall_frame, ori_syscall, sizeof(*syscall_frame));
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syscall_frame->sp_el0 = (long)user_stack;
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syscall_frame->x0 = 0;
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thread_frame->cpsr = ((3 << 6) | 0x4 | 0x1);
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thread_frame->pc = (long)exit;
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thread_frame->x0 = 0;
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thread_frame = (void *)rt_hw_stack_init(exit, RT_NULL, (void *)syscall_frame, RT_NULL);
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*thread_sp = syscall_frame;
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*thread_sp = thread_frame;
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return 0;
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}
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@ -125,12 +125,15 @@ lwp_exec_user:
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* since this routine reset the SP, we take it as a start point
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*/
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START_POINT(SVC_Handler)
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mov fp, xzr
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mov lr, xzr
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/* x0 is initial sp */
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mov sp, x0
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msr daifclr, #3 /* enable interrupt */
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bl rt_thread_self
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GET_THREAD_SELF x0
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bl lwp_user_setting_save
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ldp x8, x9, [sp, #(CONTEXT_OFFSET_X8)]
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@ -85,11 +85,12 @@ rt_err_t rt_hw_backtrace_frame_unwind(rt_thread_t thread, struct rt_hw_backtrace
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if (fp && !((long)fp & 0x7))
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{
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#ifdef RT_USING_SMART
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#define IN_USER_SPACE(addr) ((rt_ubase_t)(addr) >= USER_VADDR_START && (rt_ubase_t)(addr) < USER_VADDR_TOP)
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if (thread && thread->lwp && rt_scheduler_is_available())
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{
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rt_lwp_t lwp = thread->lwp;
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void *this_lwp = lwp_self();
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if (this_lwp == lwp && rt_kmem_v2p(fp) != ARCH_MAP_FAILED)
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if ((!IN_USER_SPACE(fp) || this_lwp == lwp) && rt_kmem_v2p(fp) != ARCH_MAP_FAILED)
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{
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rc = _bt_kaddr(fp, frame);
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}
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@ -129,8 +130,8 @@ rt_err_t rt_hw_backtrace_frame_get(rt_thread_t thread, struct rt_hw_backtrace_fr
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}
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else
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{
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frame->pc = ARCH_CONTEXT_FETCH(thread->sp, 3);
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frame->fp = ARCH_CONTEXT_FETCH(thread->sp, 7);
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frame->pc = ARCH_CONTEXT_FETCH(thread->sp, 0);
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frame->fp = ARCH_CONTEXT_FETCH(thread->sp, 4);
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rc = RT_EOK;
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}
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return rc;
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@ -23,4 +23,15 @@
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.cfi_endproc; \
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.size name, .-name;
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.macro GET_THREAD_SELF, dst:req
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#ifdef ARCH_USING_HW_THREAD_SELF
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mrs x0, tpidr_el1
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#else /* !ARCH_USING_HW_THREAD_SELF */
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bl rt_thread_self
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#endif /* ARCH_USING_HW_THREAD_SELF */
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.if \dst != x0
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mov dst, x0
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.endif
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.endm
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#endif /* __ASM_GENERIC_H__ */
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@ -10,67 +10,61 @@
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#ifndef __ARM64_INC_CONTEXT_H__
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#define __ARM64_INC_CONTEXT_H__
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.macro SAVE_CONTEXT_SWITCH
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#include "armv8.h"
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.macro SAVE_CONTEXT_SWITCH, tmpx, tmp2x
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/* Save the entire context. */
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SAVE_FPU sp
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stp x0, x1, [sp, #-0x10]!
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stp x2, x3, [sp, #-0x10]!
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stp x4, x5, [sp, #-0x10]!
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stp x6, x7, [sp, #-0x10]!
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stp x8, x9, [sp, #-0x10]!
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stp x10, x11, [sp, #-0x10]!
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stp x12, x13, [sp, #-0x10]!
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stp x14, x15, [sp, #-0x10]!
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stp x16, x17, [sp, #-0x10]!
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stp x18, x19, [sp, #-0x10]!
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stp x20, x21, [sp, #-0x10]!
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stp x22, x23, [sp, #-0x10]!
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stp x24, x25, [sp, #-0x10]!
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stp x26, x27, [sp, #-0x10]!
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stp x28, x29, [sp, #-0x10]!
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mrs x28, fpcr
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mrs x29, fpsr
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stp x28, x29, [sp, #-0x10]!
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mrs x29, sp_el0
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stp x29, x30, [sp, #-0x10]!
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stp x19, x20, [sp, #-0x10]!
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stp x21, x22, [sp, #-0x10]!
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stp x23, x24, [sp, #-0x10]!
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stp x25, x26, [sp, #-0x10]!
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stp x27, x28, [sp, #-0x10]!
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mrs \tmpx, sp_el0
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stp x29, \tmpx, [sp, #-0x10]!
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mrs \tmpx, fpcr
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mrs \tmp2x, fpsr
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stp \tmpx, \tmp2x, [sp, #-0x10]!
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mov \tmpx, #((3 << 6) | 0x5) /* el1h, disable interrupt */
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stp x30, \tmpx, [sp, #-0x10]!
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.endm
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.macro SAVE_CONTEXT_SWITCH_FAST
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/* Save the entire context. */
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add sp, sp, #-1 * CONTEXT_FPU_SIZE
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add sp, sp, #-7 * 16
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mov x19, #((3 << 6) | 0x4 | 0x1) /* el1h, disable interrupt */
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mov x18, x30
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stp lr, x19, [sp, #-0x10]!
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stp x18, x19, [sp, #-0x10]!
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.endm
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.macro _RESTORE_CONTEXT_SWITCH
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ldp x2, x3, [sp], #0x10 /* SPSR and ELR. */
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ldp x30, x19, [sp], #0x10 /* SPSR and ELR. */
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msr elr_el1, x30
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msr spsr_el1, x19
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tst x3, #0x1f
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msr spsr_el1, x3
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msr elr_el1, x2
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ldp x29, x30, [sp], #0x10
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msr sp_el0, x29
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ldp x28, x29, [sp], #0x10
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msr fpcr, x28
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msr fpsr, x29
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ldp x28, x29, [sp], #0x10
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ldp x26, x27, [sp], #0x10
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ldp x24, x25, [sp], #0x10
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ldp x22, x23, [sp], #0x10
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ldp x20, x21, [sp], #0x10
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ldp x18, x19, [sp], #0x10
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ldp x16, x17, [sp], #0x10
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ldp x14, x15, [sp], #0x10
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ldp x12, x13, [sp], #0x10
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ldp x10, x11, [sp], #0x10
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ldp x8, x9, [sp], #0x10
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ldp x6, x7, [sp], #0x10
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ldp x4, x5, [sp], #0x10
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ldp x2, x3, [sp], #0x10
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ldp x0, x1, [sp], #0x10
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/* restore NEON */
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ldp x19, x20, [sp], #0x10
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msr fpcr, x19
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msr fpsr, x20
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ldp x29, x19, [sp], #0x10
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msr sp_el0, x19
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ldp x27, x28, [sp], #0x10
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ldp x25, x26, [sp], #0x10
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ldp x23, x24, [sp], #0x10
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ldp x21, x22, [sp], #0x10
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ldp x19, x20, [sp], #0x10
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RESTORE_FPU sp
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#ifdef RT_USING_SMART
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beq arch_ret_to_user
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#endif
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eret
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.endm
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@ -35,13 +35,17 @@
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rt_hw_context_switch_to:
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ldr x0, [x0]
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mov sp, x0
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mov x0, x1
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/* reserved to_thread */
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mov x19, x1
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mov x0, x19
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bl rt_cpus_lock_status_restore
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#ifdef RT_USING_SMART
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bl rt_thread_self
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mov x0, x19
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bl lwp_user_setting_restore
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#endif
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b rt_hw_context_switch_exit
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b _context_switch_exit
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.globl rt_hw_context_switch
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@ -53,7 +57,7 @@ to, struct rt_thread *to_thread);
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* X2 --> to_thread
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*/
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rt_hw_context_switch:
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SAVE_CONTEXT_SWITCH
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SAVE_CONTEXT_SWITCH x19, x20
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mov x3, sp
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str x3, [x0] // store sp in preempted tasks TCB
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ldr x0, [x1] // get new task stack pointer
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@ -68,10 +72,15 @@ rt_hw_context_switch:
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mov x0, x19
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bl lwp_user_setting_restore
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#endif
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b rt_hw_context_switch_exit
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b _context_switch_exit
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.globl rt_hw_irq_exit
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.globl rt_hw_context_switch_interrupt
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#define EXP_FRAME x19
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#define FROM_SPP x20
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#define TO_SPP x21
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#define TO_TCB x22
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/*
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* void rt_hw_context_switch_interrupt(context, from sp, to sp, tp tcb)
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* X0 :interrupt context
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@ -80,30 +89,45 @@ rt_hw_context_switch:
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* X3 :to_thread's tcb
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*/
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rt_hw_context_switch_interrupt:
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stp x0, x1, [sp, #-0x10]!
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stp x2, x3, [sp, #-0x10]!
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#ifdef RT_USING_DEBUG
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/* debug frame for backtrace */
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stp x29, x30, [sp, #-0x10]!
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#ifdef RT_USING_SMART
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bl rt_thread_self
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bl lwp_user_setting_save
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#endif
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ldp x29, x30, [sp], #0x10
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ldp x2, x3, [sp], #0x10
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ldp x0, x1, [sp], #0x10
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str x0, [x1]
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ldr x0, [x2]
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mov sp, x0
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mov x0, x3
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mov x19, x0
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bl rt_cpus_lock_status_restore
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mov x0, x19
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#ifdef RT_USING_SMART
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bl lwp_user_setting_restore
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#endif
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b rt_hw_context_switch_exit
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#endif /* RT_USING_DEBUG */
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.global rt_hw_context_switch_exit
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rt_hw_context_switch_exit:
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clrex
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/* we can discard all the previous ABI here */
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mov EXP_FRAME, x0
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mov FROM_SPP, x1
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mov TO_SPP, x2
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mov TO_TCB, x3
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#ifdef RT_USING_SMART
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GET_THREAD_SELF x0
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bl lwp_user_setting_save
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#endif /* RT_USING_SMART */
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/* reset SP of from-thread */
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mov sp, EXP_FRAME
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/* push context for swtich */
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adr lr, rt_hw_irq_exit
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SAVE_CONTEXT_SWITCH_FAST
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/* save SP of from-thread */
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mov x0, sp
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str x0, [FROM_SPP]
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/* setup SP to to-thread's */
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ldr x0, [TO_SPP]
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mov sp, x0
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mov x0, TO_TCB
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bl rt_cpus_lock_status_restore
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#ifdef RT_USING_SMART
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mov x0, TO_TCB
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bl lwp_user_setting_restore
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#endif /* RT_USING_SMART */
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b _context_switch_exit
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_context_switch_exit:
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clrex
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RESTORE_CONTEXT_SWITCH
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@ -20,16 +20,10 @@
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#include <armv8.h>
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.macro RESTORE_CONTEXT_SWITCH
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/* Set the SP to point to the stack of the task being restored. */
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mov sp, x0
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_RESTORE_CONTEXT_SWITCH
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.endm
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.macro RESTORE_IRQ_CONTEXT
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/* Set the SP to point to the stack of the task being restored. */
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mov sp, x0
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ldp x2, x3, [sp], #0x10 /* SPSR and ELR. */
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tst x3, #0x1f
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@ -15,10 +15,14 @@
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#include "../include/vector_gcc.h"
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#include "context_gcc.h"
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.section .text
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.globl vector_fiq
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vector_fiq:
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b .
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.globl rt_hw_irq_exit
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START_POINT(vector_irq)
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SAVE_IRQ_CONTEXT
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stp x0, x1, [sp, #-0x10]! /* X0 is thread sp */
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@ -42,7 +46,7 @@ START_POINT(vector_irq)
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ldp x0, x1, [sp], #0x10
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bl rt_scheduler_do_irq_switch
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mov x0, sp
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rt_hw_irq_exit:
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RESTORE_IRQ_CONTEXT
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START_POINT_END(vector_irq)
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@ -41,44 +41,22 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
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*(rt_uint128_t *)stk = (rt_uint128_t) { 0 };
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}
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*(--stk) = (rt_ubase_t)0; /* X1 */
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*(--stk) = (rt_ubase_t)parameter; /* X0 */
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*(--stk) = (rt_ubase_t)3; /* X3 */
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*(--stk) = (rt_ubase_t)2; /* X2 */
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*(--stk) = (rt_ubase_t)5; /* X5 */
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*(--stk) = (rt_ubase_t)4; /* X4 */
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*(--stk) = (rt_ubase_t)7; /* X7 */
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*(--stk) = (rt_ubase_t)6; /* X6 */
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*(--stk) = (rt_ubase_t)9; /* X9 */
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*(--stk) = (rt_ubase_t)8; /* X8 */
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*(--stk) = (rt_ubase_t)11; /* X11 */
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*(--stk) = (rt_ubase_t)10; /* X10 */
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*(--stk) = (rt_ubase_t)13; /* X13 */
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*(--stk) = (rt_ubase_t)12; /* X12 */
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*(--stk) = (rt_ubase_t)15; /* X15 */
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*(--stk) = (rt_ubase_t)14; /* X14 */
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*(--stk) = (rt_ubase_t)17; /* X17 */
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*(--stk) = (rt_ubase_t)16; /* X16 */
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*(--stk) = (rt_ubase_t)tentry; /* X19, 1st param */
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*(--stk) = (rt_ubase_t)18; /* X18 */
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*(--stk) = (rt_ubase_t)21; /* X21 */
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*(--stk) = (rt_ubase_t)texit; /* X20, 2nd param */
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*(--stk) = (rt_ubase_t)23; /* X23 */
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*(--stk) = (rt_ubase_t)22; /* X22 */
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*(--stk) = (rt_ubase_t)25; /* X25 */
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*(--stk) = (rt_ubase_t)24; /* X24 */
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*(--stk) = (rt_ubase_t)27; /* X27 */
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*(--stk) = (rt_ubase_t)26; /* X26 */
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*(--stk) = (rt_ubase_t)0; /* X29 - addr 0 as AAPCS64 specified */
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*(--stk) = (rt_ubase_t)28; /* X28 */
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*(--stk) = (rt_ubase_t)0; /* FPSR */
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*(--stk) = (rt_ubase_t)0; /* FPCR */
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*(--stk) = (rt_ubase_t)0; /* X30 - procedure call link register. */
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*(--stk) = (rt_ubase_t)0; /* sp_el0 */
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*(--stk) = INITIAL_SPSR_EL1;
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*(--stk) = (rt_ubase_t)_thread_start; /* Exception return address. */
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*(--stk) = (rt_ubase_t)texit; /* X20, 2nd param */
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*(--stk) = (rt_ubase_t)tentry; /* X19, 1st param */
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*(--stk) = (rt_ubase_t)22; /* X22 */
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*(--stk) = (rt_ubase_t)parameter; /* X21, 3rd param */
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*(--stk) = (rt_ubase_t)24; /* X24 */
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*(--stk) = (rt_ubase_t)23; /* X23 */
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*(--stk) = (rt_ubase_t)26; /* X26 */
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*(--stk) = (rt_ubase_t)25; /* X25 */
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*(--stk) = (rt_ubase_t)28; /* X28 */
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*(--stk) = (rt_ubase_t)27; /* X27 */
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*(--stk) = (rt_ubase_t)0; /* sp_el0 */
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*(--stk) = (rt_ubase_t)0; /* X29 - addr 0 as AAPCS64 specified */
|
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*(--stk) = (rt_ubase_t)0; /* FPSR */
|
||||
*(--stk) = (rt_ubase_t)0; /* FPCR */
|
||||
*(--stk) = INITIAL_SPSR_EL1; /* Save Processor States */
|
||||
*(--stk) = (rt_ubase_t)_thread_start; /* Exception return address. */
|
||||
|
||||
/* return task's current stack address */
|
||||
return (rt_uint8_t *)stk;
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
.section .text
|
||||
|
||||
START_POINT(_thread_start)
|
||||
mov x0, x21
|
||||
blr x19
|
||||
mov x29, #0
|
||||
blr x20
|
||||
|
|
|
@ -44,7 +44,7 @@ rt_thread_switch_interrupt_flag:
|
|||
rt_hw_context_switch_to:
|
||||
clrex
|
||||
ldr x0, [x0]
|
||||
RESTORE_CONTEXT_SWITCH
|
||||
RESTORE_CONTEXT_SWITCH x0
|
||||
|
||||
/*
|
||||
* void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to);
|
||||
|
@ -55,23 +55,23 @@ rt_hw_context_switch_to:
|
|||
.globl rt_hw_context_switch
|
||||
rt_hw_context_switch:
|
||||
clrex
|
||||
SAVE_CONTEXT_SWITCH
|
||||
SAVE_CONTEXT_SWITCH x19, x20
|
||||
|
||||
mov x2, sp
|
||||
str x2, [x0] // store sp in preempted tasks TCB
|
||||
ldr x0, [x1] // get new task stack pointer
|
||||
|
||||
RESTORE_CONTEXT_SWITCH
|
||||
RESTORE_CONTEXT_SWITCH x0
|
||||
|
||||
/*
|
||||
* void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to, rt_thread_t from_thread, rt_thread_t to_thread);
|
||||
*/
|
||||
.globl rt_thread_switch_interrupt_flag
|
||||
.globl rt_interrupt_from_thread
|
||||
.globl rt_interrupt_to_thread
|
||||
.globl rt_hw_context_switch_interrupt
|
||||
|
||||
/*
|
||||
* void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to, rt_thread_t from_thread, rt_thread_t to_thread);
|
||||
*/
|
||||
rt_hw_context_switch_interrupt:
|
||||
clrex
|
||||
ldr x6, =rt_thread_switch_interrupt_flag
|
||||
ldr x7, [x6]
|
||||
cmp x7, #1
|
||||
|
@ -95,3 +95,23 @@ _reswitch:
|
|||
ldr x6, =rt_interrupt_to_thread // set rt_interrupt_to_thread
|
||||
str x1, [x6]
|
||||
ret
|
||||
|
||||
.globl rt_hw_context_switch_interrupt_do
|
||||
|
||||
/**
|
||||
* rt_hw_context_switch_interrupt_do(void)
|
||||
*/
|
||||
rt_hw_context_switch_interrupt_do:
|
||||
clrex
|
||||
SAVE_CONTEXT_SWITCH_FAST
|
||||
|
||||
ldr x3, =rt_interrupt_from_thread
|
||||
ldr x4, [x3]
|
||||
mov x0, sp
|
||||
str x0, [x4] // store sp in preempted tasks's tcb
|
||||
|
||||
ldr x3, =rt_interrupt_to_thread
|
||||
ldr x4, [x3]
|
||||
ldr x0, [x4] // get new task's stack pointer
|
||||
|
||||
RESTORE_CONTEXT_SWITCH x0
|
||||
|
|
|
@ -19,9 +19,9 @@
|
|||
#include <asm-fpu.h>
|
||||
#include <armv8.h>
|
||||
|
||||
.macro RESTORE_CONTEXT_SWITCH
|
||||
.macro RESTORE_CONTEXT_SWITCH using_sp
|
||||
/* Set the SP to point to the stack of the task being restored. */
|
||||
mov sp, x0
|
||||
mov sp, \using_sp
|
||||
|
||||
#ifdef RT_USING_SMART
|
||||
bl rt_thread_self
|
||||
|
@ -34,8 +34,6 @@
|
|||
.endm
|
||||
|
||||
.macro RESTORE_IRQ_CONTEXT
|
||||
/* Set the SP to point to the stack of the task being restored. */
|
||||
MOV SP, X0
|
||||
#ifdef RT_USING_SMART
|
||||
BL rt_thread_self
|
||||
MOV X19, X0
|
||||
|
|
|
@ -26,9 +26,7 @@
|
|||
.globl vector_fiq
|
||||
vector_fiq:
|
||||
SAVE_IRQ_CONTEXT
|
||||
stp x0, x1, [sp, #-0x10]!
|
||||
bl rt_hw_trap_fiq
|
||||
ldp x0, x1, [sp], #0x10
|
||||
RESTORE_IRQ_CONTEXT
|
||||
|
||||
.globl rt_interrupt_enter
|
||||
|
@ -36,19 +34,17 @@ vector_fiq:
|
|||
.globl rt_thread_switch_interrupt_flag
|
||||
.globl rt_interrupt_from_thread
|
||||
.globl rt_interrupt_to_thread
|
||||
.globl rt_hw_context_switch_interrupt_do
|
||||
|
||||
.align 8
|
||||
.globl vector_irq
|
||||
vector_irq:
|
||||
SAVE_IRQ_CONTEXT
|
||||
stp x0, x1, [sp, #-0x10]! /* X0 is thread sp */
|
||||
|
||||
bl rt_interrupt_enter
|
||||
bl rt_hw_trap_irq
|
||||
bl rt_interrupt_leave
|
||||
|
||||
ldp x0, x1, [sp], #0x10
|
||||
|
||||
/**
|
||||
* if rt_thread_switch_interrupt_flag set, jump to
|
||||
* rt_hw_context_switch_interrupt_do and don't return
|
||||
|
@ -61,15 +57,7 @@ vector_irq:
|
|||
mov x2, #0 // clear flag
|
||||
str x2, [x1]
|
||||
|
||||
ldr x3, =rt_interrupt_from_thread
|
||||
ldr x4, [x3]
|
||||
str x0, [x4] // store sp in preempted tasks's tcb
|
||||
|
||||
ldr x3, =rt_interrupt_to_thread
|
||||
ldr x4, [x3]
|
||||
ldr x0, [x4] // get new task's stack pointer
|
||||
|
||||
RESTORE_IRQ_CONTEXT
|
||||
bl rt_hw_context_switch_interrupt_do
|
||||
|
||||
vector_irq_exit:
|
||||
RESTORE_IRQ_CONTEXT_WITHOUT_MMU_SWITCH
|
||||
|
|
Loading…
Reference in New Issue