[bsp][renesas]fix ra6m3 can't use lcd problem.

This commit is contained in:
Rbb666 2024-04-19 10:36:42 +08:00
parent eb6591ddee
commit e9133d5660
4 changed files with 59 additions and 45 deletions

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@ -0,0 +1,31 @@
/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2024-03-01 Rbb666 the first version
*/
#ifndef __LCD_CONFIG_H_
#define __LCD_CONFIG_H_
typedef enum
{
ROTATION_ZERO = 0,
ROTATION_090 = 90,
ROTATION_180 = 180,
ROTATION_270 = 270,
} bsp_rotation;
#define LCD_WIDTH DISPLAY_HSIZE_INPUT0
#define LCD_HEIGHT DISPLAY_VSIZE_INPUT0
#define LCD_BITS_PER_PIXEL DISPLAY_BITS_PER_PIXEL_INPUT1
#define LCD_PIXEL_FORMAT RTGRAPHIC_PIXEL_FORMAT_RGB565
#define LCD_BUF_SIZE (LCD_WIDTH * LCD_HEIGHT * LCD_BITS_PER_PIXEL / 8)
#define ENABLE_DOUBLE_BUFFER (0)
#define LCD_BL_PIN BSP_IO_PORT_01_PIN_00
#endif

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@ -14,6 +14,8 @@
#ifdef BSP_USING_LCD
#ifdef SOC_SERIES_R7FA8M85
#include <ra8/lcd_config.h>
#else
#include <ra6m3/lcd_config.h>
#endif
#include <drv_lcd.h>
@ -38,8 +40,6 @@ static uint16_t *lcd_current_working_buffer = (uint16_t *) &fb_background[0];
#ifdef SOC_SERIES_R7FA8M85
static uint8_t lcd_framebuffer[LCD_BUF_SIZE] BSP_ALIGN_VARIABLE(64) BSP_PLACE_IN_SECTION(".sdram");
#else
static uint8_t lcd_framebuffer[LCD_BUF_SIZE] BSP_ALIGN_VARIABLE(64);
#endif
// G2D
@ -47,7 +47,9 @@ extern d2_device *d2_handle0;
static d2_device **_d2_handle_user = &d2_handle0;
static d2_renderbuffer *renderbuffer;
#ifdef SOC_SERIES_R7FA8M85
extern void ra8_mipi_lcd_init(void);
#endif
rt_weak void DisplayVsyncCallback(display_callback_args_t *p_args)
{
@ -260,6 +262,7 @@ static rt_err_t ra_lcd_control(rt_device_t device, int cmd, void *args)
{
case RTGRAPHIC_CTRL_RECT_UPDATE:
{
#ifdef SOC_SERIES_R7FA8M85
struct rt_device_rect_info *info = (struct rt_device_rect_info *)args;
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
SCB_CleanInvalidateDCache_by_Addr((uint32_t *)lcd->lcd_info.framebuffer, sizeof(fb_background[0]));
@ -276,6 +279,7 @@ static rt_err_t ra_lcd_control(rt_device_t device, int cmd, void *args)
fsp_err_t err = R_GLCDC_BufferChange(&g_display0_ctrl, (uint8_t *) lcd_current_working_buffer, DISPLAY_FRAME_LAYER_1);
RT_ASSERT(err == 0);
#endif
#endif /* SOC_SERIES_R7FA8M85 */
/* wait for vsync interrupt */
vsync_wait();
}
@ -316,11 +320,13 @@ static rt_err_t drv_lcd_init(struct rt_device *device)
static void reset_lcd_panel(void)
{
#ifdef LCD_RST_PIN
rt_pin_mode(LCD_RST_PIN, PIN_MODE_OUTPUT);
rt_pin_write(LCD_RST_PIN, PIN_LOW);
rt_thread_mdelay(100);
rt_pin_write(LCD_RST_PIN, PIN_HIGH);
rt_thread_mdelay(100);
#endif
}
static rt_err_t ra_bsp_lcd_init(void)
@ -334,13 +340,14 @@ static rt_err_t ra_bsp_lcd_init(void)
error = R_GLCDC_Open(&g_display0_ctrl, &g_display0_cfg);
if (FSP_SUCCESS == error)
{
#ifdef SOC_SERIES_R7FA8M85
/* config mipi */
ra8_mipi_lcd_init();
#endif
/* Initialize g2d */
error = g2d_drv_hwInit();
/** Display driver start */
/* Display driver start */
error = R_GLCDC_Start(&g_display0_ctrl);
}
@ -359,13 +366,11 @@ int rt_hw_lcd_init(void)
_lcd.lcd_info.width = LCD_WIDTH;
_lcd.lcd_info.bits_per_pixel = LCD_BITS_PER_PIXEL;
_lcd.lcd_info.pixel_format = LCD_PIXEL_FORMAT;
#ifdef SOC_SERIES_R7FA8M85
_lcd.lcd_info.framebuffer = (uint8_t *)lcd_framebuffer;
if (_lcd.lcd_info.framebuffer == NULL)
{
LOG_E("alloc lcd framebuffer fail");
return -RT_ERROR;
}
#else
_lcd.lcd_info.framebuffer = (uint8_t *)&fb_background[0];
#endif
LOG_D("\nlcd framebuffer address:%#x", _lcd.lcd_info.framebuffer);
memset(_lcd.lcd_info.framebuffer, 0x0, LCD_BUF_SIZE);

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@ -1,34 +0,0 @@
/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-07-28 liu2guang the first version for STM32F469NI-Discovery.
*/
#ifndef __LCD_PORT_H_
#define __LCD_PORT_H_
#include <rtthread.h>
#include <rtdevice.h>
#include <board.h>
typedef enum
{
ROTATION_ZERO = 0,
ROTATION_090 = 90,
ROTATION_180 = 180,
ROTATION_270 = 270,
} bsp_rotation;
#define LCD_WIDTH DISPLAY_HSIZE_INPUT0
#define LCD_HEIGHT DISPLAY_VSIZE_INPUT0
#define LCD_BITS_PER_PIXEL DISPLAY_BITS_PER_PIXEL_INPUT1
#define LCD_PIXEL_FORMAT RTGRAPHIC_PIXEL_FORMAT_RGB565
#define LCD_BUF_SIZE (LCD_WIDTH * LCD_HEIGHT * LCD_BITS_PER_PIXEL / 8)
#define LCD_BL_PIN BSP_IO_PORT_01_PIN_00
#endif /* __LCD_PORT_H_ */

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@ -540,7 +540,7 @@
</module>
<module id="module.driver.display_on_glcdc.467730287">
<property id="module.driver.display.name" value="g_display0"/>
<property id="module.driver.display.callback" value="_ra_port_display_callback"/>
<property id="module.driver.display.callback" value="DisplayVsyncCallback"/>
<property id="module.driver.display.line_detect_ipl" value="board.icu.common.irq.priority12"/>
<property id="module.driver.display.underflow_1_ipl" value="_disabled"/>
<property id="module.driver.display.underflow_2_ipl" value="_disabled"/>
@ -952,6 +952,9 @@
<configSetting altId="glcdc0.lcd_data13.p301" configurationId="glcdc0.lcd_data13"/>
<configSetting altId="glcdc0.lcd_data14.p302" configurationId="glcdc0.lcd_data14"/>
<configSetting altId="glcdc0.lcd_data15.p303" configurationId="glcdc0.lcd_data15"/>
<configSetting altId="glcdc0.lcd_tcon0.p102" configurationId="glcdc0.lcd_tcon0"/>
<configSetting altId="glcdc0.lcd_tcon1.p103" configurationId="glcdc0.lcd_tcon1"/>
<configSetting altId="glcdc0.lcd_tcon2.p104" configurationId="glcdc0.lcd_tcon2"/>
<configSetting altId="glcdc0.mode.rgb565.free" configurationId="glcdc0.mode"/>
<configSetting altId="gpt0.gtioca.p512" configurationId="gpt0.gtioca"/>
<configSetting altId="gpt0.mode.gtiocaorgtiocb.free" configurationId="gpt0.mode"/>
@ -983,6 +986,15 @@
<configSetting altId="p101.glcdc0.lcd_clk" configurationId="p101"/>
<configSetting altId="p101.gpio_speed.gpio_speed_high" configurationId="p101.gpio_drivecapacity"/>
<configSetting altId="p101.gpio_mode.gpio_mode_peripheral" configurationId="p101.gpio_mode"/>
<configSetting altId="p102.glcdc0.lcd_tcon0" configurationId="p102"/>
<configSetting altId="p102.gpio_speed.gpio_speed_high" configurationId="p102.gpio_drivecapacity"/>
<configSetting altId="p102.gpio_mode.gpio_mode_peripheral" configurationId="p102.gpio_mode"/>
<configSetting altId="p103.glcdc0.lcd_tcon1" configurationId="p103"/>
<configSetting altId="p103.gpio_speed.gpio_speed_high" configurationId="p103.gpio_drivecapacity"/>
<configSetting altId="p103.gpio_mode.gpio_mode_peripheral" configurationId="p103.gpio_mode"/>
<configSetting altId="p104.glcdc0.lcd_tcon2" configurationId="p104"/>
<configSetting altId="p104.gpio_speed.gpio_speed_high" configurationId="p104.gpio_drivecapacity"/>
<configSetting altId="p104.gpio_mode.gpio_mode_peripheral" configurationId="p104.gpio_mode"/>
<configSetting altId="p106.glcdc0.lcd_data00" configurationId="p106"/>
<configSetting altId="p106.gpio_speed.gpio_speed_high" configurationId="p106.gpio_drivecapacity"/>
<configSetting altId="p106.gpio_mode.gpio_mode_peripheral" configurationId="p106.gpio_mode"/>