From e835b8f21c706e61fa83faa9c7065368ac010fa5 Mon Sep 17 00:00:00 2001 From: jonas Date: Thu, 28 Oct 2021 16:29:21 +0800 Subject: [PATCH] [update][bsp][at32][driver]Optimized the pin-index algorithm --- bsp/at32/Libraries/rt_drivers/drv_gpio.c | 332 +++++++++-------------- 1 file changed, 125 insertions(+), 207 deletions(-) diff --git a/bsp/at32/Libraries/rt_drivers/drv_gpio.c b/bsp/at32/Libraries/rt_drivers/drv_gpio.c index bc9f6b87bb..0c1c725f07 100644 --- a/bsp/at32/Libraries/rt_drivers/drv_gpio.c +++ b/bsp/at32/Libraries/rt_drivers/drv_gpio.c @@ -6,6 +6,7 @@ * Change Logs: * Date Author Notes * 2020-01-07 shelton first version + * 2021-10-28 jonas optimization design pin-index algorithm */ #include @@ -13,135 +14,43 @@ #ifdef RT_USING_PIN -static const struct pin_index pins[] = -{ -#if defined(GPIOA) - __AT32_PIN(0 , A, 0 ), - __AT32_PIN(1 , A, 1 ), - __AT32_PIN(2 , A, 2 ), - __AT32_PIN(3 , A, 3 ), - __AT32_PIN(4 , A, 4 ), - __AT32_PIN(5 , A, 5 ), - __AT32_PIN(6 , A, 6 ), - __AT32_PIN(7 , A, 7 ), - __AT32_PIN(8 , A, 8 ), - __AT32_PIN(9 , A, 9 ), - __AT32_PIN(10, A, 10), - __AT32_PIN(11, A, 11), - __AT32_PIN(12, A, 12), - __AT32_PIN(13, A, 13), - __AT32_PIN(14, A, 14), - __AT32_PIN(15, A, 15), -#if defined(GPIOB) - __AT32_PIN(16, B, 0), - __AT32_PIN(17, B, 1), - __AT32_PIN(18, B, 2), - __AT32_PIN(19, B, 3), - __AT32_PIN(20, B, 4), - __AT32_PIN(21, B, 5), - __AT32_PIN(22, B, 6), - __AT32_PIN(23, B, 7), - __AT32_PIN(24, B, 8), - __AT32_PIN(25, B, 9), - __AT32_PIN(26, B, 10), - __AT32_PIN(27, B, 11), - __AT32_PIN(28, B, 12), - __AT32_PIN(29, B, 13), - __AT32_PIN(30, B, 14), - __AT32_PIN(31, B, 15), -#if defined(GPIOC) - __AT32_PIN(32, C, 0), - __AT32_PIN(33, C, 1), - __AT32_PIN(34, C, 2), - __AT32_PIN(35, C, 3), - __AT32_PIN(36, C, 4), - __AT32_PIN(37, C, 5), - __AT32_PIN(38, C, 6), - __AT32_PIN(39, C, 7), - __AT32_PIN(40, C, 8), - __AT32_PIN(41, C, 9), - __AT32_PIN(42, C, 10), - __AT32_PIN(43, C, 11), - __AT32_PIN(44, C, 12), - __AT32_PIN(45, C, 13), - __AT32_PIN(46, C, 14), - __AT32_PIN(47, C, 15), -#if defined(GPIOD) - __AT32_PIN(48, D, 0), - __AT32_PIN(49, D, 1), - __AT32_PIN(50, D, 2), - __AT32_PIN(51, D, 3), - __AT32_PIN(52, D, 4), - __AT32_PIN(53, D, 5), - __AT32_PIN(54, D, 6), - __AT32_PIN(55, D, 7), - __AT32_PIN(56, D, 8), - __AT32_PIN(57, D, 9), - __AT32_PIN(58, D, 10), - __AT32_PIN(59, D, 11), - __AT32_PIN(60, D, 12), - __AT32_PIN(61, D, 13), - __AT32_PIN(62, D, 14), - __AT32_PIN(63, D, 15), -#if defined(GPIOE) - __AT32_PIN(64, E, 0), - __AT32_PIN(65, E, 1), - __AT32_PIN(66, E, 2), - __AT32_PIN(67, E, 3), - __AT32_PIN(68, E, 4), - __AT32_PIN(69, E, 5), - __AT32_PIN(70, E, 6), - __AT32_PIN(71, E, 7), - __AT32_PIN(72, E, 8), - __AT32_PIN(73, E, 9), - __AT32_PIN(74, E, 10), - __AT32_PIN(75, E, 11), - __AT32_PIN(76, E, 12), - __AT32_PIN(77, E, 13), - __AT32_PIN(78, E, 14), - __AT32_PIN(79, E, 15), -#if defined(GPIOF) - __AT32_PIN(80, F, 0), - __AT32_PIN(81, F, 1), - __AT32_PIN(82, F, 2), - __AT32_PIN(83, F, 3), - __AT32_PIN(84, F, 4), - __AT32_PIN(85, F, 5), - __AT32_PIN(86, F, 6), - __AT32_PIN(87, F, 7), - __AT32_PIN(88, F, 8), - __AT32_PIN(89, F, 9), - __AT32_PIN(90, F, 10), - __AT32_PIN(91, F, 11), - __AT32_PIN(92, F, 12), - __AT32_PIN(93, F, 13), - __AT32_PIN(94, F, 14), - __AT32_PIN(95, F, 15), -#if defined(GPIOG) - __AT32_PIN(96, G, 0), - __AT32_PIN(97, G, 1), - __AT32_PIN(98, G, 2), - __AT32_PIN(99, G, 3), - __AT32_PIN(100, G, 4), - __AT32_PIN(101, G, 5), - __AT32_PIN(102, G, 6), - __AT32_PIN(103, G, 7), - __AT32_PIN(104, G, 8), - __AT32_PIN(105, G, 9), - __AT32_PIN(106, G, 10), - __AT32_PIN(107, G, 11), - __AT32_PIN(108, G, 12), - __AT32_PIN(109, G, 13), - __AT32_PIN(110, G, 14), - __AT32_PIN(111, G, 15), -#endif /* defined(GPIOG) */ -#endif /* defined(GPIOF) */ -#endif /* defined(GPIOE) */ -#endif /* defined(GPIOD) */ -#endif /* defined(GPIOC) */ -#endif /* defined(GPIOB) */ -#endif /* defined(GPIOA) */ -}; +#define PIN_NUM(port, no) (((((port) & 0xFu) << 4) | ((no) & 0xFu))) +#define PIN_PORT(pin) ((uint8_t)(((pin) >> 4) & 0xFu)) +#define PIN_NO(pin) ((uint8_t)((pin) & 0xFu)) + +#define PIN_ATPORTSOURCE(pin) ((uint8_t)(((pin) & 0xF0u) >> 4)) +#define PIN_ATPINSOURCE(pin) ((uint8_t)((pin) & 0xFu)) +#define PIN_ATPORT(pin) ((GPIO_Type *)(GPIOA_BASE + (0x400u * PIN_PORT(pin)))) +#define PIN_ATPIN(pin) ((uint16_t)(1u << PIN_NO(pin))) +#if defined(GPIOZ) + #define __AT32_PORT_MAX 12u +#elif defined(GPIOK) + #define __AT32_PORT_MAX 11u +#elif defined(GPIOJ) + #define __AT32_PORT_MAX 10u +#elif defined(GPIOI) + #define __AT32_PORT_MAX 9u +#elif defined(GPIOH) + #define __AT32_PORT_MAX 8u +#elif defined(GPIOG) + #define __AT32_PORT_MAX 7u +#elif defined(GPIOF) + #define __AT32_PORT_MAX 6u +#elif defined(GPIOE) + #define __AT32_PORT_MAX 5u +#elif defined(GPIOD) + #define __AT32_PORT_MAX 4u +#elif defined(GPIOC) + #define __AT32_PORT_MAX 3u +#elif defined(GPIOB) + #define __AT32_PORT_MAX 2u +#elif defined(GPIOA) + #define __AT32_PORT_MAX 1u +#else + #define __AT32_PORT_MAX 0u + #error Unsupported AT32 GPIO peripheral. +#endif +#define PIN_ATPORT_MAX __AT32_PORT_MAX static const struct pin_irq_map pin_irq_map[] = { @@ -182,72 +91,62 @@ static struct rt_pin_irq_hdr pin_irq_hdr_tab[] = {-1, 0, RT_NULL, RT_NULL}, {-1, 0, RT_NULL, RT_NULL}, }; -static uint32_t pin_irq_enable_mask=0; +static uint32_t pin_irq_enable_mask = 0; #define ITEM_NUM(items) sizeof(items) / sizeof(items[0]) -static const struct pin_index *get_pin(uint8_t pin) -{ - const struct pin_index *index; - - if (pin < ITEM_NUM(pins)) - { - index = &pins[pin]; - if (index->index == -1) - index = RT_NULL; - } - else - { - index = RT_NULL; - } - - return index; -}; static void at32_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value) { - const struct pin_index *index; - - index = get_pin(pin); - if (index == RT_NULL) + GPIO_Type *gpio_port; + uint16_t gpio_pin; + if (PIN_PORT(pin) < PIN_ATPORT_MAX) + { + gpio_port = PIN_ATPORT(pin); + gpio_pin = PIN_ATPIN(pin); + } + else { return; } - - GPIO_WriteBit(index->gpio, index->pin, (BitState)value); + GPIO_WriteBit(gpio_port, gpio_pin, (BitState)value); } static int at32_pin_read(rt_device_t dev, rt_base_t pin) { + GPIO_Type *gpio_port; + uint16_t gpio_pin; int value; - const struct pin_index *index; value = PIN_LOW; - index = get_pin(pin); - if (index == RT_NULL) + if (PIN_PORT(pin) < PIN_ATPORT_MAX) { - return value; + gpio_port = PIN_ATPORT(pin); + gpio_pin = PIN_ATPIN(pin); + value = GPIO_ReadInputDataBit(gpio_port, gpio_pin); } - - value = GPIO_ReadInputDataBit(index->gpio, index->pin); - return value; } static void at32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) { - const struct pin_index *index; GPIO_InitType GPIO_InitStruct; + GPIO_Type *gpio_port; + uint16_t gpio_pin; - index = get_pin(pin); - if (index == RT_NULL) + if (PIN_PORT(pin) < PIN_ATPORT_MAX) + { + gpio_port = PIN_ATPORT(pin); + gpio_pin = PIN_ATPIN(pin); + } + else { return; } /* Configure GPIO_InitStructure */ GPIO_StructInit(&GPIO_InitStruct); - GPIO_InitStruct.GPIO_Pins = index->pin; + GPIO_InitStruct.GPIO_Pins = gpio_pin; GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT_PP; GPIO_InitStruct.GPIO_MaxSpeed = GPIO_MaxSpeed_50MHz; @@ -277,7 +176,7 @@ static void at32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode) GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT_OD; } - GPIO_Init(index->gpio, &GPIO_InitStruct); + GPIO_Init(gpio_port, &GPIO_InitStruct); } rt_inline rt_int32_t bit2bitno(rt_uint32_t bit) @@ -304,21 +203,27 @@ rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit) }; static rt_err_t at32_pin_attach_irq(struct rt_device *device, rt_int32_t pin, - rt_uint32_t mode, void (*hdr)(void *args), void *args) + rt_uint32_t mode, void (*hdr)(void *args), void *args) { - const struct pin_index *index; + RT_UNUSED GPIO_Type *gpio_port; + uint16_t gpio_pin; rt_base_t level; rt_int32_t irqindex = -1; - index = get_pin(pin); - if (index == RT_NULL) + if (PIN_PORT(pin) < PIN_ATPORT_MAX) { - return RT_ENOSYS; + gpio_port = PIN_ATPORT(pin); + gpio_pin = PIN_ATPIN(pin); } - irqindex = bit2bitno(index->pin); + else + { + return -RT_EINVAL; + } + + irqindex = bit2bitno(gpio_pin); if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map)) { - return RT_ENOSYS; + return -RT_EINVAL; } level = rt_hw_interrupt_disable(); @@ -333,7 +238,7 @@ static rt_err_t at32_pin_attach_irq(struct rt_device *device, rt_int32_t pin, if (pin_irq_hdr_tab[irqindex].pin != -1) { rt_hw_interrupt_enable(level); - return RT_EBUSY; + return -RT_EBUSY; } pin_irq_hdr_tab[irqindex].pin = pin; pin_irq_hdr_tab[irqindex].hdr = hdr; @@ -346,19 +251,24 @@ static rt_err_t at32_pin_attach_irq(struct rt_device *device, rt_int32_t pin, static rt_err_t at32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) { - const struct pin_index *index; + RT_UNUSED GPIO_Type *gpio_port; + uint16_t gpio_pin; rt_base_t level; rt_int32_t irqindex = -1; - index = get_pin(pin); - if (index == RT_NULL) + if (PIN_PORT(pin) < PIN_ATPORT_MAX) { - return RT_ENOSYS; + gpio_port = PIN_ATPORT(pin); + gpio_pin = PIN_ATPIN(pin); } - irqindex = bit2bitno(index->pin); + else + { + return -RT_EINVAL; + } + irqindex = bit2bitno(gpio_pin); if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map)) { - return RT_ENOSYS; + return -RT_EINVAL; } level = rt_hw_interrupt_disable(); @@ -377,28 +287,33 @@ static rt_err_t at32_pin_dettach_irq(struct rt_device *device, rt_int32_t pin) } static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin, - rt_uint32_t enabled) + rt_uint32_t enabled) { GPIO_InitType GPIO_InitStruct; EXTI_InitType EXTI_InitStruct; NVIC_InitType NVIC_InitStruct; - const struct pin_index *index; + GPIO_Type *gpio_port; + uint16_t gpio_pin; const struct pin_irq_map *irqmap; rt_base_t level; rt_int32_t irqindex = -1; - index = get_pin(pin); - if (index == RT_NULL) + if (PIN_PORT(pin) < PIN_ATPORT_MAX) { - return RT_ENOSYS; + gpio_port = PIN_ATPORT(pin); + gpio_pin = PIN_ATPIN(pin); + } + else + { + return -RT_EINVAL; } if (enabled == PIN_IRQ_ENABLE) { - irqindex = bit2bitno(index->pin); + irqindex = bit2bitno(gpio_pin); if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map)) { - return RT_ENOSYS; + return -RT_EINVAL; } level = rt_hw_interrupt_disable(); @@ -406,7 +321,7 @@ static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin, if (pin_irq_hdr_tab[irqindex].pin == -1) { rt_hw_interrupt_enable(level); - return RT_ENOSYS; + return -RT_EINVAL; } irqmap = &pin_irq_map[irqindex]; @@ -431,8 +346,10 @@ static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin, EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Rising_Falling; break; } - GPIO_Init(index->gpio, &GPIO_InitStruct); - GPIO_EXTILineConfig(index->portsource, index->pinsource); + GPIO_Init(gpio_port, &GPIO_InitStruct); + + GPIO_EXTILineConfig(PIN_ATPORTSOURCE(pin), PIN_ATPINSOURCE(pin)); + EXTI_Init(&EXTI_InitStruct); NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno; NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE; @@ -445,10 +362,10 @@ static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin, } else if (enabled == PIN_IRQ_DISABLE) { - irqmap = get_pin_irq_map(index->pin); + irqmap = get_pin_irq_map(gpio_pin); if (irqmap == RT_NULL) { - return RT_ENOSYS; + return -RT_EINVAL; } level = rt_hw_interrupt_disable(); @@ -459,16 +376,16 @@ static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin, NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 5; NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0; - if (( irqmap->pinbit>=GPIO_Pins_5 )&&( irqmap->pinbit<=GPIO_Pins_9 )) + if ((irqmap->pinbit >= GPIO_Pins_5) && (irqmap->pinbit <= GPIO_Pins_9)) { - if(!(pin_irq_enable_mask&(GPIO_Pins_5|GPIO_Pins_6|GPIO_Pins_7|GPIO_Pins_8|GPIO_Pins_9))) + if (!(pin_irq_enable_mask & (GPIO_Pins_5 | GPIO_Pins_6 | GPIO_Pins_7 | GPIO_Pins_8 | GPIO_Pins_9))) { NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno; } } - else if (( irqmap->pinbit>=GPIO_Pins_10 )&&( irqmap->pinbit<=GPIO_Pins_15 )) + else if ((irqmap->pinbit >= GPIO_Pins_10) && (irqmap->pinbit <= GPIO_Pins_15)) { - if(!(pin_irq_enable_mask&(GPIO_Pins_10|GPIO_Pins_11|GPIO_Pins_12|GPIO_Pins_13|GPIO_Pins_14|GPIO_Pins_15))) + if (!(pin_irq_enable_mask & (GPIO_Pins_10 | GPIO_Pins_11 | GPIO_Pins_12 | GPIO_Pins_13 | GPIO_Pins_14 | GPIO_Pins_15))) { NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno; } @@ -483,11 +400,12 @@ static rt_err_t at32_pin_irq_enable(struct rt_device *device, rt_base_t pin, } else { - return -RT_ENOSYS; + return -RT_EINVAL; } return RT_EOK; } + const static struct rt_pin_ops _at32_pin_ops = { at32_pin_mode, @@ -552,23 +470,23 @@ void EXTI4_IRQHandler(void) void EXTI9_5_IRQHandler(void) { rt_interrupt_enter(); - if(RESET != EXTI_GetIntStatus(EXTI_Line5)) + if (RESET != EXTI_GetIntStatus(EXTI_Line5)) { GPIO_EXTI_IRQHandler(GPIO_Pins_5); } - if(RESET != EXTI_GetIntStatus(EXTI_Line6)) + if (RESET != EXTI_GetIntStatus(EXTI_Line6)) { GPIO_EXTI_IRQHandler(GPIO_Pins_6); } - if(RESET != EXTI_GetIntStatus(EXTI_Line7)) + if (RESET != EXTI_GetIntStatus(EXTI_Line7)) { GPIO_EXTI_IRQHandler(GPIO_Pins_7); } - if(RESET != EXTI_GetIntStatus(EXTI_Line8)) + if (RESET != EXTI_GetIntStatus(EXTI_Line8)) { GPIO_EXTI_IRQHandler(GPIO_Pins_8); } - if(RESET != EXTI_GetIntStatus(EXTI_Line9)) + if (RESET != EXTI_GetIntStatus(EXTI_Line9)) { GPIO_EXTI_IRQHandler(GPIO_Pins_9); } @@ -578,27 +496,27 @@ void EXTI9_5_IRQHandler(void) void EXTI15_10_IRQHandler(void) { rt_interrupt_enter(); - if(RESET != EXTI_GetIntStatus(EXTI_Line10)) + if (RESET != EXTI_GetIntStatus(EXTI_Line10)) { GPIO_EXTI_IRQHandler(GPIO_Pins_10); } - if(RESET != EXTI_GetIntStatus(EXTI_Line11)) + if (RESET != EXTI_GetIntStatus(EXTI_Line11)) { GPIO_EXTI_IRQHandler(GPIO_Pins_11); } - if(RESET != EXTI_GetIntStatus(EXTI_Line12)) + if (RESET != EXTI_GetIntStatus(EXTI_Line12)) { GPIO_EXTI_IRQHandler(GPIO_Pins_12); } - if(RESET != EXTI_GetIntStatus(EXTI_Line13)) + if (RESET != EXTI_GetIntStatus(EXTI_Line13)) { GPIO_EXTI_IRQHandler(GPIO_Pins_13); } - if(RESET != EXTI_GetIntStatus(EXTI_Line14)) + if (RESET != EXTI_GetIntStatus(EXTI_Line14)) { GPIO_EXTI_IRQHandler(GPIO_Pins_14); } - if(RESET != EXTI_GetIntStatus(EXTI_Line15)) + if (RESET != EXTI_GetIntStatus(EXTI_Line15)) { GPIO_EXTI_IRQHandler(GPIO_Pins_15); }