修改了小错误
This commit is contained in:
parent
365de33d75
commit
e6d20e9120
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@ -2,7 +2,7 @@
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## 简介
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## 简介
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本文档为 RT-Thread 开发团队为 STM32L4R9I-EVAL 开发板提供的 BSP (板级支持包) 说明。
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STM32L4R9I-EVAL 开发板提供的 BSP (板级支持包) 说明。
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主要内容如下:
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主要内容如下:
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@ -15,7 +15,7 @@ except:
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print(RTT_ROOT)
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print(RTT_ROOT)
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exit(-1)
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exit(-1)
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TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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env = Environment(tools = ['mingw'],
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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@ -28,7 +28,7 @@ env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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if rtconfig.PLATFORM == 'iar':
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if rtconfig.PLATFORM == 'iar':
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env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
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env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
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env.Replace(ARFLAGS = [''])
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env.Replace(ARFLAGS = [''])
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env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
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env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map')
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Export('RTT_ROOT')
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Export('RTT_ROOT')
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Export('rtconfig')
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Export('rtconfig')
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@ -6,6 +6,7 @@
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* Change Logs:
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* Change Logs:
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* Date Author Notes
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* Date Author Notes
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* 2018-11-06 SummerGift first version
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* 2018-11-06 SummerGift first version
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* 2019-04-09 jhb
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*/
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*/
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#include <rtthread.h>
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#include <rtthread.h>
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@ -2,19 +2,21 @@
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File.Version=6
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File.Version=6
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KeepUserPlacement=false
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KeepUserPlacement=false
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Mcu.Family=STM32L4
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Mcu.Family=STM32L4
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Mcu.IP0=NVIC
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Mcu.IP0=LTDC
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Mcu.IP1=RCC
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Mcu.IP1=NVIC
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Mcu.IP2=SYS
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Mcu.IP2=RCC
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Mcu.IP3=USART3
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Mcu.IP3=SYS
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Mcu.IPNb=4
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Mcu.IP4=USART3
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Mcu.IPNb=5
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Mcu.Name=STM32L4R9A(G-I)Ix
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Mcu.Name=STM32L4R9A(G-I)Ix
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Mcu.Package=UFBGA169
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Mcu.Package=UFBGA169
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Mcu.Pin0=PH0-OSC_IN (PH0)
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Mcu.Pin0=PH0-OSC_IN (PH0)
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Mcu.Pin1=PB11
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Mcu.Pin1=PB11
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Mcu.Pin2=PH1-OSC_OUT (PH1)
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Mcu.Pin2=PH1-OSC_OUT (PH1)
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Mcu.Pin3=PB10
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Mcu.Pin3=PB10
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Mcu.Pin4=VP_SYS_VS_Systick
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Mcu.Pin4=VP_LTDC_DSIMode
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Mcu.PinsNb=5
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Mcu.Pin5=VP_SYS_VS_Systick
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Mcu.PinsNb=6
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Mcu.ThirdPartyNb=0
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Mcu.ThirdPartyNb=0
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Mcu.UserConstants=
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Mcu.UserConstants=
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Mcu.UserName=STM32L4R9AIIx
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Mcu.UserName=STM32L4R9AIIx
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@ -76,7 +78,7 @@ ProjectManager.StackSize=0x400
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ProjectManager.TargetToolchain=MDK-ARM V5
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ProjectManager.TargetToolchain=MDK-ARM V5
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ProjectManager.ToolChainLocation=
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ProjectManager.ToolChainLocation=
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ProjectManager.UnderRoot=false
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ProjectManager.UnderRoot=false
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ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART3_UART_Init-USART3-false-HAL-true
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ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART3_UART_Init-USART3-false-HAL-true,4-MX_LTDC_Init-LTDC-false-HAL-true
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RCC.ADCFreq_Value=64000000
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RCC.ADCFreq_Value=64000000
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RCC.AHBFreq_Value=120000000
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RCC.AHBFreq_Value=120000000
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RCC.APB1Freq_Value=120000000
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RCC.APB1Freq_Value=120000000
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@ -145,6 +147,8 @@ RCC.VCOSAI1OutputFreq_Value=128000000
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RCC.VCOSAI2OutputFreq_Value=128000000
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RCC.VCOSAI2OutputFreq_Value=128000000
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USART3.IPParameters=VirtualMode-Asynchronous
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USART3.IPParameters=VirtualMode-Asynchronous
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USART3.VirtualMode-Asynchronous=VM_ASYNC
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USART3.VirtualMode-Asynchronous=VM_ASYNC
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VP_LTDC_DSIMode.Mode=RGB888
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VP_LTDC_DSIMode.Signal=LTDC_DSIMode
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VP_SYS_VS_Systick.Mode=SysTick
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VP_SYS_VS_Systick.Mode=SysTick
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VP_SYS_VS_Systick.Signal=SYS_VS_Systick
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VP_SYS_VS_Systick.Signal=SYS_VS_Systick
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board=custom
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board=custom
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@ -1,133 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
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<Target>
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<TargetName>CubeMX_Config</TargetName>
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<ToolsetNumber>0x4</ToolsetNumber>
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<ToolsetName>ARM-ADS</ToolsetName>
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<TargetOption>
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<CLKADS>120000000</CLKADS>
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<OPTTT>
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<gFlags>1</gFlags>
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<BeepAtEnd>1</BeepAtEnd>
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<RunSim>0</RunSim>
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<RunTarget>1</RunTarget>
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</OPTTT>
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<OPTHX>
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<HexSelection>1</HexSelection>
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<FlashByte>65535</FlashByte>
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<HexRangeLowAddress>0</HexRangeLowAddress>
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<HexRangeHighAddress>0</HexRangeHighAddress>
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<HexOffset>0</HexOffset>
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</OPTHX>
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<OPTLEX>
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<PageWidth>79</PageWidth>
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<PageLength>66</PageLength>
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<TabStop>8</TabStop>
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<ListingPath />
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</OPTLEX>
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<ListingPage>
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<CreateCListing>1</CreateCListing>
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<CreateAListing>1</CreateAListing>
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<CreateLListing>1</CreateLListing>
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<CreateIListing>0</CreateIListing>
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<AsmCond>1</AsmCond>
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<AsmSymb>1</AsmSymb>
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<AsmXref>0</AsmXref>
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<CCond>1</CCond>
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<CCode>0</CCode>
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<CListInc>0</CListInc>
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<CSymb>0</CSymb>
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<LinkerCodeListing>0</LinkerCodeListing>
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</ListingPage>
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<OPTXL>
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<LMap>1</LMap>
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<LComments>1</LComments>
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<LGenerateSymbols>1</LGenerateSymbols>
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<LLibSym>1</LLibSym>
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<LLines>1</LLines>
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<LLocSym>1</LLocSym>
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<LPubSym>1</LPubSym>
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<LXref>0</LXref>
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<LExpSel>0</LExpSel>
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</OPTXL>
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<OPTFL>
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<tvExp>0</tvExp>
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<tvExpOptDlg>0</tvExpOptDlg>
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<IsCurrentTarget>1</IsCurrentTarget>
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</OPTFL>
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<CpuCode>0</CpuCode>
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<DebugOpt>
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<uSim>0</uSim>
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<uTrg>1</uTrg>
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<sLdApp>1</sLdApp>
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<sGomain>1</sGomain>
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<sRbreak>1</sRbreak>
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<sRwatch>1</sRwatch>
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<sRmem>1</sRmem>
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<sRfunc>1</sRfunc>
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<sRbox>1</sRbox>
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<tLdApp>1</tLdApp>
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<tGomain>1</tGomain>
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<tRbreak>1</tRbreak>
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<tRwatch>1</tRwatch>
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<tRmem>1</tRmem>
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<tRfunc>1</tRfunc>
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<tRbox>1</tRbox>
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<sRunDeb>0</sRunDeb>
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<sLrtime>0</sLrtime>
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<nTsel>13</nTsel>
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<sDll />
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<sDllPa />
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<sDlgDll />
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<sDlgPa />
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<sIfile />
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<tDll />
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<tDllPa />
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<tDlgDll />
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<tDlgPa />
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<tIfile />
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<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
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</DebugOpt>
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<TargetDriverDllRegistry>
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<SetRegEntry>
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<Number>0</Number>
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<Key>ST-LINKIII-KEIL_SWO</Key>
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<Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32L4Rx_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32L4R9AI$Flash\STM32L4Rx_2048.FLM)</Name>
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</SetRegEntry>
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<SetRegEntry>
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<Number>0</Number>
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<Key />
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<Name>-U-O142 -O2254 -S0 -C0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC1000 -FN1 -FF0STM32L4Rx_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32L4R9AI$Flash\STM32L4Rx_2048.FLM)</Name>
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</SetRegEntry>
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</TargetDriverDllRegistry>
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<DebugFlag>
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<trace>0</trace>
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<periodic>1</periodic>
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<aLwin>0</aLwin>
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<aCover>0</aCover>
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<aSer1>0</aSer1>
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<aSer2>0</aSer2>
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<aPa>0</aPa>
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<viewmode>0</viewmode>
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<vrSel>0</vrSel>
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<aSym>0</aSym>
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<aTbox>0</aTbox>
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<AscS1>0</AscS1>
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<AscS2>0</AscS2>
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<AscS3>0</AscS3>
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<aSer3>0</aSer3>
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<eProf>0</eProf>
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<aLa>0</aLa>
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<aPa1>0</aPa1>
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<AscS4>0</AscS4>
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<aSer4>0</aSer4>
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<StkLoc>0</StkLoc>
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<TrcWin>0</TrcWin>
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<newCpu>0</newCpu>
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<uProt>0</uProt>
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</DebugFlag>
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<LintExecutable />
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<LintConfigFile />
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</TargetOption>
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</Target>
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</ProjectOpt>
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@ -1,435 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="project_proj.xsd">
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<SchemaVersion>1.1</SchemaVersion>
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<Header>### uVision Project, (C) Keil Software</Header>
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<Targets>
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<Target>
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<TargetName>CubeMX_Config</TargetName>
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<ToolsetNumber>0x4</ToolsetNumber>
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<ToolsetName>ARM-ADS</ToolsetName>
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<TargetOption>
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<TargetCommonOption>
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<Device>STM32L4R9AIIx</Device>
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<Vendor>STMicroelectronics</Vendor>
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<Cpu>IRAM(0x20000000-0x2009FFFF) IROM(0x8000000-0x81FFFFF) CLOCK(8000000) FPU2 CPUTYPE("Cortex-M4")</Cpu>
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<FlashUtilSpec />
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<StartupFile />
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<FlashDriverDll />
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<DeviceId />
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<RegisterFile />
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<MemoryEnv />
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<Cmp />
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<Asm />
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<Linker />
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<OHString />
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<InfinionOptionDll />
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<SLE66CMisc />
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<SLE66AMisc />
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<SLE66LinkerMisc />
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<SFDFile />
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<bCustSvd>0</bCustSvd>
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<UseEnv>0</UseEnv>
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<BinPath />
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<IncludePath />
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<LibPath />
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<RegisterFilePath />
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<DBRegisterFilePath />
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<TargetStatus>
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<Error>0</Error>
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<ExitCodeStop>0</ExitCodeStop>
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<ButtonStop>0</ButtonStop>
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<NotGenerated>0</NotGenerated>
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<InvalidFlash>1</InvalidFlash>
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</TargetStatus>
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<OutputDirectory>CubeMX_Config\</OutputDirectory>
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<OutputName>CubeMX_Config</OutputName>
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<CreateExecutable>1</CreateExecutable>
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<CreateLib>0</CreateLib>
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|
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<CreateHexFile>1</CreateHexFile>
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||||||
<DebugInformation>1</DebugInformation>
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<BrowseInformation>1</BrowseInformation>
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<ListingPath>./CubeMX_Config/</ListingPath>
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<HexFormatSelection>1</HexFormatSelection>
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<Merge32K>0</Merge32K>
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<CreateBatchFile>0</CreateBatchFile>
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<BeforeCompile>
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<RunUserProg1>0</RunUserProg1>
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<RunUserProg2>0</RunUserProg2>
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|
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<UserProg1Name />
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|
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<UserProg2Name />
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<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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|
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</BeforeCompile>
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<BeforeMake>
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<RunUserProg1>0</RunUserProg1>
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||||||
<RunUserProg2>0</RunUserProg2>
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|
||||||
<UserProg1Name />
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|
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<UserProg2Name />
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|
||||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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|
||||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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<nStopB1X>0</nStopB1X>
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<nStopB2X>0</nStopB2X>
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</BeforeMake>
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<AfterMake>
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<RunUserProg1>0</RunUserProg1>
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<RunUserProg2>0</RunUserProg2>
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<UserProg1Name />
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<UserProg2Name />
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|
||||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
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||||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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</AfterMake>
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<SelectedForBatchBuild>0</SelectedForBatchBuild>
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<SVCSIdString />
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|
||||||
</TargetCommonOption>
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|
||||||
<CommonProperty>
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|
||||||
<UseCPPCompiler>0</UseCPPCompiler>
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|
||||||
<RVCTCodeConst>0</RVCTCodeConst>
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|
||||||
<RVCTZI>0</RVCTZI>
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|
||||||
<RVCTOtherData>0</RVCTOtherData>
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|
||||||
<ModuleSelection>0</ModuleSelection>
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|
||||||
<IncludeInBuild>1</IncludeInBuild>
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|
||||||
<AlwaysBuild>0</AlwaysBuild>
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|
||||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
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|
||||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
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|
||||||
<PublicsOnly>0</PublicsOnly>
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|
||||||
<StopOnExitCode>3</StopOnExitCode>
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|
||||||
<CustomArgument />
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|
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<IncludeLibraryModules />
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<ComprImg />
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|
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</CommonProperty>
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|
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<DllOption>
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|
||||||
<SimDllName>SARMCM3.DLL</SimDllName>
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|
||||||
<SimDllArguments>-REMAP -MPU</SimDllArguments>
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|
||||||
<SimDlgDll>DCM.DLL</SimDlgDll>
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|
||||||
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
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|
||||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
|
||||||
<TargetDllArguments>-MPU</TargetDllArguments>
|
|
||||||
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
|
||||||
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
|
||||||
</DllOption>
|
|
||||||
<DebugOption>
|
|
||||||
<OPTHX>
|
|
||||||
<HexSelection>1</HexSelection>
|
|
||||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
|
||||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
|
||||||
<HexOffset>0</HexOffset>
|
|
||||||
<Oh166RecLen>16</Oh166RecLen>
|
|
||||||
</OPTHX>
|
|
||||||
<Simulator>
|
|
||||||
<UseSimulator>0</UseSimulator>
|
|
||||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
|
||||||
<RunToMain>1</RunToMain>
|
|
||||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
|
||||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
|
||||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
|
||||||
<RestoreFunctions>1</RestoreFunctions>
|
|
||||||
<RestoreToolbox>1</RestoreToolbox>
|
|
||||||
<LimitSpeedToRealTime>0</LimitSpeedToRealTime>
|
|
||||||
<RestoreSysVw>1</RestoreSysVw>
|
|
||||||
</Simulator>
|
|
||||||
<Target>
|
|
||||||
<UseTarget>1</UseTarget>
|
|
||||||
<LoadApplicationAtStartup>1</LoadApplicationAtStartup>
|
|
||||||
<RunToMain>1</RunToMain>
|
|
||||||
<RestoreBreakpoints>1</RestoreBreakpoints>
|
|
||||||
<RestoreWatchpoints>1</RestoreWatchpoints>
|
|
||||||
<RestoreMemoryDisplay>1</RestoreMemoryDisplay>
|
|
||||||
<RestoreFunctions>0</RestoreFunctions>
|
|
||||||
<RestoreToolbox>1</RestoreToolbox>
|
|
||||||
<RestoreTracepoints>1</RestoreTracepoints>
|
|
||||||
<RestoreSysVw>1</RestoreSysVw>
|
|
||||||
</Target>
|
|
||||||
<RunDebugAfterBuild>0</RunDebugAfterBuild>
|
|
||||||
<TargetSelection>13</TargetSelection>
|
|
||||||
<SimDlls>
|
|
||||||
<CpuDll />
|
|
||||||
<CpuDllArguments />
|
|
||||||
<PeripheralDll />
|
|
||||||
<PeripheralDllArguments />
|
|
||||||
<InitializationFile />
|
|
||||||
</SimDlls>
|
|
||||||
<TargetDlls>
|
|
||||||
<CpuDll />
|
|
||||||
<CpuDllArguments />
|
|
||||||
<PeripheralDll />
|
|
||||||
<PeripheralDllArguments />
|
|
||||||
<InitializationFile />
|
|
||||||
<Driver>STLink\ST-LINKIII-KEIL_SWO.dll</Driver>
|
|
||||||
</TargetDlls>
|
|
||||||
</DebugOption>
|
|
||||||
<Utilities>
|
|
||||||
<Flash1>
|
|
||||||
<UseTargetDll>1</UseTargetDll>
|
|
||||||
<UseExternalTool>0</UseExternalTool>
|
|
||||||
<RunIndependent>0</RunIndependent>
|
|
||||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
|
||||||
<Capability>1</Capability>
|
|
||||||
<DriverSelection>4107</DriverSelection>
|
|
||||||
</Flash1>
|
|
||||||
<bUseTDR>1</bUseTDR>
|
|
||||||
<Flash2>STLink\ST-LINKIII-KEIL_SWO.dll</Flash2>
|
|
||||||
<Flash3 />
|
|
||||||
<Flash4 />
|
|
||||||
<pFcarmOut />
|
|
||||||
<pFcarmGrp />
|
|
||||||
<pFcArmRoot />
|
|
||||||
<FcArmLst>0</FcArmLst>
|
|
||||||
</Utilities>
|
|
||||||
<TargetArmAds>
|
|
||||||
<ArmAdsMisc>
|
|
||||||
<GenerateListings>0</GenerateListings>
|
|
||||||
<asHll>1</asHll>
|
|
||||||
<asAsm>1</asAsm>
|
|
||||||
<asMacX>1</asMacX>
|
|
||||||
<asSyms>1</asSyms>
|
|
||||||
<asFals>1</asFals>
|
|
||||||
<asDbgD>1</asDbgD>
|
|
||||||
<asForm>1</asForm>
|
|
||||||
<ldLst>0</ldLst>
|
|
||||||
<ldmm>1</ldmm>
|
|
||||||
<ldXref>1</ldXref>
|
|
||||||
<BigEnd>0</BigEnd>
|
|
||||||
<AdsALst>1</AdsALst>
|
|
||||||
<AdsACrf>1</AdsACrf>
|
|
||||||
<AdsANop>0</AdsANop>
|
|
||||||
<AdsANot>0</AdsANot>
|
|
||||||
<AdsLLst>1</AdsLLst>
|
|
||||||
<AdsLmap>1</AdsLmap>
|
|
||||||
<AdsLcgr>1</AdsLcgr>
|
|
||||||
<AdsLsym>1</AdsLsym>
|
|
||||||
<AdsLszi>1</AdsLszi>
|
|
||||||
<AdsLtoi>1</AdsLtoi>
|
|
||||||
<AdsLsun>1</AdsLsun>
|
|
||||||
<AdsLven>1</AdsLven>
|
|
||||||
<AdsLsxf>1</AdsLsxf>
|
|
||||||
<RvctClst>0</RvctClst>
|
|
||||||
<GenPPlst>0</GenPPlst>
|
|
||||||
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
|
||||||
<RvctDeviceName />
|
|
||||||
<mOS>0</mOS>
|
|
||||||
<uocRom>0</uocRom>
|
|
||||||
<uocRam>0</uocRam>
|
|
||||||
<hadIROM>1</hadIROM>
|
|
||||||
<hadIRAM>1</hadIRAM>
|
|
||||||
<hadXRAM>0</hadXRAM>
|
|
||||||
<uocXRam>0</uocXRam>
|
|
||||||
<RvdsVP>2</RvdsVP>
|
|
||||||
<hadIRAM2>0</hadIRAM2>
|
|
||||||
<hadIROM2>0</hadIROM2>
|
|
||||||
<StupSel>8</StupSel>
|
|
||||||
<useUlib>1</useUlib>
|
|
||||||
<EndSel>0</EndSel>
|
|
||||||
<uLtcg>0</uLtcg>
|
|
||||||
<RoSelD>3</RoSelD>
|
|
||||||
<RwSelD>3</RwSelD>
|
|
||||||
<CodeSel>0</CodeSel>
|
|
||||||
<OptFeed>0</OptFeed>
|
|
||||||
<NoZi1>0</NoZi1>
|
|
||||||
<NoZi2>0</NoZi2>
|
|
||||||
<NoZi3>0</NoZi3>
|
|
||||||
<NoZi4>0</NoZi4>
|
|
||||||
<NoZi5>0</NoZi5>
|
|
||||||
<Ro1Chk>0</Ro1Chk>
|
|
||||||
<Ro2Chk>0</Ro2Chk>
|
|
||||||
<Ro3Chk>0</Ro3Chk>
|
|
||||||
<Ir1Chk>1</Ir1Chk>
|
|
||||||
<Ir2Chk>0</Ir2Chk>
|
|
||||||
<Ra1Chk>0</Ra1Chk>
|
|
||||||
<Ra2Chk>0</Ra2Chk>
|
|
||||||
<Ra3Chk>0</Ra3Chk>
|
|
||||||
<Im1Chk>1</Im1Chk>
|
|
||||||
<Im2Chk>0</Im2Chk>
|
|
||||||
<OnChipMemories>
|
|
||||||
<Ocm1>
|
|
||||||
<Type>0</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</Ocm1>
|
|
||||||
<Ocm2>
|
|
||||||
<Type>0</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</Ocm2>
|
|
||||||
<Ocm3>
|
|
||||||
<Type>0</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</Ocm3>
|
|
||||||
<Ocm4>
|
|
||||||
<Type>0</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</Ocm4>
|
|
||||||
<Ocm5>
|
|
||||||
<Type>0</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</Ocm5>
|
|
||||||
<Ocm6>
|
|
||||||
<Type>0</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</Ocm6>
|
|
||||||
<IRAM>
|
|
||||||
<Type>0</Type>
|
|
||||||
<StartAddress />
|
|
||||||
<Size />
|
|
||||||
</IRAM>
|
|
||||||
<IROM>
|
|
||||||
<Type>1</Type>
|
|
||||||
<StartAddress />
|
|
||||||
<Size />
|
|
||||||
</IROM>
|
|
||||||
<XRAM>
|
|
||||||
<Type>0</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</XRAM>
|
|
||||||
<OCR_RVCT1>
|
|
||||||
<Type>1</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</OCR_RVCT1>
|
|
||||||
<OCR_RVCT2>
|
|
||||||
<Type>1</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</OCR_RVCT2>
|
|
||||||
<OCR_RVCT3>
|
|
||||||
<Type>1</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</OCR_RVCT3>
|
|
||||||
<OCR_RVCT4>
|
|
||||||
<Type>1</Type>
|
|
||||||
<StartAddress />
|
|
||||||
<Size />
|
|
||||||
</OCR_RVCT4>
|
|
||||||
<OCR_RVCT5>
|
|
||||||
<Type>1</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</OCR_RVCT5>
|
|
||||||
<OCR_RVCT6>
|
|
||||||
<Type>0</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</OCR_RVCT6>
|
|
||||||
<OCR_RVCT7>
|
|
||||||
<Type>0</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</OCR_RVCT7>
|
|
||||||
<OCR_RVCT8>
|
|
||||||
<Type>0</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</OCR_RVCT8>
|
|
||||||
<OCR_RVCT9>
|
|
||||||
<Type>0</Type>
|
|
||||||
<StartAddress />
|
|
||||||
<Size />
|
|
||||||
</OCR_RVCT9>
|
|
||||||
<OCR_RVCT10>
|
|
||||||
<Type>0</Type>
|
|
||||||
<StartAddress>0x0</StartAddress>
|
|
||||||
<Size>0x0</Size>
|
|
||||||
</OCR_RVCT10>
|
|
||||||
</OnChipMemories>
|
|
||||||
<RvctStartVector />
|
|
||||||
</ArmAdsMisc>
|
|
||||||
<Cads>
|
|
||||||
<interw>1</interw>
|
|
||||||
<Optim>4</Optim>
|
|
||||||
<oTime>0</oTime>
|
|
||||||
<SplitLS>0</SplitLS>
|
|
||||||
<OneElfS>1</OneElfS>
|
|
||||||
<Strict>0</Strict>
|
|
||||||
<EnumInt>0</EnumInt>
|
|
||||||
<PlainCh>0</PlainCh>
|
|
||||||
<Ropi>0</Ropi>
|
|
||||||
<Rwpi>0</Rwpi>
|
|
||||||
<wLevel>2</wLevel>
|
|
||||||
<uThumb>0</uThumb>
|
|
||||||
<uSurpInc>0</uSurpInc>
|
|
||||||
<uC99>1</uC99>
|
|
||||||
<useXO>0</useXO>
|
|
||||||
<VariousControls>
|
|
||||||
<MiscControls />
|
|
||||||
<Define>USE_HAL_DRIVER,STM32L4R9xx</Define>
|
|
||||||
<Undefine />
|
|
||||||
<IncludePath>../Inc; C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Inc; C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Inc/Legacy; C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/CMSIS/Device/ST/STM32L4xx/Include; C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/CMSIS/Include</IncludePath>
|
|
||||||
</VariousControls>
|
|
||||||
</Cads>
|
|
||||||
<Aads>
|
|
||||||
<interw>1</interw>
|
|
||||||
<Ropi>0</Ropi>
|
|
||||||
<Rwpi>0</Rwpi>
|
|
||||||
<thumb>0</thumb>
|
|
||||||
<SplitLS>0</SplitLS>
|
|
||||||
<SwStkChk>0</SwStkChk>
|
|
||||||
<NoWarn>0</NoWarn>
|
|
||||||
<VariousControls>
|
|
||||||
<MiscControls />
|
|
||||||
<Define />
|
|
||||||
<Undefine />
|
|
||||||
<IncludePath />
|
|
||||||
</VariousControls>
|
|
||||||
</Aads>
|
|
||||||
<LDads>
|
|
||||||
<umfTarg>1</umfTarg>
|
|
||||||
<Ropi>0</Ropi>
|
|
||||||
<Rwpi>0</Rwpi>
|
|
||||||
<noStLib>0</noStLib>
|
|
||||||
<RepFail>1</RepFail>
|
|
||||||
<useFile>0</useFile>
|
|
||||||
<TextAddressRange>0x08000000</TextAddressRange>
|
|
||||||
<DataAddressRange>0x20000000</DataAddressRange>
|
|
||||||
<pXoBase />
|
|
||||||
<ScatterFile />
|
|
||||||
<IncludeLibs />
|
|
||||||
<IncludeLibsPath />
|
|
||||||
<Misc />
|
|
||||||
<LinkerInputFile />
|
|
||||||
<DisabledWarnings />
|
|
||||||
</LDads>
|
|
||||||
</TargetArmAds>
|
|
||||||
</TargetOption>
|
|
||||||
<Groups>
|
|
||||||
<Group>
|
|
||||||
<GroupName>Application/MDK-ARM</GroupName>
|
|
||||||
<Files>
|
|
||||||
<File>
|
|
||||||
<FileName>startup_stm32l4r9xx.s</FileName>
|
|
||||||
<FileType>2</FileType>
|
|
||||||
<FilePath>startup_stm32l4r9xx.s</FilePath>
|
|
||||||
</File>
|
|
||||||
</Files>
|
|
||||||
</Group>
|
|
||||||
|
|
||||||
<Group>
|
|
||||||
<GroupName>::CMSIS</GroupName>
|
|
||||||
</Group>
|
|
||||||
<Group><GroupName>Application/User</GroupName><Files><File><FileName>main.c</FileName><FileType>1</FileType><FilePath>../Src/main.c</FilePath></File><File><FileName>stm32l4xx_it.c</FileName><FileType>1</FileType><FilePath>../Src/stm32l4xx_it.c</FilePath></File><File><FileName>stm32l4xx_hal_msp.c</FileName><FileType>1</FileType><FilePath>../Src/stm32l4xx_hal_msp.c</FilePath></File></Files></Group>
|
|
||||||
<Group><GroupName>Drivers/STM32L4xx_HAL_Driver</GroupName><Files><File><FileName>stm32l4xx_hal_tim.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim.c</FilePath></File><File><FileName>stm32l4xx_hal_tim_ex.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_tim_ex.c</FilePath></File><File><FileName>stm32l4xx_hal_uart.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart.c</FilePath></File><File><FileName>stm32l4xx_hal_uart_ex.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_uart_ex.c</FilePath></File><File><FileName>stm32l4xx_hal.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal.c</FilePath></File><File><FileName>stm32l4xx_hal_i2c.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c.c</FilePath></File><File><FileName>stm32l4xx_hal_i2c_ex.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_i2c_ex.c</FilePath></File><File><FileName>stm32l4xx_hal_rcc.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc.c</FilePath></File><File><FileName>stm32l4xx_hal_rcc_ex.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_rcc_ex.c</FilePath></File><File><FileName>stm32l4xx_hal_flash.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c</FilePath></File><File><FileName>stm32l4xx_hal_flash_ex.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c</FilePath></File><File><FileName>stm32l4xx_hal_flash_ramfunc.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ramfunc.c</FilePath></File><File><FileName>stm32l4xx_hal_gpio.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_gpio.c</FilePath></File><File><FileName>stm32l4xx_hal_dma.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma.c</FilePath></File><File><FileName>stm32l4xx_hal_dma_ex.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_dma_ex.c</FilePath></File><File><FileName>stm32l4xx_hal_pwr.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr.c</FilePath></File><File><FileName>stm32l4xx_hal_pwr_ex.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_pwr_ex.c</FilePath></File><File><FileName>stm32l4xx_hal_cortex.c</FileName><FileType>1</FileType><FilePath>C:/Users/RT-Thread/STM32Cube/Repository/STM32Cube_FW_L4_V1.13.0/Drivers/STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_cortex.c</FilePath></File></Files></Group>
|
|
||||||
<Group><GroupName>Drivers/CMSIS</GroupName><Files><File><FileName>system_stm32l4xx.c</FileName><FileType>1</FileType><FilePath>../Src/system_stm32l4xx.c</FilePath></File></Files></Group>
|
|
||||||
</Groups>
|
|
||||||
|
|
||||||
</Target>
|
|
||||||
</Targets>
|
|
||||||
<RTE>
|
|
||||||
<apis />
|
|
||||||
<components>
|
|
||||||
<component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="4.3.0" condition="CMSIS Core">
|
|
||||||
<package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="4.5.0" />
|
|
||||||
<targetInfos>
|
|
||||||
<targetInfo name="CubeMX_Config" />
|
|
||||||
</targetInfos>
|
|
||||||
</component>
|
|
||||||
</components>
|
|
||||||
<files />
|
|
||||||
</RTE>
|
|
||||||
</Project>
|
|
|
@ -1,466 +0,0 @@
|
||||||
;********************** COPYRIGHT(c) 2017 STMicroelectronics ******************
|
|
||||||
;* File Name : startup_stm32l4r9xx.s
|
|
||||||
;* Author : MCD Application Team
|
|
||||||
;* Description : STM32L4R9xx Ultra Low Power devices vector table for MDK-ARM toolchain.
|
|
||||||
;* This module performs:
|
|
||||||
;* - Set the initial SP
|
|
||||||
;* - Set the initial PC == Reset_Handler
|
|
||||||
;* - Set the vector table entries with the exceptions ISR address
|
|
||||||
;* - Branches to __main in the C library (which eventually
|
|
||||||
;* calls main()).
|
|
||||||
;* After Reset the Cortex-M4 processor is in Thread mode,
|
|
||||||
;* priority is Privileged, and the Stack is set to Main.
|
|
||||||
;* <<< Use Configuration Wizard in Context Menu >>>
|
|
||||||
;*******************************************************************************
|
|
||||||
;*
|
|
||||||
;* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
;* are permitted provided that the following conditions are met:
|
|
||||||
;* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer.
|
|
||||||
;* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
;* this list of conditions and the following disclaimer in the documentation
|
|
||||||
;* and/or other materials provided with the distribution.
|
|
||||||
;* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
;* may be used to endorse or promote products derived from this software
|
|
||||||
;* without specific prior written permission.
|
|
||||||
;*
|
|
||||||
;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
;*
|
|
||||||
;*******************************************************************************
|
|
||||||
;
|
|
||||||
; Amount of memory (in bytes) allocated for Stack
|
|
||||||
; Tailor this value to your application needs
|
|
||||||
; <h> Stack Configuration
|
|
||||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Stack_Size EQU 0x400
|
|
||||||
|
|
||||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
|
||||||
Stack_Mem SPACE Stack_Size
|
|
||||||
__initial_sp
|
|
||||||
|
|
||||||
|
|
||||||
; <h> Heap Configuration
|
|
||||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
|
||||||
; </h>
|
|
||||||
|
|
||||||
Heap_Size EQU 0x200
|
|
||||||
|
|
||||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
|
||||||
__heap_base
|
|
||||||
Heap_Mem SPACE Heap_Size
|
|
||||||
__heap_limit
|
|
||||||
|
|
||||||
PRESERVE8
|
|
||||||
THUMB
|
|
||||||
|
|
||||||
|
|
||||||
; Vector Table Mapped to Address 0 at Reset
|
|
||||||
AREA RESET, DATA, READONLY
|
|
||||||
EXPORT __Vectors
|
|
||||||
EXPORT __Vectors_End
|
|
||||||
EXPORT __Vectors_Size
|
|
||||||
|
|
||||||
__Vectors DCD __initial_sp ; Top of Stack
|
|
||||||
DCD Reset_Handler ; Reset Handler
|
|
||||||
DCD NMI_Handler ; NMI Handler
|
|
||||||
DCD HardFault_Handler ; Hard Fault Handler
|
|
||||||
DCD MemManage_Handler ; MPU Fault Handler
|
|
||||||
DCD BusFault_Handler ; Bus Fault Handler
|
|
||||||
DCD UsageFault_Handler ; Usage Fault Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD SVC_Handler ; SVCall Handler
|
|
||||||
DCD DebugMon_Handler ; Debug Monitor Handler
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD PendSV_Handler ; PendSV Handler
|
|
||||||
DCD SysTick_Handler ; SysTick Handler
|
|
||||||
|
|
||||||
; External Interrupts
|
|
||||||
DCD WWDG_IRQHandler ; Window WatchDog
|
|
||||||
DCD PVD_PVM_IRQHandler ; PVD/PVM1/PVM2/PVM3/PVM4 through EXTI Line detection
|
|
||||||
DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
|
|
||||||
DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
|
|
||||||
DCD FLASH_IRQHandler ; FLASH
|
|
||||||
DCD RCC_IRQHandler ; RCC
|
|
||||||
DCD EXTI0_IRQHandler ; EXTI Line0
|
|
||||||
DCD EXTI1_IRQHandler ; EXTI Line1
|
|
||||||
DCD EXTI2_IRQHandler ; EXTI Line2
|
|
||||||
DCD EXTI3_IRQHandler ; EXTI Line3
|
|
||||||
DCD EXTI4_IRQHandler ; EXTI Line4
|
|
||||||
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
|
|
||||||
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
|
|
||||||
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
|
|
||||||
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
|
|
||||||
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
|
|
||||||
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
|
|
||||||
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
|
|
||||||
DCD ADC1_IRQHandler ; ADC1
|
|
||||||
DCD CAN1_TX_IRQHandler ; CAN1 TX
|
|
||||||
DCD CAN1_RX0_IRQHandler ; CAN1 RX0
|
|
||||||
DCD CAN1_RX1_IRQHandler ; CAN1 RX1
|
|
||||||
DCD CAN1_SCE_IRQHandler ; CAN1 SCE
|
|
||||||
DCD EXTI9_5_IRQHandler ; External Line[9:5]s
|
|
||||||
DCD TIM1_BRK_TIM15_IRQHandler ; TIM1 Break and TIM15
|
|
||||||
DCD TIM1_UP_TIM16_IRQHandler ; TIM1 Update and TIM16
|
|
||||||
DCD TIM1_TRG_COM_TIM17_IRQHandler ; TIM1 Trigger and Commutation and TIM17
|
|
||||||
DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
|
|
||||||
DCD TIM2_IRQHandler ; TIM2
|
|
||||||
DCD TIM3_IRQHandler ; TIM3
|
|
||||||
DCD TIM4_IRQHandler ; TIM4
|
|
||||||
DCD I2C1_EV_IRQHandler ; I2C1 Event
|
|
||||||
DCD I2C1_ER_IRQHandler ; I2C1 Error
|
|
||||||
DCD I2C2_EV_IRQHandler ; I2C2 Event
|
|
||||||
DCD I2C2_ER_IRQHandler ; I2C2 Error
|
|
||||||
DCD SPI1_IRQHandler ; SPI1
|
|
||||||
DCD SPI2_IRQHandler ; SPI2
|
|
||||||
DCD USART1_IRQHandler ; USART1
|
|
||||||
DCD USART2_IRQHandler ; USART2
|
|
||||||
DCD USART3_IRQHandler ; USART3
|
|
||||||
DCD EXTI15_10_IRQHandler ; External Line[15:10]
|
|
||||||
DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
|
|
||||||
DCD DFSDM1_FLT3_IRQHandler ; DFSDM1 Filter 3 global Interrupt
|
|
||||||
DCD TIM8_BRK_IRQHandler ; TIM8 Break Interrupt
|
|
||||||
DCD TIM8_UP_IRQHandler ; TIM8 Update Interrupt
|
|
||||||
DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation Interrupt
|
|
||||||
DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD FMC_IRQHandler ; FMC
|
|
||||||
DCD SDMMC1_IRQHandler ; SDMMC1
|
|
||||||
DCD TIM5_IRQHandler ; TIM5
|
|
||||||
DCD SPI3_IRQHandler ; SPI3
|
|
||||||
DCD UART4_IRQHandler ; UART4
|
|
||||||
DCD UART5_IRQHandler ; UART5
|
|
||||||
DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
|
|
||||||
DCD TIM7_IRQHandler ; TIM7
|
|
||||||
DCD DMA2_Channel1_IRQHandler ; DMA2 Channel 1
|
|
||||||
DCD DMA2_Channel2_IRQHandler ; DMA2 Channel 2
|
|
||||||
DCD DMA2_Channel3_IRQHandler ; DMA2 Channel 3
|
|
||||||
DCD DMA2_Channel4_IRQHandler ; DMA2 Channel 4
|
|
||||||
DCD DMA2_Channel5_IRQHandler ; DMA2 Channel 5
|
|
||||||
DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt
|
|
||||||
DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt
|
|
||||||
DCD DFSDM1_FLT2_IRQHandler ; DFSDM1 Filter 2 global Interrupt
|
|
||||||
DCD COMP_IRQHandler ; COMP Interrupt
|
|
||||||
DCD LPTIM1_IRQHandler ; LP TIM1 interrupt
|
|
||||||
DCD LPTIM2_IRQHandler ; LP TIM2 interrupt
|
|
||||||
DCD OTG_FS_IRQHandler ; USB OTG FS
|
|
||||||
DCD DMA2_Channel6_IRQHandler ; DMA2 Channel 6
|
|
||||||
DCD DMA2_Channel7_IRQHandler ; DMA2 Channel 7
|
|
||||||
DCD LPUART1_IRQHandler ; LP UART1 interrupt
|
|
||||||
DCD OCTOSPI1_IRQHandler ; OctoSPI1 global interrupt
|
|
||||||
DCD I2C3_EV_IRQHandler ; I2C3 event
|
|
||||||
DCD I2C3_ER_IRQHandler ; I2C3 error
|
|
||||||
DCD SAI1_IRQHandler ; Serial Audio Interface 1 global interrupt
|
|
||||||
DCD SAI2_IRQHandler ; Serial Audio Interface 2 global interrupt
|
|
||||||
DCD OCTOSPI2_IRQHandler ; OctoSPI2 global interrupt
|
|
||||||
DCD TSC_IRQHandler ; Touch Sense Controller global interrupt
|
|
||||||
DCD DSI_IRQHandler ; DSI global interrupt
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD RNG_IRQHandler ; RNG global interrupt
|
|
||||||
DCD FPU_IRQHandler ; FPU
|
|
||||||
DCD CRS_IRQHandler ; CRS global interrupt
|
|
||||||
DCD I2C4_ER_IRQHandler ; I2C4 error
|
|
||||||
DCD I2C4_EV_IRQHandler ; I2C4 event
|
|
||||||
DCD DCMI_IRQHandler ; DCMI global interrupt
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD 0 ; Reserved
|
|
||||||
DCD DMA2D_IRQHandler ; DMA2D global interrupt
|
|
||||||
DCD LTDC_IRQHandler ; LTDC global interrupt
|
|
||||||
DCD LTDC_ER_IRQHandler ; LTDC error global interrupt
|
|
||||||
DCD GFXMMU_IRQHandler ; GFXMMU global interrupt
|
|
||||||
DCD DMAMUX1_OVR_IRQHandler ; DMAMUX1 overrun global interrupt
|
|
||||||
|
|
||||||
__Vectors_End
|
|
||||||
|
|
||||||
__Vectors_Size EQU __Vectors_End - __Vectors
|
|
||||||
|
|
||||||
AREA |.text|, CODE, READONLY
|
|
||||||
|
|
||||||
; Reset handler
|
|
||||||
Reset_Handler PROC
|
|
||||||
EXPORT Reset_Handler [WEAK]
|
|
||||||
IMPORT SystemInit
|
|
||||||
IMPORT __main
|
|
||||||
|
|
||||||
LDR R0, =SystemInit
|
|
||||||
BLX R0
|
|
||||||
LDR R0, =__main
|
|
||||||
BX R0
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
; Dummy Exception Handlers (infinite loops which can be modified)
|
|
||||||
|
|
||||||
NMI_Handler PROC
|
|
||||||
EXPORT NMI_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
HardFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT HardFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
MemManage_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT MemManage_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
BusFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT BusFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
UsageFault_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT UsageFault_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SVC_Handler PROC
|
|
||||||
EXPORT SVC_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
DebugMon_Handler\
|
|
||||||
PROC
|
|
||||||
EXPORT DebugMon_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
PendSV_Handler PROC
|
|
||||||
EXPORT PendSV_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
SysTick_Handler PROC
|
|
||||||
EXPORT SysTick_Handler [WEAK]
|
|
||||||
B .
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
Default_Handler PROC
|
|
||||||
|
|
||||||
EXPORT WWDG_IRQHandler [WEAK]
|
|
||||||
EXPORT PVD_PVM_IRQHandler [WEAK]
|
|
||||||
EXPORT TAMP_STAMP_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_WKUP_IRQHandler [WEAK]
|
|
||||||
EXPORT FLASH_IRQHandler [WEAK]
|
|
||||||
EXPORT RCC_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI0_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI1_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI2_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel2_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel5_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel6_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA1_Channel7_IRQHandler [WEAK]
|
|
||||||
EXPORT ADC1_IRQHandler [WEAK]
|
|
||||||
EXPORT CAN1_TX_IRQHandler [WEAK]
|
|
||||||
EXPORT CAN1_RX0_IRQHandler [WEAK]
|
|
||||||
EXPORT CAN1_RX1_IRQHandler [WEAK]
|
|
||||||
EXPORT CAN1_SCE_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI9_5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM1_BRK_TIM15_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM1_UP_TIM16_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM1_TRG_COM_TIM17_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM1_CC_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM2_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM3_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM4_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C1_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C2_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI1_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART1_IRQHandler [WEAK]
|
|
||||||
EXPORT USART2_IRQHandler [WEAK]
|
|
||||||
EXPORT USART3_IRQHandler [WEAK]
|
|
||||||
EXPORT EXTI15_10_IRQHandler [WEAK]
|
|
||||||
EXPORT RTC_Alarm_IRQHandler [WEAK]
|
|
||||||
EXPORT DFSDM1_FLT3_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM8_BRK_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM8_UP_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM8_TRG_COM_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM8_CC_IRQHandler [WEAK]
|
|
||||||
EXPORT FMC_IRQHandler [WEAK]
|
|
||||||
EXPORT SDMMC1_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM5_IRQHandler [WEAK]
|
|
||||||
EXPORT SPI3_IRQHandler [WEAK]
|
|
||||||
EXPORT UART4_IRQHandler [WEAK]
|
|
||||||
EXPORT UART5_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM6_DAC_IRQHandler [WEAK]
|
|
||||||
EXPORT TIM7_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel1_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel2_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel3_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel4_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel5_IRQHandler [WEAK]
|
|
||||||
EXPORT DFSDM1_FLT0_IRQHandler [WEAK]
|
|
||||||
EXPORT DFSDM1_FLT1_IRQHandler [WEAK]
|
|
||||||
EXPORT DFSDM1_FLT2_IRQHandler [WEAK]
|
|
||||||
EXPORT COMP_IRQHandler [WEAK]
|
|
||||||
EXPORT LPTIM1_IRQHandler [WEAK]
|
|
||||||
EXPORT LPTIM2_IRQHandler [WEAK]
|
|
||||||
EXPORT OTG_FS_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel6_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2_Channel7_IRQHandler [WEAK]
|
|
||||||
EXPORT LPUART1_IRQHandler [WEAK]
|
|
||||||
EXPORT OCTOSPI1_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C3_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C3_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT SAI1_IRQHandler [WEAK]
|
|
||||||
EXPORT SAI2_IRQHandler [WEAK]
|
|
||||||
EXPORT OCTOSPI2_IRQHandler [WEAK]
|
|
||||||
EXPORT TSC_IRQHandler [WEAK]
|
|
||||||
EXPORT DSI_IRQHandler [WEAK]
|
|
||||||
EXPORT RNG_IRQHandler [WEAK]
|
|
||||||
EXPORT FPU_IRQHandler [WEAK]
|
|
||||||
EXPORT CRS_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C4_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT I2C4_EV_IRQHandler [WEAK]
|
|
||||||
EXPORT DCMI_IRQHandler [WEAK]
|
|
||||||
EXPORT DMA2D_IRQHandler [WEAK]
|
|
||||||
EXPORT LTDC_IRQHandler [WEAK]
|
|
||||||
EXPORT LTDC_ER_IRQHandler [WEAK]
|
|
||||||
EXPORT GFXMMU_IRQHandler [WEAK]
|
|
||||||
EXPORT DMAMUX1_OVR_IRQHandler [WEAK]
|
|
||||||
|
|
||||||
WWDG_IRQHandler
|
|
||||||
PVD_PVM_IRQHandler
|
|
||||||
TAMP_STAMP_IRQHandler
|
|
||||||
RTC_WKUP_IRQHandler
|
|
||||||
FLASH_IRQHandler
|
|
||||||
RCC_IRQHandler
|
|
||||||
EXTI0_IRQHandler
|
|
||||||
EXTI1_IRQHandler
|
|
||||||
EXTI2_IRQHandler
|
|
||||||
EXTI3_IRQHandler
|
|
||||||
EXTI4_IRQHandler
|
|
||||||
DMA1_Channel1_IRQHandler
|
|
||||||
DMA1_Channel2_IRQHandler
|
|
||||||
DMA1_Channel3_IRQHandler
|
|
||||||
DMA1_Channel4_IRQHandler
|
|
||||||
DMA1_Channel5_IRQHandler
|
|
||||||
DMA1_Channel6_IRQHandler
|
|
||||||
DMA1_Channel7_IRQHandler
|
|
||||||
ADC1_IRQHandler
|
|
||||||
CAN1_TX_IRQHandler
|
|
||||||
CAN1_RX0_IRQHandler
|
|
||||||
CAN1_RX1_IRQHandler
|
|
||||||
CAN1_SCE_IRQHandler
|
|
||||||
EXTI9_5_IRQHandler
|
|
||||||
TIM1_BRK_TIM15_IRQHandler
|
|
||||||
TIM1_UP_TIM16_IRQHandler
|
|
||||||
TIM1_TRG_COM_TIM17_IRQHandler
|
|
||||||
TIM1_CC_IRQHandler
|
|
||||||
TIM2_IRQHandler
|
|
||||||
TIM3_IRQHandler
|
|
||||||
TIM4_IRQHandler
|
|
||||||
I2C1_EV_IRQHandler
|
|
||||||
I2C1_ER_IRQHandler
|
|
||||||
I2C2_EV_IRQHandler
|
|
||||||
I2C2_ER_IRQHandler
|
|
||||||
SPI1_IRQHandler
|
|
||||||
SPI2_IRQHandler
|
|
||||||
USART1_IRQHandler
|
|
||||||
USART2_IRQHandler
|
|
||||||
USART3_IRQHandler
|
|
||||||
EXTI15_10_IRQHandler
|
|
||||||
RTC_Alarm_IRQHandler
|
|
||||||
DFSDM1_FLT3_IRQHandler
|
|
||||||
TIM8_BRK_IRQHandler
|
|
||||||
TIM8_UP_IRQHandler
|
|
||||||
TIM8_TRG_COM_IRQHandler
|
|
||||||
TIM8_CC_IRQHandler
|
|
||||||
FMC_IRQHandler
|
|
||||||
SDMMC1_IRQHandler
|
|
||||||
TIM5_IRQHandler
|
|
||||||
SPI3_IRQHandler
|
|
||||||
UART4_IRQHandler
|
|
||||||
UART5_IRQHandler
|
|
||||||
TIM6_DAC_IRQHandler
|
|
||||||
TIM7_IRQHandler
|
|
||||||
DMA2_Channel1_IRQHandler
|
|
||||||
DMA2_Channel2_IRQHandler
|
|
||||||
DMA2_Channel3_IRQHandler
|
|
||||||
DMA2_Channel4_IRQHandler
|
|
||||||
DMA2_Channel5_IRQHandler
|
|
||||||
DFSDM1_FLT0_IRQHandler
|
|
||||||
DFSDM1_FLT1_IRQHandler
|
|
||||||
DFSDM1_FLT2_IRQHandler
|
|
||||||
COMP_IRQHandler
|
|
||||||
LPTIM1_IRQHandler
|
|
||||||
LPTIM2_IRQHandler
|
|
||||||
OTG_FS_IRQHandler
|
|
||||||
DMA2_Channel6_IRQHandler
|
|
||||||
DMA2_Channel7_IRQHandler
|
|
||||||
LPUART1_IRQHandler
|
|
||||||
OCTOSPI1_IRQHandler
|
|
||||||
I2C3_EV_IRQHandler
|
|
||||||
I2C3_ER_IRQHandler
|
|
||||||
SAI1_IRQHandler
|
|
||||||
SAI2_IRQHandler
|
|
||||||
OCTOSPI2_IRQHandler
|
|
||||||
TSC_IRQHandler
|
|
||||||
DSI_IRQHandler
|
|
||||||
RNG_IRQHandler
|
|
||||||
FPU_IRQHandler
|
|
||||||
CRS_IRQHandler
|
|
||||||
I2C4_ER_IRQHandler
|
|
||||||
I2C4_EV_IRQHandler
|
|
||||||
DCMI_IRQHandler
|
|
||||||
DMA2D_IRQHandler
|
|
||||||
LTDC_IRQHandler
|
|
||||||
LTDC_ER_IRQHandler
|
|
||||||
GFXMMU_IRQHandler
|
|
||||||
DMAMUX1_OVR_IRQHandler
|
|
||||||
|
|
||||||
B .
|
|
||||||
|
|
||||||
ENDP
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
;*******************************************************************************
|
|
||||||
; User Stack and Heap initialization
|
|
||||||
;*******************************************************************************
|
|
||||||
IF :DEF:__MICROLIB
|
|
||||||
|
|
||||||
EXPORT __initial_sp
|
|
||||||
EXPORT __heap_base
|
|
||||||
EXPORT __heap_limit
|
|
||||||
|
|
||||||
ELSE
|
|
||||||
|
|
||||||
IMPORT __use_two_region_memory
|
|
||||||
EXPORT __user_initial_stackheap
|
|
||||||
|
|
||||||
__user_initial_stackheap
|
|
||||||
|
|
||||||
LDR R0, = Heap_Mem
|
|
||||||
LDR R1, =(Stack_Mem + Stack_Size)
|
|
||||||
LDR R2, = (Heap_Mem + Heap_Size)
|
|
||||||
LDR R3, = Stack_Mem
|
|
||||||
BX LR
|
|
||||||
|
|
||||||
ALIGN
|
|
||||||
|
|
||||||
ENDIF
|
|
||||||
|
|
||||||
END
|
|
||||||
|
|
||||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
|
|
@ -6,6 +6,7 @@
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2018-11-06 SummerGift first version
|
* 2018-11-06 SummerGift first version
|
||||||
|
* 2019-04-09 jhb
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "board.h"
|
#include "board.h"
|
||||||
|
|
|
@ -6,6 +6,7 @@
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2018-11-5 SummerGift first version
|
* 2018-11-5 SummerGift first version
|
||||||
|
* 2019-04-09 jhb
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __BOARD_H__
|
#ifndef __BOARD_H__
|
||||||
|
|
|
@ -47,6 +47,12 @@ SECTIONS
|
||||||
KEEP(*(SORT(.rti_fn*)))
|
KEEP(*(SORT(.rti_fn*)))
|
||||||
__rt_init_end = .;
|
__rt_init_end = .;
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
PROVIDE(__ctors_start__ = .);
|
||||||
|
KEEP (*(SORT(.init_array.*)))
|
||||||
|
KEEP (*(.init_array))
|
||||||
|
PROVIDE(__ctors_end__ = .);
|
||||||
|
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
_etext = .;
|
_etext = .;
|
||||||
} > ROM = 0
|
} > ROM = 0
|
||||||
|
@ -73,6 +79,10 @@ SECTIONS
|
||||||
*(.data)
|
*(.data)
|
||||||
*(.data.*)
|
*(.data.*)
|
||||||
*(.gnu.linkonce.d*)
|
*(.gnu.linkonce.d*)
|
||||||
|
PROVIDE(__dtors_start__ = .);
|
||||||
|
KEEP(*(SORT(.dtors.*)))
|
||||||
|
KEEP(*(.dtors))
|
||||||
|
PROVIDE(__dtors_end__ = .);
|
||||||
|
|
||||||
. = ALIGN(4);
|
. = ALIGN(4);
|
||||||
/* This is used by the startup in order to initialize the .data secion */
|
/* This is used by the startup in order to initialize the .data secion */
|
||||||
|
|
|
@ -73,7 +73,7 @@
|
||||||
<LExpSel>0</LExpSel>
|
<LExpSel>0</LExpSel>
|
||||||
</OPTXL>
|
</OPTXL>
|
||||||
<OPTFL>
|
<OPTFL>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>1</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
<IsCurrentTarget>1</IsCurrentTarget>
|
<IsCurrentTarget>1</IsCurrentTarget>
|
||||||
</OPTFL>
|
</OPTFL>
|
||||||
|
@ -117,6 +117,26 @@
|
||||||
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
|
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
|
||||||
</DebugOpt>
|
</DebugOpt>
|
||||||
<TargetDriverDllRegistry>
|
<TargetDriverDllRegistry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>ARMRTXEVENTFLAGS</Key>
|
||||||
|
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>DLGTARM</Key>
|
||||||
|
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>ARMDBGFLAGS</Key>
|
||||||
|
<Name></Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>DLGUARM</Key>
|
||||||
|
<Name>(105=-1,-1,-1,-1,0)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
<SetRegEntry>
|
<SetRegEntry>
|
||||||
<Number>0</Number>
|
<Number>0</Number>
|
||||||
<Key>UL2CM3</Key>
|
<Key>UL2CM3</Key>
|
||||||
|
@ -125,14 +145,14 @@
|
||||||
<SetRegEntry>
|
<SetRegEntry>
|
||||||
<Number>0</Number>
|
<Number>0</Number>
|
||||||
<Key>ST-LINKIII-KEIL_SWO</Key>
|
<Key>ST-LINKIII-KEIL_SWO</Key>
|
||||||
<Name>-U0668FF504955857567074018 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4Rx_2048 -FS08000000 -FL0200000 -FP0($$Device:STM32L4R9AIIx$CMSIS\Flash\STM32L4Rx_2048.FLM)</Name>
|
<Name>-U0668FF504955857567074018 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P2 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32L4Rx_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32L4R9AIIx$CMSIS\Flash\STM32L4Rx_2048.FLM)</Name>
|
||||||
</SetRegEntry>
|
</SetRegEntry>
|
||||||
</TargetDriverDllRegistry>
|
</TargetDriverDllRegistry>
|
||||||
<Breakpoint>
|
<Breakpoint>
|
||||||
<Bp>
|
<Bp>
|
||||||
<Number>0</Number>
|
<Number>0</Number>
|
||||||
<Type>0</Type>
|
<Type>0</Type>
|
||||||
<LineNumber>24</LineNumber>
|
<LineNumber>22</LineNumber>
|
||||||
<EnabledFlag>0</EnabledFlag>
|
<EnabledFlag>0</EnabledFlag>
|
||||||
<Address>0</Address>
|
<Address>0</Address>
|
||||||
<ByteObject>0</ByteObject>
|
<ByteObject>0</ByteObject>
|
||||||
|
@ -148,7 +168,7 @@
|
||||||
<Bp>
|
<Bp>
|
||||||
<Number>1</Number>
|
<Number>1</Number>
|
||||||
<Type>0</Type>
|
<Type>0</Type>
|
||||||
<LineNumber>22</LineNumber>
|
<LineNumber>24</LineNumber>
|
||||||
<EnabledFlag>0</EnabledFlag>
|
<EnabledFlag>0</EnabledFlag>
|
||||||
<Address>0</Address>
|
<Address>0</Address>
|
||||||
<ByteObject>0</ByteObject>
|
<ByteObject>0</ByteObject>
|
||||||
|
@ -168,12 +188,12 @@
|
||||||
<DebugFlag>
|
<DebugFlag>
|
||||||
<trace>0</trace>
|
<trace>0</trace>
|
||||||
<periodic>0</periodic>
|
<periodic>0</periodic>
|
||||||
<aLwin>0</aLwin>
|
<aLwin>1</aLwin>
|
||||||
<aCover>0</aCover>
|
<aCover>0</aCover>
|
||||||
<aSer1>0</aSer1>
|
<aSer1>0</aSer1>
|
||||||
<aSer2>0</aSer2>
|
<aSer2>0</aSer2>
|
||||||
<aPa>0</aPa>
|
<aPa>0</aPa>
|
||||||
<viewmode>0</viewmode>
|
<viewmode>1</viewmode>
|
||||||
<vrSel>0</vrSel>
|
<vrSel>0</vrSel>
|
||||||
<aSym>0</aSym>
|
<aSym>0</aSym>
|
||||||
<aTbox>0</aTbox>
|
<aTbox>0</aTbox>
|
||||||
|
@ -432,7 +452,7 @@
|
||||||
<GroupNumber>3</GroupNumber>
|
<GroupNumber>3</GroupNumber>
|
||||||
<FileNumber>17</FileNumber>
|
<FileNumber>17</FileNumber>
|
||||||
<FileType>1</FileType>
|
<FileType>1</FileType>
|
||||||
<tvExp>0</tvExp>
|
<tvExp>1</tvExp>
|
||||||
<tvExpOptDlg>0</tvExpOptDlg>
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
<bDave2>0</bDave2>
|
<bDave2>0</bDave2>
|
||||||
<PathWithFileName>board\board.c</PathWithFileName>
|
<PathWithFileName>board\board.c</PathWithFileName>
|
||||||
|
|
|
@ -46,7 +46,7 @@ if PLATFORM == 'gcc':
|
||||||
DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
||||||
CFLAGS = DEVICE + ' -Dgcc'
|
CFLAGS = DEVICE + ' -Dgcc'
|
||||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||||
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||||
|
|
||||||
CPATH = ''
|
CPATH = ''
|
||||||
LPATH = ''
|
LPATH = ''
|
||||||
|
@ -73,7 +73,7 @@ elif PLATFORM == 'armcc':
|
||||||
DEVICE = ' --cpu Cortex-M4.fp '
|
DEVICE = ' --cpu Cortex-M4.fp '
|
||||||
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||||
AFLAGS = DEVICE + ' --apcs=interwork '
|
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||||
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict --scatter "board\linker_scripts\link.sct"'
|
LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers --list rtthread.map --strict --scatter "board\linker_scripts\link.sct"'
|
||||||
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||||
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue