BSP support menuconfig for lm3s9b9x

This commit is contained in:
dejavudwh 2023-06-14 17:14:33 +08:00 committed by Man, Jianting (Meco)
parent bf4594870e
commit e4fdf23cef
4 changed files with 1474 additions and 210 deletions

1083
bsp/lm3s9b9x/.config Normal file

File diff suppressed because it is too large Load Diff

37
bsp/lm3s9b9x/Kconfig Normal file
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@ -0,0 +1,37 @@
mainmenu "RT-Thread Project Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../.."
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
config ENV_DIR
string
option env="ENV_ROOT"
default "/"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
config SOC_LM3S9B9X
bool
select ARCH_ARM_CORTEX_M3
default y
config RT_LWIP_ETH_PAD_SIZE
int
default 2
config RT_USING_UART1
bool
default y

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@ -18,19 +18,19 @@
#include "lwipopts.h"
#include "luminaryif.h"
#define MAX_ADDR_LEN 6
#define MAX_ADDR_LEN 6
struct net_device
{
/* inherit from ethernet device */
struct eth_device parent;
/* inherit from ethernet device */
struct eth_device parent;
/* interface address info. */
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
/* interface address info. */
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
};
static struct net_device luminaryif_dev_entry;
static struct net_device *luminaryif_dev =&luminaryif_dev_entry;
static struct net_device luminaryif_dev_entry;
static struct net_device *luminaryif_dev = &luminaryif_dev_entry;
static struct rt_semaphore tx_sem;
//*****************************************************************************
@ -115,7 +115,7 @@ void luminaryif_isr(void)
//
// Check to see if an RX Interrupt has occured.
//
if(ulTemp & ETH_INT_RX)
if (ulTemp & ETH_INT_RX)
{
//
// Indicate that a packet has been received.
@ -123,65 +123,67 @@ void luminaryif_isr(void)
rt_err_t result;
/* a frame has been received */
result = eth_device_ready((struct eth_device*)&(luminaryif_dev->parent));
result = eth_device_ready((struct eth_device *)&(luminaryif_dev->parent));
if(result != RT_EOK) rt_set_errno(-RT_ERROR);
if (result != RT_EOK)
rt_set_errno(-RT_ERROR);
//
// Disable Ethernet RX Interrupt.
//
EthernetIntDisable(ETH_BASE, ETH_INT_RX);
}
if(ulTemp & ETH_INT_TX)
if (ulTemp & ETH_INT_TX)
{
/* A frame has been transmitted. */
rt_sem_release(&tx_sem);
}
}
/* control the interface */
rt_err_t luminaryif_control(rt_device_t dev, int cmd, void *args)
{
switch(cmd)
{
case NIOCTL_GADDR:
/* get mac address */
if(args) rt_memcpy(args, luminaryif_dev_entry.dev_addr, 6);
else return -RT_ERROR;
break;
switch (cmd)
{
case NIOCTL_GADDR:
/* get mac address */
if (args)
rt_memcpy(args, luminaryif_dev_entry.dev_addr, 6);
else
return -RT_ERROR;
break;
default :
break;
}
default:
break;
}
return RT_EOK;
return RT_EOK;
}
/* Open the ethernet interface */
rt_err_t luminaryif_open(rt_device_t dev, rt_uint16_t oflag)
{
return RT_EOK;
return RT_EOK;
}
/* Close the interface */
rt_err_t luminaryif_close(rt_device_t dev)
{
return RT_EOK;
return RT_EOK;
}
/* Read */
rt_size_t luminaryif_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
rt_size_t luminaryif_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
rt_set_errno(-RT_ENOSYS);
return 0;
}
/* Write */
rt_size_t luminaryif_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
rt_size_t luminaryif_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
rt_set_errno(-RT_ENOSYS);
return 0;
}
//****************************************************************************
@ -208,11 +210,11 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
//
// Wait for space available in the TX FIFO.
//
while(!EthernetSpaceAvail(ETH_BASE))
while (!EthernetSpaceAvail(ETH_BASE))
{
}
//
//
// Fill in the first two bytes of the payload data (configured as padding
// with ETH_PAD_SIZE = 2) with the total length of the payload data
// (minus the Ethernet MAC layer header).
@ -229,7 +231,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
//
// Copy data from the pbuf(s) into the TX Fifo.
//
for(q = p; q != NULL; q = q->next)
for (q = p; q != NULL; q = q->next)
{
//
// Intialize a char pointer and index to the pbuf payload data.
@ -241,7 +243,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
// If the gather buffer has leftover data from a previous pbuf
// in the chain, fill it up and write it to the Tx FIFO.
//
while((iBuf < q->len) && (iGather != 0))
while ((iBuf < q->len) && (iGather != 0))
{
//
// Copy a byte from the pbuf into the gather buffer.
@ -258,7 +260,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
// If the gather index is 0 and the pbuf index is non-zero,
// we have a gather buffer to write into the Tx FIFO.
//
if((iGather == 0) && (iBuf != 0))
if ((iGather == 0) && (iBuf != 0))
{
HWREG(ETH_BASE + MAC_O_DATA) = ulGather;
ulGather = 0;
@ -268,12 +270,12 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
// Copy words of pbuf data into the Tx FIFO, but don't go past
// the end of the pbuf.
//
if((iBuf % 4) != 0)
if ((iBuf % 4) != 0)
{
while((iBuf + 4) <= q->len)
while ((iBuf + 4) <= q->len)
{
ulTemp = (pucBuf[iBuf++] << 0);
ulTemp |= (pucBuf[iBuf++] << 8);
ulTemp = (pucBuf[iBuf++] << 0);
ulTemp |= (pucBuf[iBuf++] << 8);
ulTemp |= (pucBuf[iBuf++] << 16);
ulTemp |= (pucBuf[iBuf++] << 24);
HWREG(ETH_BASE + MAC_O_DATA) = ulTemp;
@ -286,7 +288,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
//
pulBuf = (unsigned long *)&pucBuf[iBuf];
while((iBuf + 4) <= q->len)
while ((iBuf + 4) <= q->len)
{
HWREG(ETH_BASE + MAC_O_DATA) = *pulBuf++;
iBuf += 4;
@ -296,7 +298,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
// Check if leftover data in the pbuf and save it in the gather
// buffer for the next time.
//
while(iBuf < q->len)
while (iBuf < q->len)
{
//
// Copy a byte from the pbuf into the gather buffer.
@ -324,7 +326,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
lwip_stats.link.xmit++;
#endif
return(ERR_OK);
return (ERR_OK);
}
//*****************************************************************************
@ -333,7 +335,7 @@ rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
// of the incoming packet from the interface into the pbuf.
//
//*****************************************************************************
struct pbuf * luminaryif_rx(rt_device_t dev)
struct pbuf *luminaryif_rx(rt_device_t dev)
{
struct pbuf *p, *q;
u16_t len;
@ -341,14 +343,14 @@ struct pbuf * luminaryif_rx(rt_device_t dev)
int i;
unsigned long *ptr;
if(!EthernetPacketAvail(ETH_BASE))
if (!EthernetPacketAvail(ETH_BASE))
{
//
// Enable Ethernet RX Interrupt.
//
EthernetIntEnable(ETH_BASE, ETH_INT_RX);
return(NULL);
return (NULL);
}
//
@ -364,7 +366,7 @@ struct pbuf * luminaryif_rx(rt_device_t dev)
//
p = pbuf_alloc(PBUF_LINK, len, PBUF_RAM);
if(p != NULL)
if (p != NULL)
{
//
// Place the first word into the first pbuf location.
@ -377,7 +379,7 @@ struct pbuf * luminaryif_rx(rt_device_t dev)
// Process all but the last buffer in the pbuf chain.
//
q = p;
while(q != NULL)
while (q != NULL)
{
//
// Setup a byte pointer into the payload section of the pbuf.
@ -388,7 +390,7 @@ struct pbuf * luminaryif_rx(rt_device_t dev)
// Read data from FIFO into the current pbuf
// (assume pbuf length is modulo 4)
//
for(i = 0; i < q->len; i += 4)
for (i = 0; i < q->len; i += 4)
{
*ptr++ = HWREG(ETH_BASE + MAC_O_DATA);
}
@ -414,7 +416,7 @@ struct pbuf * luminaryif_rx(rt_device_t dev)
//
// Just read all of the remaining data from the FIFO and dump it.
//
for(i = 4; i < len; i+=4)
for (i = 4; i < len; i += 4)
{
ulTemp = HWREG(ETH_BASE + MAC_O_DATA);
}
@ -423,72 +425,71 @@ struct pbuf * luminaryif_rx(rt_device_t dev)
lwip_stats.link.memerr++;
lwip_stats.link.drop++;
#endif
//
// Enable Ethernet RX Interrupt.
//
EthernetIntEnable(ETH_BASE, ETH_INT_RX);
//
// Enable Ethernet RX Interrupt.
//
EthernetIntEnable(ETH_BASE, ETH_INT_RX);
}
return(p);
return (p);
}
int rt_hw_luminaryif_init(void)
{
rt_err_t result;
unsigned long ulUser0, ulUser1;
rt_err_t result;
unsigned long ulUser0, ulUser1;
/* Enable and Reset the Ethernet Controller. */
SysCtlPeripheralEnable(SYSCTL_PERIPH_ETH);
SysCtlPeripheralReset(SYSCTL_PERIPH_ETH);
/* Enable and Reset the Ethernet Controller. */
SysCtlPeripheralEnable(SYSCTL_PERIPH_ETH);
SysCtlPeripheralReset(SYSCTL_PERIPH_ETH);
/*
Enable Port F for Ethernet LEDs.
LED0 Bit 3 Output
LED1 Bit 2 Output
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
/*
Enable Port F for Ethernet LEDs.
LED0 Bit 3 Output
LED1 Bit 2 Output
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
/* GPIODirModeSet and GPIOPadConfigSet */
GPIOPinTypeEthernetLED(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3);
GPIOPinConfigure(GPIO_PF2_LED1);
GPIOPinConfigure(GPIO_PF3_LED0);
FlashUserSet(0x00371200, 0x00563412); /* OUI:00-12-37 (hex) Texas Instruments, only for test */
/* Configure the hardware MAC address */
FlashUserGet(&ulUser0, &ulUser1);
if((ulUser0 == 0xffffffff) || (ulUser1 == 0xffffffff))
{
rt_kprintf("Fatal error in geting MAC address\n");
}
FlashUserSet(0x00371200, 0x00563412); /* OUI:00-12-37 (hex) Texas Instruments, only for test */
/* Configure the hardware MAC address */
FlashUserGet(&ulUser0, &ulUser1);
if ((ulUser0 == 0xffffffff) || (ulUser1 == 0xffffffff))
{
rt_kprintf("Fatal error in geting MAC address\n");
}
/* init rt-thread device interface */
luminaryif_dev_entry.parent.parent.init = luminaryif_init;
luminaryif_dev_entry.parent.parent.open = luminaryif_open;
luminaryif_dev_entry.parent.parent.close = luminaryif_close;
luminaryif_dev_entry.parent.parent.read = luminaryif_read;
luminaryif_dev_entry.parent.parent.write = luminaryif_write;
luminaryif_dev_entry.parent.parent.control = luminaryif_control;
luminaryif_dev_entry.parent.eth_rx = luminaryif_rx;
luminaryif_dev_entry.parent.eth_tx = luminaryif_tx;
/* init rt-thread device interface */
luminaryif_dev_entry.parent.parent.init = luminaryif_init;
luminaryif_dev_entry.parent.parent.open = luminaryif_open;
luminaryif_dev_entry.parent.parent.close = luminaryif_close;
luminaryif_dev_entry.parent.parent.read = luminaryif_read;
luminaryif_dev_entry.parent.parent.write = luminaryif_write;
luminaryif_dev_entry.parent.parent.control = luminaryif_control;
luminaryif_dev_entry.parent.eth_rx = luminaryif_rx;
luminaryif_dev_entry.parent.eth_tx = luminaryif_tx;
/*
Convert the 24/24 split MAC address from NV ram into a 32/16 split MAC
address needed to program the hardware registers, then program the MAC
address into the Ethernet Controller registers.
*/
luminaryif_dev_entry.dev_addr[0] = ((ulUser0 >> 0) & 0xff);
luminaryif_dev_entry.dev_addr[1] = ((ulUser0 >> 8) & 0xff);
luminaryif_dev_entry.dev_addr[2] = ((ulUser0 >> 16) & 0xff);
luminaryif_dev_entry.dev_addr[3] = ((ulUser1 >> 0) & 0xff);
luminaryif_dev_entry.dev_addr[4] = ((ulUser1 >> 8) & 0xff);
luminaryif_dev_entry.dev_addr[5] = ((ulUser1 >> 16) & 0xff);
/*
Convert the 24/24 split MAC address from NV ram into a 32/16 split MAC
address needed to program the hardware registers, then program the MAC
address into the Ethernet Controller registers.
*/
luminaryif_dev_entry.dev_addr[0] = ((ulUser0 >> 0) & 0xff);
luminaryif_dev_entry.dev_addr[1] = ((ulUser0 >> 8) & 0xff);
luminaryif_dev_entry.dev_addr[2] = ((ulUser0 >> 16) & 0xff);
luminaryif_dev_entry.dev_addr[3] = ((ulUser1 >> 0) & 0xff);
luminaryif_dev_entry.dev_addr[4] = ((ulUser1 >> 8) & 0xff);
luminaryif_dev_entry.dev_addr[5] = ((ulUser1 >> 16) & 0xff);
/* Program the hardware with it's MAC address (for filtering). */
EthernetMACAddrSet(ETH_BASE, luminaryif_dev_entry.dev_addr);
/* Program the hardware with it's MAC address (for filtering). */
EthernetMACAddrSet(ETH_BASE, luminaryif_dev_entry.dev_addr);
rt_sem_init(&tx_sem, "emac", 1, RT_IPC_FLAG_FIFO);
rt_sem_init(&tx_sem, "emac", 1, RT_IPC_FLAG_FIFO);
result = eth_device_init(&(luminaryif_dev->parent), "E0");
result = eth_device_init(&(luminaryif_dev->parent), "E0");
return result;
return result;
}

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@ -1,151 +1,294 @@
/* RT-Thread config file */
#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__
#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* RT_NAME_MAX*/
#define RT_NAME_MAX 8
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Project Configuration */
/* RT_ALIGN_SIZE*/
#define RT_ALIGN_SIZE 8
/* RT-Thread Kernel */
/* PRIORITY_MAX*/
#define RT_THREAD_PRIORITY_MAX 32
/* Tick per Second*/
#define RT_TICK_PER_SECOND 100
/* SECTION: RT_DEBUG */
/* Thread Debug*/
/* #define RT_DEBUG */
/* #define RT_THREAD_DEBUG */
/* Using Hook*/
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 8
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 100
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_HOOK_USING_FUNC_PTR
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 256
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 512
/* kservice optimization */
#define RT_KSERVICE_USING_STDLIB
#define RT_DEBUG
/* Inter-Thread communication */
/* SECTION: IPC */
/* Using Semaphore*/
#define RT_USING_SEMAPHORE
/* Using Mutex*/
#define RT_USING_MUTEX
/* Using Event*/
#define RT_USING_EVENT
/* Using Faset Event*/
/* #define RT_USING_FASTEVENT */
/* Using MailBox*/
#define RT_USING_MAILBOX
/* Using Message Queue*/
#define RT_USING_MESSAGEQUEUE
/* SECTION: Memory Management */
/* Using Memory Pool Management*/
#define RT_USING_MEMPOOL
/* Memory Management */
/* Using Dynamic Heap Management*/
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_SMALL_MEM_AS_HEAP
#define RT_USING_HEAP
/* Using Small MM*/
#define RT_USING_SMALL_MEM
/* Kernel Device Object */
/* Using SLAB Allocator*/
/* #define RT_USING_SLAB */
/* SECTION: Device System */
/* Using Device System*/
#define RT_USING_DEVICE
#define RT_USING_DEVICE_IPC
#define RT_USING_UART1
// #define RT_USING_UART2
// #define RT_USING_UART3
/* SECTION: Console options */
#define RT_USING_CONSOLE
/* the buffer size of console*/
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart"
#define RT_VER_NUM 0x50001
#define RT_USING_HW_ATOMIC
#define RT_USING_CPU_FFS
#define ARCH_ARM
#define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M3
/* SECTION: FinSH shell options */
/* Using FinSH as Shell*/
/* RT-Thread Components */
#define RT_USING_MSH
#define RT_USING_FINSH
/* Using symbol table */
#define FINSH_USING_MSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_CMD_SIZE 80
#define MSH_USING_BUILT_IN_COMMANDS
#define FINSH_USING_DESCRIPTION
#define FINSH_ARG_MAX 10
//#define RT_USING_DFS
/* SECTION: DFS options */
/* DFS: device virtual file system */
#define RT_USING_DFS
#define DFS_USING_POSIX
#define DFS_USING_WORKDIR
#define DFS_FD_MAX 4
#define RT_USING_DFS_V1
#define DFS_FILESYSTEMS_MAX 1
#define DFS_FILESYSTEM_TYPES_MAX 4
#define RT_USING_DFS_ELMFAT
/* elm-chan's FatFs, Generic FAT Filesystem Module */
#define RT_DFS_ELM_CODE_PAGE 437
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_3
#define RT_DFS_ELM_USE_LFN 3
#define RT_DFS_ELM_LFN_UNICODE_0
#define RT_DFS_ELM_LFN_UNICODE 0
#define RT_DFS_ELM_MAX_LFN 255
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
#define RT_DFS_ELM_REENTRANT
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
#define RT_USING_DFS_DEVFS
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 1
/* the max number of opened files */
#define DFS_FD_MAX 4
/* the max number of cached sector */
#define DFS_CACHE_MAX_NUM 4
/* Device Drivers */
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
/* Using lighweight TCP/IP protocol stack*/
#define RT_USING_DEVICE_IPC
#define RT_UNAMED_PIPE_NUMBER 64
#define RT_USING_SERIAL
#define RT_USING_SERIAL_V1
#define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
/* Using USB */
/* C/C++ and POSIX layer */
#define RT_LIBC_DEFAULT_TIMEZONE 8
/* POSIX (Portable Operating System Interface) layer */
/* Interprocess Communication (IPC) */
/* Socket is in the 'Network' category */
/* Network */
#define NETDEV_USING_PING
#define RT_USING_LWIP
#define RT_USING_LWIP203
/* Trace LwIP protocol*/
/* #define RT_LWIP_DEBUG */
/* Enable ICMP protocol*/
#define RT_LWIP_ICMP
/* Enable IGMP protocol*/
#define RT_USING_LWIP_VER_NUM 0x20003
#define RT_LWIP_MEM_ALIGNMENT 4
#define RT_LWIP_IGMP
/* Enable UDP protocol*/
#define RT_LWIP_UDP
/* Enable TCP protocol*/
#define RT_LWIP_TCP
/* the number of simulatenously active TCP connections*/
#define RT_LWIP_TCP_PCB_NUM 5
/* Ethernet padding size */
#define RT_LWIP_ETH_PAD_SIZE 2
/* Enable SNMP protocol*/
//#define RT_LWIP_SNMP
/* Using DHCP*/
/* #define RT_LWIP_DHCP */
#define RT_LWIP_ICMP
#define RT_LWIP_DNS
#define RT_LWIP_DHCP
#define IP_SOF_BROADCAST 1
#define IP_SOF_BROADCAST_RECV 1
/* Static IPv4 Address */
/* ip address of target */
#define RT_LWIP_IPADDR "192.168.1.30"
#define RT_LWIP_GWADDR "192.168.1.1"
#define RT_LWIP_MSKADDR "255.255.255.0"
#define RT_LWIP_UDP
#define RT_LWIP_TCP
#define RT_LWIP_RAW
#define RT_MEMP_NUM_NETCONN 8
#define RT_LWIP_PBUF_NUM 16
#define RT_LWIP_RAW_PCB_NUM 4
#define RT_LWIP_UDP_PCB_NUM 4
#define RT_LWIP_TCP_PCB_NUM 5
#define RT_LWIP_TCP_SEG_NUM 40
#define RT_LWIP_TCP_SND_BUF 8192
#define RT_LWIP_TCP_WND 8192
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
#define RT_LWIP_ETHTHREAD_PRIORITY 15
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4
#define LWIP_NETIF_STATUS_CALLBACK 1
#define LWIP_NETIF_LINK_CALLBACK 1
#define SO_REUSE 1
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVBUF 1
#define LWIP_SO_LINGER 0
#define LWIP_NETIF_LOOPBACK 0
#define RT_LWIP_USING_PING
/* gateway address of target */
#define RT_LWIP_GWADDR "192.168.1.1"
/* Utilities */
/* mask address of target */
#define RT_LWIP_MSKADDR "255.255.255.0"
/* tcp thread options */
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
/* RT-Thread Utestcases */
/* ethernet if thread options */
#define RT_LWIP_ETHTHREAD_PRIORITY 15
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
/* TCP sender buffer space */
#define RT_LWIP_TCP_SND_BUF 8192
/* TCP receive window. */
#define RT_LWIP_TCP_WND 8192
/* RT-Thread online packages */
/* the size of each pbuf in the pbuf pool. */
#define RT_LWIP_PBUF_POOL_BUFSIZE 1500
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
/* XML: Extensible Markup Language */
/* multimedia packages */
/* LVGL: powerful and easy-to-use embedded GUI library */
/* u8g2: a monochrome graphic library */
/* tools packages */
/* system packages */
/* enhanced kernel services */
/* acceleration: Assembly language or algorithmic acceleration packages */
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
/* Micrium: Micrium software products porting for RT-Thread */
/* peripheral libraries and drivers */
/* sensors drivers */
/* touch drivers */
/* Kendryte SDK */
/* AI packages */
/* Signal Processing and Control Algorithm Packages */
/* miscellaneous packages */
/* project laboratory */
/* samples: kernel and components samples */
/* entertainment: terminal games and other interesting software packages */
/* Arduino libraries */
/* Projects */
/* Sensors */
/* Display */
/* Timing */
/* Data Processing */
/* Data Storage */
/* Communication */
/* Device Control */
/* Other */
/* Signal IO */
/* Uncategorized */
#define SOC_LM3S9B9X
#define RT_LWIP_ETH_PAD_SIZE 2
#define RT_USING_UART1
#endif