[bsp][mchp][samd51] delete stdio redirect, set usart async mode for target io
This commit is contained in:
parent
2e04e14ca8
commit
dfc3ed3f58
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@ -26,13 +26,14 @@ static uint8_t board_info[48] = "Adafruit Metro M4 Express, Microchip SAMD51\n";
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void rt_hw_console_output(const char *str)
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{
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io_write(g_stdio, (uint8_t *)str, strlen(str));
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while (TARGET_IO.stat != 0);
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}
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RTM_EXPORT(rt_hw_console_output);
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static inline void hw_board_init_usart(void)
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{
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usart_sync_get_io_descriptor(&TARGET_IO, &g_stdio);
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usart_sync_enable(&TARGET_IO);
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usart_async_get_io_descriptor(&TARGET_IO, &g_stdio);
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usart_async_enable(&TARGET_IO);
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io_write(g_stdio, board_info, strlen(board_info));
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}
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@ -36,21 +36,13 @@
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<require Dname="ATSAMD51J19A"/>
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<accept Tcompiler="GCC"/>
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</condition>
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<condition id="IAR">
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<require Dname="ATSAMD51J19A"/>
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<accept Tcompiler="IAR"/>
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</condition>
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<condition id="ARMCC">
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<require Dname="ATSAMD51J19A"/>
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<accept Tcompiler="ARMCC"/>
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</condition>
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</conditions>
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<components generator="AtmelStart">
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<component Cclass="AtmelStart" Cgroup="Framework" Cversion="1.0.0" condition="CMSIS Device Startup">
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<description>Atmel Start Framework</description>
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<RTE_Components_h>#define ATMEL_START</RTE_Components_h>
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<files>
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<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/usart_sync.rst"/>
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<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/usart_async.rst"/>
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<file category="doc" condition="ARMCC, GCC, IAR" name="hal/documentation/usb_device_async.rst"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_atomic.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_cache.h"/>
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@ -97,9 +89,11 @@
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/utils_increment_macro.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/utils_list.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/utils_repeat_macro.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/utils_ringbuffer.h"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="hal/utils/src/utils_assert.c"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="hal/utils/src/utils_event.c"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="hal/utils/src/utils_list.c"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="hal/utils/src/utils_ringbuffer.c"/>
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<file category="source" condition="GCC" name="hal/utils/src/utils_syscalls.c"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_ac_d51.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hri/hri_adc_d51.h"/>
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@ -155,21 +149,13 @@
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<file category="header" condition="ARMCC, GCC, IAR" name="usb/usb_includes.h"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="usb/usb_protocol.c"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="usb/usb_protocol.h"/>
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<file category="doc" condition="ARMCC, GCC, IAR" name="documentation/stdio.rst"/>
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<file category="source" condition="GCC" name="stdio_redirect/gcc/read.c"/>
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<file category="source" condition="GCC" name="stdio_redirect/gcc/write.c"/>
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<file category="source" condition="IAR" name="stdio_redirect/iar/read.c"/>
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<file category="source" condition="IAR" name="stdio_redirect/iar/write.c"/>
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<file category="source" condition="ARMCC" name="stdio_redirect/keil/Retarget.c"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="stdio_redirect/stdio_io.c"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="stdio_redirect/stdio_io.h"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="main.c"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="driver_init.c"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="driver_init.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="atmel_start_pins.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="examples/driver_examples.h"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="examples/driver_examples.c"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_usart_sync.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_usart_async.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_missing_features.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_reset.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_m_async.h"/>
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@ -179,7 +165,7 @@
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_s_sync.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_usart_async.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_usart_sync.h"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_usart_sync.c"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_usart_async.c"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/utils/include/parts.h"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="hpl/cmcc/hpl_cmcc.c"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="hpl/core/hpl_core_m4.c"/>
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@ -199,8 +185,6 @@
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<file category="source" condition="ARMCC, GCC, IAR" name="hpl/usb/hpl_usb.c"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="usb_start.c"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="usb_start.h"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="stdio_start.c"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="stdio_start.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="atmel_start.h"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="atmel_start.c"/>
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<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_cmcc_config.h"/>
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@ -214,7 +198,6 @@
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<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/hpl_usb_config.h"/>
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<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/peripheral_clk_config.h"/>
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<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/usbd_config.h"/>
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<file attr="config" category="header" condition="ARMCC, GCC, IAR" name="config/stdio_redirect_config.h"/>
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<file category="include" condition="ARMCC, GCC, IAR" name=""/>
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<file category="include" condition="ARMCC, GCC, IAR" name="config"/>
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<file category="include" condition="ARMCC, GCC, IAR" name="examples"/>
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@ -240,9 +223,6 @@
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<file category="include" condition="ARMCC, GCC, IAR" name="usb/class/cdc/device"/>
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<file category="include" condition="ARMCC, GCC, IAR" name="usb/device"/>
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<file category="include" condition="ARMCC, GCC, IAR" name=""/>
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<file category="include" condition="ARMCC, GCC, IAR" name="config"/>
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<file category="include" condition="ARMCC, GCC, IAR" name="stdio_redirect"/>
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<file category="include" condition="ARMCC, GCC, IAR" name=""/>
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</files>
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</component>
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</components>
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@ -38,7 +38,7 @@ src += Glob('usb/device/*.c')
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src += Glob('usb/class/cdc/device/*.c')
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src += [cwd + '/atmel_start.c']
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src += [cwd + '/driver_init.c']
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src += [cwd + '/stdio_start.c']
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# src += [cwd + '/stdio_start.c']
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src += [cwd + '/usb_start.c']
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#add for startup script
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@ -71,7 +71,7 @@ path = [
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cwd + '/usb/class/cdc/device',
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cwd + '/usb/device',
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cwd + '/samd51a/include',
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cwd + '/stdio_redirect',
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# cwd + '/stdio_redirect',
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cwd + '/../board',
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cwd + '/../../common/applications'
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]
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@ -27,35 +27,33 @@ endif
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# List the subdirectories for creating object files
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SUB_DIRS += \
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\
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hal/src \
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hpl/ramecc \
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examples \
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hpl/oscctrl \
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stdio_redirect/keil \
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hpl/pm \
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hpl/osc32kctrl \
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samd51a/armcc/Device/SAMD51/Source \
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usb \
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hpl/ramecc \
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hpl/dmac \
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usb/class/cdc/device \
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stdio_redirect \
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hal/src \
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hpl/mclk \
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usb \
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hal/utils/src \
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hpl/sercom \
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examples \
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hpl/gclk \
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usb/device \
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hpl/oscctrl \
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samd51a/armcc/Device/SAMD51/Source/ARM \
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hpl/usb \
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hpl/pm \
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hpl/cmcc \
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hpl/gclk \
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hpl/mclk \
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usb/device \
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hpl/sercom \
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hpl/core
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hpl/core \
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hpl/cmcc
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# List the object files
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OBJS += \
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hal/src/hal_io.o \
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stdio_redirect/stdio_io.o \
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hpl/core/hpl_core_m4.o \
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usb/class/cdc/device/cdcdf_acm.o \
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hpl/dmac/hpl_dmac.o \
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samd51a/armcc/Device/SAMD51/Source/ARM/startup_samd51.o \
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usb_start.o \
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hpl/usb/hpl_usb.o \
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samd51a/armcc/Device/SAMD51/Source/system_samd51.o \
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hal/src/hal_delay.o \
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@ -64,14 +62,10 @@ hpl/core/hpl_init.o \
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hpl/gclk/hpl_gclk.o \
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hal/utils/src/utils_list.o \
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hal/utils/src/utils_assert.o \
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usb_start.o \
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hpl/dmac/hpl_dmac.o \
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hpl/oscctrl/hpl_oscctrl.o \
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hal/src/hal_usart_sync.o \
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hpl/mclk/hpl_mclk.o \
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stdio_redirect/keil/Retarget.o \
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samd51a/armcc/Device/SAMD51/Source/ARM/startup_samd51.o \
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hpl/ramecc/hpl_ramecc.o \
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stdio_start.o \
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usb/usb_protocol.o \
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hal/src/hal_init.o \
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hal/src/hal_usb_device.o \
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hpl/osc32kctrl/hpl_osc32kctrl.o \
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examples/driver_examples.o \
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driver_init.o \
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hal/src/hal_usart_async.o \
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hpl/sercom/hpl_sercom.o \
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hal/utils/src/utils_ringbuffer.o \
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hal/src/hal_gpio.o \
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hal/utils/src/utils_event.o \
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hal/src/hal_sleep.o \
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@ -91,10 +87,10 @@ hal/src/hal_atomic.o
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OBJS_AS_ARGS += \
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"hal/src/hal_io.o" \
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"stdio_redirect/stdio_io.o" \
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"hpl/core/hpl_core_m4.o" \
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"usb/class/cdc/device/cdcdf_acm.o" \
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"hpl/dmac/hpl_dmac.o" \
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"samd51a/armcc/Device/SAMD51/Source/ARM/startup_samd51.o" \
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"usb_start.o" \
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"hpl/usb/hpl_usb.o" \
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"samd51a/armcc/Device/SAMD51/Source/system_samd51.o" \
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"hal/src/hal_delay.o" \
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"hpl/gclk/hpl_gclk.o" \
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"hal/utils/src/utils_list.o" \
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"hal/utils/src/utils_assert.o" \
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"usb_start.o" \
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"hpl/dmac/hpl_dmac.o" \
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"hpl/oscctrl/hpl_oscctrl.o" \
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"hal/src/hal_usart_sync.o" \
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"hpl/mclk/hpl_mclk.o" \
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"stdio_redirect/keil/Retarget.o" \
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"samd51a/armcc/Device/SAMD51/Source/ARM/startup_samd51.o" \
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"hpl/ramecc/hpl_ramecc.o" \
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"stdio_start.o" \
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"usb/usb_protocol.o" \
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"hal/src/hal_init.o" \
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"hal/src/hal_usb_device.o" \
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"hpl/osc32kctrl/hpl_osc32kctrl.o" \
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"examples/driver_examples.o" \
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"driver_init.o" \
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"hal/src/hal_usart_async.o" \
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"hpl/sercom/hpl_sercom.o" \
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"hal/utils/src/utils_ringbuffer.o" \
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"hal/src/hal_gpio.o" \
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"hal/utils/src/utils_event.o" \
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"hal/src/hal_sleep.o" \
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@ -132,7 +126,6 @@ OBJS_AS_ARGS += \
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DEPS := $(OBJS:%.o=%.d)
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DEPS_AS_ARGS += \
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"stdio_redirect/stdio_io.d" \
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"hal/utils/src/utils_event.d" \
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"hal/src/hal_io.d" \
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"hpl/ramecc/hpl_ramecc.d" \
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@ -143,26 +136,25 @@ DEPS_AS_ARGS += \
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"samd51a/armcc/Device/SAMD51/Source/ARM/startup_samd51.d" \
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"hal/utils/src/utils_list.d" \
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"hpl/cmcc/hpl_cmcc.d" \
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"usb_start.d" \
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"hpl/dmac/hpl_dmac.d" \
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"hal/utils/src/utils_assert.d" \
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"hal/src/hal_delay.d" \
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"hpl/core/hpl_init.d" \
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"hpl/pm/hpl_pm.d" \
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"usb/usb_protocol.d" \
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"stdio_start.d" \
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"hpl/gclk/hpl_gclk.d" \
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"hal/src/hal_usb_device.d" \
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"hpl/dmac/hpl_dmac.d" \
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"usb_start.d" \
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"hal/src/hal_init.d" \
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"hal/src/hal_usart_sync.d" \
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"stdio_redirect/keil/Retarget.d" \
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"hpl/mclk/hpl_mclk.d" \
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"driver_init.d" \
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"hal/src/hal_usart_async.d" \
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"hpl/osc32kctrl/hpl_osc32kctrl.d" \
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"main.d" \
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"examples/driver_examples.d" \
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"hal/src/hal_cache.d" \
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"hal/src/hal_sleep.d" \
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"hal/utils/src/utils_ringbuffer.d" \
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"hpl/sercom/hpl_sercom.d" \
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"hal/src/hal_gpio.d" \
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"hal/src/hal_atomic.d" \
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@ -204,7 +196,7 @@ $(OBJS_AS_ARGS)
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@echo Building file: $<
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@echo ARMCC Compiler
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$(QUOTE)armcc$(QUOTE) --c99 -c -DDEBUG -O1 -g --apcs=interwork --split_sections --cpu Cortex-M4 -D__SAMD51J19A__ \
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-I"../" -I"../config" -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/usb" -I"../hri" -I"../" -I"../config" -I"../usb" -I"../usb/class/cdc" -I"../usb/class/cdc/device" -I"../usb/device" -I"../" -I"../config" -I"../stdio_redirect" -I"../" -I"../CMSIS/Core/Include" -I"../samd51a/include" \
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-I"../" -I"../config" -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/usb" -I"../hri" -I"../" -I"../config" -I"../usb" -I"../usb/class/cdc" -I"../usb/class/cdc/device" -I"../usb/device" -I"../" -I"../CMSIS/Core/Include" -I"../samd51a/include" \
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--depend "$@" -o "$@" "$<"
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@echo Finished building: $<
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@ -213,7 +205,7 @@ $(OBJS_AS_ARGS)
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@echo Building file: $<
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@echo ARMCC Assembler
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$(QUOTE)armasm$(QUOTE) -g --apcs=interwork --cpu Cortex-M4 --pd "D__SAMD51J19A__ SETA 1" \
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-I"../" -I"../config" -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/usb" -I"../hri" -I"../" -I"../config" -I"../usb" -I"../usb/class/cdc" -I"../usb/class/cdc/device" -I"../usb/device" -I"../" -I"../config" -I"../stdio_redirect" -I"../" -I"../CMSIS/Core/Include" -I"../samd51a/include" \
|
||||
-I"../" -I"../config" -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/usb" -I"../hri" -I"../" -I"../config" -I"../usb" -I"../usb/class/cdc" -I"../usb/class/cdc/device" -I"../usb/device" -I"../" -I"../CMSIS/Core/Include" -I"../samd51a/include" \
|
||||
--depend "$(@:%.o=%.d)" -o "$@" "$<"
|
||||
|
||||
@echo Finished building: $<
|
||||
|
@ -222,7 +214,7 @@ $(OBJS_AS_ARGS)
|
|||
@echo Building file: $<
|
||||
@echo ARMCC Preprocessing Assembler
|
||||
$(QUOTE)armcc$(QUOTE) --c99 -c -DDEBUG -O1 -g --apcs=interwork --split_sections --cpu Cortex-M4 -D__SAMD51J19A__ \
|
||||
-I"../" -I"../config" -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/usb" -I"../hri" -I"../" -I"../config" -I"../usb" -I"../usb/class/cdc" -I"../usb/class/cdc/device" -I"../usb/device" -I"../" -I"../config" -I"../stdio_redirect" -I"../" -I"../CMSIS/Core/Include" -I"../samd51a/include" \
|
||||
-I"../" -I"../config" -I"../examples" -I"../hal/include" -I"../hal/utils/include" -I"../hpl/cmcc" -I"../hpl/core" -I"../hpl/dmac" -I"../hpl/gclk" -I"../hpl/mclk" -I"../hpl/osc32kctrl" -I"../hpl/oscctrl" -I"../hpl/pm" -I"../hpl/port" -I"../hpl/ramecc" -I"../hpl/sercom" -I"../hpl/usb" -I"../hri" -I"../" -I"../config" -I"../usb" -I"../usb/class/cdc" -I"../usb/class/cdc/device" -I"../usb/device" -I"../" -I"../CMSIS/Core/Include" -I"../samd51a/include" \
|
||||
--depend "$@" -o "$@" "$<"
|
||||
|
||||
@echo Finished building: $<
|
||||
|
|
|
@ -7,5 +7,4 @@ void atmel_start_init(void)
|
|||
{
|
||||
system_init();
|
||||
usb_init();
|
||||
stdio_redirect_init();
|
||||
}
|
||||
|
|
|
@ -7,7 +7,6 @@ extern "C" {
|
|||
|
||||
#include "driver_init.h"
|
||||
#include "usb_start.h"
|
||||
#include "stdio_start.h"
|
||||
|
||||
/**
|
||||
* Initializes MCU, drivers and middleware in the project
|
||||
|
|
|
@ -87,14 +87,6 @@ middlewares:
|
|||
dependencies:
|
||||
USB Device Stack Core Instance: USB_DEVICE_STACK_CORE_INSTANCE
|
||||
USB Class CDC: USB_CLASS_CDC
|
||||
STDIO_REDIRECT_0:
|
||||
user_label: STDIO_REDIRECT_0
|
||||
configuration: {}
|
||||
definition: Atmel:STDIO_redirect:0.0.1::STDIO_Redirect
|
||||
functionality: STDIO_Redirect
|
||||
api: STDIO:Redirect:IO
|
||||
dependencies:
|
||||
Target IO: TARGET_IO
|
||||
drivers:
|
||||
CMCC:
|
||||
user_label: CMCC
|
||||
|
@ -868,8 +860,8 @@ drivers:
|
|||
_$freq_output_Digital Frequency Locked Loop (DFLL48M): 48000000
|
||||
_$freq_output_Digital Phase Locked Loop (DPLL0): 47985664
|
||||
_$freq_output_Digital Phase Locked Loop (DPLL1): 47985664
|
||||
_$freq_output_External Crystal Oscillator 8-48MHz (XOSC0): '12000000'
|
||||
_$freq_output_External Crystal Oscillator 8-48MHz (XOSC1): '12000000'
|
||||
_$freq_output_External Crystal Oscillator 8-48MHz (XOSC0): 12000000
|
||||
_$freq_output_External Crystal Oscillator 8-48MHz (XOSC1): 12000000
|
||||
dfll_arch_bplckc: false
|
||||
dfll_arch_calibration: false
|
||||
dfll_arch_ccdis: false
|
||||
|
@ -995,11 +987,11 @@ drivers:
|
|||
domain_group: null
|
||||
TARGET_IO:
|
||||
user_label: TARGET_IO
|
||||
definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51J19A-MF::SERCOM3::driver_config_definition::UART::HAL:Driver:USART.Sync
|
||||
definition: Atmel:SAMD51_Drivers:0.0.1::SAMD51J19A-MF::SERCOM3::driver_config_definition::UART::HAL:Driver:USART.Async
|
||||
functionality: USART
|
||||
api: HAL:Driver:USART_Sync
|
||||
api: HAL:Driver:USART_Async
|
||||
configuration:
|
||||
usart_advanced: false
|
||||
usart_advanced: true
|
||||
usart_arch_clock_mode: USART with internal clock
|
||||
usart_arch_cloden: false
|
||||
usart_arch_dbgstop: Keep running
|
||||
|
|
|
@ -69,7 +69,7 @@
|
|||
// <e> Advanced configuration
|
||||
// <id> usart_advanced
|
||||
#ifndef CONF_SERCOM_3_USART_ADVANCED_CONFIG
|
||||
#define CONF_SERCOM_3_USART_ADVANCED_CONFIG 0
|
||||
#define CONF_SERCOM_3_USART_ADVANCED_CONFIG 1
|
||||
#endif
|
||||
|
||||
// <q> Run in stand-by
|
||||
|
|
|
@ -1,9 +0,0 @@
|
|||
/* Auto-generated config file stdio_redirect_config.h */
|
||||
#ifndef STDIO_REDIRECT_CONFIG_H
|
||||
#define STDIO_REDIRECT_CONFIG_H
|
||||
|
||||
// <<< Use Configuration Wizard in Context Menu >>>
|
||||
|
||||
// <<< end of configuration section >>>
|
||||
|
||||
#endif // STDIO_REDIRECT_CONFIG_H
|
|
@ -1,34 +0,0 @@
|
|||
STDIO redirection
|
||||
=================
|
||||
|
||||
The STDIO redirection provides means to redirect standard input/output to HAL
|
||||
IO.
|
||||
|
||||
On initialization, the HAL IO descriptor is assigned so that all input and
|
||||
output is redirected to access it. The IO descriptor can also be changed
|
||||
through stdio_io_set_io(). All stdin or stdout access is redirected to the
|
||||
IO descriptor. When the IO descriptor is set to NULL, all input and output
|
||||
are discarded.
|
||||
|
||||
For GCC redirection, the stdout and stdin buffer are turned off, the
|
||||
standard _read() and _write() are overridden.
|
||||
|
||||
For IAR redirection, the __read() and __write() are overridden.
|
||||
|
||||
For Keil redirection, the Retarget.c are modified to override fputc(), fgetc(),
|
||||
etc.
|
||||
|
||||
Features
|
||||
--------
|
||||
|
||||
* Standard input/output redirection (e.g., printf to EDBG COM port)
|
||||
|
||||
Dependencies
|
||||
------------
|
||||
|
||||
* HAL IO driver
|
||||
|
||||
Limitations
|
||||
-----------
|
||||
|
||||
* IO read/write operation should be synchronous
|
|
@ -11,9 +11,33 @@
|
|||
#include <utils.h>
|
||||
#include <hal_init.h>
|
||||
|
||||
struct usart_sync_descriptor TARGET_IO;
|
||||
/*! The buffer size for USART */
|
||||
#define TARGET_IO_BUFFER_SIZE 16
|
||||
|
||||
void TARGET_IO_PORT_init(void)
|
||||
struct usart_async_descriptor TARGET_IO;
|
||||
|
||||
static uint8_t TARGET_IO_buffer[TARGET_IO_BUFFER_SIZE];
|
||||
|
||||
/**
|
||||
* \brief USART Clock initialization function
|
||||
*
|
||||
* Enables register interface and peripheral clock
|
||||
*/
|
||||
void TARGET_IO_CLOCK_init()
|
||||
{
|
||||
|
||||
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_CORE, CONF_GCLK_SERCOM3_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
|
||||
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_SLOW, CONF_GCLK_SERCOM3_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
|
||||
|
||||
hri_mclk_set_APBBMASK_SERCOM3_bit(MCLK);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief USART pinmux initialization function
|
||||
*
|
||||
* Set each required pin to USART functionality
|
||||
*/
|
||||
void TARGET_IO_PORT_init()
|
||||
{
|
||||
|
||||
gpio_set_pin_function(PA22, PINMUX_PA22C_SERCOM3_PAD0);
|
||||
|
@ -21,18 +45,15 @@ void TARGET_IO_PORT_init(void)
|
|||
gpio_set_pin_function(PA23, PINMUX_PA23C_SERCOM3_PAD1);
|
||||
}
|
||||
|
||||
void TARGET_IO_CLOCK_init(void)
|
||||
{
|
||||
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_CORE, CONF_GCLK_SERCOM3_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
|
||||
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_SLOW, CONF_GCLK_SERCOM3_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
|
||||
|
||||
hri_mclk_set_APBBMASK_SERCOM3_bit(MCLK);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief USART initialization function
|
||||
*
|
||||
* Enables USART peripheral, clocks and initializes USART driver
|
||||
*/
|
||||
void TARGET_IO_init(void)
|
||||
{
|
||||
TARGET_IO_CLOCK_init();
|
||||
usart_sync_init(&TARGET_IO, SERCOM3, (void *)NULL);
|
||||
usart_async_init(&TARGET_IO, SERCOM3, TARGET_IO_buffer, TARGET_IO_BUFFER_SIZE, (void *)NULL);
|
||||
TARGET_IO_PORT_init();
|
||||
}
|
||||
|
||||
|
|
|
@ -21,11 +21,11 @@ extern "C" {
|
|||
#include <hal_io.h>
|
||||
#include <hal_sleep.h>
|
||||
|
||||
#include <hal_usart_sync.h>
|
||||
#include <hal_usart_async.h>
|
||||
|
||||
#include "hal_usb_device.h"
|
||||
|
||||
extern struct usart_sync_descriptor TARGET_IO;
|
||||
extern struct usart_async_descriptor TARGET_IO;
|
||||
|
||||
void TARGET_IO_PORT_init(void);
|
||||
void TARGET_IO_CLOCK_init(void);
|
||||
|
|
|
@ -12,12 +12,29 @@
|
|||
|
||||
/**
|
||||
* Example of using TARGET_IO to write "Hello World" using the IO abstraction.
|
||||
*
|
||||
* Since the driver is asynchronous we need to use statically allocated memory for string
|
||||
* because driver initiates transfer and then returns before the transmission is completed.
|
||||
*
|
||||
* Once transfer has been completed the tx_cb function will be called.
|
||||
*/
|
||||
|
||||
static uint8_t example_TARGET_IO[12] = "Hello World!";
|
||||
|
||||
static void tx_cb_TARGET_IO(const struct usart_async_descriptor *const io_descr)
|
||||
{
|
||||
/* Transfer completed */
|
||||
}
|
||||
|
||||
void TARGET_IO_example(void)
|
||||
{
|
||||
struct io_descriptor *io;
|
||||
usart_sync_get_io_descriptor(&TARGET_IO, &io);
|
||||
usart_sync_enable(&TARGET_IO);
|
||||
|
||||
io_write(io, (uint8_t *)"Hello World!", 12);
|
||||
usart_async_register_callback(&TARGET_IO, USART_ASYNC_TXC_CB, tx_cb_TARGET_IO);
|
||||
/*usart_async_register_callback(&TARGET_IO, USART_ASYNC_RXC_CB, rx_cb);
|
||||
usart_async_register_callback(&TARGET_IO, USART_ASYNC_ERROR_CB, err_cb);*/
|
||||
usart_async_get_io_descriptor(&TARGET_IO, &io);
|
||||
usart_async_enable(&TARGET_IO);
|
||||
|
||||
io_write(io, example_TARGET_IO, 12);
|
||||
}
|
||||
|
|
|
@ -30,39 +30,34 @@ endif
|
|||
# List the subdirectories for creating object files
|
||||
SUB_DIRS += \
|
||||
\
|
||||
samd51a/gcc/gcc \
|
||||
hal/src \
|
||||
hpl/ramecc \
|
||||
examples \
|
||||
hpl/oscctrl \
|
||||
stdio_redirect/gcc \
|
||||
hpl/osc32kctrl \
|
||||
usb \
|
||||
hpl/dmac \
|
||||
usb/class/cdc/device \
|
||||
stdio_redirect \
|
||||
samd51a/gcc \
|
||||
hal/utils/src \
|
||||
hpl/usb \
|
||||
hpl/pm \
|
||||
hpl/cmcc \
|
||||
hpl/gclk \
|
||||
hpl/osc32kctrl \
|
||||
hpl/ramecc \
|
||||
hpl/dmac \
|
||||
samd51a/gcc \
|
||||
usb/class/cdc/device \
|
||||
hal/src \
|
||||
samd51a/gcc/gcc \
|
||||
hpl/mclk \
|
||||
usb/device \
|
||||
usb \
|
||||
hal/utils/src \
|
||||
hpl/sercom \
|
||||
hpl/core
|
||||
examples \
|
||||
hpl/gclk \
|
||||
usb/device \
|
||||
hpl/oscctrl \
|
||||
hpl/usb \
|
||||
hpl/core \
|
||||
hpl/cmcc
|
||||
|
||||
# List the object files
|
||||
OBJS += \
|
||||
hal/src/hal_io.o \
|
||||
stdio_redirect/stdio_io.o \
|
||||
stdio_redirect/gcc/write.o \
|
||||
samd51a/gcc/system_samd51.o \
|
||||
hpl/core/hpl_core_m4.o \
|
||||
usb/class/cdc/device/cdcdf_acm.o \
|
||||
hal/utils/src/utils_syscalls.o \
|
||||
stdio_redirect/gcc/read.o \
|
||||
hpl/dmac/hpl_dmac.o \
|
||||
usb_start.o \
|
||||
hpl/usb/hpl_usb.o \
|
||||
hal/src/hal_delay.o \
|
||||
hpl/pm/hpl_pm.o \
|
||||
|
@ -70,12 +65,10 @@ hpl/core/hpl_init.o \
|
|||
hpl/gclk/hpl_gclk.o \
|
||||
hal/utils/src/utils_list.o \
|
||||
hal/utils/src/utils_assert.o \
|
||||
usb_start.o \
|
||||
hpl/dmac/hpl_dmac.o \
|
||||
hpl/oscctrl/hpl_oscctrl.o \
|
||||
hal/src/hal_usart_sync.o \
|
||||
hpl/mclk/hpl_mclk.o \
|
||||
hpl/ramecc/hpl_ramecc.o \
|
||||
stdio_start.o \
|
||||
usb/usb_protocol.o \
|
||||
hal/src/hal_init.o \
|
||||
hal/src/hal_usb_device.o \
|
||||
|
@ -83,7 +76,9 @@ main.o \
|
|||
hpl/osc32kctrl/hpl_osc32kctrl.o \
|
||||
examples/driver_examples.o \
|
||||
driver_init.o \
|
||||
hal/src/hal_usart_async.o \
|
||||
hpl/sercom/hpl_sercom.o \
|
||||
hal/utils/src/utils_ringbuffer.o \
|
||||
hal/src/hal_gpio.o \
|
||||
hal/utils/src/utils_event.o \
|
||||
hal/src/hal_sleep.o \
|
||||
|
@ -96,14 +91,11 @@ hal/src/hal_atomic.o
|
|||
|
||||
OBJS_AS_ARGS += \
|
||||
"hal/src/hal_io.o" \
|
||||
"stdio_redirect/stdio_io.o" \
|
||||
"stdio_redirect/gcc/write.o" \
|
||||
"samd51a/gcc/system_samd51.o" \
|
||||
"hpl/core/hpl_core_m4.o" \
|
||||
"usb/class/cdc/device/cdcdf_acm.o" \
|
||||
"hal/utils/src/utils_syscalls.o" \
|
||||
"stdio_redirect/gcc/read.o" \
|
||||
"hpl/dmac/hpl_dmac.o" \
|
||||
"usb_start.o" \
|
||||
"hpl/usb/hpl_usb.o" \
|
||||
"hal/src/hal_delay.o" \
|
||||
"hpl/pm/hpl_pm.o" \
|
||||
|
@ -111,12 +103,10 @@ OBJS_AS_ARGS += \
|
|||
"hpl/gclk/hpl_gclk.o" \
|
||||
"hal/utils/src/utils_list.o" \
|
||||
"hal/utils/src/utils_assert.o" \
|
||||
"usb_start.o" \
|
||||
"hpl/dmac/hpl_dmac.o" \
|
||||
"hpl/oscctrl/hpl_oscctrl.o" \
|
||||
"hal/src/hal_usart_sync.o" \
|
||||
"hpl/mclk/hpl_mclk.o" \
|
||||
"hpl/ramecc/hpl_ramecc.o" \
|
||||
"stdio_start.o" \
|
||||
"usb/usb_protocol.o" \
|
||||
"hal/src/hal_init.o" \
|
||||
"hal/src/hal_usb_device.o" \
|
||||
|
@ -124,7 +114,9 @@ OBJS_AS_ARGS += \
|
|||
"hpl/osc32kctrl/hpl_osc32kctrl.o" \
|
||||
"examples/driver_examples.o" \
|
||||
"driver_init.o" \
|
||||
"hal/src/hal_usart_async.o" \
|
||||
"hpl/sercom/hpl_sercom.o" \
|
||||
"hal/utils/src/utils_ringbuffer.o" \
|
||||
"hal/src/hal_gpio.o" \
|
||||
"hal/utils/src/utils_event.o" \
|
||||
"hal/src/hal_sleep.o" \
|
||||
|
@ -162,9 +154,6 @@ DIR_INCLUDES += \
|
|||
-I"../usb/class/cdc/device" \
|
||||
-I"../usb/device" \
|
||||
-I"../" \
|
||||
-I"../config" \
|
||||
-I"../stdio_redirect" \
|
||||
-I"../" \
|
||||
-I"../CMSIS/Core/Include" \
|
||||
-I"../samd51a/include"
|
||||
|
||||
|
@ -172,7 +161,6 @@ DIR_INCLUDES += \
|
|||
DEPS := $(OBJS:%.o=%.d)
|
||||
|
||||
DEPS_AS_ARGS += \
|
||||
"stdio_redirect/stdio_io.d" \
|
||||
"hal/utils/src/utils_event.d" \
|
||||
"hal/src/hal_io.d" \
|
||||
"hpl/ramecc/hpl_ramecc.d" \
|
||||
|
@ -180,30 +168,28 @@ DEPS_AS_ARGS += \
|
|||
"hal/utils/src/utils_syscalls.d" \
|
||||
"usb/class/cdc/device/cdcdf_acm.d" \
|
||||
"samd51a/gcc/system_samd51.d" \
|
||||
"stdio_redirect/gcc/write.d" \
|
||||
"hpl/usb/hpl_usb.d" \
|
||||
"hal/utils/src/utils_list.d" \
|
||||
"hpl/cmcc/hpl_cmcc.d" \
|
||||
"usb_start.d" \
|
||||
"hpl/dmac/hpl_dmac.d" \
|
||||
"hal/utils/src/utils_assert.d" \
|
||||
"hal/src/hal_delay.d" \
|
||||
"hpl/core/hpl_init.d" \
|
||||
"hpl/pm/hpl_pm.d" \
|
||||
"usb/usb_protocol.d" \
|
||||
"stdio_start.d" \
|
||||
"hpl/gclk/hpl_gclk.d" \
|
||||
"hal/src/hal_usb_device.d" \
|
||||
"hpl/dmac/hpl_dmac.d" \
|
||||
"usb_start.d" \
|
||||
"hal/src/hal_init.d" \
|
||||
"hal/src/hal_usart_sync.d" \
|
||||
"hpl/mclk/hpl_mclk.d" \
|
||||
"driver_init.d" \
|
||||
"stdio_redirect/gcc/read.d" \
|
||||
"hal/src/hal_usart_async.d" \
|
||||
"hpl/osc32kctrl/hpl_osc32kctrl.d" \
|
||||
"main.d" \
|
||||
"examples/driver_examples.d" \
|
||||
"hal/src/hal_cache.d" \
|
||||
"hal/src/hal_sleep.d" \
|
||||
"hal/utils/src/utils_ringbuffer.d" \
|
||||
"hpl/sercom/hpl_sercom.d" \
|
||||
"hal/src/hal_gpio.d" \
|
||||
"hal/src/hal_atomic.d" \
|
||||
|
|
|
@ -1,9 +1,20 @@
|
|||
The USART Synchronous Driver
|
||||
============================
|
||||
The USART Asynchronous Driver
|
||||
=============================
|
||||
|
||||
The universal synchronous and asynchronous receiver and transmitter
|
||||
(USART) is usually used to transfer data from one device to the other.
|
||||
|
||||
The USART driver use a ring buffer to store received data. When the USART
|
||||
raise the data received interrupt, this data will be stored in the ring buffer
|
||||
at the next free location. When the ring buffer is full, the next reception
|
||||
will overwrite the oldest data stored in the ring buffer. There is one
|
||||
USART_BUFFER_SIZE macro per used hardware instance, e.g. for SERCOM0 the macro
|
||||
is called SERCOM0_USART_BUFFER_SIZE.
|
||||
|
||||
On the other hand, when sending data over USART, the data is not copied to an
|
||||
internal buffer, but the data buffer supplied by the user is used. The callback
|
||||
will only be generated at the end of the buffer and not for each byte.
|
||||
|
||||
User can set action for flow control pins by function usart_set_flow_control,
|
||||
if the flow control is enabled. All the available states are defined in union
|
||||
usart_flow_control_state.
|
||||
|
@ -24,6 +35,8 @@ Features
|
|||
* Data order
|
||||
* Flow control
|
||||
* Data transfer: transmission, reception
|
||||
* Notifications about transfer done or error case via callbacks
|
||||
* Status information with busy state and transfer count
|
||||
|
||||
Applications
|
||||
------------
|
||||
|
@ -34,7 +47,8 @@ between devices.
|
|||
Dependencies
|
||||
------------
|
||||
|
||||
USART capable hardware.
|
||||
USART capable hardware, with interrupt on each character is sent or
|
||||
received.
|
||||
|
||||
Concurrency
|
||||
-----------
|
|
@ -0,0 +1,339 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief USART related functionality declaration.
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _HAL_USART_ASYNC_H_INCLUDED
|
||||
#define _HAL_USART_ASYNC_H_INCLUDED
|
||||
|
||||
#include "hal_io.h"
|
||||
#include <hpl_usart_async.h>
|
||||
#include <utils_ringbuffer.h>
|
||||
|
||||
/**
|
||||
* \addtogroup doc_driver_hal_usart_async
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief USART descriptor
|
||||
*
|
||||
* The USART descriptor forward declaration.
|
||||
*/
|
||||
struct usart_async_descriptor;
|
||||
|
||||
/**
|
||||
* \brief USART callback type
|
||||
*/
|
||||
typedef void (*usart_cb_t)(const struct usart_async_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief USART callback types
|
||||
*/
|
||||
enum usart_async_callback_type { USART_ASYNC_RXC_CB, USART_ASYNC_TXC_CB, USART_ASYNC_ERROR_CB };
|
||||
|
||||
/**
|
||||
* \brief USART callbacks
|
||||
*/
|
||||
struct usart_async_callbacks {
|
||||
usart_cb_t tx_done;
|
||||
usart_cb_t rx_done;
|
||||
usart_cb_t error;
|
||||
};
|
||||
|
||||
/** \brief USART status
|
||||
* Status descriptor holds the current status of transfer.
|
||||
*/
|
||||
struct usart_async_status {
|
||||
/** Status flags */
|
||||
uint32_t flags;
|
||||
/** Number of characters transmitted */
|
||||
uint16_t txcnt;
|
||||
/** Number of characters receviced */
|
||||
uint16_t rxcnt;
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Asynchronous USART descriptor structure
|
||||
*/
|
||||
struct usart_async_descriptor {
|
||||
struct io_descriptor io;
|
||||
struct _usart_async_device device;
|
||||
struct usart_async_callbacks usart_cb;
|
||||
uint32_t stat;
|
||||
|
||||
struct ringbuffer rx;
|
||||
uint16_t tx_por;
|
||||
uint8_t * tx_buffer;
|
||||
uint16_t tx_buffer_length;
|
||||
};
|
||||
|
||||
/** USART write busy */
|
||||
#define USART_ASYNC_STATUS_BUSY 0x0001
|
||||
|
||||
/**
|
||||
* \brief Initialize USART interface
|
||||
*
|
||||
* This function initializes the given I/O descriptor to be used as USART
|
||||
* interface descriptor.
|
||||
* It checks if the given hardware is not initialized and if the given hardware
|
||||
* is permitted to be initialized.
|
||||
*
|
||||
* \param[out] descr A USART descriptor which is used to communicate via the USART
|
||||
* \param[in] hw The pointer to the hardware instance
|
||||
* \param[in] rx_buffer An RX buffer
|
||||
* \param[in] rx_buffer_length The length of the buffer above
|
||||
* \param[in] func The pointer to a set of function pointers
|
||||
*
|
||||
* \return Initialization status.
|
||||
* \retval -1 Passed parameters were invalid or the interface is already
|
||||
* initialized
|
||||
* \retval 0 The initialization is completed successfully
|
||||
*/
|
||||
int32_t usart_async_init(struct usart_async_descriptor *const descr, void *const hw, uint8_t *const rx_buffer,
|
||||
const uint16_t rx_buffer_length, void *const func);
|
||||
|
||||
/**
|
||||
* \brief Deinitialize USART interface
|
||||
*
|
||||
* This function deinitializes the given I/O descriptor.
|
||||
* It checks if the given hardware is initialized and if the given hardware
|
||||
* is permitted to be deinitialized.
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return De-initialization status.
|
||||
*/
|
||||
int32_t usart_async_deinit(struct usart_async_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Enable USART interface
|
||||
*
|
||||
* Enables the USART interface
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return Enabling status.
|
||||
*/
|
||||
int32_t usart_async_enable(struct usart_async_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Disable USART interface
|
||||
*
|
||||
* Disables the USART interface
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return Disabling status.
|
||||
*/
|
||||
int32_t usart_async_disable(struct usart_async_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Retrieve I/O descriptor
|
||||
*
|
||||
* This function retrieves the I/O descriptor of the given USART descriptor.
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[out] io An I/O descriptor to retrieve
|
||||
*
|
||||
* \return The status of I/O descriptor retrieving.
|
||||
*/
|
||||
int32_t usart_async_get_io_descriptor(struct usart_async_descriptor *const descr, struct io_descriptor **io);
|
||||
|
||||
/**
|
||||
* \brief Register USART callback
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] type Callback type
|
||||
* \param[in] cb A callback function
|
||||
*
|
||||
* \return The status of callback assignment.
|
||||
* \retval -1 Passed parameters were invalid or the interface is not initialized
|
||||
* \retval 0 A callback is registered successfully
|
||||
*/
|
||||
int32_t usart_async_register_callback(struct usart_async_descriptor *const descr,
|
||||
const enum usart_async_callback_type type, usart_cb_t cb);
|
||||
|
||||
/**
|
||||
* \brief Specify action for flow control pins
|
||||
*
|
||||
* This function sets action (or state) for flow control pins if
|
||||
* the flow control is enabled.
|
||||
* It sets state of flow control pins only if automatic support of
|
||||
* the flow control is not supported by the hardware.
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] state A state to set the flow control pins
|
||||
*
|
||||
* \return The status of flow control action setup.
|
||||
*/
|
||||
int32_t usart_async_set_flow_control(struct usart_async_descriptor *const descr,
|
||||
const union usart_flow_control_state state);
|
||||
|
||||
/**
|
||||
* \brief Set USART baud rate
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] baud_rate A baud rate to set
|
||||
*
|
||||
* \return The status of baud rate setting.
|
||||
*/
|
||||
int32_t usart_async_set_baud_rate(struct usart_async_descriptor *const descr, const uint32_t baud_rate);
|
||||
|
||||
/**
|
||||
* \brief Set USART data order
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] data_order A data order to set
|
||||
*
|
||||
* \return The status of data order setting.
|
||||
*/
|
||||
int32_t usart_async_set_data_order(struct usart_async_descriptor *const descr, const enum usart_data_order data_order);
|
||||
|
||||
/**
|
||||
* \brief Set USART mode
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] mode A mode to set
|
||||
*
|
||||
* \return The status of mode setting.
|
||||
*/
|
||||
int32_t usart_async_set_mode(struct usart_async_descriptor *const descr, const enum usart_mode mode);
|
||||
|
||||
/**
|
||||
* \brief Set USART parity
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] parity A parity to set
|
||||
*
|
||||
* \return The status of parity setting.
|
||||
*/
|
||||
int32_t usart_async_set_parity(struct usart_async_descriptor *const descr, const enum usart_parity parity);
|
||||
|
||||
/**
|
||||
* \brief Set USART stop bits
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] stop_bits Stop bits to set
|
||||
*
|
||||
* \return The status of stop bits setting.
|
||||
*/
|
||||
int32_t usart_async_set_stopbits(struct usart_async_descriptor *const descr, const enum usart_stop_bits stop_bits);
|
||||
|
||||
/**
|
||||
* \brief Set USART character size
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] size A character size to set
|
||||
*
|
||||
* \return The status of character size setting.
|
||||
*/
|
||||
int32_t usart_async_set_character_size(struct usart_async_descriptor *const descr,
|
||||
const enum usart_character_size size);
|
||||
|
||||
/**
|
||||
* \brief Retrieve the state of flow control pins
|
||||
*
|
||||
* This function retrieves the flow control pins
|
||||
* if the flow control is enabled.
|
||||
*
|
||||
* The function can return USART_FLOW_CONTROL_STATE_UNAVAILABLE in case
|
||||
* if the flow control is done by the hardware
|
||||
* and the pins state cannot be read out.
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[out] state The state of flow control pins
|
||||
*
|
||||
* \return The status of flow control state reading.
|
||||
*/
|
||||
int32_t usart_async_flow_control_status(const struct usart_async_descriptor *const descr,
|
||||
union usart_flow_control_state *const state);
|
||||
|
||||
/**
|
||||
* \brief Check if the USART transmitter is empty
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return The status of USART TX empty checking.
|
||||
* \retval 0 The USART transmitter is not empty
|
||||
* \retval 1 The USART transmitter is empty
|
||||
*/
|
||||
int32_t usart_async_is_tx_empty(const struct usart_async_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Check if the USART receiver is not empty
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return The status of the USART RX empty checking.
|
||||
* \retval 1 The USART receiver is not empty
|
||||
* \retval 0 The USART receiver is empty
|
||||
*/
|
||||
int32_t usart_async_is_rx_not_empty(const struct usart_async_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Retrieve the current interface status
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[out] status The state of USART
|
||||
*
|
||||
* \return The status of USART status retrieving.
|
||||
*/
|
||||
int32_t usart_async_get_status(struct usart_async_descriptor *const descr, struct usart_async_status *const status);
|
||||
|
||||
/**
|
||||
* \brief flush USART ringbuf
|
||||
*
|
||||
* This function flush USART RX ringbuf.
|
||||
*
|
||||
* \param[in] descr The pointer to USART descriptor
|
||||
*
|
||||
* \return ERR_NONE
|
||||
*/
|
||||
int32_t usart_async_flush_rx_buffer(struct usart_async_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Retrieve the current driver version
|
||||
*
|
||||
* \return Current driver version.
|
||||
*/
|
||||
uint32_t usart_async_get_version(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/**@}*/
|
||||
#endif /* _HAL_USART_ASYNC_H_INCLUDED */
|
|
@ -1,247 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief USART related functionality declaration.
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _HAL_SYNC_USART_H_INCLUDED
|
||||
#define _HAL_SYNC_USART_H_INCLUDED
|
||||
|
||||
#include "hal_io.h"
|
||||
#include <hpl_usart_sync.h>
|
||||
|
||||
/**
|
||||
* \addtogroup doc_driver_hal_usart_sync
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \brief Synchronous USART descriptor
|
||||
*/
|
||||
struct usart_sync_descriptor {
|
||||
struct io_descriptor io;
|
||||
struct _usart_sync_device device;
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Initialize USART interface
|
||||
*
|
||||
* This function initializes the given I/O descriptor to be used
|
||||
* as USART interface descriptor.
|
||||
* It checks if the given hardware is not initialized and
|
||||
* if the given hardware is permitted to be initialized.
|
||||
*
|
||||
* \param[out] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] hw The pointer to hardware instance
|
||||
* \param[in] func The pointer to as set of functions pointers
|
||||
*
|
||||
* \return Initialization status.
|
||||
*/
|
||||
int32_t usart_sync_init(struct usart_sync_descriptor *const descr, void *const hw, void *const func);
|
||||
|
||||
/**
|
||||
* \brief Deinitialize USART interface
|
||||
*
|
||||
* This function deinitializes the given I/O descriptor.
|
||||
* It checks if the given hardware is initialized and
|
||||
* if the given hardware is permitted to be deinitialized.
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return De-initialization status.
|
||||
*/
|
||||
int32_t usart_sync_deinit(struct usart_sync_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Enable USART interface
|
||||
*
|
||||
* Enables the USART interface
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return Enabling status.
|
||||
*/
|
||||
int32_t usart_sync_enable(struct usart_sync_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Disable USART interface
|
||||
*
|
||||
* Disables the USART interface
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return Disabling status.
|
||||
*/
|
||||
int32_t usart_sync_disable(struct usart_sync_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Retrieve I/O descriptor
|
||||
*
|
||||
* This function retrieves the I/O descriptor of the given USART descriptor.
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[out] io An I/O descriptor to retrieve
|
||||
*
|
||||
* \return The status of the I/O descriptor retrieving.
|
||||
*/
|
||||
int32_t usart_sync_get_io_descriptor(struct usart_sync_descriptor *const descr, struct io_descriptor **io);
|
||||
|
||||
/**
|
||||
* \brief Specify action for flow control pins
|
||||
*
|
||||
* This function sets the action (or state) for the flow control pins
|
||||
* if the flow control is enabled.
|
||||
* It sets the state of flow control pins only if the automatic support of
|
||||
* the flow control is not supported by the hardware.
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] state A state to set the flow control pins
|
||||
*
|
||||
* \return The status of flow control action setup.
|
||||
*/
|
||||
int32_t usart_sync_set_flow_control(struct usart_sync_descriptor *const descr,
|
||||
const union usart_flow_control_state state);
|
||||
|
||||
/**
|
||||
* \brief Set USART baud rate
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] baud_rate A baud rate to set
|
||||
*
|
||||
* \return The status of baud rate setting.
|
||||
*/
|
||||
int32_t usart_sync_set_baud_rate(struct usart_sync_descriptor *const descr, const uint32_t baud_rate);
|
||||
|
||||
/**
|
||||
* \brief Set USART data order
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] data_order A data order to set
|
||||
*
|
||||
* \return The status of data order setting.
|
||||
*/
|
||||
int32_t usart_sync_set_data_order(struct usart_sync_descriptor *const descr, const enum usart_data_order data_order);
|
||||
|
||||
/**
|
||||
* \brief Set USART mode
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] mode A mode to set
|
||||
*
|
||||
* \return The status of mode setting.
|
||||
*/
|
||||
int32_t usart_sync_set_mode(struct usart_sync_descriptor *const descr, const enum usart_mode mode);
|
||||
|
||||
/**
|
||||
* \brief Set USART parity
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] parity A parity to set
|
||||
*
|
||||
* \return The status of parity setting.
|
||||
*/
|
||||
int32_t usart_sync_set_parity(struct usart_sync_descriptor *const descr, const enum usart_parity parity);
|
||||
|
||||
/**
|
||||
* \brief Set USART stop bits
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] stop_bits Stop bits to set
|
||||
*
|
||||
* \return The status of stop bits setting.
|
||||
*/
|
||||
int32_t usart_sync_set_stopbits(struct usart_sync_descriptor *const descr, const enum usart_stop_bits stop_bits);
|
||||
|
||||
/**
|
||||
* \brief Set USART character size
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[in] size A character size to set
|
||||
*
|
||||
* \return The status of character size setting.
|
||||
*/
|
||||
int32_t usart_sync_set_character_size(struct usart_sync_descriptor *const descr, const enum usart_character_size size);
|
||||
|
||||
/**
|
||||
* \brief Retrieve the state of flow control pins
|
||||
*
|
||||
* This function retrieves the of flow control pins
|
||||
* if the flow control is enabled.
|
||||
* Function can return USART_FLOW_CONTROL_STATE_UNAVAILABLE in case
|
||||
* if the flow control is done by the hardware
|
||||
* and the pins state cannot be read out.
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
* \param[out] state The state of flow control pins
|
||||
*
|
||||
* \return The status of flow control state reading.
|
||||
*/
|
||||
int32_t usart_sync_flow_control_status(const struct usart_sync_descriptor *const descr,
|
||||
union usart_flow_control_state *const state);
|
||||
|
||||
/**
|
||||
* \brief Check if the USART transmitter is empty
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return The status of USART TX empty checking.
|
||||
* \retval 0 The USART transmitter is not empty
|
||||
* \retval 1 The USART transmitter is empty
|
||||
*/
|
||||
int32_t usart_sync_is_tx_empty(const struct usart_sync_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Check if the USART receiver is not empty
|
||||
*
|
||||
* \param[in] descr A USART descriptor which is used to communicate via USART
|
||||
*
|
||||
* \return The status of USART RX empty checking.
|
||||
* \retval 1 The USART receiver is not empty
|
||||
* \retval 0 The USART receiver is empty
|
||||
*/
|
||||
int32_t usart_sync_is_rx_not_empty(const struct usart_sync_descriptor *const descr);
|
||||
|
||||
/**
|
||||
* \brief Retrieve the current driver version
|
||||
*
|
||||
* \return Current driver version.
|
||||
*/
|
||||
uint32_t usart_sync_get_version(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/**@}*/
|
||||
#endif /* _HAL_SYNC_USART_H_INCLUDED */
|
|
@ -0,0 +1,420 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief I/O USART related functionality implementation.
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include "hal_usart_async.h"
|
||||
#include <utils_assert.h>
|
||||
#include <hal_atomic.h>
|
||||
#include <utils.h>
|
||||
|
||||
/**
|
||||
* \brief Driver version
|
||||
*/
|
||||
#define DRIVER_VERSION 0x00000001u
|
||||
|
||||
static int32_t usart_async_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length);
|
||||
static int32_t usart_async_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length);
|
||||
static void usart_process_byte_sent(struct _usart_async_device *device);
|
||||
static void usart_transmission_complete(struct _usart_async_device *device);
|
||||
static void usart_error(struct _usart_async_device *device);
|
||||
static void usart_fill_rx_buffer(struct _usart_async_device *device, uint8_t data);
|
||||
|
||||
/**
|
||||
* \brief Initialize usart interface
|
||||
*/
|
||||
int32_t usart_async_init(struct usart_async_descriptor *const descr, void *const hw, uint8_t *rx_buffer,
|
||||
uint16_t rx_buffer_length, void *const func)
|
||||
{
|
||||
int32_t init_status;
|
||||
ASSERT(descr && hw && rx_buffer && rx_buffer_length);
|
||||
|
||||
if (ERR_NONE != ringbuffer_init(&descr->rx, rx_buffer, rx_buffer_length)) {
|
||||
return ERR_INVALID_ARG;
|
||||
}
|
||||
init_status = _usart_async_init(&descr->device, hw);
|
||||
if (init_status) {
|
||||
return init_status;
|
||||
}
|
||||
|
||||
descr->io.read = usart_async_read;
|
||||
descr->io.write = usart_async_write;
|
||||
|
||||
descr->device.usart_cb.tx_byte_sent = usart_process_byte_sent;
|
||||
descr->device.usart_cb.rx_done_cb = usart_fill_rx_buffer;
|
||||
descr->device.usart_cb.tx_done_cb = usart_transmission_complete;
|
||||
descr->device.usart_cb.error_cb = usart_error;
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Deinitialize usart interface
|
||||
*/
|
||||
int32_t usart_async_deinit(struct usart_async_descriptor *const descr)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_async_deinit(&descr->device);
|
||||
descr->io.read = NULL;
|
||||
descr->io.write = NULL;
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enable usart interface
|
||||
*/
|
||||
int32_t usart_async_enable(struct usart_async_descriptor *const descr)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_async_enable(&descr->device);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable usart interface
|
||||
*/
|
||||
int32_t usart_async_disable(struct usart_async_descriptor *const descr)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_async_disable(&descr->device);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieve I/O descriptor
|
||||
*/
|
||||
int32_t usart_async_get_io_descriptor(struct usart_async_descriptor *const descr, struct io_descriptor **io)
|
||||
{
|
||||
ASSERT(descr && io);
|
||||
|
||||
*io = &descr->io;
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Register usart callback
|
||||
*/
|
||||
int32_t usart_async_register_callback(struct usart_async_descriptor *const descr,
|
||||
const enum usart_async_callback_type type, usart_cb_t cb)
|
||||
{
|
||||
ASSERT(descr);
|
||||
|
||||
switch (type) {
|
||||
case USART_ASYNC_RXC_CB:
|
||||
descr->usart_cb.rx_done = cb;
|
||||
_usart_async_set_irq_state(&descr->device, USART_ASYNC_RX_DONE, NULL != cb);
|
||||
break;
|
||||
case USART_ASYNC_TXC_CB:
|
||||
descr->usart_cb.tx_done = cb;
|
||||
_usart_async_set_irq_state(&descr->device, USART_ASYNC_TX_DONE, NULL != cb);
|
||||
break;
|
||||
case USART_ASYNC_ERROR_CB:
|
||||
descr->usart_cb.error = cb;
|
||||
_usart_async_set_irq_state(&descr->device, USART_ASYNC_ERROR, NULL != cb);
|
||||
break;
|
||||
default:
|
||||
return ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Specify action for flow control pins
|
||||
*/
|
||||
int32_t usart_async_set_flow_control(struct usart_async_descriptor *const descr,
|
||||
const union usart_flow_control_state state)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_async_set_flow_control_state(&descr->device, state);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set usart baud rate
|
||||
*/
|
||||
int32_t usart_async_set_baud_rate(struct usart_async_descriptor *const descr, const uint32_t baud_rate)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_async_set_baud_rate(&descr->device, baud_rate);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set usart data order
|
||||
*/
|
||||
int32_t usart_async_set_data_order(struct usart_async_descriptor *const descr, const enum usart_data_order data_order)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_async_set_data_order(&descr->device, data_order);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set usart mode
|
||||
*/
|
||||
int32_t usart_async_set_mode(struct usart_async_descriptor *const descr, const enum usart_mode mode)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_async_set_mode(&descr->device, mode);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set usart parity
|
||||
*/
|
||||
int32_t usart_async_set_parity(struct usart_async_descriptor *const descr, const enum usart_parity parity)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_async_set_parity(&descr->device, parity);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set usart stop bits
|
||||
*/
|
||||
int32_t usart_async_set_stopbits(struct usart_async_descriptor *const descr, const enum usart_stop_bits stop_bits)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_async_set_stop_bits(&descr->device, stop_bits);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set usart character size
|
||||
*/
|
||||
int32_t usart_async_set_character_size(struct usart_async_descriptor *const descr, const enum usart_character_size size)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_async_set_character_size(&descr->device, size);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieve the state of flow control pins
|
||||
*/
|
||||
int32_t usart_async_flow_control_status(const struct usart_async_descriptor *const descr,
|
||||
union usart_flow_control_state *const state)
|
||||
{
|
||||
ASSERT(descr && state);
|
||||
*state = _usart_async_get_flow_control_state(&descr->device);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Check if the usart transmitter is empty
|
||||
*/
|
||||
int32_t usart_async_is_tx_empty(const struct usart_async_descriptor *const descr)
|
||||
{
|
||||
ASSERT(descr);
|
||||
return _usart_async_is_byte_sent(&descr->device);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Check if the usart receiver is not empty
|
||||
*/
|
||||
int32_t usart_async_is_rx_not_empty(const struct usart_async_descriptor *const descr)
|
||||
{
|
||||
ASSERT(descr);
|
||||
|
||||
return ringbuffer_num(&descr->rx) > 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieve the current interface status
|
||||
*/
|
||||
int32_t usart_async_get_status(struct usart_async_descriptor *const descr, struct usart_async_status *const status)
|
||||
{
|
||||
ASSERT(descr);
|
||||
|
||||
volatile uint32_t *tmp_stat = &(descr->stat);
|
||||
volatile uint16_t *tmp_txcnt = &(descr->tx_por);
|
||||
|
||||
if (status) {
|
||||
status->flags = *tmp_stat;
|
||||
status->txcnt = *tmp_txcnt;
|
||||
status->rxcnt = ringbuffer_num(&descr->rx);
|
||||
}
|
||||
if (*tmp_stat & USART_ASYNC_STATUS_BUSY) {
|
||||
return ERR_BUSY;
|
||||
}
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief flush usart rx ringbuf
|
||||
*/
|
||||
int32_t usart_async_flush_rx_buffer(struct usart_async_descriptor *const descr)
|
||||
{
|
||||
ASSERT(descr);
|
||||
|
||||
return ringbuffer_flush(&descr->rx);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieve the current driver version
|
||||
*/
|
||||
uint32_t usart_async_get_version(void)
|
||||
{
|
||||
return DRIVER_VERSION;
|
||||
}
|
||||
|
||||
/*
|
||||
* \internal Write the given data to usart interface
|
||||
*
|
||||
* \param[in] descr The pointer to an io descriptor
|
||||
* \param[in] buf Data to write to usart
|
||||
* \param[in] length The number of bytes to write
|
||||
*
|
||||
* \return The number of bytes written.
|
||||
*/
|
||||
static int32_t usart_async_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length)
|
||||
{
|
||||
struct usart_async_descriptor *descr = CONTAINER_OF(io_descr, struct usart_async_descriptor, io);
|
||||
|
||||
ASSERT(descr && buf && length);
|
||||
|
||||
if (descr->tx_por != descr->tx_buffer_length) {
|
||||
return ERR_NO_RESOURCE;
|
||||
}
|
||||
descr->tx_buffer = (uint8_t *)buf;
|
||||
descr->tx_buffer_length = length;
|
||||
descr->tx_por = 0;
|
||||
descr->stat = USART_ASYNC_STATUS_BUSY;
|
||||
_usart_async_enable_byte_sent_irq(&descr->device);
|
||||
|
||||
return (int32_t)length;
|
||||
}
|
||||
|
||||
/*
|
||||
* \internal Read data from usart interface
|
||||
*
|
||||
* \param[in] descr The pointer to an io descriptor
|
||||
* \param[in] buf A buffer to read data to
|
||||
* \param[in] length The size of a buffer
|
||||
*
|
||||
* \return The number of bytes read.
|
||||
*/
|
||||
static int32_t usart_async_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length)
|
||||
{
|
||||
uint16_t was_read = 0;
|
||||
uint32_t num;
|
||||
struct usart_async_descriptor *descr = CONTAINER_OF(io_descr, struct usart_async_descriptor, io);
|
||||
|
||||
ASSERT(descr && buf && length);
|
||||
|
||||
CRITICAL_SECTION_ENTER()
|
||||
num = ringbuffer_num(&descr->rx);
|
||||
CRITICAL_SECTION_LEAVE()
|
||||
|
||||
while ((was_read < num) && (was_read < length)) {
|
||||
ringbuffer_get(&descr->rx, &buf[was_read++]);
|
||||
}
|
||||
|
||||
return (int32_t)was_read;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Process "byte is sent" interrupt
|
||||
*
|
||||
* \param[in] device The pointer to device structure
|
||||
*/
|
||||
static void usart_process_byte_sent(struct _usart_async_device *device)
|
||||
{
|
||||
struct usart_async_descriptor *descr = CONTAINER_OF(device, struct usart_async_descriptor, device);
|
||||
if (descr->tx_por != descr->tx_buffer_length) {
|
||||
_usart_async_write_byte(&descr->device, descr->tx_buffer[descr->tx_por++]);
|
||||
_usart_async_enable_byte_sent_irq(&descr->device);
|
||||
} else {
|
||||
_usart_async_enable_tx_done_irq(&descr->device);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Process completion of data sending
|
||||
*
|
||||
* \param[in] device The pointer to device structure
|
||||
*/
|
||||
static void usart_transmission_complete(struct _usart_async_device *device)
|
||||
{
|
||||
struct usart_async_descriptor *descr = CONTAINER_OF(device, struct usart_async_descriptor, device);
|
||||
|
||||
descr->stat = 0;
|
||||
if (descr->usart_cb.tx_done) {
|
||||
descr->usart_cb.tx_done(descr);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Process byte reception
|
||||
*
|
||||
* \param[in] device The pointer to device structure
|
||||
* \param[in] data Data read
|
||||
*/
|
||||
static void usart_fill_rx_buffer(struct _usart_async_device *device, uint8_t data)
|
||||
{
|
||||
struct usart_async_descriptor *descr = CONTAINER_OF(device, struct usart_async_descriptor, device);
|
||||
|
||||
ringbuffer_put(&descr->rx, data);
|
||||
|
||||
if (descr->usart_cb.rx_done) {
|
||||
descr->usart_cb.rx_done(descr);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Process error interrupt
|
||||
*
|
||||
* \param[in] device The pointer to device structure
|
||||
*/
|
||||
static void usart_error(struct _usart_async_device *device)
|
||||
{
|
||||
struct usart_async_descriptor *descr = CONTAINER_OF(device, struct usart_async_descriptor, device);
|
||||
|
||||
descr->stat = 0;
|
||||
if (descr->usart_cb.error) {
|
||||
descr->usart_cb.error(descr);
|
||||
}
|
||||
}
|
||||
|
||||
//@}
|
|
@ -1,276 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief I/O USART related functionality implementation.
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include "hal_usart_sync.h"
|
||||
#include <utils_assert.h>
|
||||
#include <utils.h>
|
||||
|
||||
/**
|
||||
* \brief Driver version
|
||||
*/
|
||||
#define DRIVER_VERSION 0x00000001u
|
||||
|
||||
static int32_t usart_sync_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length);
|
||||
static int32_t usart_sync_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length);
|
||||
|
||||
/**
|
||||
* \brief Initialize usart interface
|
||||
*/
|
||||
int32_t usart_sync_init(struct usart_sync_descriptor *const descr, void *const hw, void *const func)
|
||||
{
|
||||
int32_t init_status;
|
||||
ASSERT(descr && hw);
|
||||
init_status = _usart_sync_init(&descr->device, hw);
|
||||
if (init_status) {
|
||||
return init_status;
|
||||
}
|
||||
|
||||
descr->io.read = usart_sync_read;
|
||||
descr->io.write = usart_sync_write;
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Uninitialize usart interface
|
||||
*/
|
||||
int32_t usart_sync_deinit(struct usart_sync_descriptor *const descr)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_sync_deinit(&descr->device);
|
||||
|
||||
descr->io.read = NULL;
|
||||
descr->io.write = NULL;
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enable usart interface
|
||||
*/
|
||||
int32_t usart_sync_enable(struct usart_sync_descriptor *const descr)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_sync_enable(&descr->device);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable usart interface
|
||||
*/
|
||||
int32_t usart_sync_disable(struct usart_sync_descriptor *const descr)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_sync_disable(&descr->device);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieve I/O descriptor
|
||||
*/
|
||||
int32_t usart_sync_get_io_descriptor(struct usart_sync_descriptor *const descr, struct io_descriptor **io)
|
||||
{
|
||||
ASSERT(descr && io);
|
||||
|
||||
*io = &descr->io;
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Specify action for flow control pins
|
||||
*/
|
||||
int32_t usart_sync_set_flow_control(struct usart_sync_descriptor *const descr,
|
||||
const union usart_flow_control_state state)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_sync_set_flow_control_state(&descr->device, state);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set usart baud rate
|
||||
*/
|
||||
int32_t usart_sync_set_baud_rate(struct usart_sync_descriptor *const descr, const uint32_t baud_rate)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_sync_set_baud_rate(&descr->device, baud_rate);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set usart data order
|
||||
*/
|
||||
int32_t usart_sync_set_data_order(struct usart_sync_descriptor *const descr, const enum usart_data_order data_order)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_sync_set_data_order(&descr->device, data_order);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set usart mode
|
||||
*/
|
||||
int32_t usart_sync_set_mode(struct usart_sync_descriptor *const descr, const enum usart_mode mode)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_sync_set_mode(&descr->device, mode);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set usart parity
|
||||
*/
|
||||
int32_t usart_sync_set_parity(struct usart_sync_descriptor *const descr, const enum usart_parity parity)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_sync_set_parity(&descr->device, parity);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set usart stop bits
|
||||
*/
|
||||
int32_t usart_sync_set_stopbits(struct usart_sync_descriptor *const descr, const enum usart_stop_bits stop_bits)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_sync_set_stop_bits(&descr->device, stop_bits);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Set usart character size
|
||||
*/
|
||||
int32_t usart_sync_set_character_size(struct usart_sync_descriptor *const descr, const enum usart_character_size size)
|
||||
{
|
||||
ASSERT(descr);
|
||||
_usart_sync_set_character_size(&descr->device, size);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieve the state of flow control pins
|
||||
*/
|
||||
int32_t usart_sync_flow_control_status(const struct usart_sync_descriptor *const descr,
|
||||
union usart_flow_control_state *const state)
|
||||
{
|
||||
ASSERT(descr && state);
|
||||
*state = _usart_sync_get_flow_control_state(&descr->device);
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Check if the usart transmitter is empty
|
||||
*/
|
||||
int32_t usart_sync_is_tx_empty(const struct usart_sync_descriptor *const descr)
|
||||
{
|
||||
ASSERT(descr);
|
||||
return _usart_sync_is_ready_to_send(&descr->device);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Check if the usart receiver is not empty
|
||||
*/
|
||||
int32_t usart_sync_is_rx_not_empty(const struct usart_sync_descriptor *const descr)
|
||||
{
|
||||
ASSERT(descr);
|
||||
return _usart_sync_is_byte_received(&descr->device);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Retrieve the current driver version
|
||||
*/
|
||||
uint32_t usart_sync_get_version(void)
|
||||
{
|
||||
return DRIVER_VERSION;
|
||||
}
|
||||
|
||||
/*
|
||||
* \internal Write the given data to usart interface
|
||||
*
|
||||
* \param[in] descr The pointer to an io descriptor
|
||||
* \param[in] buf Data to write to usart
|
||||
* \param[in] length The number of bytes to write
|
||||
*
|
||||
* \return The number of bytes written.
|
||||
*/
|
||||
static int32_t usart_sync_write(struct io_descriptor *const io_descr, const uint8_t *const buf, const uint16_t length)
|
||||
{
|
||||
uint32_t offset = 0;
|
||||
struct usart_sync_descriptor *descr = CONTAINER_OF(io_descr, struct usart_sync_descriptor, io);
|
||||
|
||||
ASSERT(io_descr && buf && length);
|
||||
while (!_usart_sync_is_ready_to_send(&descr->device))
|
||||
;
|
||||
do {
|
||||
_usart_sync_write_byte(&descr->device, buf[offset]);
|
||||
while (!_usart_sync_is_ready_to_send(&descr->device))
|
||||
;
|
||||
} while (++offset < length);
|
||||
while (!_usart_sync_is_transmit_done(&descr->device))
|
||||
;
|
||||
return (int32_t)offset;
|
||||
}
|
||||
|
||||
/*
|
||||
* \internal Read data from usart interface
|
||||
*
|
||||
* \param[in] descr The pointer to an io descriptor
|
||||
* \param[in] buf A buffer to read data to
|
||||
* \param[in] length The size of a buffer
|
||||
*
|
||||
* \return The number of bytes read.
|
||||
*/
|
||||
static int32_t usart_sync_read(struct io_descriptor *const io_descr, uint8_t *const buf, const uint16_t length)
|
||||
{
|
||||
uint32_t offset = 0;
|
||||
struct usart_sync_descriptor *descr = CONTAINER_OF(io_descr, struct usart_sync_descriptor, io);
|
||||
|
||||
ASSERT(io_descr && buf && length);
|
||||
do {
|
||||
while (!_usart_sync_is_byte_received(&descr->device))
|
||||
;
|
||||
buf[offset] = _usart_sync_read_byte(&descr->device);
|
||||
} while (++offset < length);
|
||||
|
||||
return (int32_t)offset;
|
||||
}
|
|
@ -0,0 +1,116 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Ringbuffer declaration.
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
#ifndef _UTILS_RINGBUFFER_H_INCLUDED
|
||||
#define _UTILS_RINGBUFFER_H_INCLUDED
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup doc_driver_hal_utils_ringbuffer
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "compiler.h"
|
||||
#include "utils_assert.h"
|
||||
|
||||
/**
|
||||
* \brief Ring buffer element type
|
||||
*/
|
||||
struct ringbuffer {
|
||||
uint8_t *buf; /** Buffer base address */
|
||||
uint32_t size; /** Buffer size */
|
||||
uint32_t read_index; /** Buffer read index */
|
||||
uint32_t write_index; /** Buffer write index */
|
||||
};
|
||||
|
||||
/**
|
||||
* \brief Ring buffer init
|
||||
*
|
||||
* \param[in] rb The pointer to a ring buffer structure instance
|
||||
* \param[in] buf Space to store the data
|
||||
* \param[in] size The buffer length, must be aligned with power of 2
|
||||
*
|
||||
* \return ERR_NONE on success, or an error code on failure.
|
||||
*/
|
||||
int32_t ringbuffer_init(struct ringbuffer *const rb, void *buf, uint32_t size);
|
||||
|
||||
/**
|
||||
* \brief Get one byte from ring buffer, the user needs to handle the concurrent
|
||||
* access on buffer via put/get/flush
|
||||
*
|
||||
* \param[in] rb The pointer to a ring buffer structure instance
|
||||
* \param[in] data One byte space to store the read data
|
||||
*
|
||||
* \return ERR_NONE on success, or an error code on failure.
|
||||
*/
|
||||
int32_t ringbuffer_get(struct ringbuffer *const rb, uint8_t *data);
|
||||
|
||||
/**
|
||||
* \brief Put one byte to ring buffer, the user needs to handle the concurrent access
|
||||
* on buffer via put/get/flush
|
||||
*
|
||||
* \param[in] rb The pointer to a ring buffer structure instance
|
||||
* \param[in] data One byte data to be put into ring buffer
|
||||
*
|
||||
* \return ERR_NONE on success, or an error code on failure.
|
||||
*/
|
||||
int32_t ringbuffer_put(struct ringbuffer *const rb, uint8_t data);
|
||||
|
||||
/**
|
||||
* \brief Return the element number of ring buffer
|
||||
*
|
||||
* \param[in] rb The pointer to a ring buffer structure instance
|
||||
*
|
||||
* \return The number of elements in ring buffer [0, rb->size]
|
||||
*/
|
||||
uint32_t ringbuffer_num(const struct ringbuffer *const rb);
|
||||
|
||||
/**
|
||||
* \brief Flush ring buffer, the user needs to handle the concurrent access on buffer
|
||||
* via put/get/flush
|
||||
*
|
||||
* \param[in] rb The pointer to a ring buffer structure instance
|
||||
*
|
||||
* \return ERR_NONE on success, or an error code on failure.
|
||||
*/
|
||||
uint32_t ringbuffer_flush(struct ringbuffer *const rb);
|
||||
|
||||
/**@}*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /* _UTILS_RINGBUFFER_H_INCLUDED */
|
|
@ -0,0 +1,118 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief Ringbuffer functionality implementation.
|
||||
*
|
||||
* Copyright (c) 2014-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
#include "utils_ringbuffer.h"
|
||||
|
||||
/**
|
||||
* \brief Ringbuffer init
|
||||
*/
|
||||
int32_t ringbuffer_init(struct ringbuffer *const rb, void *buf, uint32_t size)
|
||||
{
|
||||
ASSERT(rb && buf && size);
|
||||
|
||||
/*
|
||||
* buf size must be aligned to power of 2
|
||||
*/
|
||||
if ((size & (size - 1)) != 0) {
|
||||
return ERR_INVALID_ARG;
|
||||
}
|
||||
|
||||
/* size - 1 is faster in calculation */
|
||||
rb->size = size - 1;
|
||||
rb->read_index = 0;
|
||||
rb->write_index = rb->read_index;
|
||||
rb->buf = (uint8_t *)buf;
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Get one byte from ringbuffer
|
||||
*
|
||||
*/
|
||||
int32_t ringbuffer_get(struct ringbuffer *const rb, uint8_t *data)
|
||||
{
|
||||
ASSERT(rb && data);
|
||||
|
||||
if (rb->write_index != rb->read_index) {
|
||||
*data = rb->buf[rb->read_index & rb->size];
|
||||
rb->read_index++;
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
return ERR_NOT_FOUND;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Put one byte to ringbuffer
|
||||
*
|
||||
*/
|
||||
int32_t ringbuffer_put(struct ringbuffer *const rb, uint8_t data)
|
||||
{
|
||||
ASSERT(rb);
|
||||
|
||||
rb->buf[rb->write_index & rb->size] = data;
|
||||
|
||||
/*
|
||||
* buffer full strategy: new data will overwrite the oldest data in
|
||||
* the buffer
|
||||
*/
|
||||
if ((rb->write_index - rb->read_index) > rb->size) {
|
||||
rb->read_index = rb->write_index - rb->size;
|
||||
}
|
||||
|
||||
rb->write_index++;
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Return the element number of ringbuffer
|
||||
*/
|
||||
uint32_t ringbuffer_num(const struct ringbuffer *const rb)
|
||||
{
|
||||
ASSERT(rb);
|
||||
|
||||
return rb->write_index - rb->read_index;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Flush ringbuffer
|
||||
*/
|
||||
uint32_t ringbuffer_flush(struct ringbuffer *const rb)
|
||||
{
|
||||
ASSERT(rb);
|
||||
|
||||
rb->read_index = rb->write_index;
|
||||
|
||||
return ERR_NONE;
|
||||
}
|
|
@ -163,6 +163,8 @@ static struct usart_configuration _usarts[] = {
|
|||
};
|
||||
#endif
|
||||
|
||||
static struct _usart_async_device *_sercom3_dev = NULL;
|
||||
|
||||
static uint8_t _get_sercom_index(const void *const hw);
|
||||
static uint8_t _sercom_get_irq_num(const void *const hw);
|
||||
static void _sercom_init_irq_param(const void *const hw, void *dev);
|
||||
|
@ -562,6 +564,40 @@ void _usart_async_set_irq_state(struct _usart_async_device *const device, const
|
|||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal Sercom interrupt handler
|
||||
*
|
||||
* \param[in] p The pointer to interrupt parameter
|
||||
*/
|
||||
static void _sercom_usart_interrupt_handler(struct _usart_async_device *device)
|
||||
{
|
||||
void *hw = device->hw;
|
||||
|
||||
if (hri_sercomusart_get_interrupt_DRE_bit(hw) && hri_sercomusart_get_INTEN_DRE_bit(hw)) {
|
||||
hri_sercomusart_clear_INTEN_DRE_bit(hw);
|
||||
device->usart_cb.tx_byte_sent(device);
|
||||
} else if (hri_sercomusart_get_interrupt_TXC_bit(hw) && hri_sercomusart_get_INTEN_TXC_bit(hw)) {
|
||||
hri_sercomusart_clear_INTEN_TXC_bit(hw);
|
||||
device->usart_cb.tx_done_cb(device);
|
||||
} else if (hri_sercomusart_get_interrupt_RXC_bit(hw)) {
|
||||
if (hri_sercomusart_read_STATUS_reg(hw)
|
||||
& (SERCOM_USART_STATUS_PERR | SERCOM_USART_STATUS_FERR | SERCOM_USART_STATUS_BUFOVF
|
||||
| SERCOM_USART_STATUS_ISF | SERCOM_USART_STATUS_COLL)) {
|
||||
hri_sercomusart_clear_STATUS_reg(hw, SERCOM_USART_STATUS_MASK);
|
||||
return;
|
||||
}
|
||||
|
||||
device->usart_cb.rx_done_cb(device, hri_sercomusart_read_DATA_reg(hw));
|
||||
} else if (hri_sercomusart_get_interrupt_ERROR_bit(hw)) {
|
||||
uint32_t status;
|
||||
|
||||
hri_sercomusart_clear_interrupt_ERROR_bit(hw);
|
||||
device->usart_cb.error_cb(device);
|
||||
status = hri_sercomusart_read_STATUS_reg(hw);
|
||||
hri_sercomusart_clear_STATUS_reg(hw, status);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal Retrieve ordinal number of the given sercom hardware instance
|
||||
*
|
||||
|
@ -589,6 +625,10 @@ static uint8_t _get_sercom_index(const void *const hw)
|
|||
*/
|
||||
static void _sercom_init_irq_param(const void *const hw, void *dev)
|
||||
{
|
||||
|
||||
if (hw == SERCOM3) {
|
||||
_sercom3_dev = (struct _usart_async_device *)dev;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -2360,6 +2400,35 @@ static inline const struct sercomspi_regs_cfg *_spi_get_regs(const uint32_t hw_a
|
|||
return NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* \internal Sercom interrupt handler
|
||||
*/
|
||||
void SERCOM3_0_Handler(void)
|
||||
{
|
||||
_sercom_usart_interrupt_handler(_sercom3_dev);
|
||||
}
|
||||
/**
|
||||
* \internal Sercom interrupt handler
|
||||
*/
|
||||
void SERCOM3_1_Handler(void)
|
||||
{
|
||||
_sercom_usart_interrupt_handler(_sercom3_dev);
|
||||
}
|
||||
/**
|
||||
* \internal Sercom interrupt handler
|
||||
*/
|
||||
void SERCOM3_2_Handler(void)
|
||||
{
|
||||
_sercom_usart_interrupt_handler(_sercom3_dev);
|
||||
}
|
||||
/**
|
||||
* \internal Sercom interrupt handler
|
||||
*/
|
||||
void SERCOM3_3_Handler(void)
|
||||
{
|
||||
_sercom_usart_interrupt_handler(_sercom3_dev);
|
||||
}
|
||||
|
||||
int32_t _spi_m_sync_init(struct _spi_m_sync_dev *dev, void *const hw)
|
||||
{
|
||||
const struct sercomspi_regs_cfg *regs = _spi_get_regs((uint32_t)hw);
|
||||
|
|
|
@ -30,9 +30,6 @@
|
|||
<path>$PROJ_DIR$\usb\class\cdc\device</path>
|
||||
<path>$PROJ_DIR$\usb\device</path>
|
||||
<path>$PROJ_DIR$\</path>
|
||||
<path>$PROJ_DIR$\config</path>
|
||||
<path>$PROJ_DIR$\stdio_redirect</path>
|
||||
<path>$PROJ_DIR$\</path>
|
||||
<path>$PROJ_DIR$\CMSIS\Core\Include</path>
|
||||
<path>$PROJ_DIR$\samd51a\include</path>
|
||||
</includePath>
|
||||
|
@ -63,9 +60,6 @@
|
|||
<path>$PROJ_DIR$\usb\class\cdc\device</path>
|
||||
<path>$PROJ_DIR$\usb\device</path>
|
||||
<path>$PROJ_DIR$\</path>
|
||||
<path>$PROJ_DIR$\config</path>
|
||||
<path>$PROJ_DIR$\stdio_redirect</path>
|
||||
<path>$PROJ_DIR$\</path>
|
||||
<path>$PROJ_DIR$\CMSIS\Core\Include</path>
|
||||
<path>$PROJ_DIR$\samd51a\include</path>
|
||||
</asmIncludePath>
|
||||
|
@ -92,8 +86,6 @@
|
|||
<path>driver_init.c</path>
|
||||
<path>driver_init.h</path>
|
||||
<path>main.c</path>
|
||||
<path>stdio_start.c</path>
|
||||
<path>stdio_start.h</path>
|
||||
<path>usb_start.c</path>
|
||||
<path>usb_start.h</path>
|
||||
|
||||
|
@ -133,7 +125,6 @@
|
|||
<path>config/hpl_sercom_config.h</path>
|
||||
<path>config/hpl_usb_config.h</path>
|
||||
<path>config/peripheral_clk_config.h</path>
|
||||
<path>config/stdio_redirect_config.h</path>
|
||||
<path>config/usbd_config.h</path>
|
||||
</group>
|
||||
|
||||
|
@ -150,7 +141,7 @@
|
|||
<path>hal/include/hal_init.h</path>
|
||||
<path>hal/include/hal_io.h</path>
|
||||
<path>hal/include/hal_sleep.h</path>
|
||||
<path>hal/include/hal_usart_sync.h</path>
|
||||
<path>hal/include/hal_usart_async.h</path>
|
||||
<path>hal/include/hal_usb_device.h</path>
|
||||
<path>hal/include/hpl_cmcc.h</path>
|
||||
<path>hal/include/hpl_core.h</path>
|
||||
|
@ -191,7 +182,7 @@
|
|||
<path>hal/src/hal_init.c</path>
|
||||
<path>hal/src/hal_io.c</path>
|
||||
<path>hal/src/hal_sleep.c</path>
|
||||
<path>hal/src/hal_usart_sync.c</path>
|
||||
<path>hal/src/hal_usart_async.c</path>
|
||||
<path>hal/src/hal_usb_device.c</path>
|
||||
</group>
|
||||
|
||||
|
@ -206,12 +197,14 @@
|
|||
<path>hal/utils/include/utils_increment_macro.h</path>
|
||||
<path>hal/utils/include/utils_list.h</path>
|
||||
<path>hal/utils/include/utils_repeat_macro.h</path>
|
||||
<path>hal/utils/include/utils_ringbuffer.h</path>
|
||||
</group>
|
||||
|
||||
<group name="hal/utils/src">
|
||||
<path>hal/utils/src/utils_assert.c</path>
|
||||
<path>hal/utils/src/utils_event.c</path>
|
||||
<path>hal/utils/src/utils_list.c</path>
|
||||
<path>hal/utils/src/utils_ringbuffer.c</path>
|
||||
</group>
|
||||
|
||||
<group name="hpl/cmcc">
|
||||
|
@ -445,16 +438,6 @@
|
|||
<path>samd51a/include/pio/samd51p20a.h</path>
|
||||
</group>
|
||||
|
||||
<group name="stdio_redirect">
|
||||
<path>stdio_redirect/stdio_io.c</path>
|
||||
<path>stdio_redirect/stdio_io.h</path>
|
||||
</group>
|
||||
|
||||
<group name="stdio_redirect/iar">
|
||||
<path>stdio_redirect/iar/read.c</path>
|
||||
<path>stdio_redirect/iar/write.c</path>
|
||||
</group>
|
||||
|
||||
<group name="usb">
|
||||
<path>usb/usb_atmel.h</path>
|
||||
<path>usb/usb_debug.h</path>
|
||||
|
|
|
@ -1,53 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief STDIO redirection
|
||||
*
|
||||
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdio_io.h>
|
||||
#include <stdio.h>
|
||||
|
||||
int __attribute__((weak)) _read(int file, char *ptr, int len); /* Remove GCC compiler warning */
|
||||
|
||||
int __attribute__((weak)) _read(int file, char *ptr, int len)
|
||||
{
|
||||
int n = 0;
|
||||
|
||||
if (file != 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
n = stdio_io_read((uint8_t *)ptr, len);
|
||||
if (n < 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return n;
|
||||
}
|
|
@ -1,53 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief STDIO redirection
|
||||
*
|
||||
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdio_io.h>
|
||||
#include <stdio.h>
|
||||
|
||||
int __attribute__((weak)) _write(int file, char *ptr, int len); /* Remove GCC compiler warning */
|
||||
|
||||
int __attribute__((weak)) _write(int file, char *ptr, int len)
|
||||
{
|
||||
int n = 0;
|
||||
|
||||
if ((file != 1) && (file != 2) && (file != 3)) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
n = stdio_io_write((const uint8_t *)ptr, len);
|
||||
if (n < 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
return n;
|
||||
}
|
|
@ -1,114 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief STDIO redirection
|
||||
*
|
||||
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdio_io.h>
|
||||
#include <stdio.h>
|
||||
|
||||
#ifndef _UNIT_TEST_
|
||||
#include <yfuns.h>
|
||||
#else
|
||||
#define _STD_BEGIN
|
||||
#define _STD_END
|
||||
#define _LLIO_ERROR ((size_t)-1) /* For __read and __write. */
|
||||
#define _LLIO_STDIN 0
|
||||
#define _LLIO_STDOUT 1
|
||||
#define _LLIO_STDERR 2
|
||||
#endif
|
||||
|
||||
#if (__VER__ < 8010000)
|
||||
/* Refer http://ftp.iar.se/WWWfiles/arm/webic/doc/EWARM_MigrationGuide.ENU.pdf */
|
||||
_STD_BEGIN
|
||||
#endif
|
||||
|
||||
#pragma module_name = "?__read"
|
||||
|
||||
/*! \brief Reads a number of bytes, at most \a size, into the memory area
|
||||
* pointed to by \a buffer.
|
||||
*
|
||||
* \param handle File handle to read from.
|
||||
* \param buffer Pointer to buffer to write read bytes to.
|
||||
* \param size Number of bytes to read.
|
||||
*
|
||||
* \return The number of bytes read, \c 0 at the end of the file, or
|
||||
* \c _LLIO_ERROR on failure.
|
||||
*/
|
||||
size_t __read(int handle, unsigned char *buffer, size_t size)
|
||||
{
|
||||
int n = 0;
|
||||
/* This implementation only reads from stdin.
|
||||
* For all other file handles, it returns failure. */
|
||||
if (handle != _LLIO_STDIN) {
|
||||
return _LLIO_ERROR;
|
||||
}
|
||||
|
||||
n = stdio_io_read((uint8_t *)buffer, size);
|
||||
if (n < 0) {
|
||||
return _LLIO_ERROR;
|
||||
}
|
||||
return n;
|
||||
}
|
||||
|
||||
/*! \brief This routine is required by IAR DLIB library since EWAVR V6.10
|
||||
* the implementation is empty to be compatible with old IAR version.
|
||||
*/
|
||||
int __close(int handle)
|
||||
{
|
||||
(void)(handle);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifndef __GNUC__
|
||||
/*! \brief This routine is required by IAR DLIB library since EWAVR V6.10
|
||||
* the implementation is empty to be compatible with old IAR version.
|
||||
*/
|
||||
int remove(const char *val)
|
||||
{
|
||||
(void)(val);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*! \brief This routine is required by IAR DLIB library since EWAVR V6.10
|
||||
* the implementation is empty to be compatible with old IAR version.
|
||||
*/
|
||||
long __lseek(int handle, long val, int val2)
|
||||
{
|
||||
(void)(handle);
|
||||
(void)(val2);
|
||||
return val;
|
||||
}
|
||||
|
||||
#if (__VER__ < 8010000)
|
||||
/* Refer http://ftp.iar.se/WWWfiles/arm/webic/doc/EWARM_MigrationGuide.ENU.pdf */
|
||||
_STD_END
|
||||
#endif
|
|
@ -1,94 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief STDIO redirection
|
||||
*
|
||||
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdio_io.h>
|
||||
#include <stdio.h>
|
||||
|
||||
#ifndef _UNIT_TEST_
|
||||
#include <yfuns.h>
|
||||
#else
|
||||
#define _STD_BEGIN
|
||||
#define _STD_END
|
||||
#define _LLIO_ERROR ((size_t)-1) /* For __read and __write. */
|
||||
#define _LLIO_STDIN 0
|
||||
#define _LLIO_STDOUT 1
|
||||
#define _LLIO_STDERR 2
|
||||
#endif
|
||||
|
||||
#if (__VER__ < 8010000)
|
||||
/* Refer http://ftp.iar.se/WWWfiles/arm/webic/doc/EWARM_MigrationGuide.ENU.pdf */
|
||||
_STD_BEGIN
|
||||
#endif
|
||||
|
||||
#pragma module_name = "?__write"
|
||||
|
||||
/*! \brief Writes a number of bytes, at most \a size, from the memory area
|
||||
* pointed to by \a buffer.
|
||||
*
|
||||
* If \a buffer is zero then \ref __write performs flushing of internal buffers,
|
||||
* if any. In this case, \a handle can be \c -1 to indicate that all handles
|
||||
* should be flushed.
|
||||
*
|
||||
* \param handle File handle to write to.
|
||||
* \param buffer Pointer to buffer to read bytes to write from.
|
||||
* \param size Number of bytes to write.
|
||||
*
|
||||
* \return The number of bytes written, or \c _LLIO_ERROR on failure.
|
||||
*/
|
||||
size_t __write(int handle, const unsigned char *buffer, size_t size)
|
||||
{
|
||||
int n = 0;
|
||||
|
||||
if (buffer == 0) {
|
||||
/* This means that we should flush internal buffers. */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* This implementation only writes to stdout and stderr.
|
||||
* For all other file handles, it returns failure. */
|
||||
if (handle != _LLIO_STDOUT && handle != _LLIO_STDERR) {
|
||||
return _LLIO_ERROR;
|
||||
}
|
||||
|
||||
n = stdio_io_write((const uint8_t *)buffer, size);
|
||||
if (n < 0) {
|
||||
return _LLIO_ERROR;
|
||||
}
|
||||
|
||||
return n;
|
||||
}
|
||||
|
||||
#if (__VER__ < 8010000)
|
||||
/* Refer http://ftp.iar.se/WWWfiles/arm/webic/doc/EWARM_MigrationGuide.ENU.pdf */
|
||||
_STD_END
|
||||
#endif
|
|
@ -1,107 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief STDIO redirection
|
||||
*
|
||||
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
|
||||
#ifdef _UNIT_TEST_
|
||||
#undef fputc
|
||||
#undef fgetc
|
||||
#undef ferror
|
||||
#define fputc ut_fputc
|
||||
#define fgetc ut_fgetc
|
||||
#define ferror ut_ferror
|
||||
#endif
|
||||
|
||||
#include <stdio_io.h>
|
||||
|
||||
/* Disable semihosting */
|
||||
#if defined(__GNUC__) && (__ARMCOMPILER_VERSION > 6000000) /* Keil MDK with ARM Compiler 6 */
|
||||
__asm(".global __use_no_semihosting\n\t");
|
||||
#else
|
||||
#pragma import(__use_no_semihosting_swi)
|
||||
#endif
|
||||
|
||||
#ifndef __GNUC__
|
||||
struct __FILE {
|
||||
int handle;
|
||||
};
|
||||
#endif
|
||||
FILE __stdout;
|
||||
FILE __stdin;
|
||||
FILE __stderr;
|
||||
|
||||
int fputc(int ch, FILE *f)
|
||||
{
|
||||
if ((f == stdout) || (f == stderr)) {
|
||||
uint8_t tmp = (uint8_t)ch;
|
||||
if (stdio_io_write(&tmp, 1) < 0) {
|
||||
return EOF;
|
||||
}
|
||||
return ch;
|
||||
} else {
|
||||
return EOF;
|
||||
}
|
||||
}
|
||||
|
||||
int fgetc(FILE *f)
|
||||
{
|
||||
if (f == stdin) {
|
||||
uint8_t tmp = 0;
|
||||
if (stdio_io_read(&tmp, 1) < 0) {
|
||||
return EOF;
|
||||
}
|
||||
return tmp;
|
||||
} else {
|
||||
return EOF;
|
||||
}
|
||||
}
|
||||
|
||||
void _ttywrch(int ch)
|
||||
{
|
||||
uint8_t tmp = (uint8_t)ch;
|
||||
stdio_io_write(&tmp, 1);
|
||||
}
|
||||
|
||||
int ferror(FILE *f)
|
||||
{
|
||||
(void)f;
|
||||
/* Your implementation of ferror */
|
||||
return EOF;
|
||||
}
|
||||
|
||||
void _sys_exit(int return_code)
|
||||
{
|
||||
(void)return_code;
|
||||
while (1) {
|
||||
}; /* endless loop */
|
||||
}
|
|
@ -1,74 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief STDIO redirection terminal
|
||||
*
|
||||
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdio_io.h>
|
||||
|
||||
/** IO descriptor for STDIO access. */
|
||||
static struct io_descriptor *stdio_io = NULL;
|
||||
|
||||
void stdio_io_init(struct io_descriptor *io)
|
||||
{
|
||||
#if defined(__GNUC__)
|
||||
/* Specify that stdout and stdin should not be buffered. */
|
||||
setbuf(stdout, NULL);
|
||||
setbuf(stdin, NULL);
|
||||
/* Note: Already the case in IAR's Normal DLIB default configuration
|
||||
* and AVR GCC library:
|
||||
* - printf() emits one character at a time.
|
||||
* - getchar() requests only 1 byte to exit.
|
||||
*/
|
||||
#endif
|
||||
stdio_io = io;
|
||||
}
|
||||
|
||||
void stdio_io_set_io(struct io_descriptor *io)
|
||||
{
|
||||
stdio_io = io;
|
||||
}
|
||||
|
||||
int32_t stdio_io_read(uint8_t *buf, const int32_t len)
|
||||
{
|
||||
if (stdio_io == NULL) {
|
||||
return 0;
|
||||
}
|
||||
return io_read(stdio_io, buf, len);
|
||||
}
|
||||
|
||||
int32_t stdio_io_write(const uint8_t *buf, const int32_t len)
|
||||
{
|
||||
if (stdio_io == NULL) {
|
||||
return 0;
|
||||
}
|
||||
return io_write(stdio_io, buf, len);
|
||||
}
|
|
@ -1,81 +0,0 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief STDIO redirection terminal
|
||||
*
|
||||
* Copyright (c) 2015-2018 Microchip Technology Inc. and its subsidiaries.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Subject to your compliance with these terms, you may use Microchip
|
||||
* software and any derivatives exclusively with Microchip products.
|
||||
* It is your responsibility to comply with third party license terms applicable
|
||||
* to your use of third party software (including open source software) that
|
||||
* may accompany Microchip software.
|
||||
*
|
||||
* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
|
||||
* WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
|
||||
* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
|
||||
* LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
|
||||
* LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
|
||||
* SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
|
||||
* POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT
|
||||
* ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
|
||||
* RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
|
||||
* THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _STDIO_IO_H_INCLUDED
|
||||
#define _STDIO_IO_H_INCLUDED
|
||||
|
||||
#include <hal_io.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/**
|
||||
* \brief Initialize STDIO access
|
||||
* \param[in] io Pointer to IO descriptor,
|
||||
* NULL to discard R/W without any error.
|
||||
*/
|
||||
void stdio_io_init(struct io_descriptor *io);
|
||||
|
||||
/**
|
||||
* \brief Change IO descriptor for terminal to R/W data
|
||||
* \param[in] io Pointer to IO descriptor,
|
||||
* NULL to discard R/W without any error.
|
||||
*/
|
||||
void stdio_io_set_io(struct io_descriptor *io);
|
||||
|
||||
/**
|
||||
* \brief Read through specified terminal
|
||||
* \param[out] buf Pointer to buffer to place read data
|
||||
* \param[in] len Data length in number of bytes
|
||||
* \return status
|
||||
* \retval >=0 number of bytes read
|
||||
* \retval <0 error
|
||||
*/
|
||||
int32_t stdio_io_read(uint8_t *buf, const int32_t len);
|
||||
|
||||
/**
|
||||
* \brief Write through specified terminal
|
||||
* \param[in] buf Pointer to buffer to place data to write
|
||||
* \param[in] len Data length in number of bytes
|
||||
* \return status
|
||||
* \retval >=0 number of bytes read
|
||||
* \retval <0 error
|
||||
*/
|
||||
int32_t stdio_io_write(const uint8_t *buf, const int32_t len);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* _STDIO_IO_H_INCLUDED */
|
|
@ -1,23 +0,0 @@
|
|||
/*
|
||||
* Code generated from Atmel Start.
|
||||
*
|
||||
* This file will be overwritten when reconfiguring your Atmel Start project.
|
||||
* Please copy examples or other code you want to keep to a separate file or main.c
|
||||
* to avoid loosing it when reconfiguring.
|
||||
*/
|
||||
|
||||
#include "atmel_start.h"
|
||||
#include "stdio_start.h"
|
||||
|
||||
void STDIO_REDIRECT_0_example(void)
|
||||
{
|
||||
/* Print welcome message */
|
||||
printf("\r\nHello ATMEL World!\r\n");
|
||||
}
|
||||
|
||||
void stdio_redirect_init(void)
|
||||
{
|
||||
|
||||
usart_sync_enable(&TARGET_IO);
|
||||
stdio_io_init(&TARGET_IO.io);
|
||||
}
|
|
@ -1,31 +0,0 @@
|
|||
/*
|
||||
* Code generated from Atmel Start.
|
||||
*
|
||||
* This file will be overwritten when reconfiguring your Atmel Start project.
|
||||
* Please copy examples or other code you want to keep to a separate file or main.c
|
||||
* to avoid loosing it when reconfiguring.
|
||||
*/
|
||||
#ifndef STDIO_MAIN_H
|
||||
#define STDIO_MAIN_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#include <stdio.h>
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdio_io.h>
|
||||
|
||||
void STDIO_REDIRECT_0_example(void);
|
||||
|
||||
/**
|
||||
* \brief Initialize STDIO Redirect
|
||||
*/
|
||||
void stdio_redirect_init(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* STDIO_MAIN_H */
|
Loading…
Reference in New Issue