[BSP] Support YD-CH32V307VCT6 (#8473)
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mainmenu "RT-Thread Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../../../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "../Libraries/Kconfig"
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source "board/Kconfig"
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# YD-CH32V307VCT6 BSP Introduction
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## 1 Introduction
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YD-CH32V307VCT6 is a RISC-V core-based development board with a maximum main frequency of 144Mhz. It delivers the best value for developers to try and get started with RISC-V architecture.
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This document records the execution instruction of the BSP (board support package) provided by the RT-Thread community for the CH32V307V-R1 development board.
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The document is covered in three parts:
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- Board Resources Introduction
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- Compiling
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- Quickly Get Started
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By reading the Quickly Get Started section developers can quickly get their hands on this BSP and run RT-Thread on the board.
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**Features**
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- MCU: CH32V307VCT6, main frequency 144MHz，FLASH and RAM are available for configuration.
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- LED: 2, user LEDs (blue and red).
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- Button: 3, Reset, Boot, User.
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- SPI Flash: 32M-bit serial flash memory (W25Q32).
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- I2C EEPROM: 64k-bit serial EEPROM (24C64).
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- USB: 2, Type-C.
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- Network Port: 1, 10M PHY inside.
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- SDIO: microSD connector.
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- Debug interface: SWD.
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- 8 MHz external quartz oscillator (HSE).
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- 32,768 Hz external RTC quartz oscillator (LSE).
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For more details about this board, please refer to:
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- [Board YD-CH32V307VCT6 VCC-GND Studio](http://152.32.187.208:8080/yd-data/YD-CH32V307VCT6/YD-CH32V307VCT6/)
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- [CH32V307](https://www.wch.cn/products/CH32V307.html)
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- [CH32V307 official document](https://github.com/openwch/ch32v307)
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## 2 Compiling
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The BSP supports the RISC-V GCC development environment, here's the specific version information:
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| IDE/Compiler | Version Tested |
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| ------------ | -------------------- |
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| GCC | WCH RISC-V GCC 8.2.0 |
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## 3 Quickly Get Started
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### 3.1 Using Linux to compile BSP
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This section is about to introduce how to compile the BSP in Linux.
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#### 3.1.1 Compile BSP
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1. [Download WCH Compile Toolchain](https://github.com/NanjingQinheng/sdk-toolchain-RISC-V-GCC-WCH/releases)
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2. [Download the RT-Thread latest code](https://github.com/RT-Thread/rt-thread/archive/refs/heads/master.zip)
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3. Install SCons construction tool (similar GNU Make): sudo apt install scons
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4. Edit the variable **EXEC_PATH** in file **rtconfig.py** to point to the directory with executable WCH Compile Toolchain (file riscv-none-embed-gcc).
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5. Configure RT-Thread and hardware board: scons --menuconfig
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6. Start compilation: scons
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7. After compilation, the **rtthread.bin** file will be generated
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#### 3.1.2 Download
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1. Clone source file: git clone https://github.com/jmaselbas/wch-isp.git
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2. Compile and install :
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- cd wch-isp
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- make && sudo make install && sudo make load
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3. Use a USB cable Type-C to connect board to the PC. Hold button **BOOT0**, press briefly button **RST** and release button **BOOT0**.
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4. Check board connection:
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```sh
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wch-isp list
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0: BTVER v2.9 UID 10-46-89-26-3b-38-d4-a4 [0x1770] CH32V307VCT6
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MCU current flash size: 256 Kbyte
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```
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> Note that Chip Mem here is set to 256K ROM + 64K RAM (see Table 2-1 of datasheet CH32V307, and chapter 32.6 "User Option Bytes" of Reference Manual CH32V2x_V3x).
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5. Download firmware to board:
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```
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wch-isp -p flash ./rtthread.bin && wch-isp reset
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```
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#### 3.1.3 Running Result
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1. Connect USB-UART converter to board:
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- board pin A9 (UART1_TX) -> converter RX
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- board pin A10 (UART1_RX) -> converter TX (optional, for enter commands)
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2. In the terminal tool, open the converter serial port (default 115200-8-1-N), and after resetting the device, you can see the output information of RT-Thread on the serial port:
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```
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\ | /
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- RT - Thread Operating System
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/ | \ 5.1.0 build Jan 6 2024 17:12:03
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2006 - 2022 Copyright by RT-Thread team
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SystemClk: 144000000 Hz
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msh >
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```
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On board LEDs (red and blue) blinking.
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# for module compiling
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import os
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Import('RTT_ROOT')
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from building import *
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cwd = GetCurrentDir()
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objs = []
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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import os
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import sys
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import rtconfig
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from SCons.Script import *
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if os.getenv('RTT_ROOT'):
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RTT_ROOT = os.getenv('RTT_ROOT')
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else:
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RTT_ROOT = os.path.normpath(os.getcwd() + '/../../../..')
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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try:
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from building import *
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except:
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print('Cannot found RT-Thread root directory, please check RTT_ROOT')
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print(RTT_ROOT)
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exit(-1)
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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if rtconfig.PLATFORM in ['iccarm']:
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env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
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env.Replace(ARFLAGS = [''])
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env.Replace(LINKCOM = env["LINKCOM"] + ' --map project.map')
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Export('RTT_ROOT')
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Export('rtconfig')
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SDK_ROOT = os.path.abspath('./')
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if os.path.exists(SDK_ROOT + '/Libraries'):
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libraries_path_prefix = SDK_ROOT + '/Libraries'
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else:
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libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/Libraries'
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SDK_LIB = libraries_path_prefix
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Export('SDK_LIB')
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
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ch32_library = 'ch32v30x_libraries'
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rtconfig.BSP_LIBRARY_TYPE = ch32_library
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bsp_vdir = 'build'
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library_vdir = 'build/libraries'
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# include libraries
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objs.extend(SConscript(os.path.join(libraries_path_prefix, ch32_library, 'SConscript'), variant_dir=library_vdir + '/ch32_library', duplicate=0))
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# common include drivers
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objs.extend(SConscript(os.path.join(libraries_path_prefix, 'ch32_drivers', 'SConscript'), variant_dir=library_vdir + '/ch32_drivers', duplicate=0))
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# make a building
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DoBuilding(TARGET, objs)
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from building import *
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import os
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cwd = GetCurrentDir()
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CPPPATH = [cwd]
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src = ['main.c']
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
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list = os.listdir(cwd)
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for item in list:
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if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
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group = group + SConscript(os.path.join(item, 'SConscript'))
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Return('group')
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/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-01-06 GSunwinder first version
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*
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "ch32v30x.h"
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#include "board.h"
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/*********************************************************************
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* @fn main
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*
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* @brief Main program.
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*
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* @return none
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*/
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int main(void)
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{
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printf("SystemClk: %d Hz\r\n", SystemCoreClock);
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rt_pin_mode(LED_BLUE, PIN_MODE_OUTPUT);
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rt_pin_mode(LED_RED, PIN_MODE_OUTPUT);
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while (1)
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{
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rt_pin_write(LED_RED, PIN_LOW);
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rt_pin_write(LED_BLUE, PIN_HIGH);
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rt_thread_mdelay(1000);
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rt_pin_write(LED_RED, PIN_HIGH);
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rt_pin_write(LED_BLUE, PIN_LOW);
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rt_thread_mdelay(1000);
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}
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}
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menu "Hardware Drivers Config"
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config SOC_CH32V307VC
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bool
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select SOC_RISCV_SERIES_CH32V3
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select RT_USING_COMPONENTS_INIT
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select RT_USING_USER_MAIN
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default y
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menu "Onboard Peripheral Drivers"
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endmenu
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menu "On-chip Peripheral Drivers"
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config BSP_USING_GPIO
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bool "Enable GPIO"
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select RT_USING_PIN
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default y
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menuconfig BSP_USING_UART
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bool "Enable UART"
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select RT_USING_SERIAL
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default n
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if BSP_USING_UART
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config BSP_USING_UART1
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bool "Enable UART1"
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default n
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config BSP_USING_UART2
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bool "Enable UART2"
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default n
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config BSP_USING_UART3
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bool "Enable UART3"
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default n
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config BSP_USING_UART4
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bool "Enable UART4"
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default n
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config BSP_USING_UART5
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bool "Enable UART5"
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default n
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config BSP_USING_UART6
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bool "Enable UART6"
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default n
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config BSP_USING_UART7
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bool "Enable UART7"
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default n
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config BSP_USING_UART8
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bool "Enable UART8"
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default n
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endif
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menuconfig BSP_USING_ADC
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bool "Enable ADC"
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select RT_USING_ADC
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default n
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if BSP_USING_ADC
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config BSP_USING_ADC1
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bool "Enable ADC1"
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default n
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config BSP_USING_ADC2
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bool "Enable ADC2"
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default n
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config ADC_CHANNEL_16
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bool "Enable ADC CHANNEL 16 (inside temperature)"
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default n
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config ADC_CHANNEL_17
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bool "Enable ADC CHANNEL 17 (inside Verf)"
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default n
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endif
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menuconfig BSP_USING_DAC
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bool "Enable DAC"
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select RT_USING_DAC
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default n
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if BSP_USING_DAC
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config BSP_USING_DAC_CHANNEL1
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bool "Enable DAC CHANNEL1"
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default n
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config BSP_USING_DAC_CHANNEL2
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bool "Enable DAC CHANNEL2"
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default n
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endif
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menuconfig BSP_USING_SOFT_I2C
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bool "Enable I2C Bus"
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select RT_USING_I2C
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select RT_USING_I2C_BITOPS
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select RT_USING_PIN
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default n
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if BSP_USING_SOFT_I2C
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config BSP_USING_I2C1
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bool "Enable I2C1 Bus (software simulation)"
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default n
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if BSP_USING_I2C1
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comment "Notice: PB10 --> 26; PB11 --> 27"
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config BSP_I2C1_SCL_PIN
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int "i2c1 SCL pin number"
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range 0 79
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default 26
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config BSP_I2C1_SDA_PIN
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int "i2c1 SDA pin number"
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range 0 79
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default 27
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endif
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config BSP_USING_I2C2
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bool "Enable I2C2 Bus (software simulation)"
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default n
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if BSP_USING_I2C2
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comment "Notice: PC1 --> 33; PC0 --> 32"
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config BSP_I2C2_SCL_PIN
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int "i2c2 SCL pin number"
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range 0 79
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default 32
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config BSP_I2C2_SDA_PIN
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int "i2c2 SDA pin number"
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range 0 79
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default 33
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endif
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endif
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menuconfig BSP_USING_SPI
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bool "Enable SPI"
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select RT_USING_SPI
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if BSP_USING_SPI
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config BSP_USING_SPI1
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bool "Enable SPI1"
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default n
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config BSP_USING_SPI2
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bool "Enable SPI2"
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default n
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config BSP_USING_SPI3
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bool "Enable SPI3"
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default n
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if BSP_USING_SPI3
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config BSP_USING_SPI_FLASH
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bool "Enable SPI Flash"
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default n
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endif
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endif
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menuconfig BSP_USING_SOFT_SPI
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bool "Enable SOFT SPI"
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select RT_USING_SPI_BITOPS
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if BSP_USING_SOFT_SPI
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config BSP_USING_SOFT_SPI1
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bool "Enable SSPI1 Bus (User SPI)"
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default n
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if BSP_USING_SOFT_SPI1
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comment "Notice: PB9 --> 25; PB8 --> 24; PB7 --> 23"
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config BSP_S_SPI1_SCK_PIN
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int "sspi1 SCL pin number"
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range 1 79
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default 25
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config BSP_S_SPI1_MOSI_PIN
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int "sspi1 MISO pin number"
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range 1 79
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default 24
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config BSP_S_SPI1_MISO_PIN
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int "sspi1 MOSI pin number"
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range 1 79
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default 23
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endif
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config BSP_USING_SOFT_SPI2
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bool "Enable SSPI2 Bus (soft SPI)"
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default n
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if BSP_USING_SOFT_SPI2
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comment "Notice: PE0 --> 64; PE1 --> 65; PE2 --> 66"
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config BSP_S_SPI2_SCK_PIN
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int "sspi2 SCL pin number"
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range 1 79
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default 64
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config BSP_S_SPI2_MOSI_PIN
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int "sspi2 MISO pin number"
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range 1 79
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default 65
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config BSP_S_SPI2_MISO_PIN
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int "sspi2 MOSI pin number"
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range 1 79
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default 66
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endif
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endif
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menuconfig BSP_USING_RTC
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bool "Enable RTC"
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select RT_USING_RTC
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default n
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if BSP_USING_RTC
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choice
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prompt "Using clock for RTC"
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default BSP_USING_RTC_LSI
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config BSP_USING_RTC_LSI
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bool "LSI"
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config BSP_USING_RTC_LSE
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bool "LSE"
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config BSP_USING_RTC_HSE_128
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bool "HSE div 128"
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endchoice
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endif
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config LSI_VALUE
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int
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default 39000
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config BSP_USING_IWDT
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bool "Enable IWDT"
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select RT_USING_WDT
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default n
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menuconfig BSP_USING_CAN
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bool "Enable CAN"
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default n
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select RT_USING_CAN
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if BSP_USING_CAN
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config BSP_USING_CAN1
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bool "Using CAN1"
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default n
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||||
config BSP_USING_CAN2
|
||||
bool "Using CAN2"
|
||||
default n
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM
|
||||
bool "Using TIMx"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM
|
||||
config BSP_USING_HWTIMER
|
||||
bool
|
||||
select RT_USING_HWTIMER
|
||||
default n
|
||||
|
||||
config BSP_USING_PWM
|
||||
bool
|
||||
select RT_USING_PWM
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM1
|
||||
bool "using TIM1"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM1
|
||||
config BSP_USING_TIM1_HWTIMER
|
||||
bool "Using TIM1 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM1_PWM
|
||||
bool "Using TIM1 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
|
||||
if BSP_USING_TIM1_PWM
|
||||
config BSP_USING_TIM1_PWM_CH1
|
||||
bool "Using TIM1 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM1_PWM_CH2
|
||||
bool "Using TIM1 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM1_PWM_CH3
|
||||
bool "Using TIM1 channel 3"
|
||||
|
||||
config BSP_USING_TIM1_PWM_CH4
|
||||
bool "Using TIM1 channel 4"
|
||||
endif
|
||||
|
||||
if BSP_USING_TIM1_HWTIMER && BSP_USING_TIM1_PWM
|
||||
comment "BSP_USING_TIM1_HWTIMER and BSP_USING_TIM1_PWM can only be chosen for one!"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM2
|
||||
bool "Using TIM2"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM2
|
||||
config BSP_USING_TIM2_HWTIMER
|
||||
bool "Using TIM2 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM2_PWM
|
||||
bool "Using TIM2 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
|
||||
if BSP_USING_TIM2_PWM
|
||||
config BSP_USING_TIM2_PWM_CH1
|
||||
bool "Using TIM2 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM2_PWM_CH2
|
||||
bool "Using TIM2 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM2_PWM_CH3
|
||||
bool "Using TIM2 channel 3"
|
||||
|
||||
config BSP_USING_TIM2_PWM_CH4
|
||||
bool "Using TIM2 channel 4"
|
||||
endif
|
||||
|
||||
if BSP_USING_TIM2_HWTIMER && BSP_USING_TIM2_PWM
|
||||
comment "BSP_USING_TIM2_HWTIMER and BSP_USING_TIM2_PWM can only be chosen for one!"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM3
|
||||
bool "Using TIM3"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM3
|
||||
config BSP_USING_TIM3_HWTIMER
|
||||
bool "Using TIM3 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM3_PWM
|
||||
bool "Using TIM3 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
|
||||
if BSP_USING_TIM3_PWM
|
||||
config BSP_USING_TIM3_PWM_CH1
|
||||
bool "Using TIM3 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM3_PWM_CH2
|
||||
bool "Using TIM3 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM3_PWM_CH3
|
||||
bool "Using TIM3 channel 3"
|
||||
|
||||
config BSP_USING_TIM3_PWM_CH4
|
||||
bool "Using TIM3 channel 4"
|
||||
endif
|
||||
|
||||
if BSP_USING_TIM3_HWTIMER && BSP_USING_TIM3_PWM
|
||||
comment "BSP_USING_TIM3_HWTIMER and BSP_USING_TIM3_PWM can only be chosen for one!"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM4
|
||||
bool "Using TIM4"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM4
|
||||
config BSP_USING_TIM4_HWTIMER
|
||||
bool "Using TIM4 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM4_PWM
|
||||
bool "Using TIM4 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
|
||||
if BSP_USING_TIM4_PWM
|
||||
config BSP_USING_TIM4_PWM_CH1
|
||||
bool "Using TIM4 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM4_PWM_CH2
|
||||
bool "Using TIM4 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM4_PWM_CH3
|
||||
bool "Using TIM4 channel 3"
|
||||
|
||||
config BSP_USING_TIM4_PWM_CH4
|
||||
bool "Using TIM4 channel 4"
|
||||
endif
|
||||
|
||||
if BSP_USING_TIM4_HWTIMER && BSP_USING_TIM4_PWM
|
||||
comment "BSP_USING_TIM4_HWTIMER and BSP_USING_TIM4_PWM can only be chosen for one!"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM5
|
||||
bool "Using TIM5"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM5
|
||||
config BSP_USING_TIM5_HWTIMER
|
||||
bool "Using TIM5 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM5_PWM
|
||||
bool "Using TIM5 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
|
||||
if BSP_USING_TIM5_PWM
|
||||
config BSP_USING_TIM5_PWM_CH1
|
||||
bool "Using TIM5 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM5_PWM_CH2
|
||||
bool "Using TIM5 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM5_PWM_CH3
|
||||
bool "Using TIM5 channel 3"
|
||||
|
||||
config BSP_USING_TIM5_PWM_CH4
|
||||
bool "Using TIM5 channel 4"
|
||||
endif
|
||||
|
||||
if BSP_USING_TIM5_HWTIMER && BSP_USING_TIM5_PWM
|
||||
comment "BSP_USING_TIM5_HWTIMER and BSP_USING_TIM5_PWM can only be chosen for one!"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM6
|
||||
bool "Using TIM6"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM6
|
||||
config BSP_USING_TIM6_HWTIMER
|
||||
bool "Using TIM6 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM7
|
||||
bool "Using TIM7"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM7
|
||||
config BSP_USING_TIM7_HWTIMER
|
||||
bool "Using TIM7 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM8
|
||||
bool "Using TIM8"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM8
|
||||
config BSP_USING_TIM8_HWTIMER
|
||||
bool "Using TIM8 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM8_PWM
|
||||
bool "Using TIM8 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
|
||||
if BSP_USING_TIM8_PWM
|
||||
config BSP_USING_TIM8_PWM_CH1
|
||||
bool "Using TIM8 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM8_PWM_CH2
|
||||
bool "Using TIM8 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM8_PWM_CH3
|
||||
bool "Using TIM8 channel 3"
|
||||
|
||||
config BSP_USING_TIM8_PWM_CH4
|
||||
bool "Using TIM8 channel 4"
|
||||
endif
|
||||
|
||||
if BSP_USING_TIM8_HWTIMER && BSP_USING_TIM8_PWM
|
||||
comment "BSP_USING_TIM8_HWTIMER and BSP_USING_TIM8_PWM can only be chosen for one!"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM9
|
||||
bool "Using TIM9"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM9
|
||||
config BSP_USING_TIM9_HWTIMER
|
||||
bool "Using TIM9 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM9_PWM
|
||||
bool "Using TIM9 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
|
||||
if BSP_USING_TIM9_PWM
|
||||
config BSP_USING_TIM9_PWM_CH1
|
||||
bool "Using TIM9 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM9_PWM_CH2
|
||||
bool "Using TIM9 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM9_PWM_CH3
|
||||
bool "Using TIM9 channel 3"
|
||||
|
||||
config BSP_USING_TIM9_PWM_CH4
|
||||
bool "Using TIM9 channel 4"
|
||||
endif
|
||||
|
||||
if BSP_USING_TIM9_HWTIMER && BSP_USING_TIM9_PWM
|
||||
comment "BSP_USING_TIM9_HWTIMER and BSP_USING_TIM9_PWM can only be chosen for one!"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
config BSP_USING_TIM10
|
||||
bool "Using TIM10"
|
||||
default n
|
||||
|
||||
if BSP_USING_TIM10
|
||||
config BSP_USING_TIM10_HWTIMER
|
||||
bool "Using TIM10 as hwtimer mode"
|
||||
select BSP_USING_HWTIMER
|
||||
|
||||
config BSP_USING_TIM10_PWM
|
||||
bool "Using TIM10 as PWM mode"
|
||||
select BSP_USING_PWM
|
||||
|
||||
if BSP_USING_TIM10_PWM
|
||||
config BSP_USING_TIM10_PWM_CH1
|
||||
bool "Using TIM10 channel 1"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM10_PWM_CH2
|
||||
bool "Using TIM10 channel 2"
|
||||
default n
|
||||
|
||||
config BSP_USING_TIM10_PWM_CH3
|
||||
bool "Using TIM10 channel 3"
|
||||
|
||||
config BSP_USING_TIM10_PWM_CH4
|
||||
bool "Using TIM10 channel 4"
|
||||
endif
|
||||
|
||||
if BSP_USING_TIM10_HWTIMER && BSP_USING_TIM10_PWM
|
||||
comment "BSP_USING_TIM10_HWTIMER and BSP_USING_TIM10_PWM can only be chosen for one!"
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
|
|
@ -0,0 +1,18 @@
|
|||
import os
|
||||
import rtconfig
|
||||
from building import *
|
||||
|
||||
Import('SDK_LIB')
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
|
||||
# add general drivers
|
||||
src = Split('''
|
||||
board.c
|
||||
software_irq.c
|
||||
''')
|
||||
|
||||
path = [cwd]
|
||||
|
||||
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
|
||||
Return('group')
|
||||
|
|
@ -0,0 +1,74 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2022, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-08-23 liYony first version
|
||||
*/
|
||||
|
||||
#include "board.h"
|
||||
#include <stdint.h>
|
||||
#include "drv_usart.h"
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
extern uint32_t SystemCoreClock;
|
||||
|
||||
static uint32_t _SysTick_Config(rt_uint32_t ticks)
|
||||
{
|
||||
NVIC_SetPriority(SysTicK_IRQn, 0xf0);
|
||||
NVIC_SetPriority(Software_IRQn, 0xf0);
|
||||
NVIC_EnableIRQ(SysTicK_IRQn);
|
||||
NVIC_EnableIRQ(Software_IRQn);
|
||||
SysTick->CTLR = 0;
|
||||
SysTick->SR = 0;
|
||||
SysTick->CNT = 0;
|
||||
SysTick->CMP = ticks - 1;
|
||||
SysTick->CTLR = 0xF;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* This function will initial your board.
|
||||
*/
|
||||
void rt_hw_board_init()
|
||||
{
|
||||
/* System Tick Configuration */
|
||||
_SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
|
||||
|
||||
#if defined(RT_USING_USER_MAIN) && defined(RT_USING_HEAP)
|
||||
rt_system_heap_init((void *) HEAP_BEGIN, (void *) HEAP_END);
|
||||
#endif
|
||||
|
||||
/* USART driver initialization is open by default */
|
||||
#ifdef RT_USING_SERIAL
|
||||
rt_hw_usart_init();
|
||||
#endif
|
||||
#ifdef RT_USING_CONSOLE
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif
|
||||
#ifdef RT_USING_PIN
|
||||
/* pin must initialized before i2c */
|
||||
rt_hw_pin_init();
|
||||
#endif
|
||||
/* Call components board initial (use INIT_BOARD_EXPORT()) */
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
void SysTick_Handler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
GET_INT_SP();
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
SysTick->SR = 0;
|
||||
rt_tick_increase();
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
FREE_INT_SP();
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,36 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2022-08-23 liYony first version
|
||||
* 2024-01-06 GSunwinder add define LED pins
|
||||
*/
|
||||
|
||||
/* <<< Use Configuration Wizard in Context Menu >>> */
|
||||
#ifndef __BOARD_H__
|
||||
#define __BOARD_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "ch32v30x.h"
|
||||
#include "drv_gpio.h"
|
||||
#include "drv_pwm.h"
|
||||
|
||||
/* board configuration */
|
||||
#define SRAM_SIZE 64
|
||||
#define SRAM_END (0x20000000 + SRAM_SIZE * 1024)
|
||||
|
||||
extern int _ebss, _susrstack;
|
||||
#define HEAP_BEGIN ((void *)&_ebss)
|
||||
#define HEAP_END ((void *)&_susrstack)
|
||||
|
||||
/* defined the LED pin */
|
||||
#define LED_BLUE rt_pin_get("PB.4")
|
||||
#define LED_RED rt_pin_get("PA.15")
|
||||
|
||||
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#endif /* __BOARD_H__ */
|
||||
|
|
@ -0,0 +1,209 @@
|
|||
ENTRY( _start )
|
||||
|
||||
__stack_size = 2048;
|
||||
|
||||
PROVIDE( _stack_size = __stack_size );
|
||||
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 256K
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
|
||||
}
|
||||
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
|
||||
.init :
|
||||
{
|
||||
_sinit = .;
|
||||
. = ALIGN(4);
|
||||
KEEP(*(SORT_NONE(.init)))
|
||||
. = ALIGN(4);
|
||||
_einit = .;
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.vector :
|
||||
{
|
||||
*(.vector);
|
||||
. = ALIGN(64);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t.*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(4);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
. = ALIGN(4);
|
||||
|
||||
/* section information for modules */
|
||||
. = ALIGN(4);
|
||||
__rtmsymtab_start = .;
|
||||
KEEP(*(RTMSymTab))
|
||||
__rtmsymtab_end = .;
|
||||
. = ALIGN(4);
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(4);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
|
||||
. = ALIGN(4);
|
||||
|
||||
_etext = .;
|
||||
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.fini :
|
||||
{
|
||||
KEEP(*(SORT_NONE(.fini)))
|
||||
. = ALIGN(4);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
PROVIDE( _etext = . );
|
||||
PROVIDE( _eitcm = . );
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
|
||||
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
|
||||
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.ctors :
|
||||
{
|
||||
/* gcc uses crtbegin.o to find the start of
|
||||
the constructors, so we make sure it is
|
||||
first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not
|
||||
actually link against crtbegin.o; the
|
||||
linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it
|
||||
doesn't matter which directory crtbegin.o
|
||||
is in. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*crtbegin?.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
end of ctors marker and it must be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.dtors :
|
||||
{
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*crtbegin?.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.dalign :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data_vma = .);
|
||||
} >RAM AT>FLASH
|
||||
|
||||
.dlalign :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data_lma = .);
|
||||
} >FLASH AT>FLASH
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.data .data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
. = ALIGN(8);
|
||||
PROVIDE( __global_pointer$ = . + 0x800 );
|
||||
*(.sdata .sdata.*)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
. = ALIGN(8);
|
||||
*(.srodata.cst16)
|
||||
*(.srodata.cst8)
|
||||
*(.srodata.cst4)
|
||||
*(.srodata.cst2)
|
||||
*(.srodata .srodata.*)
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _edata = .);
|
||||
} >RAM AT>FLASH
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _sbss = .);
|
||||
*(.sbss*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.bss*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON*)
|
||||
. = ALIGN(4);
|
||||
PROVIDE( _ebss = .);
|
||||
} >RAM AT>FLASH
|
||||
|
||||
PROVIDE( _end = _ebss);
|
||||
PROVIDE( end = . );
|
||||
|
||||
.stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
|
||||
{
|
||||
PROVIDE( _heap_end = . );
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_susrstack = . );
|
||||
. = . + __stack_size;
|
||||
PROVIDE( _eusrstack = .);
|
||||
PROVIDE( __rt_rvstack = . );
|
||||
} >RAM
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2024, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2021-09-09 WCH the first version
|
||||
* 2023-01-04 WangShun Remove redundant files
|
||||
*/
|
||||
#include "rtconfig.h"
|
||||
#if defined (SOC_RISCV_SERIES_CH32V1)
|
||||
#include "ch32v10x.h"
|
||||
#elif defined (SOC_RISCV_SERIES_CH32V2)
|
||||
#include "ch32v20x.h"
|
||||
#elif defined (SOC_RISCV_SERIES_CH32V3)
|
||||
#include "ch32v30x.h"
|
||||
#else
|
||||
#error "CH32 architecture doesn't support!"
|
||||
#endif
|
||||
void rt_trigger_software_interrupt(void)
|
||||
{
|
||||
/*CH32V103 does not support systick software interrupt*/
|
||||
#if defined(SOC_RISCV_SERIES_CH32V1)
|
||||
NVIC_SetPendingIRQ(Software_IRQn);
|
||||
#else
|
||||
SysTick->CTLR |= (1 << 31);
|
||||
#endif
|
||||
}
|
||||
|
||||
void rt_hw_do_after_save_above(void)
|
||||
{
|
||||
__asm volatile ("li t0,0x20" );
|
||||
__asm volatile ("csrs 0x804, t0");
|
||||
/*CH32V103 does not support systick software interrupt*/
|
||||
#if defined(SOC_RISCV_SERIES_CH32V1)
|
||||
NVIC_ClearPendingIRQ(Software_IRQn);
|
||||
#else
|
||||
SysTick->CTLR &= ~(1 << 31);
|
||||
#endif
|
||||
}
|
||||
Binary file not shown.
|
After Width: | Height: | Size: 174 KiB |
Binary file not shown.
|
After Width: | Height: | Size: 193 KiB |
|
|
@ -0,0 +1,262 @@
|
|||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_CPUS_NR 1
|
||||
#define RT_ALIGN_SIZE 8
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_HOOK_USING_FUNC_PTR
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 512
|
||||
#define RT_USING_TIMER_SOFT
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 512
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
#define RT_USING_DEBUG
|
||||
#define RT_DEBUGING_COLOR
|
||||
#define RT_DEBUGING_CONTEXT
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_SMALL_MEM_AS_HEAP
|
||||
#define RT_USING_HEAP
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||
#define RT_VER_NUM 0x50100
|
||||
#define RT_BACKTRACE_LEVEL_MAX_NR 32
|
||||
#define RT_USING_HW_ATOMIC
|
||||
#define ARCH_RISCV
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
#define RT_USING_MSH
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 1024
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define MSH_USING_BUILT_IN_COMMANDS
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
#define FINSH_USING_OPTION_COMPLETION
|
||||
|
||||
/* DFS: device virtual file system */
|
||||
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_UNAMED_PIPE_NUMBER 64
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* C/C++ and POSIX layer */
|
||||
|
||||
/* ISO-ANSI C layer */
|
||||
|
||||
/* Timezone and Daylight Saving Time */
|
||||
|
||||
#define RT_LIBC_USING_LIGHT_TZ_DST
|
||||
#define RT_LIBC_TZ_DEFAULT_HOUR 8
|
||||
#define RT_LIBC_TZ_DEFAULT_MIN 0
|
||||
#define RT_LIBC_TZ_DEFAULT_SEC 0
|
||||
|
||||
/* POSIX (Portable Operating System Interface) layer */
|
||||
|
||||
|
||||
/* Interprocess Communication (IPC) */
|
||||
|
||||
|
||||
/* Socket is in the 'Network' category */
|
||||
|
||||
|
||||
/* Network */
|
||||
|
||||
|
||||
/* Memory protection */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* CYW43012 WiFi */
|
||||
|
||||
|
||||
/* BL808 WiFi */
|
||||
|
||||
|
||||
/* CYW43439 WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
|
||||
|
||||
|
||||
/* XML: Extensible Markup Language */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
/* LVGL: powerful and easy-to-use embedded GUI library */
|
||||
|
||||
|
||||
/* u8g2: a monochrome graphic library */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
/* enhanced kernel services */
|
||||
|
||||
|
||||
/* acceleration: Assembly language or algorithmic acceleration packages */
|
||||
|
||||
|
||||
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
|
||||
|
||||
|
||||
/* Micrium: Micrium software products porting for RT-Thread */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
/* sensors drivers */
|
||||
|
||||
|
||||
/* touch drivers */
|
||||
|
||||
|
||||
/* Kendryte SDK */
|
||||
|
||||
|
||||
/* AI packages */
|
||||
|
||||
|
||||
/* Signal Processing and Control Algorithm Packages */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* project laboratory */
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* entertainment: terminal games and other interesting software packages */
|
||||
|
||||
|
||||
/* Arduino libraries */
|
||||
|
||||
|
||||
/* Projects and Demos */
|
||||
|
||||
|
||||
/* Sensors */
|
||||
|
||||
|
||||
/* Display */
|
||||
|
||||
|
||||
/* Timing */
|
||||
|
||||
|
||||
/* Data Processing */
|
||||
|
||||
|
||||
/* Data Storage */
|
||||
|
||||
/* Communication */
|
||||
|
||||
|
||||
/* Device Control */
|
||||
|
||||
|
||||
/* Other */
|
||||
|
||||
|
||||
/* Signal IO */
|
||||
|
||||
|
||||
/* Uncategorized */
|
||||
|
||||
#define SOC_RISCV_FAMILY_CH32
|
||||
#define SOC_RISCV_SERIES_CH32V3
|
||||
|
||||
/* Hardware Drivers Config */
|
||||
|
||||
#define SOC_CH32V307VC
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_UART1
|
||||
#define LSI_VALUE 39000
|
||||
|
||||
/* Board extended module Drivers */
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,70 @@
|
|||
import os
|
||||
ARCH = 'risc-v'
|
||||
CPU = 'ch32'
|
||||
# toolchains options
|
||||
CROSS_TOOL = 'gcc'
|
||||
|
||||
#------- toolchains path -------------------------------------------------------
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'/opt/MRS_Toolchain_Linux_x64_V1.90/RISC-V_Embedded_GCC/bin/'
|
||||
else:
|
||||
print('Please make sure your toolchains is GNU GCC!')
|
||||
exit(0)
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
#BUILD = 'release'
|
||||
|
||||
CORE = 'risc-v'
|
||||
MAP_FILE = 'rtthread.map'
|
||||
LINK_FILE = './board/linker_scripts/link.lds'
|
||||
TARGET_NAME = 'rtthread.bin'
|
||||
|
||||
#------- GCC settings ----------------------------------------------------------
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
PREFIX = 'riscv-none-embed-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX= PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -march=rv32imac -mabi=ilp32 -DUSE_PLIC -DUSE_M_TIME -DNO_INIT -mcmodel=medany -msmall-data-limit=8 -L. -nostartfiles -lc '
|
||||
CFLAGS = DEVICE
|
||||
CFLAGS += ' -save-temps=obj'
|
||||
AFLAGS = '-c'+ DEVICE + ' -x assembler-with-cpp'
|
||||
LFLAGS = DEVICE
|
||||
LFLAGS += ' -Wl,--gc-sections,-cref,-Map=' + MAP_FILE
|
||||
LFLAGS += ' -T ' + LINK_FILE
|
||||
AFLAGS += ' -I.'
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -g3'
|
||||
AFLAGS += ' -g3'
|
||||
else:
|
||||
CFLAGS += ' -O2'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET ' + TARGET_NAME + '\n'
|
||||
POST_ACTION += SIZE + ' $TARGET\n'
|
||||
|
||||
def dist_handle(BSP_ROOT, dist_dir):
|
||||
import sys
|
||||
cwd_path = os.getcwd()
|
||||
sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
|
||||
from sdk_dist import dist_do_building
|
||||
dist_do_building(BSP_ROOT, dist_dir)
|
||||
Loading…
Reference in New Issue