[bsp][hmi-board] Optimize hardware driver configuration and trim the project file volume
This commit is contained in:
kurisaw
Rbb666
parent
e0155f47a6
commit
d5e2df46e5
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@ -134,6 +134,15 @@ void hal_entry(void)
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1. [下载灵活配置软件包 (FSP) | Renesas](https://www.renesas.com/cn/zh/software-tool/flexible-software-package-fsp)，请使用 FSP 4.4.0 版本
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2. 请查看文档：[使用瑞萨 FSP 配置工具](./docs/使用瑞萨FSP配置工具.md)。在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。
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目前仓库 bsp 默认使能最小体量配置，用户可通过如下步骤使能 env 外设配置：
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1. 在 bsp 目录下打开 env 工具，使用 `scons --target=mdk5`命令生成 MDK 工程。
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2. 打开 bsp 目录下的`project.uvprojx`文件，选择上方导航栏的 `Software Components`配置，打开后找到`Flex Software`下的`RA Configuration`旁的配置按钮，该操作会自动查找当前电脑环境下安装的 fsp 版本，选择指定版本后进入 fsp。
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3. 在进入 fsp 后我们可以发现，已经存在了一些已经配置完成的外设，此时我们点击`Generate Project Content`按钮即可生成所需驱动文件。
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4. 接下来回到 env，使能所需的外设配置后保存退出即可。
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**ENV 配置**
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- 如何使用 ENV 工具：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/#/development-tools/env/env)
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@ -503,7 +503,14 @@ struct rt_mmcsd_host *sdio_host_create(struct ra_sdhi *sdhi_des)
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int rt_hw_sdhi_init(void)
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{
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#if defined(BSP_USING_SDHI0)
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sdhi.instance = &g_sdmmc0;
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#elif defined(BSP_USING_SDHI1)
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sdhi.instance = &g_sdmmc1;
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#else
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#error "please defined the g_sdmmc handle"
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#endif
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sdhi.instance->p_api->open(sdhi.instance->p_ctrl, sdhi.instance->p_cfg);
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host = sdio_host_create(&sdhi);
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if (host == RT_NULL)
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@ -138,6 +138,15 @@ void hal_entry(void)
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3. 如何将 **板级支持包**添加到 FSP 中，请参考文档[如何导入板级支持包](https://www2.renesas.cn/cn/zh/document/gde/1596896?language=zh&r=1596841)
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4. 请查看文档：[使用瑞萨 FSP 配置工具](./docs/使用瑞萨FSP配置工具.md)。在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。
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目前仓库 bsp 默认使能最小体量配置，用户可通过如下步骤使能 env 外设配置：
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1. 在 bsp 目录下打开 env 工具，使用 `scons --target=mdk5`命令生成 MDK 工程。
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2. 打开 bsp 目录下的`project.uvprojx`文件，选择上方导航栏的 `Software Components`配置，打开后找到`Flex Software`下的`RA Configuration`旁的配置按钮，该操作会自动查找当前电脑环境下安装的 fsp 版本，选择指定版本后进入 fsp。
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3. 在进入 fsp 后我们可以发现，已经存在了一些已经配置完成的外设，此时我们点击`Generate Project Content`按钮即可生成所需驱动文件。
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4. 接下来回到 env，使能所需的外设配置后保存退出即可。
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**ENV 配置**
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- 如何使用 ENV 工具：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/#/development-tools/env/env)
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@ -150,7 +159,6 @@ void hal_entry(void)
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3. 输入`pkgs --update`命令更新软件包。
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4. 输入`scons --target=mdk5` 命令重新生成工程。
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## FAQ
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### 使用 MDK 的 DEBUG 时如果遇到提示 “Error: Flash Download failed Cortex-M23” 怎么办？
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@ -130,7 +130,18 @@ void hal_entry(void)
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- [RA4M2数据手册](https://bbs.elecfans.com/forum.php?mod=attachment&aid=MTIwMDQxNnxjOTJiOTgyOHwxNjcwNDY2MTg2fDU5NTQxMXwyMzEyNjc4)
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**FSP 配置**
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请查看 [RA-Eco-RA4M2-100PIN开发板资料](https://bbs.elecfans.com/jishu_2312678_1_1.html) 及官网和bsp/renesas/docs中的相关文档
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目前仓库 bsp 默认使能最小体量配置，用户可通过如下步骤使能 env 外设配置：
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1. 在 bsp 目录下打开 env 工具，使用 `scons --target=mdk5`命令生成 MDK 工程。
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2. 打开 bsp 目录下的`project.uvprojx`文件，选择上方导航栏的 `Software Components`配置，打开后找到`Flex Software`下的`RA Configuration`旁的配置按钮，该操作会自动查找当前电脑环境下安装的 fsp 版本，选择指定版本后进入 fsp。
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3. 在进入 fsp 后我们可以发现，已经存在了一些已经配置完成的外设，此时我们点击`Generate Project Content`按钮即可生成所需驱动文件。
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4. 接下来回到 env，使能所需的外设配置后保存退出即可。
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**ENV 配置**
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- 如何使用 ENV 工具：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/#/development-tools/env/env)
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@ -143,7 +154,6 @@ void hal_entry(void)
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3. 输入`pkgs --update`命令更新软件包。
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4. 输入`scons --target=mdk5` 命令重新生成工程。
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## FAQ
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### 使用 MDK 的 DEBUG 时如果遇到提示 “Error: Flash Download failed Cortex-M33” 怎么办？
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@ -138,6 +138,15 @@ void hal_entry(void)
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3. 如何将 **”EK-RA6M3板级支持包“**添加到 FSP 中，请参考文档[如何导入板级支持包](https://www2.renesas.cn/document/ppt/1527171?language=zh&r=1527191)
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4. 请查看文档：[使用 FSP 配置外设驱动](../docs/RA系列使用FSP配置外设驱动.md)，在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。
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目前仓库 bsp 默认使能最小体量配置，用户可通过如下步骤使能 env 外设配置：
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1. 在 bsp 目录下打开 env 工具，使用 `scons --target=mdk5`命令生成 MDK 工程。
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2. 打开 bsp 目录下的`project.uvprojx`文件，选择上方导航栏的 `Software Components`配置，打开后找到`Flex Software`下的`RA Configuration`旁的配置按钮，该操作会自动查找当前电脑环境下安装的 fsp 版本，选择指定版本后进入 fsp。
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3. 在进入 fsp 后我们可以发现，已经存在了一些已经配置完成的外设，此时我们点击`Generate Project Content`按钮即可生成所需驱动文件。
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4. 接下来回到 env，使能所需的外设配置后保存退出即可。
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**ENV 配置**
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- 如何使用 ENV 工具：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/#/development-tools/env/env)
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@ -9,6 +9,50 @@ menu "Hardware Drivers Config"
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menu "Onboard Peripheral Drivers"
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menuconfig BSP_USING_FS
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bool "Enable File System"
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select RT_USING_DFS
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default n
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if BSP_USING_FS
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config BSP_USING_SDCARD_FATFS
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bool "Enable SDCARD (FATFS)"
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select BSP_USING_SPI
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select BSP_USING_SPI1
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select RT_USING_SPI_MSD
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select RT_USING_DFS_ELMFAT
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default n
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endif
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config BSP_USING_SPI_LCD
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bool "Enable SPI LCD"
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select BSP_USING_GPIO
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select BSP_USING_SPI
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select BSP_USING_SPI0
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default n
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menuconfig BSP_USING_LVGL
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bool "Enable LVGL for LCD"
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select PKG_USING_LVGL
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default n
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if BSP_USING_LVGL
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config BSP_USING_LCD_ILI9431
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bool "Enable LVGL for LCD_ILI9431"
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select PKG_USING_ILI9341
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select BSP_USING_SPI_LCD
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default n
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config BSP_USING_LCD_RGB
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bool "Enable LVGL for LCD_RGB565"
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select BSP_USING_LCD
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default n
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config BSP_USING_LVGL_DEMO
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bool "Enable LVGL demo"
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select PKG_USING_LV_MUSIC_DEMO
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default y
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endif
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endmenu
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menu "On-chip Peripheral Drivers"
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@ -82,21 +126,6 @@ menu "Hardware Drivers Config"
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endif
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endif
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menuconfig BSP_USING_FS
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bool "Enable File System"
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select RT_USING_DFS
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default n
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if BSP_USING_FS
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config BSP_USING_SDCARD_FATFS
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bool "Enable SDCARD (FATFS)"
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select BSP_USING_SPI
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select BSP_USING_SPI1
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select RT_USING_SPI_MSD
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select RT_USING_DFS_ELMFAT
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default n
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endif
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menuconfig BSP_USING_PWM
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bool "Enable PWM"
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default n
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@ -120,11 +149,6 @@ menu "Hardware Drivers Config"
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default n
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endif
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config BSP_USING_LCD
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bool "Enable LCD"
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select BSP_USING_GPIO
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default n
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menuconfig BSP_USING_SCI_SPI
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bool "Enable SCI SPI BUS"
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default n
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@ -160,13 +184,6 @@ menu "Hardware Drivers Config"
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default n
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endif
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config BSP_USING_SPI_LCD
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bool "Enable SPI LCD"
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select BSP_USING_GPIO
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select BSP_USING_SPI
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select BSP_USING_SPI0
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default n
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config BSP_USING_ETH
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bool "Enable Ethernet"
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select RT_USING_SAL
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@ -174,28 +191,10 @@ menu "Hardware Drivers Config"
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select RT_USING_NETDEV
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default n
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menuconfig BSP_USING_LVGL
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bool "Enable LVGL for LCD"
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select PKG_USING_LVGL
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config BSP_USING_LCD
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bool "Enable LCD"
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select BSP_USING_GPIO
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default n
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if BSP_USING_LVGL
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config BSP_USING_LCD_ILI9431
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bool "Enable LVGL for LCD_ILI9431"
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select PKG_USING_ILI9341
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select BSP_USING_SPI_LCD
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default n
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config BSP_USING_LCD_RGB
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bool "Enable LVGL for LCD_RGB565"
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select BSP_USING_LCD
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default n
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endif
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if BSP_USING_LVGL
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config BSP_USING_LVGL_DEMO
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bool "Enable LVGL demo"
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select PKG_USING_LV_MUSIC_DEMO
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default y
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endif
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endmenu
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@ -9,6 +9,7 @@
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CONFIG_RT_NAME_MAX=8
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# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
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# CONFIG_RT_USING_SMART is not set
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# CONFIG_RT_USING_NANO is not set
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# CONFIG_RT_USING_AMP is not set
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# CONFIG_RT_USING_SMP is not set
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CONFIG_RT_CPUS_NR=1
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@ -21,6 +22,7 @@ CONFIG_RT_TICK_PER_SECOND=1000
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CONFIG_RT_USING_OVERFLOW_CHECK=y
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CONFIG_RT_USING_HOOK=y
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CONFIG_RT_HOOK_USING_FUNC_PTR=y
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# CONFIG_RT_USING_HOOKLIST is not set
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CONFIG_RT_USING_IDLE_HOOK=y
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CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
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CONFIG_IDLE_THREAD_STACK_SIZE=256
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@ -38,7 +40,7 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
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CONFIG_RT_USING_DEBUG=y
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CONFIG_RT_DEBUGING_COLOR=y
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CONFIG_RT_DEBUGING_CONTEXT=y
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CONFIG_RT_DEBUGING_INIT=y
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# CONFIG_RT_DEBUGING_AUTO_INIT is not set
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#
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# Inter-Thread communication
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@ -69,11 +71,13 @@ CONFIG_RT_USING_HEAP=y
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CONFIG_RT_USING_DEVICE=y
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# CONFIG_RT_USING_DEVICE_OPS is not set
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# CONFIG_RT_USING_INTERRUPT_INFO is not set
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# CONFIG_RT_USING_THREDSAFE_PRINTF is not set
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_CONSOLEBUF_SIZE=128
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CONFIG_RT_CONSOLE_DEVICE_NAME="uart9"
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CONFIG_RT_VER_NUM=0x50100
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# CONFIG_RT_USING_STDC_ATOMIC is not set
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CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
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# CONFIG_RT_USING_CACHE is not set
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CONFIG_RT_USING_HW_ATOMIC=y
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# CONFIG_ARCH_ARM_BOOTWITH_FLUSH_CACHE is not set
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@ -210,6 +214,12 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_RT_USING_LWIP is not set
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# CONFIG_RT_USING_AT is not set
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#
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# Memory protection
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#
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# CONFIG_RT_USING_MEM_PROTECTION is not set
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# CONFIG_RT_USING_HW_STACK_GUARD is not set
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#
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# Utilities
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#
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@ -222,11 +232,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_RT_USING_RT_LINK is not set
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# CONFIG_RT_USING_VBUS is not set
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#
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# Memory management
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#
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# CONFIG_RT_USING_MEMBLOCK is not set
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#
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# RT-Thread Utestcases
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#
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@ -272,6 +277,16 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CYW43012 WiFi
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#
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# CONFIG_PKG_USING_WLAN_CYW43012 is not set
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#
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# BL808 WiFi
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#
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# CONFIG_PKG_USING_WLAN_BL808 is not set
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#
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# CYW43439 WiFi
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#
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# CONFIG_PKG_USING_WLAN_CYW43439 is not set
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# CONFIG_PKG_USING_COAP is not set
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# CONFIG_PKG_USING_NOPOLL is not set
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# CONFIG_PKG_USING_NETUTILS is not set
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@ -293,7 +308,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_JIOT-C-SDK is not set
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# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
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# CONFIG_PKG_USING_JOYLINK is not set
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# CONFIG_PKG_USING_EZ_IOT_OS is not set
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# CONFIG_PKG_USING_IOTSHARP_SDK is not set
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# CONFIG_PKG_USING_NIMBLE is not set
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# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
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@ -315,6 +329,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_PDULIB is not set
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# CONFIG_PKG_USING_BTSTACK is not set
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# CONFIG_PKG_USING_BT_CYW43012 is not set
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# CONFIG_PKG_USING_CYW43XX is not set
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# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
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# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
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# CONFIG_PKG_USING_MAVLINK is not set
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@ -335,6 +350,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_WOL is not set
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# CONFIG_PKG_USING_ZEPHYR_POLLING is not set
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# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
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# CONFIG_PKG_USING_LHC_MODBUS is not set
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#
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# security packages
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@ -535,6 +551,9 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_MLIBC is not set
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# CONFIG_PKG_USING_TASK_MSG_BUS is not set
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# CONFIG_PKG_USING_SFDB is not set
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# CONFIG_PKG_USING_RTP is not set
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# CONFIG_PKG_USING_REB is not set
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# CONFIG_PKG_USING_R_RHEALSTONE is not set
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#
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# peripheral libraries and drivers
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@ -701,6 +720,10 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_BT_ECB02C is not set
|
||||
# CONFIG_PKG_USING_UAT is not set
|
||||
# CONFIG_PKG_USING_ST7789 is not set
|
||||
# CONFIG_PKG_USING_VS1003 is not set
|
||||
# CONFIG_PKG_USING_X9555 is not set
|
||||
# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
|
||||
# CONFIG_PKG_USING_BT_MX01 is not set
|
||||
# CONFIG_PKG_USING_SPI_TOOLS is not set
|
||||
|
||||
#
|
||||
|
|
@ -715,6 +738,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ULAPACK is not set
|
||||
# CONFIG_PKG_USING_QUEST is not set
|
||||
# CONFIG_PKG_USING_NAXOS is not set
|
||||
# CONFIG_PKG_USING_R_TINYMAIX is not set
|
||||
|
||||
#
|
||||
# Signal Processing and Control Algorithm Packages
|
||||
|
|
@ -756,12 +780,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_DONUT is not set
|
||||
# CONFIG_PKG_USING_COWSAY is not set
|
||||
# CONFIG_PKG_USING_MORSE is not set
|
||||
# CONFIG_PKG_USING_TINYSQUARE is not set
|
||||
# CONFIG_PKG_USING_LIBCSV is not set
|
||||
# CONFIG_PKG_USING_OPTPARSE is not set
|
||||
# CONFIG_PKG_USING_FASTLZ is not set
|
||||
# CONFIG_PKG_USING_MINILZO is not set
|
||||
# CONFIG_PKG_USING_QUICKLZ is not set
|
||||
# CONFIG_PKG_USING_LZMA is not set
|
||||
# CONFIG_PKG_USING_RALARAM is not set
|
||||
# CONFIG_PKG_USING_MULTIBUTTON is not set
|
||||
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
|
||||
# CONFIG_PKG_USING_CANFESTIVAL is not set
|
||||
|
|
@ -799,6 +825,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
#
|
||||
# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
|
||||
|
||||
|
|
@ -806,13 +833,13 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# Sensors
|
||||
#
|
||||
# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set
|
||||
# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31855 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set
|
||||
|
|
@ -857,7 +884,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set
|
||||
# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MSA301 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set
|
||||
|
|
@ -896,7 +923,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set
|
||||
|
|
@ -919,7 +945,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set
|
||||
# CONFIG_PKG_USING_SEEED_ITG3200 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_ITG3200 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set
|
||||
|
|
@ -927,7 +953,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set
|
||||
# CONFIG_PKG_USING_SEEED_MP503 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_MP503 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set
|
||||
|
|
@ -940,6 +966,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
|
||||
|
||||
#
|
||||
# Display
|
||||
|
|
@ -981,11 +1008,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
#
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TPA2016 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DRV2605 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
|
||||
|
||||
#
|
||||
# Other
|
||||
|
|
@ -1014,6 +1041,7 @@ CONFIG_SOC_SERIES_R7FA6M3=y
|
|||
# CONFIG_SOC_SERIES_R7FA2L1 is not set
|
||||
# CONFIG_SOC_SERIES_R7FA6M5 is not set
|
||||
# CONFIG_SOC_SERIES_R7FA4M2 is not set
|
||||
# CONFIG_SOC_SERIES_R7FA8M85 is not set
|
||||
|
||||
#
|
||||
# Hardware Drivers Config
|
||||
|
|
@ -1023,6 +1051,10 @@ CONFIG_SOC_R7FA6M4AF=y
|
|||
#
|
||||
# Onboard Peripheral Drivers
|
||||
#
|
||||
# CONFIG_BSP_USING_ARDUINO is not set
|
||||
# CONFIG_BSP_USING_FS is not set
|
||||
# CONFIG_BSP_USING_SPI_LCD is not set
|
||||
# CONFIG_BSP_USING_LVGL is not set
|
||||
|
||||
#
|
||||
# On-chip Peripheral Drivers
|
||||
|
|
@ -1041,17 +1073,16 @@ CONFIG_BSP_UART9_TX_BUFSIZE=0
|
|||
# CONFIG_BSP_USING_SCI_SPI is not set
|
||||
# CONFIG_BSP_USING_SCI is not set
|
||||
# CONFIG_BSP_USING_SPI is not set
|
||||
# CONFIG_BSP_USING_FS is not set
|
||||
# CONFIG_BSP_USING_SDHI is not set
|
||||
# CONFIG_BSP_USING_SOFT_I2C is not set
|
||||
# CONFIG_BSP_USING_ADC is not set
|
||||
# CONFIG_BSP_USING_DAC is not set
|
||||
# CONFIG_BSP_USING_PWM is not set
|
||||
# CONFIG_BSP_USING_SDHI is not set
|
||||
# CONFIG_BSP_USING_CAN is not set
|
||||
# CONFIG_BSP_USING_LCD is not set
|
||||
# CONFIG_BSP_USING_SPI_LCD is not set
|
||||
# CONFIG_BSP_USING_G2D is not set
|
||||
# CONFIG_BSP_USING_JPEG is not set
|
||||
# CONFIG_BSP_USING_ETH is not set
|
||||
# CONFIG_BSP_USING_LVGL is not set
|
||||
# CONFIG_BSP_USING_LVGL_DEMO is not set
|
||||
# CONFIG_BSP_USING_LCD is not set
|
||||
|
||||
#
|
||||
# Board extended module Drivers
|
||||
|
|
|
|||
|
|
@ -1,24 +1,43 @@
|
|||
#Wed Jan 10 09:43:46 CST 2024
|
||||
#Thu Feb 01 19:29:48 CST 2024
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#fsp\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#fsp\#\#\#\#3.5.0/all=143358381,ra/fsp/src/bsp/mcu/ra6m3/bsp_elc.h|3427620923,ra/fsp/src/bsp/mcu/ra6m3/bsp_mcu_info.h|2743353138,ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sdhi\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_glcdc\#\#\#\#3.5.0/all=2184024064,ra/fsp/inc/api/r_display_api.h|2697709197,ra/fsp/inc/instances/r_glcdc.h|652452323,ra/fsp/src/r_glcdc/r_glcdc.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_drw\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_adc\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.sdmmc_on_sdmmc.772252884=false
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/all=2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|4222527282,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|4051445857,ra/fsp/src/bsp/mcu/all/bsp_common.h|1728953905,ra/fsp/inc/fsp_features.h|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|2847966430,ra/fsp/src/bsp/mcu/all/bsp_security.c|1939984091,ra/fsp/inc/api/r_ioport_api.h|3255765648,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|3998046333,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|460577388,ra/fsp/src/bsp/mcu/all/bsp_io.h|2425160085,ra/fsp/inc/api/bsp_api.h|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|470601830,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|3606266210,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|546480625,ra/fsp/inc/fsp_common_api.h|3549961311,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|1499520276,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|3753300083,ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h|3297195641,ra/fsp/inc/fsp_version.h|3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|2208590403,ra/fsp/inc/instances/r_ioport.h|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|1353647784,ra/fsp/src/bsp/mcu/all/bsp_delay.c|731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|2386285210,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|1904866635,ra/fsp/src/bsp/mcu/all/bsp_clocks.h|3492513568,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|1236602439,ra/fsp/src/bsp/mcu/all/bsp_io.c|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_gpt\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_gpt\#\#\#\#3.5.0/all=2886639616,ra/fsp/inc/instances/r_gpt.h|1958999550,ra/fsp/src/r_gpt/r_gpt.c|232390045,ra/fsp/inc/api/r_timer_api.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/all=302860276,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|1577199483,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|3127123217,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|3911746910,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|1044777225,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|965562395,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|1441545198,ra/arm/CMSIS_5/LICENSE.txt|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|1494441116,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|1564341101,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|2701379970,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|2718020009,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|3552689244,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h|3358993753,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|304461792,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|3898569239,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|1168186370,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|3163610011,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|364344841,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|2381390623,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_jpeg\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#custom\#\#\#\#3.5.0/all=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_dmac\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_adc\#\#\#\#3.5.0/all=1675086128,ra/fsp/inc/api/r_adc_api.h|4250819551,ra/fsp/inc/instances/r_adc.h|1515334001,ra/fsp/inc/api/r_elc_api.h|1610456547,ra/fsp/inc/api/r_transfer_api.h|377989633,ra/fsp/src/r_adc/r_adc.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#fsp\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ether\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.drw.2023623840=false
|
||||
com.renesas.cdt.ddsc.content/com.renesas.cdt.ddsc.content.defaultlinkerscript=script/fsp.scat
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ether_phy\#\#\#\#3.5.0/all=1059783364,ra/fsp/inc/instances/r_ether_phy.h|4014538643,ra/fsp/src/r_ether_phy/targets/KSZ8041/r_ether_phy_target_ksz8041.c|451576276,ra/fsp/src/r_ether_phy/r_ether_phy.c|809828733,ra/fsp/src/r_ether_phy/targets/KSZ8091RNB/r_ether_phy_target_ksz8091rnb.c|180607401,ra/fsp/src/r_ether_phy/targets/DP83620/r_ether_phy_target_dp83620.c|2050444946,ra/fsp/inc/api/r_ether_phy_api.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#fsp\#\#\#\#3.5.0/all=143358381,ra/fsp/src/bsp/mcu/ra6m3/bsp_elc.h|2743353138,ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h|3427620923,ra/fsp/src/bsp/mcu/ra6m3/bsp_mcu_info.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ether_phy\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_glcdc\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_drw\#\#\#\#3.5.0/all=3233980366,ra/fsp/src/r_drw/r_drw_base.h|1769767553,ra/fsp/src/r_drw/r_drw_irq.c|954903398,ra/fsp/src/r_drw/r_drw_memory.c|2504224105,ra/fsp/src/r_drw/r_drw_base.c
|
||||
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.552817864=false
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#Common\#\#all\#\#fsp_common\#\#\#\#3.5.0/all=470601830,ra/fsp/src/bsp/mcu/all/bsp_clocks.c|2847966430,ra/fsp/src/bsp/mcu/all/bsp_security.c|2208590403,ra/fsp/inc/instances/r_ioport.h|4222527282,ra/fsp/src/bsp/mcu/all/bsp_module_stop.h|1992062042,ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h|2425160085,ra/fsp/inc/api/bsp_api.h|521902797,ra/fsp/src/bsp/mcu/all/bsp_security.h|4051445857,ra/fsp/src/bsp/mcu/all/bsp_common.h|2920829723,ra/fsp/src/bsp/mcu/all/bsp_guard.c|400573940,ra/fsp/src/bsp/mcu/all/bsp_register_protection.h|1552630912,ra/fsp/src/bsp/mcu/all/bsp_guard.h|731782070,ra/fsp/src/bsp/mcu/all/bsp_irq.h|2906400,ra/fsp/src/bsp/mcu/all/bsp_common.c|1499520276,ra/fsp/src/bsp/mcu/all/bsp_group_irq.c|3492513568,ra/fsp/src/bsp/mcu/all/bsp_register_protection.c|2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h|1236602439,ra/fsp/src/bsp/mcu/all/bsp_io.c|3297195641,ra/fsp/inc/fsp_version.h|546480625,ra/fsp/inc/fsp_common_api.h|3998046333,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h|460577388,ra/fsp/src/bsp/mcu/all/bsp_io.h|1728953905,ra/fsp/inc/fsp_features.h|3983299396,ra/fsp/src/bsp/mcu/all/bsp_delay.h|3255765648,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c|1615019982,ra/fsp/src/bsp/mcu/all/bsp_sbrk.c|2386285210,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h|2977689308,ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h|3753300083,ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h|1353647784,ra/fsp/src/bsp/mcu/all/bsp_delay.c|3606266210,ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c|3984836408,ra/fsp/src/bsp/mcu/all/bsp_group_irq.h|1630997354,ra/fsp/src/bsp/mcu/all/bsp_irq.c|3549961311,ra/fsp/src/bsp/mcu/all/bsp_tfu.h|1939984091,ra/fsp/inc/api/r_ioport_api.h|568600546,ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c|1904866635,ra/fsp/src/bsp/mcu/all/bsp_clocks.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ether\#\#\#\#3.5.0/all=1270768113,ra/fsp/inc/api/r_ether_api.h|1142959831,ra/fsp/inc/instances/r_ether.h|3906530552,ra/fsp/src/r_ether/r_ether.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#device\#\#R7FA6M3AH3CFB\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_gpt\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.settingseditor/com.renesas.cdt.ddsc.settingseditor.active_page=SWPConfigurator
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_gpt\#\#\#\#3.5.0/all=1958999550,ra/fsp/src/r_gpt/r_gpt.c|2886639616,ra/fsp/inc/instances/r_gpt.h|232390045,ra/fsp/inc/api/r_timer_api.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/all=965562395,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_gcc.h|1494441116,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv7.h|2701379970,ra/arm/CMSIS_5/CMSIS/Core/Include/mpu_armv8.h|1577199483,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_iccarm.h|1017116116,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h|1372010515,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm23.h|3163610011,ra/arm/CMSIS_5/CMSIS/Core/Include/pmu_armv8.h|2327633156,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc000.h|2635219934,ra/arm/CMSIS_5/CMSIS/Core/Include/tz_context.h|1564341101,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm7.h|3007265674,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mbl.h|3911746910,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang_ltm.h|4290386133,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0plus.h|1745843273,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm0.h|1441545198,ra/arm/CMSIS_5/LICENSE.txt|2851112248,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm1.h|364344841,ra/arm/CMSIS_5/CMSIS/Core/Include/core_sc300.h|2381390623,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv8mml.h|3358993753,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm4.h|304461792,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm3.h|2333906976,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_version.h|3898569239,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h|1168186370,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm55.h|2718020009,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm33.h|3127123217,ra/arm/CMSIS_5/CMSIS/Core/Include/core_cm35p.h|1044777225,ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h|3552689244,ra/arm/CMSIS_5/CMSIS/Core/Include/core_armv81mml.h|302860276,ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h
|
||||
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.ether_on_ether.803249625=false
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#device\#\#\#\#3.5.0/all=2308894280,ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#custom\#\#\#\#3.5.0/all=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_adc\#\#\#\#3.5.0/all=1675086128,ra/fsp/inc/api/r_adc_api.h|1515334001,ra/fsp/inc/api/r_elc_api.h|1610456547,ra/fsp/inc/api/r_transfer_api.h|4250819551,ra/fsp/inc/instances/r_adc.h|377989633,ra/fsp/src/r_adc/r_adc.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/all=1939984091,ra/fsp/inc/api/r_ioport_api.h|2208590403,ra/fsp/inc/instances/r_ioport.h|3254285722,ra/fsp/src/r_ioport/r_ioport.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/all=2208590403,ra/fsp/inc/instances/r_ioport.h|1939984091,ra/fsp/inc/api/r_ioport_api.h|3254285722,ra/fsp/src/r_ioport/r_ioport.c
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#ra6m3\#\#device\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/all=3094200246,ra/fsp/src/r_sci_uart/r_sci_uart.c|1610456547,ra/fsp/inc/api/r_transfer_api.h|1889256766,ra/fsp/inc/instances/r_sci_uart.h|3916852077,ra/fsp/inc/api/r_uart_api.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#TES\#\#all\#\#dave2d\#\#\#\#3.8.0+fsp.3.5.0/all=2215077823,ra/tes/dave2d/src/dave_rbuffer.c|3704715329,ra/tes/dave2d/src/dave_memory.c|3149640059,ra/tes/dave2d/src/dave_memory.h|1272314146,ra/tes/dave2d/src/dave_utility.h|1667194484,ra/tes/dave2d/src/dave_texture.c|19256155,ra/tes/dave2d/src/dave_rbuffer.h|854854709,ra/tes/dave2d/src/dave_utility.c|2705060082,ra/tes/dave2d/src/dave_wedge.c|3240215282,ra/tes/dave2d/src/dave_wedge.h|3259479650,ra/tes/dave2d/inc/dave_types.h|3336375023,ra/tes/dave2d/inc/dave_driver.h|664191450,ra/tes/dave2d/src/dave_base.c|1880348197,ra/tes/dave2d/src/dave_box.c|4274014154,ra/tes/dave2d/inc/dave_base.h|505727753,ra/tes/dave2d/src/dave_circle.h|2339698747,ra/tes/dave2d/src/dave_driver.c|1842111830,ra/tes/dave2d/src/dave_circle.c|2550235696,ra/tes/dave2d/src/dave_64bitoperation.c|3002603095,ra/tes/dave2d/src/dave_texture.h|3061592116,ra/tes/dave2d/src/dave_polyline.c|1870326063,ra/tes/dave2d/src/dave_line.h|3157839062,ra/tes/dave2d/src/dave_polyline.h|1157276490,ra/tes/dave2d/src/dave_box.h|2824134536,ra/tes/dave2d/src/dave_context.h|3457567489,ra/tes/dave2d/src/dave_dlist.h|1070173993,ra/tes/dave2d/src/dave_line.c|2044860670,ra/tes/dave2d/src/dave_context.c|650027296,ra/tes/dave2d/src/dave_dlist.c|780382921,ra/tes/dave2d/inc/dave_errorcodes.h|326743887,ra/tes/dave2d/src/dave_pattern.c|1058031483,ra/tes/dave2d/src/dave_hardware.c|3811113047,ra/tes/dave2d/src/dave_registermap.h|2548764085,ra/tes/dave2d/src/dave_pattern.h|1138885174,ra/tes/dave2d/src/dave_hardware.h|113917492,ra/tes/dave2d/src/dave_render.c|635745031,ra/tes/dave2d/src/dave_perfcount.c|2658601565,ra/tes/dave2d/src/dave_intern.h|1572823813,ra/tes/dave2d/src/dave_errorcodes.c|1996099915,ra/tes/dave2d/src/dave_render.h|2458077439,ra/tes/dave2d/src/dave_triangle.c|736824288,ra/tes/dave2d/src/dave_viewport.c|2967595566,ra/tes/dave2d/src/dave_quad.c|1797619041,ra/tes/dave2d/src/dave_blit.c|3700209682,ra/tes/dave2d/src/dave_triangle.h|1596456334,ra/tes/dave2d/src/dave_math.c|1305118771,ra/tes/dave2d/src/dave_quad.h|957747704,ra/tes/dave2d/src/dave_curve.c|2723427531,ra/tes/dave2d/src/dave_curve.h|2697296305,ra/tes/dave2d/src/dave_edge.h|841632015,ra/tes/dave2d/src/dave_viewport.h|1742818937,ra/tes/dave2d/src/dave_edge.c|1024774572,ra/tes/dave2d/inc/dave_math.h|4022437848,ra/tes/dave2d/src/dave_triarray.h|1181118735,ra/tes/dave2d/src/dave_gradient.c|2742308643,ra/tes/dave2d/src/dave_gradient.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sci_uart\#\#\#\#3.5.0/all=1889256766,ra/fsp/inc/instances/r_sci_uart.h|3916852077,ra/fsp/inc/api/r_uart_api.h|1610456547,ra/fsp/inc/api/r_transfer_api.h|3094200246,ra/fsp/src/r_sci_uart/r_sci_uart.c
|
||||
com.renesas.cdt.ddsc.threads.configurator/collapse/module.driver.uart_on_sci_uart.606654632=false
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_dmac\#\#\#\#3.5.0/all=1279195077,ra/fsp/src/r_dmac/r_dmac.c|1610456547,ra/fsp/inc/api/r_transfer_api.h|4244470293,ra/fsp/inc/instances/r_dmac.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#TES\#\#all\#\#dave2d\#\#\#\#3.8.0+fsp.3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_jpeg\#\#\#\#3.5.0/all=2385517940,ra/fsp/src/r_jpeg/r_jpeg.c|2329302167,ra/fsp/inc/api/r_jpeg_api.h|2387419434,ra/fsp/inc/instances/r_jpeg.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Arm\#\#CMSIS\#\#CMSIS5\#\#CoreM\#\#\#\#5.8.0+renesas.0.fsp.3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#BSP\#\#Board\#\#custom\#\#\#\#3.5.0/libraries=
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_sdhi\#\#\#\#3.5.0/all=48432700,ra/fsp/src/r_sdhi/r_sdhi.c|2842545360,ra/fsp/inc/instances/r_sdhi.h|1057256313,ra/fsp/src/r_sdhi/r_sdhi_private.h|1515334001,ra/fsp/inc/api/r_elc_api.h|1610456547,ra/fsp/inc/api/r_transfer_api.h|612015131,ra/fsp/inc/api/r_sdmmc_api.h
|
||||
com.renesas.cdt.ddsc.packs.componentfiles/Renesas\#\#HAL\ Drivers\#\#all\#\#r_ioport\#\#\#\#3.5.0/libraries=
|
||||
|
|
|
|||
|
|
@ -146,6 +146,19 @@ The steps are as follows:
|
|||
3. Enter the `pkgs --update` command to update the software package.
|
||||
4. Enter the `scons --target=mdk5` command to regenerate the project.
|
||||
|
||||
**FSP Configuration**
|
||||
|
||||
* How to Use FSP: [Configuring Peripheral Drivers for RA Series Using FSP](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/tutorial/make-bsp/renesas-ra/RA系列使用FSP配置外设驱动?id=ra系列使用-fsp-配置外设驱动)
|
||||
|
||||
The current repository's BSP is configured with the minimum footprint enabled by default. Users can enable peripheral configurations through the following steps:
|
||||
|
||||
1. Open the `env` tool in the BSP directory and use the `scons --target=mdk5` command to generate an MDK project.
|
||||
2. Open the `project.uvprojx` file in the BSP directory, select the `Software Components` configuration in the top navigation bar, and open the configuration button next to `RA Configuration` under `Flex Software`. This operation will automatically detect the installed FSP version on the current computer. After selecting the specified version, enter FSP.
|
||||
|
||||
3. Upon entering FSP, pre-configured peripherals are already present. Click the `Generate Project Content` button to generate the required driver files.
|
||||
|
||||
4. Return to `env`, enable the necessary peripheral configurations, save, and exit.
|
||||
|
||||
## Contribute the Code
|
||||
|
||||
If you’re interested in the HMI-Board and have some cool projects you’d like to share with everyone, we’d love for you to contribute your code! You can check out [how to contribute to RT-Thread’s code](https://www.rt-thread.io/contribution.html). Let’s make something awesome together!
|
||||
|
|
@ -148,6 +148,19 @@ void hal_entry(void)
|
|||
3. 输入`pkgs --update`命令更新软件包。
|
||||
4. 输入`scons --target=mdk5` 命令重新生成工程。
|
||||
|
||||
**FSP配置**
|
||||
|
||||
* 如何使用 FSP：[RA系列使用 FSP 配置外设驱动](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/tutorial/make-bsp/renesas-ra/RA系列使用FSP配置外设驱动?id=ra系列使用-fsp-配置外设驱动)
|
||||
|
||||
目前仓库 bsp 默认使能最小体量配置，用户可通过如下步骤使能 env 外设配置：
|
||||
|
||||
1. 在 bsp 目录下打开 env 工具，使用 `scons --target=mdk5`命令生成 MDK 工程。
|
||||
2. 打开 bsp 目录下的`project.uvprojx`文件，选择上方导航栏的 `Software Components`配置，打开后找到`Flex Software`下的`RA Configuration`旁的配置按钮，该操作会自动查找当前电脑环境下安装的 fsp 版本，选择指定版本后进入 fsp。
|
||||
|
||||
3. 在进入 fsp 后我们可以发现，已经存在了一些已经配置完成的外设，此时我们点击`Generate Project Content`按钮即可生成所需驱动文件。
|
||||
|
||||
4. 接下来回到 env，使能所需的外设配置后保存退出即可。
|
||||
|
||||
## 联系人信息
|
||||
|
||||
在使用过程中若您有任何的想法和建议，建议您通过以下方式来联系到我们 [RT-Thread 社区论坛](https://club.rt-thread.org/)
|
||||
|
|
|
|||
|
|
@ -25,7 +25,81 @@ menu "Hardware Drivers Config"
|
|||
imply RTDUINO_USING_SERVO
|
||||
imply RTDUINO_USING_WIRE
|
||||
default n
|
||||
|
||||
|
||||
menuconfig BSP_USING_FS
|
||||
bool "Enable filesystem"
|
||||
default n
|
||||
if BSP_USING_FS
|
||||
config BSP_USING_SDCARD_FS
|
||||
bool "Enable SDCARD filesystem"
|
||||
select BSP_USING_SDHI
|
||||
select BSP_USING_SDHI1
|
||||
select RT_USING_DFS_ELMFAT
|
||||
default n
|
||||
config BSP_USING_SPICARD_FS
|
||||
bool "Enable SPI FLASH filesystem"
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SCI_SPI6
|
||||
select RT_USING_SPI_MSD
|
||||
select RT_USING_DFS_ELMFAT
|
||||
default n
|
||||
endif
|
||||
|
||||
config BSP_USING_SPI_LCD
|
||||
bool "Enable SPI LCD"
|
||||
select BSP_USING_GPIO
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SPI0
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_LVGL
|
||||
bool "Enable LVGL for LCD"
|
||||
select PKG_USING_LVGL
|
||||
default n
|
||||
if BSP_USING_LVGL
|
||||
config BSP_USING_LCD_ILI9431
|
||||
bool "Enable LVGL for LCD_ILI9431"
|
||||
select PKG_USING_ILI9341
|
||||
select BSP_USING_SPI_LCD
|
||||
default n
|
||||
config BSP_USING_LCD_RGB
|
||||
bool "Enable LVGL for LCD_RGB565"
|
||||
select BSP_USING_LCD
|
||||
select RT_USING_TOUCH
|
||||
select RT_TOUCH_PIN_IRQ
|
||||
default n
|
||||
if BSP_USING_LCD_RGB
|
||||
config BSP_USING_TOUCH
|
||||
bool "Enable Touch GT911"
|
||||
select BSP_USING_SOFT_I2C
|
||||
select BSP_USING_I2C0
|
||||
default y
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_LVGL_DEMO
|
||||
bool "Enable LVGL demo for LCD"
|
||||
if BSP_USING_LVGL_DEMO
|
||||
choice
|
||||
prompt "choice lvgl demo"
|
||||
default BSP_USING_LVGL_MUSIC_DEMO
|
||||
|
||||
config BSP_USING_LVGL_MUSIC_DEMO
|
||||
bool "Enable LVGL music demo"
|
||||
select BSP_USING_G2D
|
||||
select PKG_USING_LV_MUSIC_DEMO
|
||||
|
||||
config BSP_USING_LVGL_VIDEO_DEMO
|
||||
bool "Enable LVGL video demo"
|
||||
select BSP_USING_G2D
|
||||
select BSP_USING_JPEG
|
||||
select BSP_USING_FS
|
||||
select BSP_USING_SDCARD_FS
|
||||
endchoice
|
||||
endif
|
||||
endif
|
||||
|
||||
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
|
@ -506,37 +580,6 @@ menu "Hardware Drivers Config"
|
|||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_FS
|
||||
bool "Enable filesystem"
|
||||
default n
|
||||
if BSP_USING_FS
|
||||
config BSP_USING_SDCARD_FS
|
||||
bool "Enable SDCARD filesystem"
|
||||
select BSP_USING_SDHI
|
||||
select RT_USING_DFS_ELMFAT
|
||||
default n
|
||||
config BSP_USING_SPICARD_FS
|
||||
bool "Enable SPI FLASH filesystem"
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SCI_SPI6
|
||||
select RT_USING_SPI_MSD
|
||||
select RT_USING_DFS_ELMFAT
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SDHI
|
||||
bool "Enable SDHI"
|
||||
default n
|
||||
select RT_USING_SDIO
|
||||
select RT_USING_DFS
|
||||
select RT_LIBC_USING_FILEIO
|
||||
select RT_USING_POSIX_DEVIO
|
||||
if BSP_USING_SDHI
|
||||
config SDHI_USING_1_BIT
|
||||
bool "Use 1-bit Mode(4-bit when disable)"
|
||||
default y
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
bool "Enable PWM"
|
||||
default n
|
||||
|
|
@ -556,6 +599,32 @@ menu "Hardware Drivers Config"
|
|||
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SDHI
|
||||
bool "Enable SDHI"
|
||||
default n
|
||||
select RT_USING_SDIO
|
||||
select RT_USING_DFS
|
||||
select RT_LIBC_USING_FILEIO
|
||||
select RT_USING_POSIX_DEVIO
|
||||
if BSP_USING_SDHI
|
||||
menuconfig BSP_USING_SDHI0
|
||||
bool "Enable SDHI0"
|
||||
default n
|
||||
if BSP_USING_SDHI0
|
||||
config SDHI_USING_1_BIT
|
||||
bool "Use 1-bit Mode(4-bit when disable)"
|
||||
default y
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SDHI1
|
||||
bool "Enable SDHI1"
|
||||
default n
|
||||
if BSP_USING_SDHI1
|
||||
config SDHI_USING_1_BIT
|
||||
bool "Use 1-bit Mode(4-bit when disable)"
|
||||
default y
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_CAN
|
||||
bool "Enable CAN"
|
||||
|
|
@ -567,18 +636,6 @@ menu "Hardware Drivers Config"
|
|||
default n
|
||||
endif
|
||||
|
||||
config BSP_USING_LCD
|
||||
bool "Enable LCD"
|
||||
select BSP_USING_GPIO
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI_LCD
|
||||
bool "Enable SPI LCD"
|
||||
select BSP_USING_GPIO
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SPI0
|
||||
default n
|
||||
|
||||
config BSP_USING_G2D
|
||||
bool "Enable G2D"
|
||||
default n
|
||||
|
|
@ -594,39 +651,10 @@ menu "Hardware Drivers Config"
|
|||
select RT_USING_NETDEV
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_LVGL
|
||||
bool "Enable LVGL for LCD"
|
||||
select PKG_USING_LVGL
|
||||
config BSP_USING_LCD
|
||||
bool "Enable LCD"
|
||||
select BSP_USING_GPIO
|
||||
default n
|
||||
if BSP_USING_LVGL
|
||||
config BSP_USING_LCD_ILI9431
|
||||
bool "Enable LVGL for LCD_ILI9431"
|
||||
select PKG_USING_ILI9341
|
||||
select BSP_USING_SPI_LCD
|
||||
default n
|
||||
config BSP_USING_LCD_RGB
|
||||
bool "Enable LVGL for LCD_RGB565"
|
||||
select BSP_USING_LCD
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_LVGL_DEMO
|
||||
bool "Enable LVGL demo for LCD"
|
||||
if BSP_USING_LVGL_DEMO
|
||||
choice
|
||||
prompt "choice lvgl demo"
|
||||
default BSP_USING_LVGL_MUSIC_DEMO
|
||||
|
||||
config BSP_USING_LVGL_MUSIC_DEMO
|
||||
bool "Enable LVGL music demo"
|
||||
select PKG_USING_LV_MUSIC_DEMO
|
||||
|
||||
config BSP_USING_LVGL_VIDEO_DEMO
|
||||
bool "Enable LVGL video demo"
|
||||
select BSP_USING_G2D
|
||||
select BSP_USING_JPEG
|
||||
endchoice
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@
|
|||
<file category="include" name="ra/fsp/inc/"/>
|
||||
<file category="include" name="ra/fsp/inc/api/"/>
|
||||
<file category="include" name="ra/fsp/inc/instances/"/>
|
||||
<file category="include" name="ra/tes/dave2d/inc/"/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cachel1_armv7.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armcc.h" path=""/>
|
||||
<file category="header" name="ra/arm/CMSIS_5/CMSIS/Core/Include/cmsis_armclang.h" path=""/>
|
||||
|
|
@ -58,8 +59,13 @@
|
|||
<file category="header" name="ra/board/ra6m3/board_leds.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/bsp_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_adc_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_display_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_elc_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_ether_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_ether_phy_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_ioport_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_jpeg_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_sdmmc_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_timer_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_transfer_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/api/r_uart_api.h" path=""/>
|
||||
|
|
@ -67,66 +73,122 @@
|
|||
<file category="header" name="ra/fsp/inc/fsp_features.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/fsp_version.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_adc.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_dmac.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_ether.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_ether_phy.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_glcdc.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_gpt.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_ioport.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_jpeg.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_sci_uart.h" path=""/>
|
||||
<file category="header" name="ra/fsp/inc/instances/r_sdhi.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/base_addresses.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/system.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c"/>
|
||||
<file category="other" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c"/>
|
||||
<file category="other" name="ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_arm_exceptions.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_clocks.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_common.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_common.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_common.o"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_compiler_support.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_delay.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_delay.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_delay.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_group_irq.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_guard.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_guard.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_guard.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_io.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_io.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_io.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_irq.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_irq.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_irq.o"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_mcu_api.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_module_stop.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_register_protection.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c"/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_rom_registers.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_sbrk.c"/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_sbrk.o"/>
|
||||
<file category="source" name="ra/fsp/src/bsp/mcu/all/bsp_security.c"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_security.h" path=""/>
|
||||
<file category="other" name="ra/fsp/src/bsp/mcu/all/bsp_security.o"/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/all/bsp_tfu.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m3/bsp_elc.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h" path=""/>
|
||||
<file category="header" name="ra/fsp/src/bsp/mcu/ra6m3/bsp_mcu_info.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/r_adc/r_adc.c"/>
|
||||
<file category="other" name="ra/fsp/src/r_adc/r_adc.o"/>
|
||||
<file category="source" name="ra/fsp/src/r_dmac/r_dmac.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_drw/r_drw_base.c"/>
|
||||
<file category="header" name="ra/fsp/src/r_drw/r_drw_base.h" path=""/>
|
||||
<file category="source" name="ra/fsp/src/r_drw/r_drw_irq.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_drw/r_drw_memory.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_ether/r_ether.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_ether_phy/r_ether_phy.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_ether_phy/targets/DP83620/r_ether_phy_target_dp83620.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_ether_phy/targets/KSZ8041/r_ether_phy_target_ksz8041.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_ether_phy/targets/KSZ8091RNB/r_ether_phy_target_ksz8091rnb.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_glcdc/r_glcdc.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_gpt/r_gpt.c"/>
|
||||
<file category="other" name="ra/fsp/src/r_gpt/r_gpt.o"/>
|
||||
<file category="source" name="ra/fsp/src/r_ioport/r_ioport.c"/>
|
||||
<file category="other" name="ra/fsp/src/r_ioport/r_ioport.o"/>
|
||||
<file category="other" name="ra/fsp/src/r_sci_i2c/r_sci_i2c.o"/>
|
||||
<file category="source" name="ra/fsp/src/r_jpeg/r_jpeg.c"/>
|
||||
<file category="source" name="ra/fsp/src/r_sci_uart/r_sci_uart.c"/>
|
||||
<file category="other" name="ra/fsp/src/r_sci_uart/r_sci_uart.o"/>
|
||||
<file category="source" name="ra/fsp/src/r_sdhi/r_sdhi.c"/>
|
||||
<file category="header" name="ra/fsp/src/r_sdhi/r_sdhi_private.h" path=""/>
|
||||
<file category="other" name="ra/SConscript"/>
|
||||
<file category="header" name="ra/tes/dave2d/inc/dave_base.h" path=""/>
|
||||
<file category="header" name="ra/tes/dave2d/inc/dave_driver.h" path=""/>
|
||||
<file category="header" name="ra/tes/dave2d/inc/dave_errorcodes.h" path=""/>
|
||||
<file category="header" name="ra/tes/dave2d/inc/dave_math.h" path=""/>
|
||||
<file category="header" name="ra/tes/dave2d/inc/dave_types.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_64bitoperation.c"/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_base.c"/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_blit.c"/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_box.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_box.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_circle.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_circle.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_context.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_context.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_curve.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_curve.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_dlist.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_dlist.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_driver.c"/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_edge.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_edge.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_errorcodes.c"/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_gradient.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_gradient.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_hardware.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_hardware.h" path=""/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_intern.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_line.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_line.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_math.c"/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_memory.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_memory.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_pattern.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_pattern.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_perfcount.c"/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_polyline.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_polyline.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_quad.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_quad.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_rbuffer.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_rbuffer.h" path=""/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_registermap.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_render.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_render.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_texture.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_texture.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_triangle.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_triangle.h" path=""/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_triarray.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_utility.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_utility.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_viewport.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_viewport.h" path=""/>
|
||||
<file category="source" name="ra/tes/dave2d/src/dave_wedge.c"/>
|
||||
<file category="header" name="ra/tes/dave2d/src/dave_wedge.h" path=""/>
|
||||
</files>
|
||||
</component>
|
||||
<component Cclass="Flex Software" Cgroup="Build Configuration">
|
||||
|
|
@ -140,9 +202,16 @@
|
|||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_mcu_family_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/bsp/bsp_pin_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_adc_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_dmac_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_drw_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_ether_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_ether_phy_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_glcdc_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_gpt_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_ioport_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_jpeg_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_sci_uart_cfg.h" path=""/>
|
||||
<file category="header" name="ra_cfg/fsp_cfg/r_sdhi_cfg.h" path=""/>
|
||||
<file category="other" name="ra_cfg/SConscript"/>
|
||||
</files>
|
||||
</component>
|
||||
|
|
|
|||
|
|
@ -173,6 +173,38 @@
|
|||
<description>General PWM Timer</description>
|
||||
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="TES" condition="" group="all" subgroup="dave2d" variant="" vendor="Renesas" version="3.8.0+fsp.3.5.0">
|
||||
<description>TES DAVE 2D Drawing Engine</description>
|
||||
<originalPack>TES.Dave2D.3.8.0+fsp.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_dmac" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>Direct Memory Access Controller</description>
|
||||
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_drw" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>TES D/AVE 2D Port</description>
|
||||
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_ether_phy" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>Ethernet PHY</description>
|
||||
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_ether" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>Ethernet</description>
|
||||
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_glcdc" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>Graphics LCD Controller</description>
|
||||
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_jpeg" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>JPEG Codec</description>
|
||||
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
<component apiversion="" class="HAL Drivers" condition="" group="all" subgroup="r_sdhi" variant="" vendor="Renesas" version="3.5.0">
|
||||
<description>SD/MMC Host Interface</description>
|
||||
<originalPack>Renesas.RA.3.5.0.pack</originalPack>
|
||||
</component>
|
||||
</raComponentSelection>
|
||||
<raElcConfiguration/>
|
||||
<raIcuConfiguration/>
|
||||
|
|
@ -414,6 +446,318 @@
|
|||
<property id="module.driver.timer.gtioca_disable_setting" value="module.driver.timer.gtioca_disable_setting.gtioc_disable_prohibited"/>
|
||||
<property id="module.driver.timer.gtiocb_disable_setting" value="module.driver.timer.gtiocb_disable_setting.gtioc_disable_prohibited"/>
|
||||
</module>
|
||||
<module id="module.driver.timer_on_gpt.1221002445">
|
||||
<property id="module.driver.timer.name" value="g_timer6"/>
|
||||
<property id="module.driver.timer.channel" value="6"/>
|
||||
<property id="module.driver.timer.mode" value="module.driver.timer.mode.mode_periodic"/>
|
||||
<property id="module.driver.timer.period" value="78"/>
|
||||
<property id="module.driver.timer.unit" value="module.driver.timer.unit.unit_frequency_khz"/>
|
||||
<property id="module.driver.timer.gtior.gtioa.initial_output_level" value="module.driver.timer.gtior.gtioa.initial_output_level.low"/>
|
||||
<property id="module.driver.timer.gtior.gtioa.cycle_end_output_level" value="module.driver.timer.gtior.gtioa.cycle_end_output_level.retain"/>
|
||||
<property id="module.driver.timer.gtior.gtioa.compare_match_output_level" value="module.driver.timer.gtior.gtioa.compare_match_output_level.retain"/>
|
||||
<property id="module.driver.timer.gtior.gtioa.count_stop_retain" value="module.driver.timer.gtior.gtioa.count_stop_retain.disabled"/>
|
||||
<property id="module.driver.timer.gtior.gtiob.initial_output_level" value="module.driver.timer.gtior.gtiob.initial_output_level.low"/>
|
||||
<property id="module.driver.timer.gtior.gtiob.cycle_end_output_level" value="module.driver.timer.gtior.gtiob.cycle_end_output_level.retain"/>
|
||||
<property id="module.driver.timer.gtior.gtiob.compare_match_output_level" value="module.driver.timer.gtior.gtiob.compare_match_output_level.retain"/>
|
||||
<property id="module.driver.timer.gtior.gtiob.count_stop_retain" value="module.driver.timer.gtior.gtiob.count_stop_retain.disabled"/>
|
||||
<property id="module.driver.timer.gtior.custom_waveform_enable" value="module.driver.timer.gtior.custom_waveform_enable.disabled"/>
|
||||
<property id="module.driver.timer.duty_cycle" value="50"/>
|
||||
<property id="module.driver.timer.gtioca_output_enabled" value="module.driver.timer.gtioca_output_enabled.true"/>
|
||||
<property id="module.driver.timer.gtioca_stop_level" value="module.driver.timer.gtioca_stop_level.pin_level_low"/>
|
||||
<property id="module.driver.timer.gtiocb_output_enabled" value="module.driver.timer.gtiocb_output_enabled.true"/>
|
||||
<property id="module.driver.timer.gtiocb_stop_level" value="module.driver.timer.gtiocb_stop_level.pin_level_low"/>
|
||||
<property id="module.driver.timer.count_up_source" value=""/>
|
||||
<property id="module.driver.timer.count_down_source" value=""/>
|
||||
<property id="module.driver.timer.start_source" value=""/>
|
||||
<property id="module.driver.timer.stop_source" value=""/>
|
||||
<property id="module.driver.timer.clear_source" value=""/>
|
||||
<property id="module.driver.timer.capture_a_source" value=""/>
|
||||
<property id="module.driver.timer.capture_b_source" value=""/>
|
||||
<property id="module.driver.timer.gtioca_filter" value="module.driver.timer.gtioc_filter.gtioc_filter_none"/>
|
||||
<property id="module.driver.timer.gtiocb_filter" value="module.driver.timer.gtioc_filter.gtioc_filter_none"/>
|
||||
<property id="module.driver.timer.p_callback" value="NULL"/>
|
||||
<property id="module.driver.timer.ipl" value="_disabled"/>
|
||||
<property id="module.driver.timer.capture_a_ipl" value="_disabled"/>
|
||||
<property id="module.driver.timer.capture_b_ipl" value="_disabled"/>
|
||||
<property id="module.driver.timer.trough_ipl" value="_disabled"/>
|
||||
<property id="module.driver.timer.extra" value="module.driver.timer.extra.disabled"/>
|
||||
<property id="module.driver.timer.poeg_link" value="module.driver.timer.poeg_link.poeg_link_poeg0"/>
|
||||
<property id="module.driver.timer.output_disable" value=""/>
|
||||
<property id="module.driver.timer.adc_trigger" value=""/>
|
||||
<property id="module.driver.timer.dead_time_count_up" value="0"/>
|
||||
<property id="module.driver.timer.dead_time_count_down" value="0"/>
|
||||
<property id="module.driver.timer.adc_a_compare_match" value="0"/>
|
||||
<property id="module.driver.timer.adc_b_compare_match" value="0"/>
|
||||
<property id="module.driver.timer.interrupt_skip.source" value="module.driver.timer.interrupt_skip.source.none"/>
|
||||
<property id="module.driver.timer.interrupt_skip.count" value="module.driver.timer.interrupt_skip.count.count_0"/>
|
||||
<property id="module.driver.timer.interrupt_skip.adc" value="module.driver.timer.interrupt_skip.adc.none"/>
|
||||
<property id="module.driver.timer.gtioca_disable_setting" value="module.driver.timer.gtioca_disable_setting.gtioc_disable_prohibited"/>
|
||||
<property id="module.driver.timer.gtiocb_disable_setting" value="module.driver.timer.gtiocb_disable_setting.gtioc_disable_prohibited"/>
|
||||
</module>
|
||||
<module id="module.driver.sdmmc_on_sdmmc.772252884">
|
||||
<property id="module.driver.sdmmc.name" value="g_sdmmc1"/>
|
||||
<property id="module.driver.sdmmc.channel" value="1"/>
|
||||
<property id="module.driver.sdmmc.bus_width" value="module.driver.sdmmc.bus_width.bus_width_4_bits"/>
|
||||
<property id="module.driver.sdmmc.block_size" value="512"/>
|
||||
<property id="module.driver.sdmmc.card_detect" value="module.driver.sdmmc.card_detect.card_detect_cd"/>
|
||||
<property id="module.driver.sdmmc.write_protect" value="module.driver.sdmmc.write_protect.write_protect_none"/>
|
||||
<property id="module.driver.sdmmc.p_callback" value="NULL"/>
|
||||
<property id="module.driver.sdmmc.access_ipl" value="board.icu.common.irq.priority12"/>
|
||||
<property id="module.driver.sdmmc.card_ipl" value="board.icu.common.irq.priority12"/>
|
||||
<property id="module.driver.sdmmc.dma_req_ipl" value="_disabled"/>
|
||||
</module>
|
||||
<module id="module.driver.transfer_on_dmac.1755540207">
|
||||
<property id="module.driver.transfer.name" value="g_transfer0"/>
|
||||
<property id="module.driver.transfer.channel" value="0"/>
|
||||
<property id="module.driver.transfer.mode" value="module.driver.transfer.mode.mode_normal"/>
|
||||
<property id="module.driver.transfer.size" value="module.driver.transfer.size.size_2_byte"/>
|
||||
<property id="module.driver.transfer.dest_addr_mode" value="module.driver.transfer.dest_addr_mode.addr_mode_fixed"/>
|
||||
<property id="module.driver.transfer.src_addr_mode" value="module.driver.transfer.src_addr_mode.addr_mode_fixed"/>
|
||||
<property id="module.driver.transfer.repeat_area" value="module.driver.transfer.repeat_area.repeat_area_source"/>
|
||||
<property id="module.driver.transfer.p_dest" value="NULL"/>
|
||||
<property id="module.driver.transfer.p_src" value="NULL"/>
|
||||
<property id="module.driver.transfer.length" value="1"/>
|
||||
<property id="module.driver.transfer.num_blocks" value="0"/>
|
||||
<property id="module.driver.transfer.activation_event" value="enum.elc_none.none"/>
|
||||
<property id="module.driver.transfer.p_callback" value="NULL"/>
|
||||
<property id="module.driver.transfer.p_context" value="NULL"/>
|
||||
<property id="module.driver.transfer.ipl" value="board.icu.common.irq.priority12"/>
|
||||
<property id="module.driver.transfer.interrupt" value="module.driver.transfer.interrupt.interrupt_end"/>
|
||||
<property id="module.driver.transfer.offset" value="1"/>
|
||||
<property id="module.driver.transfer.src.buffer" value="1"/>
|
||||
</module>
|
||||
<module id="module.driver.display_on_glcdc.467730287">
|
||||
<property id="module.driver.display.name" value="g_display0"/>
|
||||
<property id="module.driver.display.callback" value="_ra_port_display_callback"/>
|
||||
<property id="module.driver.display.line_detect_ipl" value="board.icu.common.irq.priority12"/>
|
||||
<property id="module.driver.display.underflow_1_ipl" value="_disabled"/>
|
||||
<property id="module.driver.display.underflow_2_ipl" value="_disabled"/>
|
||||
<property id="module.driver.display.input0.enable" value="module.driver.display.input0.enable.true"/>
|
||||
<property id="module.driver.display.input0.hsize" value="480"/>
|
||||
<property id="module.driver.display.input0.vsize" value="272"/>
|
||||
<property id="module.driver.display.layer0.coordinate.x" value="0"/>
|
||||
<property id="module.driver.display.layer0.coordinate.y" value="0"/>
|
||||
<property id="module.driver.display.layer0.color.byte.a" value="255"/>
|
||||
<property id="module.driver.display.layer0.color.byte.r" value="255"/>
|
||||
<property id="module.driver.display.layer0.color.byte.g" value="255"/>
|
||||
<property id="module.driver.display.layer0.color.byte.b" value="255"/>
|
||||
<property id="module.driver.display.input0.buffer_name" value="fb_background"/>
|
||||
<property id="module.driver.display.input0.buffer_number" value="2"/>
|
||||
<property id="module.driver.display.input0.section" value=".bss"/>
|
||||
<property id="module.driver.display.input0.format" value="module.driver.display.input0.format.in_format_16bits_rgb565"/>
|
||||
<property id="module.driver.display.input0.line_descending_enable" value="module.driver.display.input0.line_descending_enable.false"/>
|
||||
<property id="module.driver.display.input0.lines_repeat_enable" value="module.driver.display.input0.lines_repeat_enable.false"/>
|
||||
<property id="module.driver.display.input0.lines_repeat_times" value="0"/>
|
||||
<property id="module.driver.display.layer0.fade_control" value="module.driver.display.layer0.fade_control.fade_control_none"/>
|
||||
<property id="module.driver.display.layer0.fade_speed" value="0"/>
|
||||
<property id="module.driver.display.input1.enable" value="module.driver.display.input1.enable.false"/>
|
||||
<property id="module.driver.display.input1.hsize" value="480"/>
|
||||
<property id="module.driver.display.input1.vsize" value="272"/>
|
||||
<property id="module.driver.display.layer1.coordinate.x" value="0"/>
|
||||
<property id="module.driver.display.layer1.coordinate.y" value="0"/>
|
||||
<property id="module.driver.display.layer1.color.byte.a" value="255"/>
|
||||
<property id="module.driver.display.layer1.color.byte.r" value="255"/>
|
||||
<property id="module.driver.display.layer1.color.byte.g" value="255"/>
|
||||
<property id="module.driver.display.layer1.color.byte.b" value="255"/>
|
||||
<property id="module.driver.display.input1.buffer_name" value="fb_foreground"/>
|
||||
<property id="module.driver.display.input1.buffer_number" value="2"/>
|
||||
<property id="module.driver.display.input1.section" value=".bss"/>
|
||||
<property id="module.driver.display.input1.format" value="module.driver.display.input1.format.in_format_16bits_rgb565"/>
|
||||
<property id="module.driver.display.input1.line_descending_enable" value="module.driver.display.input1.line_descending_enable.false"/>
|
||||
<property id="module.driver.display.input1.lines_repeat_enable" value="module.driver.display.input1.lines_repeat_enable.false"/>
|
||||
<property id="module.driver.display.input1.lines_repeat_times" value="0"/>
|
||||
<property id="module.driver.display.layer1.fade_control" value="module.driver.display.layer1.fade_control.fade_control_none"/>
|
||||
<property id="module.driver.display.layer1.fade_speed" value="0"/>
|
||||
<property id="module.driver.display.output.htiming.total_cyc" value="525"/>
|
||||
<property id="module.driver.display.output.htiming.display_cyc" value="480"/>
|
||||
<property id="module.driver.display.output.htiming.back_porch" value="40"/>
|
||||
<property id="module.driver.display.output.htiming.sync_width" value="1"/>
|
||||
<property id="module.driver.display.output.htiming.sync_polarity" value="module.driver.display.output.htiming.sync_polarity.signal_polarity_loactive"/>
|
||||
<property id="module.driver.display.output.vtiming.total_cyc" value="316"/>
|
||||
<property id="module.driver.display.output.vtiming.display_cyc" value="272"/>
|
||||
<property id="module.driver.display.output.vtiming.back_porch" value="8"/>
|
||||
<property id="module.driver.display.output.vtiming.sync_width" value="1"/>
|
||||
<property id="module.driver.display.output.vtiming.sync_polarity" value="module.driver.display.output.vtiming.sync_polarity.signal_polarity_loactive"/>
|
||||
<property id="module.driver.display.output.data_enable_polarity" value="module.driver.display.output.data_enable_polarity.signal_polarity_hiactive"/>
|
||||
<property id="module.driver.display.output.sync_edge" value="module.driver.display.output.sync_edge.signal_sync_edge_rising"/>
|
||||
<property id="module.driver.display.output.format" value="module.driver.display.output.format.out_format_16bits_rgb565"/>
|
||||
<property id="module.driver.display.output.color_order" value="module.driver.display.output.color_order.color_order_rgb"/>
|
||||
<property id="module.driver.display.output.endian" value="module.driver.display.output.endian.endian_little"/>
|
||||
<property id="module.driver.display.output.bg_color.byte.a" value="255"/>
|
||||
<property id="module.driver.display.output.bg_color.byte.r" value="0"/>
|
||||
<property id="module.driver.display.output.bg_color.byte.g" value="0"/>
|
||||
<property id="module.driver.display.output.bg_color.byte.b" value="0"/>
|
||||
<property id="module.driver.display.clut.enable" value="module.driver.display.clut.enable.false"/>
|
||||
<property id="module.driver.display.clut.size" value="256"/>
|
||||
<property id="module.driver.display.tcon_hsync" value="module.driver.display.tcon_hsync.tcon_pin_0"/>
|
||||
<property id="module.driver.display.tcon_vsync" value="module.driver.display.tcon_vsync.tcon_pin_1"/>
|
||||
<property id="module.driver.display.tcon_de" value="module.driver.display.tcon_de.tcon_pin_2"/>
|
||||
<property id="module.driver.display.clksrc" value="module.driver.display.clksrc.clk_src_internal"/>
|
||||
<property id="module.driver.display.clock_div_ratio" value="module.driver.display.clock_div_ratio.panel_clk_divisor_24"/>
|
||||
<property id="module.driver.display.correction_proc_order" value="module.driver.display.correction_proc_order.correction_proc_order_brightness_contrast2gamma"/>
|
||||
<property id="module.driver.display.output.brightness.enable" value="module.driver.display.output.brightness.false"/>
|
||||
<property id="module.driver.display.output.brightness.r" value="512"/>
|
||||
<property id="module.driver.display.output.brightness.g" value="512"/>
|
||||
<property id="module.driver.display.output.brightness.b" value="512"/>
|
||||
<property id="module.driver.display.output.contrast.enable" value="module.driver.display.output.contrast.false"/>
|
||||
<property id="module.driver.display.output.contrast.r" value="128"/>
|
||||
<property id="module.driver.display.output.contrast.g" value="128"/>
|
||||
<property id="module.driver.display.output.contrast.b" value="128"/>
|
||||
<property id="module.driver.display.output.gamma.r.enable" value="module.driver.display.output.gamma.r.enable.off"/>
|
||||
<property id="module.driver.display.output.gamma.g.enable" value="module.driver.display.output.gamma.g.enable.off"/>
|
||||
<property id="module.driver.display.output.gamma.b.enable" value="module.driver.display.output.gamma.b.enable.off"/>
|
||||
<property id="module.driver.display.output.gamma.table_mode" value="module.driver.display.output.gamma.table_mode.variable"/>
|
||||
<property id="module.driver.display.gamma.r.gain.0" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.1" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.2" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.3" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.4" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.5" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.6" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.7" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.8" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.9" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.10" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.11" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.12" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.13" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.14" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.gain.15" value="1024"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.1" value="64"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.2" value="128"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.3" value="192"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.4" value="256"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.5" value="320"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.6" value="384"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.7" value="448"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.8" value="512"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.9" value="576"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.10" value="640"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.11" value="704"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.12" value="768"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.13" value="832"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.14" value="896"/>
|
||||
<property id="module.driver.display.gamma.r.threshold.15" value="960"/>
|
||||
<property id="module.driver.display.gamma.g.gain.0" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.1" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.2" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.3" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.4" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.5" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.6" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.7" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.8" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.9" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.10" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.11" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.12" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.13" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.14" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.gain.15" value="1024"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.1" value="64"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.2" value="128"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.3" value="192"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.4" value="256"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.5" value="320"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.6" value="384"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.7" value="448"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.8" value="512"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.9" value="576"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.10" value="640"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.11" value="704"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.12" value="768"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.13" value="832"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.14" value="896"/>
|
||||
<property id="module.driver.display.gamma.g.threshold.15" value="960"/>
|
||||
<property id="module.driver.display.gamma.b.gain.0" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.1" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.2" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.3" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.4" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.5" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.6" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.7" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.8" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.9" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.10" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.11" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.12" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.13" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.14" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.gain.15" value="1024"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.1" value="64"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.2" value="128"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.3" value="192"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.4" value="256"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.5" value="320"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.6" value="384"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.7" value="448"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.8" value="512"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.9" value="576"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.10" value="640"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.11" value="704"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.12" value="768"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.13" value="832"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.14" value="896"/>
|
||||
<property id="module.driver.display.gamma.b.threshold.15" value="960"/>
|
||||
<property id="module.driver.display.output.dithering_on" value="module.driver.display.output.dithering_on.false"/>
|
||||
<property id="module.driver.display.dithering_mode" value="module.driver.display.dithering_mode.dithering_mode_trancate"/>
|
||||
<property id="module.driver.display.dithering_pattern_A" value="module.driver.display.dithering_pattern_A.dithering_pattern_11"/>
|
||||
<property id="module.driver.display.dithering_pattern_B" value="module.driver.display.dithering_pattern_B.dithering_pattern_11"/>
|
||||
<property id="module.driver.display.dithering_pattern_C" value="module.driver.display.dithering_pattern_C.dithering_pattern_11"/>
|
||||
<property id="module.driver.display.dithering_pattern_D" value="module.driver.display.dithering_pattern_D.dithering_pattern_11"/>
|
||||
</module>
|
||||
<module id="module.driver.drw.2023623840">
|
||||
<property id="module.driver.drw.handle_name" value="d2_handle0"/>
|
||||
<property id="module.driver.drw.int_ipl" value="board.icu.common.irq.priority2"/>
|
||||
</module>
|
||||
<module id="module.driver.tes.dave2d.1096900697"/>
|
||||
<module id="module.driver.jpeg.1714952856">
|
||||
<property id="module.driver.jpeg.name" value="g_jpeg0"/>
|
||||
<property id="module.driver.jpeg.default_mode" value="module.driver.jpeg.default_mode.decode"/>
|
||||
<property id="module.driver.jpeg.decode.input_data_order" value="module.driver.jpeg.decode.input_data_order.normal"/>
|
||||
<property id="module.driver.jpeg.decode.output_data_order" value="module.driver.jpeg.byte_swap.normal"/>
|
||||
<property id="module.driver.jpeg.decode.pixel_format" value="module.driver.jpeg.decode.pixel_format.rgb565"/>
|
||||
<property id="module.driver.jpeg.decode.alpha_value" value="255"/>
|
||||
<property id="module.driver.jpeg.decode.p_callback" value="decode_callback"/>
|
||||
<property id="module.driver.jpeg.encode.horizontal_resolution" value="480"/>
|
||||
<property id="module.driver.jpeg.encode.vertical_resolution" value="272"/>
|
||||
<property id="module.driver.jpeg.encode.horizontal_stride_pixels" value="480"/>
|
||||
<property id="module.driver.jpeg.encode.input_data_order" value="module.driver.jpeg.byte_swap.normal"/>
|
||||
<property id="module.driver.jpeg.encode.output_data_order" value="module.driver.jpeg.byte_swap.normal"/>
|
||||
<property id="module.driver.jpeg.encode.DRI" value="512"/>
|
||||
<property id="module.driver.jpeg.encode.quality" value="50"/>
|
||||
<property id="module.driver.jpeg.encode.p_callback" value="NULL"/>
|
||||
<property id="module.driver.jpeg.jedi_ipl" value="board.icu.common.irq.priority12"/>
|
||||
<property id="module.driver.jpeg.jdti_ipl" value="board.icu.common.irq.priority12"/>
|
||||
</module>
|
||||
<module id="module.driver.ether_on_ether.803249625">
|
||||
<property id="module.driver.ether.name" value="g_ether0"/>
|
||||
<property id="module.driver.ether.channel" value="module.driver.ether.channel.0"/>
|
||||
<property id="module.driver.ether.mac_address" value="00:11:22:33:44:55"/>
|
||||
<property id="module.driver.ether.zerocopy" value="module.driver.ether.zerocopy.0"/>
|
||||
<property id="module.driver.ether.flow_control" value="module.driver.ether.flow_control.0"/>
|
||||
<property id="module.driver.ether.multicast" value="module.driver.ether.multicast.1"/>
|
||||
<property id="module.driver.ether.promiscuous" value="module.driver.ether.promiscuous.0"/>
|
||||
<property id="module.driver.ether.broadcast_filter" value="0"/>
|
||||
<property id="module.driver.ether.num_tx_descriptors" value="1"/>
|
||||
<property id="module.driver.ether.num_rx_descriptors" value="1"/>
|
||||
<property id="module.driver.ether.allocate_rx_buffer" value="module.driver.ether.allocate_rx_buffer.1"/>
|
||||
<property id="module.driver.ether.ether_buffer_size" value="1514"/>
|
||||
<property id="module.driver.ether.padding" value="module.driver.ether.padding.0"/>
|
||||
<property id="module.driver.ether.padding_offset" value="0"/>
|
||||
<property id="module.driver.ether.interrupt_priority" value="board.icu.common.irq.priority12"/>
|
||||
<property id="module.driver.ether.p_callback" value="user_ether0_callback"/>
|
||||
</module>
|
||||
<module id="module.driver.ether_phy_on_ether_phy.865863475">
|
||||
<property id="module.driver.ether_phy.name" value="g_ether_phy0"/>
|
||||
<property id="module.driver.ether_phy.channel" value="module.driver.ether_phy.channel.0"/>
|
||||
<property id="module.driver.ether_phy.phy_lsi_address" value="0"/>
|
||||
<property id="module.driver.ether_phy.phy_reset_wait_time" value="0x00020000"/>
|
||||
<property id="module.driver.ether_phy.mii_type" value="module.driver.mii_type.rmii"/>
|
||||
<property id="module.driver.ether_phy.mii_bit_access_wait_time" value="8"/>
|
||||
<property id="module.driver.ether_phy.flow_control" value="module.driver.ether_phy.flow_control.0"/>
|
||||
</module>
|
||||
<context id="_hal.0">
|
||||
<stack module="module.driver.ioport_on_ioport.0"/>
|
||||
<stack module="module.driver.uart_on_sci_uart.552817864"/>
|
||||
|
|
@ -422,25 +766,69 @@
|
|||
<stack module="module.driver.timer_on_gpt.1304889876"/>
|
||||
<stack module="module.driver.timer_on_gpt.1361031128"/>
|
||||
<stack module="module.driver.timer_on_gpt.1148934625"/>
|
||||
<stack module="module.driver.timer_on_gpt.1221002445"/>
|
||||
<stack module="module.driver.sdmmc_on_sdmmc.772252884">
|
||||
<stack module="module.driver.transfer_on_dmac.1755540207" requires="module.driver.sdmmc_on_sdmmc.requires.transfer"/>
|
||||
</stack>
|
||||
<stack module="module.driver.display_on_glcdc.467730287"/>
|
||||
<stack module="module.driver.drw.2023623840">
|
||||
<stack module="module.driver.tes.dave2d.1096900697" requires="module.driver.drw.requires.dave2d_driver"/>
|
||||
</stack>
|
||||
<stack module="module.driver.jpeg.1714952856"/>
|
||||
<stack module="module.driver.ether_on_ether.803249625">
|
||||
<stack module="module.driver.ether_phy_on_ether_phy.865863475" requires="module.driver.ether.requires.ether_phy"/>
|
||||
</stack>
|
||||
</context>
|
||||
<config id="config.driver.glcdc">
|
||||
<property id="config.driver.glcdc.param_checking_enable" value="config.driver.glcdc.param_checking_enable.bsp"/>
|
||||
<property id="config.driver.glcdc.color_correction_enable" value="config.driver.glcdc.color_correction_enable.off"/>
|
||||
</config>
|
||||
<config id="config.driver.ioport">
|
||||
<property id="config.driver.ioport.checking" value="config.driver.ioport.checking.system"/>
|
||||
</config>
|
||||
<config id="config.driver.adc">
|
||||
<property id="config.driver.adc.param_checking_enable" value="config.driver.adc.param_checking_enable.bsp"/>
|
||||
</config>
|
||||
<config id="config.driver.ether">
|
||||
<property id="config.driver.ether.param_checking_enable" value="config.driver.ether.param_checking_enable.bsp"/>
|
||||
<property id="config.driver.ether.link_present" value="config.driver.ether.link_present.0"/>
|
||||
<property id="config.driver.ether.use_linksta" value="config.driver.ether.use_linksta.0"/>
|
||||
</config>
|
||||
<config id="config.driver.dmac">
|
||||
<property id="config.driver.dmac.param_checking_enable" value="config.driver.dmac.param_checking_enable.bsp"/>
|
||||
</config>
|
||||
<config id="config.driver.ether_phy">
|
||||
<property id="config.driver.ether_phy.param_checking_enable" value="config.driver.ether_phy.param_checking_enable.bsp"/>
|
||||
<property id="config.driver.ether_phy.use_phy" value="config.driver.ether_phy.use_phy.default"/>
|
||||
<property id="config.driver.ether_phy.use_reference_clock" value="config.driver.ether_phy.use_reference_clock.default"/>
|
||||
</config>
|
||||
<config id="config.driver.sci_uart">
|
||||
<property id="config.driver.sci_uart.param_checking_enable" value="config.driver.sci_uart.param_checking_enable.bsp"/>
|
||||
<property id="config.driver.sci_uart.fifo_support" value="config.driver.sci_uart.fifo_support.disabled"/>
|
||||
<property id="config.driver.sci_uart.dtc_support" value="config.driver.sci_uart.dtc_support.disabled"/>
|
||||
<property id="config.driver.sci_uart.flow_control" value="config.driver.sci_uart.flow_control.disabled"/>
|
||||
</config>
|
||||
<config id="config.driver.jpeg">
|
||||
<property id="config.driver.jpeg.param_checking_enable" value="config.driver.jpeg.param_checking_enable.bsp"/>
|
||||
<property id="config.driver.jpeg.decode_enable" value="config.driver.jpeg.decode_enable.enabled"/>
|
||||
<property id="config.driver.jpeg.encode_enable" value="config.driver.jpeg.encode_enable.disabled"/>
|
||||
</config>
|
||||
<config id="config.driver.gpt">
|
||||
<property id="config.driver.gpt.param_checking_enable" value="config.driver.gpt.param_checking_enable.bsp"/>
|
||||
<property id="config.driver.gpt.output_support_enable" value="config.driver.gpt.output_support_enable.enabled"/>
|
||||
<property id="config.driver.gpt.write_protect_enable" value="config.driver.gpt.write_protect_enable.disabled"/>
|
||||
<property id="config.driver.gpt.gpt_core_clock" value="module.driver.timer.gpt_core_clock.pclk"/>
|
||||
</config>
|
||||
<config id="config.driver.drw">
|
||||
<property id="config.driver.drw.indirect" value="config.driver.drw.indirect.on"/>
|
||||
<property id="config.driver.drw.malloc" value="config.driver.drw.malloc.default"/>
|
||||
</config>
|
||||
<config id="config.driver.sdmmc">
|
||||
<property id="config.driver.sdmmc.param_checking_enable" value="config.driver.sdmmc.param_checking_enable.bsp"/>
|
||||
<property id="config.driver.sdmmc.unaligned_support_enable" value="config.driver.sdmmc.unaligned_support_enable.enabled"/>
|
||||
<property id="config.driver.sdmmc.sd_support_enable" value="config.driver.sdmmc.sd_support_enable.enabled"/>
|
||||
<property id="config.driver.sdmmc.emmc_support_enable" value="config.driver.sdmmc.emmc_support_enable.disabled"/>
|
||||
</config>
|
||||
</raModuleConfiguration>
|
||||
<raPinConfiguration>
|
||||
<pincfg active="true" name="R7FA6M3AH3CFB.pincfg" selected="true" symbol="g_bsp_pin_cfg">
|
||||
|
|
@ -455,10 +843,42 @@
|
|||
<configSetting altId="debug0.mode.swd" configurationId="debug0.mode"/>
|
||||
<configSetting altId="debug0.swclk.p300" configurationId="debug0.swclk"/>
|
||||
<configSetting altId="debug0.swdio.p108" configurationId="debug0.swdio"/>
|
||||
<configSetting altId="etherc0.rmii.crs_dv.p408" configurationId="etherc0.rmii.crs_dv"/>
|
||||
<configSetting altId="etherc0.rmii.mdc.p401" configurationId="etherc0.rmii.mdc"/>
|
||||
<configSetting altId="etherc0.rmii.mdio.p402" configurationId="etherc0.rmii.mdio"/>
|
||||
<configSetting altId="etherc0.rmii.mode.rmii.a" configurationId="etherc0.rmii.mode"/>
|
||||
<configSetting altId="etherc0.rmii.ref50ck.p412" configurationId="etherc0.rmii.ref50ck"/>
|
||||
<configSetting altId="etherc0.rmii.rx_er.p409" configurationId="etherc0.rmii.rx_er"/>
|
||||
<configSetting altId="etherc0.rmii.rxd0.p411" configurationId="etherc0.rmii.rxd0"/>
|
||||
<configSetting altId="etherc0.rmii.rxd1.p410" configurationId="etherc0.rmii.rxd1"/>
|
||||
<configSetting altId="etherc0.rmii.txd0.p413" configurationId="etherc0.rmii.txd0"/>
|
||||
<configSetting altId="etherc0.rmii.txd1.p414" configurationId="etherc0.rmii.txd1"/>
|
||||
<configSetting altId="etherc0.rmii.txd_en.p415" configurationId="etherc0.rmii.txd_en"/>
|
||||
<configSetting altId="glcdc0.lcd_clk.p101" configurationId="glcdc0.lcd_clk"/>
|
||||
<configSetting altId="glcdc0.lcd_data00.p106" configurationId="glcdc0.lcd_data00"/>
|
||||
<configSetting altId="glcdc0.lcd_data01.p107" configurationId="glcdc0.lcd_data01"/>
|
||||
<configSetting altId="glcdc0.lcd_data02.p600" configurationId="glcdc0.lcd_data02"/>
|
||||
<configSetting altId="glcdc0.lcd_data03.p601" configurationId="glcdc0.lcd_data03"/>
|
||||
<configSetting altId="glcdc0.lcd_data04.p602" configurationId="glcdc0.lcd_data04"/>
|
||||
<configSetting altId="glcdc0.lcd_data05.p610" configurationId="glcdc0.lcd_data05"/>
|
||||
<configSetting altId="glcdc0.lcd_data06.p609" configurationId="glcdc0.lcd_data06"/>
|
||||
<configSetting altId="glcdc0.lcd_data07.p608" configurationId="glcdc0.lcd_data07"/>
|
||||
<configSetting altId="glcdc0.lcd_data08.p115" configurationId="glcdc0.lcd_data08"/>
|
||||
<configSetting altId="glcdc0.lcd_data09.p114" configurationId="glcdc0.lcd_data09"/>
|
||||
<configSetting altId="glcdc0.lcd_data10.p113" configurationId="glcdc0.lcd_data10"/>
|
||||
<configSetting altId="glcdc0.lcd_data11.p112" configurationId="glcdc0.lcd_data11"/>
|
||||
<configSetting altId="glcdc0.lcd_data12.p111" configurationId="glcdc0.lcd_data12"/>
|
||||
<configSetting altId="glcdc0.lcd_data13.p301" configurationId="glcdc0.lcd_data13"/>
|
||||
<configSetting altId="glcdc0.lcd_data14.p302" configurationId="glcdc0.lcd_data14"/>
|
||||
<configSetting altId="glcdc0.lcd_data15.p303" configurationId="glcdc0.lcd_data15"/>
|
||||
<configSetting altId="glcdc0.mode.rgb565.free" configurationId="glcdc0.mode"/>
|
||||
<configSetting altId="gpt0.gtioca.p512" configurationId="gpt0.gtioca"/>
|
||||
<configSetting altId="gpt0.mode.gtiocaorgtiocb.free" configurationId="gpt0.mode"/>
|
||||
<configSetting altId="gpt2.gtiocb.p712" configurationId="gpt2.gtiocb"/>
|
||||
<configSetting altId="gpt2.mode.gtiocaorgtiocb.free" configurationId="gpt2.mode"/>
|
||||
<configSetting altId="gpt6.gtioca.p702" configurationId="gpt6.gtioca"/>
|
||||
<configSetting altId="gpt6.gtiocb.p703" configurationId="gpt6.gtiocb"/>
|
||||
<configSetting altId="gpt6.mode.gtiocaandgtiocb.free" configurationId="gpt6.mode"/>
|
||||
<configSetting altId="gpt8.gtioca.p605" configurationId="gpt8.gtioca"/>
|
||||
<configSetting altId="gpt8.gtiocb.p604" configurationId="gpt8.gtiocb"/>
|
||||
<configSetting altId="gpt8.mode.gtiocaorgtiocb.free" configurationId="gpt8.mode"/>
|
||||
|
|
@ -474,26 +894,129 @@
|
|||
<configSetting altId="p008.gpio_mode.gpio_mode_an" configurationId="p008.gpio_mode"/>
|
||||
<configSetting altId="p014.adc0.an05" configurationId="p014"/>
|
||||
<configSetting altId="p014.gpio_mode.gpio_mode_an" configurationId="p014.gpio_mode"/>
|
||||
<configSetting altId="p101.glcdc0.lcd_clk" configurationId="p101"/>
|
||||
<configSetting altId="p101.gpio_speed.gpio_speed_high" configurationId="p101.gpio_drivecapacity"/>
|
||||
<configSetting altId="p101.gpio_mode.gpio_mode_peripheral" configurationId="p101.gpio_mode"/>
|
||||
<configSetting altId="p106.glcdc0.lcd_data00" configurationId="p106"/>
|
||||
<configSetting altId="p106.gpio_speed.gpio_speed_high" configurationId="p106.gpio_drivecapacity"/>
|
||||
<configSetting altId="p106.gpio_mode.gpio_mode_peripheral" configurationId="p106.gpio_mode"/>
|
||||
<configSetting altId="p107.glcdc0.lcd_data01" configurationId="p107"/>
|
||||
<configSetting altId="p107.gpio_speed.gpio_speed_high" configurationId="p107.gpio_drivecapacity"/>
|
||||
<configSetting altId="p107.gpio_mode.gpio_mode_peripheral" configurationId="p107.gpio_mode"/>
|
||||
<configSetting altId="p108.debug0.swdio" configurationId="p108"/>
|
||||
<configSetting altId="p108.gpio_mode.gpio_mode_peripheral" configurationId="p108.gpio_mode"/>
|
||||
<configSetting altId="p109.sci9.txd" configurationId="p109"/>
|
||||
<configSetting altId="p109.gpio_mode.gpio_mode_peripheral" configurationId="p109.gpio_mode"/>
|
||||
<configSetting altId="p110.sci9.rxd" configurationId="p110"/>
|
||||
<configSetting altId="p110.gpio_mode.gpio_mode_peripheral" configurationId="p110.gpio_mode"/>
|
||||
<configSetting altId="p111.glcdc0.lcd_data12" configurationId="p111"/>
|
||||
<configSetting altId="p111.gpio_speed.gpio_speed_high" configurationId="p111.gpio_drivecapacity"/>
|
||||
<configSetting altId="p111.gpio_mode.gpio_mode_peripheral" configurationId="p111.gpio_mode"/>
|
||||
<configSetting altId="p112.glcdc0.lcd_data11" configurationId="p112"/>
|
||||
<configSetting altId="p112.gpio_speed.gpio_speed_high" configurationId="p112.gpio_drivecapacity"/>
|
||||
<configSetting altId="p112.gpio_mode.gpio_mode_peripheral" configurationId="p112.gpio_mode"/>
|
||||
<configSetting altId="p113.glcdc0.lcd_data10" configurationId="p113"/>
|
||||
<configSetting altId="p113.gpio_speed.gpio_speed_high" configurationId="p113.gpio_drivecapacity"/>
|
||||
<configSetting altId="p113.gpio_mode.gpio_mode_peripheral" configurationId="p113.gpio_mode"/>
|
||||
<configSetting altId="p114.glcdc0.lcd_data09" configurationId="p114"/>
|
||||
<configSetting altId="p114.gpio_speed.gpio_speed_high" configurationId="p114.gpio_drivecapacity"/>
|
||||
<configSetting altId="p114.gpio_mode.gpio_mode_peripheral" configurationId="p114.gpio_mode"/>
|
||||
<configSetting altId="p115.glcdc0.lcd_data08" configurationId="p115"/>
|
||||
<configSetting altId="p115.gpio_speed.gpio_speed_high" configurationId="p115.gpio_drivecapacity"/>
|
||||
<configSetting altId="p115.gpio_mode.gpio_mode_peripheral" configurationId="p115.gpio_mode"/>
|
||||
<configSetting altId="p205.sci4.txd" configurationId="p205"/>
|
||||
<configSetting altId="p205.gpio_mode.gpio_mode_peripheral" configurationId="p205.gpio_mode"/>
|
||||
<configSetting altId="p206.sci4.rxd" configurationId="p206"/>
|
||||
<configSetting altId="p206.gpio_mode.gpio_mode_peripheral" configurationId="p206.gpio_mode"/>
|
||||
<configSetting altId="p300.debug0.swclk" configurationId="p300"/>
|
||||
<configSetting altId="p300.gpio_mode.gpio_mode_peripheral" configurationId="p300.gpio_mode"/>
|
||||
<configSetting altId="p301.glcdc0.lcd_data13" configurationId="p301"/>
|
||||
<configSetting altId="p301.gpio_speed.gpio_speed_high" configurationId="p301.gpio_drivecapacity"/>
|
||||
<configSetting altId="p301.gpio_mode.gpio_mode_peripheral" configurationId="p301.gpio_mode"/>
|
||||
<configSetting altId="p302.glcdc0.lcd_data14" configurationId="p302"/>
|
||||
<configSetting altId="p302.gpio_speed.gpio_speed_high" configurationId="p302.gpio_drivecapacity"/>
|
||||
<configSetting altId="p302.gpio_mode.gpio_mode_peripheral" configurationId="p302.gpio_mode"/>
|
||||
<configSetting altId="p303.glcdc0.lcd_data15" configurationId="p303"/>
|
||||
<configSetting altId="p303.gpio_speed.gpio_speed_high" configurationId="p303.gpio_drivecapacity"/>
|
||||
<configSetting altId="p303.gpio_mode.gpio_mode_peripheral" configurationId="p303.gpio_mode"/>
|
||||
<configSetting altId="p401.etherc0.rmii.mdc" configurationId="p401"/>
|
||||
<configSetting altId="p401.gpio_speed.gpio_speed_high" configurationId="p401.gpio_drivecapacity"/>
|
||||
<configSetting altId="p401.gpio_mode.gpio_mode_peripheral" configurationId="p401.gpio_mode"/>
|
||||
<configSetting altId="p402.etherc0.rmii.mdio" configurationId="p402"/>
|
||||
<configSetting altId="p402.gpio_speed.gpio_speed_high" configurationId="p402.gpio_drivecapacity"/>
|
||||
<configSetting altId="p402.gpio_mode.gpio_mode_peripheral" configurationId="p402.gpio_mode"/>
|
||||
<configSetting altId="p408.etherc0.rmii.crs_dv" configurationId="p408"/>
|
||||
<configSetting altId="p408.gpio_speed.gpio_speed_high" configurationId="p408.gpio_drivecapacity"/>
|
||||
<configSetting altId="p408.gpio_mode.gpio_mode_peripheral" configurationId="p408.gpio_mode"/>
|
||||
<configSetting altId="p409.etherc0.rmii.rx_er" configurationId="p409"/>
|
||||
<configSetting altId="p409.gpio_speed.gpio_speed_high" configurationId="p409.gpio_drivecapacity"/>
|
||||
<configSetting altId="p409.gpio_mode.gpio_mode_peripheral" configurationId="p409.gpio_mode"/>
|
||||
<configSetting altId="p410.etherc0.rmii.rxd1" configurationId="p410"/>
|
||||
<configSetting altId="p410.gpio_speed.gpio_speed_high" configurationId="p410.gpio_drivecapacity"/>
|
||||
<configSetting altId="p410.gpio_mode.gpio_mode_peripheral" configurationId="p410.gpio_mode"/>
|
||||
<configSetting altId="p411.etherc0.rmii.rxd0" configurationId="p411"/>
|
||||
<configSetting altId="p411.gpio_speed.gpio_speed_high" configurationId="p411.gpio_drivecapacity"/>
|
||||
<configSetting altId="p411.gpio_mode.gpio_mode_peripheral" configurationId="p411.gpio_mode"/>
|
||||
<configSetting altId="p412.etherc0.rmii.ref50ck" configurationId="p412"/>
|
||||
<configSetting altId="p412.gpio_speed.gpio_speed_high" configurationId="p412.gpio_drivecapacity"/>
|
||||
<configSetting altId="p412.gpio_mode.gpio_mode_peripheral" configurationId="p412.gpio_mode"/>
|
||||
<configSetting altId="p413.etherc0.rmii.txd0" configurationId="p413"/>
|
||||
<configSetting altId="p413.gpio_speed.gpio_speed_high" configurationId="p413.gpio_drivecapacity"/>
|
||||
<configSetting altId="p413.gpio_mode.gpio_mode_peripheral" configurationId="p413.gpio_mode"/>
|
||||
<configSetting altId="p414.etherc0.rmii.txd1" configurationId="p414"/>
|
||||
<configSetting altId="p414.gpio_speed.gpio_speed_high" configurationId="p414.gpio_drivecapacity"/>
|
||||
<configSetting altId="p414.gpio_mode.gpio_mode_peripheral" configurationId="p414.gpio_mode"/>
|
||||
<configSetting altId="p415.etherc0.rmii.txd_en" configurationId="p415"/>
|
||||
<configSetting altId="p415.gpio_speed.gpio_speed_high" configurationId="p415.gpio_drivecapacity"/>
|
||||
<configSetting altId="p415.gpio_mode.gpio_mode_peripheral" configurationId="p415.gpio_mode"/>
|
||||
<configSetting altId="p500.sdhi1.clk" configurationId="p500"/>
|
||||
<configSetting altId="p500.gpio_speed.gpio_speed_high" configurationId="p500.gpio_drivecapacity"/>
|
||||
<configSetting altId="p500.gpio_mode.gpio_mode_peripheral" configurationId="p500.gpio_mode"/>
|
||||
<configSetting altId="p501.sdhi1.cmd" configurationId="p501"/>
|
||||
<configSetting altId="p501.gpio_speed.gpio_speed_high" configurationId="p501.gpio_drivecapacity"/>
|
||||
<configSetting altId="p501.gpio_mode.gpio_mode_peripheral" configurationId="p501.gpio_mode"/>
|
||||
<configSetting altId="p502.sdhi1.dat0" configurationId="p502"/>
|
||||
<configSetting altId="p502.gpio_speed.gpio_speed_high" configurationId="p502.gpio_drivecapacity"/>
|
||||
<configSetting altId="p502.gpio_mode.gpio_mode_peripheral" configurationId="p502.gpio_mode"/>
|
||||
<configSetting altId="p503.sdhi1.dat1" configurationId="p503"/>
|
||||
<configSetting altId="p503.gpio_speed.gpio_speed_high" configurationId="p503.gpio_drivecapacity"/>
|
||||
<configSetting altId="p503.gpio_mode.gpio_mode_peripheral" configurationId="p503.gpio_mode"/>
|
||||
<configSetting altId="p504.sdhi1.dat2" configurationId="p504"/>
|
||||
<configSetting altId="p504.gpio_speed.gpio_speed_high" configurationId="p504.gpio_drivecapacity"/>
|
||||
<configSetting altId="p504.gpio_mode.gpio_mode_peripheral" configurationId="p504.gpio_mode"/>
|
||||
<configSetting altId="p505.sdhi1.dat3" configurationId="p505"/>
|
||||
<configSetting altId="p505.gpio_speed.gpio_speed_high" configurationId="p505.gpio_drivecapacity"/>
|
||||
<configSetting altId="p505.gpio_mode.gpio_mode_peripheral" configurationId="p505.gpio_mode"/>
|
||||
<configSetting altId="p508.adc0.an20" configurationId="p508"/>
|
||||
<configSetting altId="p508.gpio_mode.gpio_mode_an" configurationId="p508.gpio_mode"/>
|
||||
<configSetting altId="p512.gpt0.gtioca" configurationId="p512"/>
|
||||
<configSetting altId="p512.gpio_mode.gpio_mode_peripheral" configurationId="p512.gpio_mode"/>
|
||||
<configSetting altId="p600.glcdc0.lcd_data02" configurationId="p600"/>
|
||||
<configSetting altId="p600.gpio_speed.gpio_speed_high" configurationId="p600.gpio_drivecapacity"/>
|
||||
<configSetting altId="p600.gpio_mode.gpio_mode_peripheral" configurationId="p600.gpio_mode"/>
|
||||
<configSetting altId="p601.glcdc0.lcd_data03" configurationId="p601"/>
|
||||
<configSetting altId="p601.gpio_speed.gpio_speed_high" configurationId="p601.gpio_drivecapacity"/>
|
||||
<configSetting altId="p601.gpio_mode.gpio_mode_peripheral" configurationId="p601.gpio_mode"/>
|
||||
<configSetting altId="p602.glcdc0.lcd_data04" configurationId="p602"/>
|
||||
<configSetting altId="p602.gpio_speed.gpio_speed_high" configurationId="p602.gpio_drivecapacity"/>
|
||||
<configSetting altId="p602.gpio_mode.gpio_mode_peripheral" configurationId="p602.gpio_mode"/>
|
||||
<configSetting altId="p604.gpt8.gtiocb" configurationId="p604"/>
|
||||
<configSetting altId="p604.gpio_mode.gpio_mode_peripheral" configurationId="p604.gpio_mode"/>
|
||||
<configSetting altId="p605.gpt8.gtioca" configurationId="p605"/>
|
||||
<configSetting altId="p605.gpio_mode.gpio_mode_peripheral" configurationId="p605.gpio_mode"/>
|
||||
<configSetting altId="p608.glcdc0.lcd_data07" configurationId="p608"/>
|
||||
<configSetting altId="p608.gpio_speed.gpio_speed_high" configurationId="p608.gpio_drivecapacity"/>
|
||||
<configSetting altId="p608.gpio_mode.gpio_mode_peripheral" configurationId="p608.gpio_mode"/>
|
||||
<configSetting altId="p609.glcdc0.lcd_data06" configurationId="p609"/>
|
||||
<configSetting altId="p609.gpio_speed.gpio_speed_high" configurationId="p609.gpio_drivecapacity"/>
|
||||
<configSetting altId="p609.gpio_mode.gpio_mode_peripheral" configurationId="p609.gpio_mode"/>
|
||||
<configSetting altId="p610.glcdc0.lcd_data05" configurationId="p610"/>
|
||||
<configSetting altId="p610.gpio_speed.gpio_speed_high" configurationId="p610.gpio_drivecapacity"/>
|
||||
<configSetting altId="p610.gpio_mode.gpio_mode_peripheral" configurationId="p610.gpio_mode"/>
|
||||
<configSetting altId="p702.gpt6.gtioca" configurationId="p702"/>
|
||||
<configSetting altId="p702.gpio_mode.gpio_mode_peripheral" configurationId="p702.gpio_mode"/>
|
||||
<configSetting altId="p703.gpt6.gtiocb" configurationId="p703"/>
|
||||
<configSetting altId="p703.gpio_mode.gpio_mode_peripheral" configurationId="p703.gpio_mode"/>
|
||||
<configSetting altId="p712.gpt2.gtiocb" configurationId="p712"/>
|
||||
<configSetting altId="p712.gpio_mode.gpio_mode_peripheral" configurationId="p712.gpio_mode"/>
|
||||
<configSetting altId="sci4.mode.asynchronous.free" configurationId="sci4.mode"/>
|
||||
|
|
@ -502,6 +1025,15 @@
|
|||
<configSetting altId="sci9.mode.asynchronous.free" configurationId="sci9.mode"/>
|
||||
<configSetting altId="sci9.rxd.p110" configurationId="sci9.rxd"/>
|
||||
<configSetting altId="sci9.txd.p109" configurationId="sci9.txd"/>
|
||||
<configSetting altId="sdhi1.clk.p500" configurationId="sdhi1.clk"/>
|
||||
<configSetting altId="sdhi1.cmd.p501" configurationId="sdhi1.cmd"/>
|
||||
<configSetting altId="sdhi1.dat0.p502" configurationId="sdhi1.dat0"/>
|
||||
<configSetting altId="sdhi1.dat1.p503" configurationId="sdhi1.dat1"/>
|
||||
<configSetting altId="sdhi1.dat2.p504" configurationId="sdhi1.dat2"/>
|
||||
<configSetting altId="sdhi1.dat3.p505" configurationId="sdhi1.dat3"/>
|
||||
<configSetting altId="sdhi1.mode.sd_mmc4mbit.free" configurationId="sdhi1.mode"/>
|
||||
<configSetting altId="sdhi1.pairing.free" configurationId="sdhi1.pairing"/>
|
||||
<configSetting altId="spi0.pairing.free" configurationId="spi0.pairing"/>
|
||||
</pincfg>
|
||||
</raPinConfiguration>
|
||||
</raConfiguration>
|
||||
|
|
|
|||
|
|
@ -22,5 +22,9 @@ elif rtconfig.PLATFORM in GetGCCLikePLATFORM():
|
|||
cwd + '/fsp/inc/api',
|
||||
cwd + '/fsp/inc/instances',]
|
||||
|
||||
if GetDepend('BSP_USING_G2D'):
|
||||
src += Glob(cwd + '/tes/dave2d/src/*.c')
|
||||
CPPPATH += [cwd + '/tes/dave2d/inc']
|
||||
|
||||
group = DefineGroup('ra', src, depend = [''], CPPPATH = CPPPATH)
|
||||
Return('group')
|
||||
|
|
|
|||
|
|
@ -1,410 +0,0 @@
|
|||
/***********************************************************************************************************************
|
||||
* Copyright [2020-2021] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
|
||||
* of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
|
||||
* sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
|
||||
* of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
|
||||
* right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
|
||||
* reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
|
||||
* IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
|
||||
* PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
|
||||
* DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
|
||||
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
|
||||
* (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
|
||||
* WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
|
||||
* OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
|
||||
* OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef R_ADC_API_H
|
||||
#define R_ADC_API_H
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @ingroup RENESAS_INTERFACES
|
||||
* @defgroup ADC_API ADC Interface
|
||||
* @brief Interface for A/D Converters.
|
||||
*
|
||||
* @section ADC_API_SUMMARY Summary
|
||||
* The ADC interface provides standard ADC functionality including one-shot mode (single scan), continuous scan and
|
||||
* group scan. It also allows configuration of hardware and software triggers for starting scans. After each conversion
|
||||
* an interrupt can be triggered, and if a callback function is provided, the call back is invoked with the
|
||||
* appropriate event information.
|
||||
*
|
||||
* Implemented by:
|
||||
* @ref ADC
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Includes board and MCU related header files. */
|
||||
#include "bsp_api.h"
|
||||
#include "r_elc_api.h"
|
||||
#include "r_transfer_api.h"
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Typedef definitions
|
||||
******************************************************************************/
|
||||
|
||||
/** ADC operation mode definitions */
|
||||
typedef enum e_adc_mode
|
||||
{
|
||||
ADC_MODE_SINGLE_SCAN = 0, ///< Single scan - one or more channels
|
||||
ADC_MODE_GROUP_SCAN = 1, ///< Two trigger sources to trigger scan for two groups which contain one or more channels
|
||||
ADC_MODE_CONTINUOUS_SCAN = 2, ///< Continuous scan - one or more channels
|
||||
} adc_mode_t;
|
||||
|
||||
/** ADC data resolution definitions */
|
||||
typedef enum e_adc_resolution
|
||||
{
|
||||
ADC_RESOLUTION_12_BIT = 0, ///< 12 bit resolution
|
||||
ADC_RESOLUTION_10_BIT = 1, ///< 10 bit resolution
|
||||
ADC_RESOLUTION_8_BIT = 2, ///< 8 bit resolution
|
||||
ADC_RESOLUTION_14_BIT = 3, ///< 14 bit resolution
|
||||
ADC_RESOLUTION_16_BIT = 4, ///< 16 bit resolution
|
||||
ADC_RESOLUTION_24_BIT = 5, ///< 24 bit resolution
|
||||
} adc_resolution_t;
|
||||
|
||||
/** ADC data alignment definitions */
|
||||
typedef enum e_adc_alignment
|
||||
{
|
||||
ADC_ALIGNMENT_RIGHT = 0, ///< Data alignment right
|
||||
ADC_ALIGNMENT_LEFT = 1 ///< Data alignment left
|
||||
} adc_alignment_t;
|
||||
|
||||
/** ADC trigger mode definitions */
|
||||
typedef enum e_adc_trigger
|
||||
{
|
||||
ADC_TRIGGER_SOFTWARE = 0, ///< Software trigger; not for group modes
|
||||
ADC_TRIGGER_SYNC_ELC = 2, ///< Synchronous trigger via ELC
|
||||
ADC_TRIGGER_ASYNC_EXTERNAL = 3, ///< External asynchronous trigger; not for group modes
|
||||
} adc_trigger_t;
|
||||
|
||||
/** ADC callback event definitions */
|
||||
typedef enum e_adc_event
|
||||
{
|
||||
ADC_EVENT_SCAN_COMPLETE, ///< Normal/Group A scan complete
|
||||
ADC_EVENT_SCAN_COMPLETE_GROUP_B, ///< Group B scan complete
|
||||
ADC_EVENT_CALIBRATION_COMPLETE, ///< Calibration complete
|
||||
ADC_EVENT_CONVERSION_COMPLETE, ///< Conversion complete
|
||||
ADC_EVENT_CALIBRATION_REQUEST, ///< Calibration requested
|
||||
ADC_EVENT_CONVERSION_ERROR, ///< Scan error
|
||||
ADC_EVENT_OVERFLOW, ///< Overflow occurred
|
||||
ADC_EVENT_LIMIT_CLIP, ///< Limiter clipping occurred
|
||||
ADC_EVENT_FIFO_READ_REQUEST, ///< FIFO read requested
|
||||
ADC_EVENT_FIFO_OVERFLOW, ///< FIFO overflow occurred
|
||||
ADC_EVENT_WINDOW_COMPARE_A, ///< Window A comparison condition met
|
||||
ADC_EVENT_WINDOW_COMPARE_B, ///< Window B comparison condition met
|
||||
} adc_event_t;
|
||||
|
||||
#ifndef BSP_OVERRIDE_ADC_CHANNEL_T
|
||||
|
||||
/** ADC channels */
|
||||
typedef enum e_adc_channel
|
||||
{
|
||||
ADC_CHANNEL_0 = 0, ///< ADC channel 0
|
||||
ADC_CHANNEL_1 = 1, ///< ADC channel 1
|
||||
ADC_CHANNEL_2 = 2, ///< ADC channel 2
|
||||
ADC_CHANNEL_3 = 3, ///< ADC channel 3
|
||||
ADC_CHANNEL_4 = 4, ///< ADC channel 4
|
||||
ADC_CHANNEL_5 = 5, ///< ADC channel 5
|
||||
ADC_CHANNEL_6 = 6, ///< ADC channel 6
|
||||
ADC_CHANNEL_7 = 7, ///< ADC channel 7
|
||||
ADC_CHANNEL_8 = 8, ///< ADC channel 8
|
||||
ADC_CHANNEL_9 = 9, ///< ADC channel 9
|
||||
ADC_CHANNEL_10 = 10, ///< ADC channel 10
|
||||
ADC_CHANNEL_11 = 11, ///< ADC channel 11
|
||||
ADC_CHANNEL_12 = 12, ///< ADC channel 12
|
||||
ADC_CHANNEL_13 = 13, ///< ADC channel 13
|
||||
ADC_CHANNEL_14 = 14, ///< ADC channel 14
|
||||
ADC_CHANNEL_15 = 15, ///< ADC channel 15
|
||||
ADC_CHANNEL_16 = 16, ///< ADC channel 16
|
||||
ADC_CHANNEL_17 = 17, ///< ADC channel 17
|
||||
ADC_CHANNEL_18 = 18, ///< ADC channel 18
|
||||
ADC_CHANNEL_19 = 19, ///< ADC channel 19
|
||||
ADC_CHANNEL_20 = 20, ///< ADC channel 20
|
||||
ADC_CHANNEL_21 = 21, ///< ADC channel 21
|
||||
ADC_CHANNEL_22 = 22, ///< ADC channel 22
|
||||
ADC_CHANNEL_23 = 23, ///< ADC channel 23
|
||||
ADC_CHANNEL_24 = 24, ///< ADC channel 24
|
||||
ADC_CHANNEL_25 = 25, ///< ADC channel 25
|
||||
ADC_CHANNEL_26 = 26, ///< ADC channel 26
|
||||
ADC_CHANNEL_27 = 27, ///< ADC channel 27
|
||||
ADC_CHANNEL_28 = 28, ///< ADC channel 28
|
||||
ADC_CHANNEL_DUPLEX_A = 50, ///< Data duplexing register A
|
||||
ADC_CHANNEL_DUPLEX_B = 51, ///< Data duplexing register B
|
||||
ADC_CHANNEL_DUPLEX = -4, ///< Data duplexing register
|
||||
ADC_CHANNEL_TEMPERATURE = -3, ///< Temperature sensor output
|
||||
ADC_CHANNEL_VOLT = -2, ///< Internal reference voltage
|
||||
} adc_channel_t;
|
||||
|
||||
#endif
|
||||
|
||||
typedef enum e_adc_group_id
|
||||
{
|
||||
ADC_GROUP_ID_0 = 0, ///< Group ID 0
|
||||
ADC_GROUP_ID_1 = 1, ///< Group ID 1
|
||||
ADC_GROUP_ID_2 = 2, ///< Group ID 2
|
||||
ADC_GROUP_ID_3 = 3, ///< Group ID 3
|
||||
ADC_GROUP_ID_4 = 4, ///< Group ID 4
|
||||
ADC_GROUP_ID_5 = 5, ///< Group ID 5
|
||||
ADC_GROUP_ID_6 = 6, ///< Group ID 6
|
||||
ADC_GROUP_ID_7 = 7, ///< Group ID 7
|
||||
ADC_GROUP_ID_8 = 8, ///< Group ID 8
|
||||
} adc_group_id_t;
|
||||
|
||||
typedef enum e_adc_group_mask
|
||||
{
|
||||
ADC_GROUP_MASK_NONE = 0x000, ///< Group Mask Unknown or None
|
||||
ADC_GROUP_MASK_0 = 0x001, ///< Group Mask 0
|
||||
ADC_GROUP_MASK_1 = 0x002, ///< Group Mask 1
|
||||
ADC_GROUP_MASK_2 = 0x004, ///< Group Mask 2
|
||||
ADC_GROUP_MASK_3 = 0x008, ///< Group Mask 3
|
||||
ADC_GROUP_MASK_4 = 0x010, ///< Group Mask 4
|
||||
ADC_GROUP_MASK_5 = 0x020, ///< Group Mask 5
|
||||
ADC_GROUP_MASK_6 = 0x040, ///< Group Mask 6
|
||||
ADC_GROUP_MASK_7 = 0x080, ///< Group Mask 7
|
||||
ADC_GROUP_MASK_8 = 0x100, ///< Group Mask 8
|
||||
ADC_GROUP_MASK_ALL = 0x1FF, ///< All Groups
|
||||
} adc_group_mask_t;
|
||||
|
||||
/** ADC states. */
|
||||
typedef enum e_adc_state
|
||||
{
|
||||
ADC_STATE_IDLE = 0, ///< ADC is idle
|
||||
ADC_STATE_SCAN_IN_PROGRESS = 1, ///< ADC scan in progress
|
||||
} adc_state_t;
|
||||
|
||||
/** ADC status. */
|
||||
typedef struct st_adc_status
|
||||
{
|
||||
adc_state_t state; ///< Current state
|
||||
} adc_status_t;
|
||||
|
||||
/** ADC callback arguments definitions */
|
||||
typedef struct st_adc_callback_args
|
||||
{
|
||||
uint16_t unit; ///< ADC device in use
|
||||
adc_event_t event; ///< ADC callback event
|
||||
void const * p_context; ///< Placeholder for user data
|
||||
adc_channel_t channel; ///< Channel of conversion result. Only valid for r_adc ADC_EVENT_CONVERSION_COMPLETE
|
||||
uint64_t channel_mask; ///< Channel mask for conversion result. Only valid for r_adc_b
|
||||
adc_group_mask_t group_mask; ///< Group Mask
|
||||
} adc_callback_args_t;
|
||||
|
||||
/** ADC Information Structure for Transfer Interface */
|
||||
typedef struct st_adc_info
|
||||
{
|
||||
__I void * p_address; ///< The address to start reading the data from
|
||||
uint32_t length; ///< The total number of transfers to read
|
||||
|
||||
transfer_size_t transfer_size; ///< The size of each transfer
|
||||
elc_peripheral_t elc_peripheral; ///< Name of the peripheral in the ELC list
|
||||
elc_event_t elc_event; ///< Name of the ELC event for the peripheral
|
||||
uint32_t calibration_data; ///< Temperature sensor calibration data (0xFFFFFFFF if unsupported) for reference voltage
|
||||
int16_t slope_microvolts; ///< Temperature sensor slope in microvolts/degrees C
|
||||
bool calibration_ongoing; ///< Calibration is in progress.
|
||||
} adc_info_t;
|
||||
|
||||
/** ADC general configuration */
|
||||
typedef struct st_adc_cfg
|
||||
{
|
||||
uint16_t unit; ///< ADC unit to be used
|
||||
adc_mode_t mode; ///< ADC operation mode
|
||||
adc_resolution_t resolution; ///< ADC resolution
|
||||
adc_alignment_t alignment; ///< Specify left or right alignment; ignored if addition used
|
||||
adc_trigger_t trigger; ///< Default and Group A trigger source
|
||||
IRQn_Type scan_end_irq; ///< Scan end IRQ number
|
||||
IRQn_Type scan_end_b_irq; ///< Scan end group B IRQ number
|
||||
uint8_t scan_end_ipl; ///< Scan end interrupt priority
|
||||
uint8_t scan_end_b_ipl; ///< Scan end group B interrupt priority
|
||||
void (* p_callback)(adc_callback_args_t * p_args); ///< Callback function; set to NULL for none
|
||||
void const * p_context; ///< Placeholder for user data. Passed to the user callback in @ref adc_callback_args_t.
|
||||
void const * p_extend; ///< Extension parameter for hardware specific settings
|
||||
} adc_cfg_t;
|
||||
|
||||
/** ADC control block. Allocate using driver instance control structure from driver instance header file. */
|
||||
typedef void adc_ctrl_t;
|
||||
|
||||
/** ADC functions implemented at the HAL layer will follow this API. */
|
||||
typedef struct st_adc_api
|
||||
{
|
||||
/** Initialize ADC Unit; apply power, set the operational mode, trigger sources, interrupt priority,
|
||||
* and configurations common to all channels and sensors.
|
||||
* @par Implemented as
|
||||
* - @ref R_ADC_Open()
|
||||
* - @ref R_ADC_B_Open()
|
||||
* - @ref R_SDADC_Open()
|
||||
*
|
||||
* @pre Configure peripheral clocks, ADC pins and IRQs prior to calling this function.
|
||||
* @param[in] p_ctrl Pointer to control handle structure
|
||||
* @param[in] p_cfg Pointer to configuration structure
|
||||
*/
|
||||
fsp_err_t (* open)(adc_ctrl_t * const p_ctrl, adc_cfg_t const * const p_cfg);
|
||||
|
||||
/** Configure the scan including the channels, groups, and scan triggers to be used for the unit that
|
||||
* was initialized in the open call. Some configurations are not supported for all implementations.
|
||||
* See implementation for details.
|
||||
* @par Implemented as
|
||||
* - @ref R_ADC_ScanCfg()
|
||||
* - @ref R_ADC_B_ScanCfg()
|
||||
* - @ref R_SDADC_ScanCfg()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control handle structure
|
||||
* @param[in] p_extend See implementation for details
|
||||
*/
|
||||
fsp_err_t (* scanCfg)(adc_ctrl_t * const p_ctrl, void const * const p_extend);
|
||||
|
||||
/** Start the scan (in case of a software trigger), or enable the hardware trigger.
|
||||
* @par Implemented as
|
||||
* - @ref R_ADC_ScanStart()
|
||||
* - @ref R_SDADC_ScanStart()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control handle structure
|
||||
*/
|
||||
fsp_err_t (* scanStart)(adc_ctrl_t * const p_ctrl);
|
||||
|
||||
/** Start the scan group (in case of a software trigger), or enable the hardware trigger.
|
||||
* @par Implemented as
|
||||
* - @ref R_ADC_B_ScanGroupStart()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control handle structure
|
||||
* @param[in] group_mask Mask of groups to start
|
||||
*/
|
||||
fsp_err_t (* scanGroupStart)(adc_ctrl_t * p_ctrl, adc_group_mask_t group_mask);
|
||||
|
||||
/** Stop the ADC scan (in case of a software trigger), or disable the hardware trigger.
|
||||
* @par Implemented as
|
||||
* - @ref R_ADC_ScanStop()
|
||||
* - @ref R_SDADC_ScanStop()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control handle structure
|
||||
*/
|
||||
fsp_err_t (* scanStop)(adc_ctrl_t * const p_ctrl);
|
||||
|
||||
/** Check scan status.
|
||||
* @par Implemented as
|
||||
* - @ref R_ADC_StatusGet()
|
||||
* - @ref R_ADC_B_StatusGet()
|
||||
* - @ref R_SDADC_StatusGet()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control handle structure
|
||||
* @param[out] p_status Pointer to store current status in
|
||||
*/
|
||||
fsp_err_t (* scanStatusGet)(adc_ctrl_t * const p_ctrl, adc_status_t * p_status);
|
||||
|
||||
/** Read ADC conversion result.
|
||||
* @par Implemented as
|
||||
* - @ref R_ADC_Read()
|
||||
* - @ref R_ADC_B_Read()
|
||||
* - @ref R_SDADC_Read()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control handle structure
|
||||
* @param[in] reg_id ADC channel to read (see enumeration adc_channel_t)
|
||||
* @param[in] p_data Pointer to variable to load value into.
|
||||
*/
|
||||
fsp_err_t (* read)(adc_ctrl_t * const p_ctrl, adc_channel_t const reg_id, uint16_t * const p_data);
|
||||
|
||||
/** Read ADC conversion result into a 32-bit word.
|
||||
* @par Implemented as
|
||||
* - @ref R_ADC_Read32()
|
||||
* - @ref R_ADC_B_Read32()
|
||||
* - @ref R_SDADC_Read32()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control handle structure
|
||||
* @param[in] reg_id ADC channel to read (see enumeration adc_channel_t)
|
||||
* @param[in] p_data Pointer to variable to load value into.
|
||||
*/
|
||||
fsp_err_t (* read32)(adc_ctrl_t * const p_ctrl, adc_channel_t const reg_id, uint32_t * const p_data);
|
||||
|
||||
/** Calibrate ADC or associated PGA (programmable gain amplifier). The driver may require implementation specific
|
||||
* arguments to the p_extend input. Not supported for all implementations. See implementation for details.
|
||||
* @par Implemented as
|
||||
* - @ref R_ADC_Calibrate()
|
||||
* - @ref R_ADC_B_Calibrate()
|
||||
* - @ref R_SDADC_Calibrate()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control handle structure
|
||||
* @param[in] p_extend Pointer to implementation specific arguments
|
||||
*/
|
||||
fsp_err_t (* calibrate)(adc_ctrl_t * const p_ctrl, void const * p_extend);
|
||||
|
||||
/** Set offset for input PGA configured for differential input. Not supported for all implementations.
|
||||
* See implementation for details.
|
||||
* @par Implemented as
|
||||
* - @ref R_SDADC_OffsetSet()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control handle structure
|
||||
* @param[in] reg_id ADC channel to read (see enumeration adc_channel_t)
|
||||
* @param[in] offset See implementation for details.
|
||||
*/
|
||||
fsp_err_t (* offsetSet)(adc_ctrl_t * const p_ctrl, adc_channel_t const reg_id, int32_t const offset);
|
||||
|
||||
/**
|
||||
* Specify callback function and optional context pointer and working memory pointer.
|
||||
* @par Implemented as
|
||||
* - @ref R_ADC_CallbackSet()
|
||||
* - @ref R_ADC_B_CallbackSet()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to the ADC control block.
|
||||
* @param[in] p_callback Callback function
|
||||
* @param[in] p_context Pointer to send to callback function
|
||||
* @param[in] p_working_memory Pointer to volatile memory where callback structure can be allocated.
|
||||
* Callback arguments allocated here are only valid during the callback.
|
||||
*/
|
||||
fsp_err_t (* callbackSet)(adc_ctrl_t * const p_api_ctrl, void (* p_callback)(adc_callback_args_t *),
|
||||
void const * const p_context, adc_callback_args_t * const p_callback_memory);
|
||||
|
||||
/** Close the specified ADC unit by ending any scan in progress, disabling interrupts, and removing power to the
|
||||
* specified A/D unit.
|
||||
* @par Implemented as
|
||||
* - @ref R_ADC_Close()
|
||||
* - @ref R_ADC_B_Close()
|
||||
* - @ref R_SDADC_Close()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control handle structure
|
||||
*/
|
||||
fsp_err_t (* close)(adc_ctrl_t * const p_ctrl);
|
||||
|
||||
/** Return the ADC data register address of the first (lowest number) channel and the total number of bytes
|
||||
* to be read in order for the DTC/DMAC to read the conversion results of all configured channels.
|
||||
* Return the temperature sensor calibration and slope data.
|
||||
* @par Implemented as
|
||||
* - @ref R_ADC_InfoGet()
|
||||
* - @ref R_ADC_B_InfoGet()
|
||||
* - @ref R_SDADC_InfoGet()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control handle structure
|
||||
* @param[out] p_adc_info Pointer to ADC information structure
|
||||
*/
|
||||
fsp_err_t (* infoGet)(adc_ctrl_t * const p_ctrl, adc_info_t * const p_adc_info);
|
||||
} adc_api_t;
|
||||
|
||||
/** This structure encompasses everything that is needed to use an instance of this interface. */
|
||||
typedef struct st_adc_instance
|
||||
{
|
||||
adc_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance
|
||||
adc_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance
|
||||
void const * p_channel_cfg; ///< Pointer to the channel configuration structure for this instance
|
||||
adc_api_t const * p_api; ///< Pointer to the API structure for this instance
|
||||
} adc_instance_t;
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @} (end defgroup ADC_API)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
#endif
|
||||
|
|
@ -1,185 +0,0 @@
|
|||
/***********************************************************************************************************************
|
||||
* Copyright [2020-2021] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
|
||||
* of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
|
||||
* sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
|
||||
* of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
|
||||
* right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
|
||||
* reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
|
||||
* IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
|
||||
* PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
|
||||
* DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
|
||||
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
|
||||
* (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
|
||||
* WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
|
||||
* OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
|
||||
* OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @ingroup RENESAS_INTERFACES
|
||||
* @defgroup ELC_API ELC Interface
|
||||
* @brief Interface for the Event Link Controller.
|
||||
*
|
||||
*
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef R_ELC_API_H
|
||||
#define R_ELC_API_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Register definitions, common services and error codes. */
|
||||
#include "bsp_api.h"
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
#ifndef ELC_PERIPHERAL_NUM
|
||||
#define ELC_PERIPHERAL_NUM (23U)
|
||||
#endif
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef BSP_OVERRIDE_ELC_PERIPHERAL_T
|
||||
|
||||
/** Possible peripherals to be linked to event signals (not all available on all MCUs) */
|
||||
typedef enum e_elc_peripheral
|
||||
{
|
||||
ELC_PERIPHERAL_GPT_A = (0),
|
||||
ELC_PERIPHERAL_GPT_B = (1),
|
||||
ELC_PERIPHERAL_GPT_C = (2),
|
||||
ELC_PERIPHERAL_GPT_D = (3),
|
||||
ELC_PERIPHERAL_GPT_E = (4),
|
||||
ELC_PERIPHERAL_GPT_F = (5),
|
||||
ELC_PERIPHERAL_GPT_G = (6),
|
||||
ELC_PERIPHERAL_GPT_H = (7),
|
||||
ELC_PERIPHERAL_ADC0 = (8),
|
||||
ELC_PERIPHERAL_ADC0_B = (9),
|
||||
ELC_PERIPHERAL_ADC1 = (10),
|
||||
ELC_PERIPHERAL_ADC1_B = (11),
|
||||
ELC_PERIPHERAL_DAC0 = (12),
|
||||
ELC_PERIPHERAL_DAC1 = (13),
|
||||
ELC_PERIPHERAL_IOPORT1 = (14),
|
||||
ELC_PERIPHERAL_IOPORT2 = (15),
|
||||
ELC_PERIPHERAL_IOPORT3 = (16),
|
||||
ELC_PERIPHERAL_IOPORT4 = (17),
|
||||
ELC_PERIPHERAL_CTSU = (18),
|
||||
ELC_PERIPHERAL_DA8_0 = (19),
|
||||
ELC_PERIPHERAL_DA8_1 = (20),
|
||||
ELC_PERIPHERAL_SDADC0 = (22),
|
||||
} elc_peripheral_t;
|
||||
|
||||
#endif
|
||||
|
||||
/** ELC control block. Allocate an instance specific control block to pass into the ELC API calls.
|
||||
* @par Implemented as
|
||||
* - elc_instance_ctrl_t
|
||||
*/
|
||||
typedef void elc_ctrl_t;
|
||||
|
||||
/** Main configuration structure for the Event Link Controller */
|
||||
typedef struct st_elc_cfg
|
||||
{
|
||||
elc_event_t const link[ELC_PERIPHERAL_NUM]; ///< Event link register (ELSR) settings
|
||||
} elc_cfg_t;
|
||||
|
||||
/** Software event number */
|
||||
typedef enum e_elc_software_event
|
||||
{
|
||||
ELC_SOFTWARE_EVENT_0, ///< Software event 0
|
||||
ELC_SOFTWARE_EVENT_1, ///< Software event 1
|
||||
} elc_software_event_t;
|
||||
|
||||
/** ELC driver structure. General ELC functions implemented at the HAL layer follow this API. */
|
||||
typedef struct st_elc_api
|
||||
{
|
||||
/** Initialize all links in the Event Link Controller.
|
||||
* @par Implemented as
|
||||
* - @ref R_ELC_Open()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] p_cfg Pointer to configuration structure.
|
||||
**/
|
||||
fsp_err_t (* open)(elc_ctrl_t * const p_ctrl, elc_cfg_t const * const p_cfg);
|
||||
|
||||
/** Disable all links in the Event Link Controller and close the API.
|
||||
* @par Implemented as
|
||||
* - @ref R_ELC_Close()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
**/
|
||||
fsp_err_t (* close)(elc_ctrl_t * const p_ctrl);
|
||||
|
||||
/** Generate a software event in the Event Link Controller.
|
||||
* @par Implemented as
|
||||
* - @ref R_ELC_SoftwareEventGenerate()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] eventNum Software event number to be generated.
|
||||
**/
|
||||
fsp_err_t (* softwareEventGenerate)(elc_ctrl_t * const p_ctrl, elc_software_event_t event_num);
|
||||
|
||||
/** Create a single event link.
|
||||
* @par Implemented as
|
||||
* - @ref R_ELC_LinkSet()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] peripheral The peripheral block that will receive the event signal.
|
||||
* @param[in] signal The event signal.
|
||||
**/
|
||||
fsp_err_t (* linkSet)(elc_ctrl_t * const p_ctrl, elc_peripheral_t peripheral, elc_event_t signal);
|
||||
|
||||
/** Break an event link.
|
||||
* @par Implemented as
|
||||
* - @ref R_ELC_LinkBreak()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
* @param[in] peripheral The peripheral that should no longer be linked.
|
||||
**/
|
||||
fsp_err_t (* linkBreak)(elc_ctrl_t * const p_ctrl, elc_peripheral_t peripheral);
|
||||
|
||||
/** Enable the operation of the Event Link Controller.
|
||||
* @par Implemented as
|
||||
* - @ref R_ELC_Enable()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
**/
|
||||
fsp_err_t (* enable)(elc_ctrl_t * const p_ctrl);
|
||||
|
||||
/** Disable the operation of the Event Link Controller.
|
||||
* @par Implemented as
|
||||
* - @ref R_ELC_Disable()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control structure.
|
||||
**/
|
||||
fsp_err_t (* disable)(elc_ctrl_t * const p_ctrl);
|
||||
} elc_api_t;
|
||||
|
||||
/** This structure encompasses everything that is needed to use an instance of this interface. */
|
||||
typedef struct st_elc_instance
|
||||
{
|
||||
elc_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance
|
||||
elc_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance
|
||||
elc_api_t const * p_api; ///< Pointer to the API structure for this instance
|
||||
} elc_instance_t;
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @} (end addtogroup ELC_API)
|
||||
**********************************************************************************************************************/
|
||||
|
|
@ -1,332 +0,0 @@
|
|||
/***********************************************************************************************************************
|
||||
* Copyright [2020-2021] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
|
||||
* of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
|
||||
* sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
|
||||
* of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
|
||||
* right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
|
||||
* reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
|
||||
* IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
|
||||
* PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
|
||||
* DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
|
||||
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
|
||||
* (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
|
||||
* WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
|
||||
* OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
|
||||
* OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef R_TIMER_API_H
|
||||
#define R_TIMER_API_H
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @defgroup TIMER_API Timer Interface
|
||||
* @ingroup RENESAS_INTERFACES
|
||||
* @brief Interface for timer functions.
|
||||
*
|
||||
* @section TIMER_API_SUMMARY Summary
|
||||
* The general timer interface provides standard timer functionality including periodic mode, one-shot mode, PWM output,
|
||||
* and free-running timer mode. After each timer cycle (overflow or underflow), an interrupt can be triggered.
|
||||
*
|
||||
* If an instance supports output compare mode, it is provided in the extension configuration
|
||||
* timer_on_<instance>_cfg_t defined in r_<instance>.h.
|
||||
*
|
||||
* Implemented by:
|
||||
* - @ref GPT
|
||||
* - @ref AGT
|
||||
*
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Includes board and MCU related header files. */
|
||||
#include "bsp_api.h"
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Leading zeroes removed to avoid coding standard violation. */
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** Events that can trigger a callback function */
|
||||
typedef enum e_timer_event
|
||||
{
|
||||
TIMER_EVENT_CYCLE_END, ///< Requested timer delay has expired or timer has wrapped around
|
||||
TIMER_EVENT_CREST = TIMER_EVENT_CYCLE_END, ///< Timer crest event (counter is at a maximum, triangle-wave PWM only)
|
||||
TIMER_EVENT_CAPTURE_A, ///< A capture has occurred on signal A
|
||||
TIMER_EVENT_CAPTURE_B, ///< A capture has occurred on signal B
|
||||
TIMER_EVENT_TROUGH, ///< Timer trough event (counter is 0, triangle-wave PWM only
|
||||
} timer_event_t;
|
||||
|
||||
/** Timer variant types. */
|
||||
typedef enum e_timer_variant
|
||||
{
|
||||
TIMER_VARIANT_32_BIT, ///< 32-bit timer
|
||||
TIMER_VARIANT_16_BIT ///< 16-bit timer
|
||||
} timer_variant_t;
|
||||
|
||||
/** Callback function parameter data */
|
||||
typedef struct st_timer_callback_args
|
||||
{
|
||||
/** Placeholder for user data. Set in @ref timer_api_t::open function in @ref timer_cfg_t. */
|
||||
void const * p_context;
|
||||
timer_event_t event; ///< The event can be used to identify what caused the callback.
|
||||
|
||||
/** Most recent capture, only valid if event is TIMER_EVENT_CAPTURE_A or TIMER_EVENT_CAPTURE_B. */
|
||||
uint32_t capture;
|
||||
} timer_callback_args_t;
|
||||
|
||||
/** Timer control block. Allocate an instance specific control block to pass into the timer API calls.
|
||||
* @par Implemented as
|
||||
* - gpt_instance_ctrl_t
|
||||
* - agt_instance_ctrl_t
|
||||
*/
|
||||
typedef void timer_ctrl_t;
|
||||
|
||||
/** Possible status values returned by @ref timer_api_t::statusGet. */
|
||||
typedef enum e_timer_state
|
||||
{
|
||||
TIMER_STATE_STOPPED = 0, ///< Timer is stopped
|
||||
TIMER_STATE_COUNTING = 1, ///< Timer is running
|
||||
} timer_state_t;
|
||||
|
||||
/** Timer operational modes */
|
||||
typedef enum e_timer_mode
|
||||
{
|
||||
TIMER_MODE_PERIODIC, ///< Timer restarts after period elapses.
|
||||
TIMER_MODE_ONE_SHOT, ///< Timer stops after period elapses.
|
||||
TIMER_MODE_PWM, ///< Timer generates saw-wave PWM output.
|
||||
TIMER_MODE_TRIANGLE_WAVE_SYMMETRIC_PWM = 4U, ///< Timer generates symmetric triangle-wave PWM output.
|
||||
TIMER_MODE_TRIANGLE_WAVE_ASYMMETRIC_PWM = 5U, ///< Timer generates asymmetric triangle-wave PWM output.
|
||||
|
||||
/**
|
||||
* Timer generates Asymmetric Triangle-wave PWM output. In PWM mode 3, the duty cycle does
|
||||
* not need to be updated at each tough/crest interrupt. Instead, the trough and crest duty cycle values can be
|
||||
* set once and only need to be updated when the application needs to change the duty cycle.
|
||||
*/
|
||||
TIMER_MODE_TRIANGLE_WAVE_ASYMMETRIC_PWM_MODE3 = 6U,
|
||||
} timer_mode_t;
|
||||
|
||||
/** Direction of timer count */
|
||||
typedef enum e_timer_direction
|
||||
{
|
||||
TIMER_DIRECTION_DOWN = 0, ///< Timer count goes up
|
||||
TIMER_DIRECTION_UP = 1 ///< Timer count goes down
|
||||
} timer_direction_t;
|
||||
|
||||
/** PCLK divisors */
|
||||
typedef enum e_timer_source_div
|
||||
{
|
||||
TIMER_SOURCE_DIV_1 = 0, ///< Timer clock source divided by 1
|
||||
TIMER_SOURCE_DIV_2 = 1, ///< Timer clock source divided by 2
|
||||
TIMER_SOURCE_DIV_4 = 2, ///< Timer clock source divided by 4
|
||||
TIMER_SOURCE_DIV_8 = 3, ///< Timer clock source divided by 8
|
||||
TIMER_SOURCE_DIV_16 = 4, ///< Timer clock source divided by 16
|
||||
TIMER_SOURCE_DIV_32 = 5, ///< Timer clock source divided by 32
|
||||
TIMER_SOURCE_DIV_64 = 6, ///< Timer clock source divided by 64
|
||||
TIMER_SOURCE_DIV_128 = 7, ///< Timer clock source divided by 128
|
||||
TIMER_SOURCE_DIV_256 = 8, ///< Timer clock source divided by 256
|
||||
TIMER_SOURCE_DIV_512 = 9, ///< Timer clock source divided by 512
|
||||
TIMER_SOURCE_DIV_1024 = 10, ///< Timer clock source divided by 1024
|
||||
} timer_source_div_t;
|
||||
|
||||
/** Timer information structure to store various information for a timer resource */
|
||||
typedef struct st_timer_info
|
||||
{
|
||||
timer_direction_t count_direction; ///< Clock counting direction of the timer.
|
||||
uint32_t clock_frequency; ///< Clock frequency of the timer counter.
|
||||
|
||||
/** Period in raw timer counts.
|
||||
* @note For triangle wave PWM modes, the full period is double this value.
|
||||
*/
|
||||
uint32_t period_counts;
|
||||
} timer_info_t;
|
||||
|
||||
/** Current timer status. */
|
||||
typedef struct st_timer_status
|
||||
{
|
||||
uint32_t counter; ///< Current counter value
|
||||
timer_state_t state; ///< Current timer state (running or stopped)
|
||||
} timer_status_t;
|
||||
|
||||
/** User configuration structure, used in open function */
|
||||
typedef struct st_timer_cfg
|
||||
{
|
||||
timer_mode_t mode; ///< Select enumerated value from @ref timer_mode_t
|
||||
|
||||
/* Period in raw timer counts.
|
||||
* @note For triangle wave PWM modes, enter the period of half the triangle wave, or half the desired period.
|
||||
*/
|
||||
uint32_t period_counts; ///< Period in raw timer counts
|
||||
timer_source_div_t source_div; ///< Source clock divider
|
||||
uint32_t duty_cycle_counts; ///< Duty cycle in counts
|
||||
|
||||
/** Select a channel corresponding to the channel number of the hardware. */
|
||||
uint8_t channel;
|
||||
uint8_t cycle_end_ipl; ///< Cycle end interrupt priority
|
||||
IRQn_Type cycle_end_irq; ///< Cycle end interrupt
|
||||
|
||||
/** Callback provided when a timer ISR occurs. Set to NULL for no CPU interrupt. */
|
||||
void (* p_callback)(timer_callback_args_t * p_args);
|
||||
|
||||
/** Placeholder for user data. Passed to the user callback in @ref timer_callback_args_t. */
|
||||
void const * p_context;
|
||||
void const * p_extend; ///< Extension parameter for hardware specific settings.
|
||||
} timer_cfg_t;
|
||||
|
||||
/** Timer API structure. General timer functions implemented at the HAL layer follow this API. */
|
||||
typedef struct st_timer_api
|
||||
{
|
||||
/** Initial configuration.
|
||||
* @par Implemented as
|
||||
* - @ref R_GPT_Open()
|
||||
* - @ref R_AGT_Open()
|
||||
*
|
||||
* @param[in] p_ctrl Pointer to control block. Must be declared by user. Elements set here.
|
||||
* @param[in] p_cfg Pointer to configuration structure. All elements of this structure must be set by user.
|
||||
*/
|
||||
fsp_err_t (* open)(timer_ctrl_t * const p_ctrl, timer_cfg_t const * const p_cfg);
|
||||
|
||||
/** Start the counter.
|
||||
* @par Implemented as
|
||||
* - @ref R_GPT_Start()
|
||||
* - @ref R_AGT_Start()
|
||||
*
|
||||
* @param[in] p_ctrl Control block set in @ref timer_api_t::open call for this timer.
|
||||
*/
|
||||
fsp_err_t (* start)(timer_ctrl_t * const p_ctrl);
|
||||
|
||||
/** Stop the counter.
|
||||
* @par Implemented as
|
||||
* - @ref R_GPT_Stop()
|
||||
* - @ref R_AGT_Stop()
|
||||
*
|
||||
* @param[in] p_ctrl Control block set in @ref timer_api_t::open call for this timer.
|
||||
*/
|
||||
fsp_err_t (* stop)(timer_ctrl_t * const p_ctrl);
|
||||
|
||||
/** Reset the counter to the initial value.
|
||||
* @par Implemented as
|
||||
* - @ref R_GPT_Reset()
|
||||
* - @ref R_AGT_Reset()
|
||||
*
|
||||
* @param[in] p_ctrl Control block set in @ref timer_api_t::open call for this timer.
|
||||
*/
|
||||
fsp_err_t (* reset)(timer_ctrl_t * const p_ctrl);
|
||||
|
||||
/** Enables input capture.
|
||||
* @par Implemented as
|
||||
* - @ref R_GPT_Enable()
|
||||
* - @ref R_AGT_Enable()
|
||||
*
|
||||
* @param[in] p_ctrl Control block set in @ref timer_api_t::open call for this timer.
|
||||
*/
|
||||
fsp_err_t (* enable)(timer_ctrl_t * const p_ctrl);
|
||||
|
||||
/** Disables input capture.
|
||||
* @par Implemented as
|
||||
* - @ref R_GPT_Disable()
|
||||
* - @ref R_AGT_Disable()
|
||||
*
|
||||
* @param[in] p_ctrl Control block set in @ref timer_api_t::open call for this timer.
|
||||
*/
|
||||
fsp_err_t (* disable)(timer_ctrl_t * const p_ctrl);
|
||||
|
||||
/** Set the time until the timer expires. See implementation for details of period update timing.
|
||||
*
|
||||
* @par Implemented as
|
||||
* - @ref R_GPT_PeriodSet()
|
||||
* - @ref R_AGT_PeriodSet()
|
||||
*
|
||||
* @note Timer expiration may or may not generate a CPU interrupt based on how the timer is configured in
|
||||
* @ref timer_api_t::open.
|
||||
* @param[in] p_ctrl Control block set in @ref timer_api_t::open call for this timer.
|
||||
* @param[in] p_period Time until timer should expire.
|
||||
*/
|
||||
fsp_err_t (* periodSet)(timer_ctrl_t * const p_ctrl, uint32_t const period);
|
||||
|
||||
/** Sets the number of counts for the pin level to be high. If the timer is counting, the updated duty cycle is
|
||||
* reflected after the next timer expiration.
|
||||
*
|
||||
* @par Implemented as
|
||||
* - @ref R_GPT_DutyCycleSet()
|
||||
* - @ref R_AGT_DutyCycleSet()
|
||||
*
|
||||
* @param[in] p_ctrl Control block set in @ref timer_api_t::open call for this timer.
|
||||
* @param[in] duty_cycle_counts Time until duty cycle should expire.
|
||||
* @param[in] pin Which output pin to update. See implementation for details.
|
||||
*/
|
||||
fsp_err_t (* dutyCycleSet)(timer_ctrl_t * const p_ctrl, uint32_t const duty_cycle_counts, uint32_t const pin);
|
||||
|
||||
/** Stores timer information in p_info.
|
||||
* @par Implemented as
|
||||
* - @ref R_GPT_InfoGet()
|
||||
* - @ref R_AGT_InfoGet()
|
||||
*
|
||||
* @param[in] p_ctrl Control block set in @ref timer_api_t::open call for this timer.
|
||||
* @param[out] p_info Collection of information for this timer.
|
||||
*/
|
||||
fsp_err_t (* infoGet)(timer_ctrl_t * const p_ctrl, timer_info_t * const p_info);
|
||||
|
||||
/** Get the current counter value and timer state and store it in p_status.
|
||||
* @par Implemented as
|
||||
* - @ref R_GPT_StatusGet()
|
||||
* - @ref R_AGT_StatusGet()
|
||||
*
|
||||
* @param[in] p_ctrl Control block set in @ref timer_api_t::open call for this timer.
|
||||
* @param[out] p_status Current status of this timer.
|
||||
*/
|
||||
fsp_err_t (* statusGet)(timer_ctrl_t * const p_ctrl, timer_status_t * const p_status);
|
||||
|
||||
/** Specify callback function and optional context pointer and working memory pointer.
|
||||
* @par Implemented as
|
||||
* - @ref R_GPT_CallbackSet()
|
||||
* - @ref R_AGT_CallbackSet()
|
||||
*
|
||||
* @param[in] p_ctrl Control block set in @ref timer_api_t::open call for this timer.
|
||||
* @param[in] p_callback Callback function to register
|
||||
* @param[in] p_context Pointer to send to callback function
|
||||
* @param[in] p_working_memory Pointer to volatile memory where callback structure can be allocated.
|
||||
* Callback arguments allocated here are only valid during the callback.
|
||||
*/
|
||||
fsp_err_t (* callbackSet)(timer_ctrl_t * const p_api_ctrl, void (* p_callback)(timer_callback_args_t *),
|
||||
void const * const p_context, timer_callback_args_t * const p_callback_memory);
|
||||
|
||||
/** Allows driver to be reconfigured and may reduce power consumption.
|
||||
* @par Implemented as
|
||||
* - @ref R_GPT_Close()
|
||||
* - @ref R_AGT_Close()
|
||||
*
|
||||
* @param[in] p_ctrl Control block set in @ref timer_api_t::open call for this timer.
|
||||
*/
|
||||
fsp_err_t (* close)(timer_ctrl_t * const p_ctrl);
|
||||
} timer_api_t;
|
||||
|
||||
/** This structure encompasses everything that is needed to use an instance of this interface. */
|
||||
typedef struct st_timer_instance
|
||||
{
|
||||
timer_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance
|
||||
timer_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance
|
||||
timer_api_t const * p_api; ///< Pointer to the API structure for this instance
|
||||
} timer_instance_t;
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @} (end defgroup TIMER_API)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
|
|
@ -1,359 +0,0 @@
|
|||
/***********************************************************************************************************************
|
||||
* Copyright [2020-2021] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
|
||||
* of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
|
||||
* sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
|
||||
* of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
|
||||
* right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
|
||||
* reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
|
||||
* IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
|
||||
* PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
|
||||
* DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
|
||||
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
|
||||
* (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
|
||||
* WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
|
||||
* OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
|
||||
* OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef R_ADC_H
|
||||
#define R_ADC_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
#include <stdlib.h>
|
||||
|
||||
/* Fixed width integer support. */
|
||||
#include <stdint.h>
|
||||
|
||||
/* bool support */
|
||||
#include <stdbool.h>
|
||||
#include "bsp_api.h"
|
||||
#include "r_adc_cfg.h"
|
||||
#include "r_adc_api.h"
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup ADC
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Typical values that can be used to modify the sample states.
|
||||
* The minimum sample state count value is either 6 or 7 depending on the clock ratios.
|
||||
* It is fixed to 7 based on the fact that at the lowest ADC conversion clock supported (1 MHz)
|
||||
* this extra state will lead to at worst a "1 microsecond" increase in conversion time.
|
||||
* At 60 MHz the extra sample state will add 16.7 ns to the conversion time.
|
||||
*/
|
||||
#define ADC_SAMPLE_STATE_COUNT_MIN (7U)
|
||||
#define ADC_SAMPLE_STATE_COUNT_MAX (255U)
|
||||
|
||||
/* Typical values that can be used for the sample and hold counts for the channels 0-2*/
|
||||
/* Minimum sample and hold states */
|
||||
#define ADC_SAMPLE_STATE_HOLD_COUNT_MIN (4U)
|
||||
|
||||
/* Default sample and hold states */
|
||||
#define ADC_SAMPLE_STATE_HOLD_COUNT_DEFAULT (24U)
|
||||
|
||||
/** For ADC Scan configuration adc_channel_cfg_t::scan_mask, adc_channel_cfg_t::scan_mask_group_b,
|
||||
* adc_channel_cfg_t::add_mask and adc_channel_cfg_t::sample_hold_mask.
|
||||
* Use bitwise OR to combine these masks for desired channels and sensors. */
|
||||
typedef enum e_adc_mask
|
||||
{
|
||||
ADC_MASK_OFF = (0U), ///< No channels selected
|
||||
ADC_MASK_CHANNEL_0 = (1U << 0U), ///< Channel 0 mask
|
||||
ADC_MASK_CHANNEL_1 = (1U << 1U), ///< Channel 1 mask
|
||||
ADC_MASK_CHANNEL_2 = (1U << 2U), ///< Channel 2 mask
|
||||
ADC_MASK_CHANNEL_3 = (1U << 3U), ///< Channel 3 mask
|
||||
ADC_MASK_CHANNEL_4 = (1U << 4U), ///< Channel 4 mask
|
||||
ADC_MASK_CHANNEL_5 = (1U << 5U), ///< Channel 5 mask
|
||||
ADC_MASK_CHANNEL_6 = (1U << 6U), ///< Channel 6 mask
|
||||
ADC_MASK_CHANNEL_7 = (1U << 7U), ///< Channel 7 mask
|
||||
ADC_MASK_CHANNEL_8 = (1U << 8U), ///< Channel 8 mask
|
||||
ADC_MASK_CHANNEL_9 = (1U << 9U), ///< Channel 9 mask
|
||||
ADC_MASK_CHANNEL_10 = (1U << 10U), ///< Channel 10 mask
|
||||
ADC_MASK_CHANNEL_11 = (1U << 11U), ///< Channel 11 mask
|
||||
ADC_MASK_CHANNEL_12 = (1U << 12U), ///< Channel 12 mask
|
||||
ADC_MASK_CHANNEL_13 = (1U << 13U), ///< Channel 13 mask
|
||||
ADC_MASK_CHANNEL_14 = (1U << 14U), ///< Channel 14 mask
|
||||
ADC_MASK_CHANNEL_15 = (1U << 15U), ///< Channel 15 mask
|
||||
ADC_MASK_CHANNEL_16 = (1U << 16U), ///< Channel 16 mask
|
||||
ADC_MASK_CHANNEL_17 = (1U << 17U), ///< Channel 17 mask
|
||||
ADC_MASK_CHANNEL_18 = (1U << 18U), ///< Channel 18 mask
|
||||
ADC_MASK_CHANNEL_19 = (1U << 19U), ///< Channel 19 mask
|
||||
ADC_MASK_CHANNEL_20 = (1U << 20U), ///< Channel 20 mask
|
||||
ADC_MASK_CHANNEL_21 = (1U << 21U), ///< Channel 21 mask
|
||||
ADC_MASK_CHANNEL_22 = (1U << 22U), ///< Channel 22 mask
|
||||
ADC_MASK_CHANNEL_23 = (1U << 23U), ///< Channel 23 mask
|
||||
ADC_MASK_CHANNEL_24 = (1U << 24U), ///< Channel 24 mask
|
||||
ADC_MASK_CHANNEL_25 = (1U << 25U), ///< Channel 25 mask
|
||||
ADC_MASK_CHANNEL_26 = (1U << 26U), ///< Channel 26 mask
|
||||
ADC_MASK_CHANNEL_27 = (1U << 27U), ///< Channel 27 mask
|
||||
ADC_MASK_TEMPERATURE = (1U << 28UL), ///< Temperature sensor channel mask
|
||||
ADC_MASK_VOLT = (1U << 29UL), ///< Voltage reference channel mask
|
||||
ADC_MASK_SENSORS = (ADC_MASK_TEMPERATURE | ADC_MASK_VOLT), ///< All sensor channel mask
|
||||
} adc_mask_t;
|
||||
|
||||
/** ADC data sample addition and averaging options */
|
||||
typedef enum e_adc_add
|
||||
{
|
||||
ADC_ADD_OFF = 0, ///< Addition turned off for channels/sensors
|
||||
ADC_ADD_TWO = 1, ///< Add two samples
|
||||
ADC_ADD_THREE = 2, ///< Add three samples
|
||||
ADC_ADD_FOUR = 3, ///< Add four samples
|
||||
ADC_ADD_SIXTEEN = 5, ///< Add sixteen samples
|
||||
ADC_ADD_AVERAGE_TWO = 0x81, ///< Average two samples
|
||||
ADC_ADD_AVERAGE_FOUR = 0x83, ///< Average four samples
|
||||
ADC_ADD_AVERAGE_EIGHT = 0x84, ///< Average eight samples
|
||||
ADC_ADD_AVERAGE_SIXTEEN = 0x85, ///< Add sixteen samples
|
||||
} adc_add_t;
|
||||
|
||||
/** ADC clear after read definitions */
|
||||
typedef enum e_adc_clear
|
||||
{
|
||||
ADC_CLEAR_AFTER_READ_OFF = 0, ///< Clear after read off
|
||||
ADC_CLEAR_AFTER_READ_ON = 1 ///< Clear after read on
|
||||
} adc_clear_t;
|
||||
|
||||
/* VREF configuration options, not all options are available on all MCUs. If the MCU does not have VREFAMPCNT or
|
||||
* ADHVREFCNT. */
|
||||
typedef enum e_adc_vref_control
|
||||
{
|
||||
/* Available selections on MCUs with VREFAMPCNT.
|
||||
* Reference Table 32.12 "VREFADC output voltage control list" in the RA2A1 manual R01UH0888EJ0100.*/
|
||||
|
||||
ADC_VREF_CONTROL_VREFH = 0, ///< VREFAMPCNT reset value. VREFADC Output voltage is Hi-Z
|
||||
ADC_VREF_CONTROL_1_5V_OUTPUT = 25, ///< BGR turn ON. VREFADC Output voltage is 1.5 V
|
||||
ADC_VREF_CONTROL_2_0V_OUTPUT = 29, ///< BGR turn ON. VREFADC Output voltage is 2.0 V
|
||||
ADC_VREF_CONTROL_2_5V_OUTPUT = 31, ///< BGR turn ON. VREFADC Output voltage is 2.5 V
|
||||
|
||||
/* Available selections on MCUs with ADHVREFCNT.
|
||||
* Reference Section 35.2.31 "A/D High-Potential/Low-Potential Reference Voltage Control Register (ADHVREFCNT)"
|
||||
* in the RA4M1 manual R01UH0887EJ0100.*/
|
||||
|
||||
ADC_VREF_CONTROL_AVCC0_AVSS0 = 0x0, ///< High potential is AVCC0, low potential is AVSS0
|
||||
ADC_VREF_CONTROL_VREFH0_AVSS0 = 0x1, ///< High potential is VREFH0, low potential is AVSS0
|
||||
|
||||
/** High potential is internal reference voltage, low potential is AVSS0. When the high potential is set to the
|
||||
* internal reference voltage, wait 5 us after R_ADC_Open() to start an ADC measurement. */
|
||||
ADC_VREF_CONTROL_IVREF_AVSS0 = 0x2,
|
||||
ADC_VREF_CONTROL_AVCC0_VREFL0 = 0x10, ///< High potential is AVCC0, low potential is VREFL0
|
||||
ADC_VREF_CONTROL_VREFH0_VREFL0 = 0x11, ///< High potential is VREFH0, low potential is VREFL0
|
||||
|
||||
/** High potential is internal reference voltage, low potential is VREFL0. When the high potential is set to the
|
||||
* internal reference voltage, wait 5 us after R_ADC_Open() to start an ADC measurement. */
|
||||
ADC_VREF_CONTROL_IVREF_VREFL0 = 0x12,
|
||||
} adc_vref_control_t;
|
||||
|
||||
/** ADC sample state registers */
|
||||
typedef enum e_adc_sample_state_reg
|
||||
{
|
||||
ADC_SAMPLE_STATE_CHANNEL_0 = 0, ///< Sample state register channel 0
|
||||
ADC_SAMPLE_STATE_CHANNEL_1, ///< Sample state register channel 1
|
||||
ADC_SAMPLE_STATE_CHANNEL_2, ///< Sample state register channel 2
|
||||
ADC_SAMPLE_STATE_CHANNEL_3, ///< Sample state register channel 3
|
||||
ADC_SAMPLE_STATE_CHANNEL_4, ///< Sample state register channel 4
|
||||
ADC_SAMPLE_STATE_CHANNEL_5, ///< Sample state register channel 5
|
||||
ADC_SAMPLE_STATE_CHANNEL_6, ///< Sample state register channel 6
|
||||
ADC_SAMPLE_STATE_CHANNEL_7, ///< Sample state register channel 7
|
||||
ADC_SAMPLE_STATE_CHANNEL_8, ///< Sample state register channel 8
|
||||
ADC_SAMPLE_STATE_CHANNEL_9, ///< Sample state register channel 9
|
||||
ADC_SAMPLE_STATE_CHANNEL_10, ///< Sample state register channel 10
|
||||
ADC_SAMPLE_STATE_CHANNEL_11, ///< Sample state register channel 11
|
||||
ADC_SAMPLE_STATE_CHANNEL_12, ///< Sample state register channel 12
|
||||
ADC_SAMPLE_STATE_CHANNEL_13, ///< Sample state register channel 13
|
||||
ADC_SAMPLE_STATE_CHANNEL_14, ///< Sample state register channel 14
|
||||
ADC_SAMPLE_STATE_CHANNEL_15, ///< Sample state register channel 15
|
||||
ADC_SAMPLE_STATE_CHANNEL_16_TO_31 = -3, ///< Sample state register channel 16 to 31
|
||||
} adc_sample_state_reg_t;
|
||||
|
||||
/** ADC comparison settings */
|
||||
typedef enum e_adc_compare_cfg
|
||||
{
|
||||
ADC_COMPARE_CFG_EVENT_OUTPUT_OR = 0,
|
||||
ADC_COMPARE_CFG_EVENT_OUTPUT_XOR = 1,
|
||||
ADC_COMPARE_CFG_EVENT_OUTPUT_AND = 2,
|
||||
ADC_COMPARE_CFG_A_ENABLE = R_ADC0_ADCMPCR_CMPAE_Msk | R_ADC0_ADCMPCR_CMPAIE_Msk,
|
||||
ADC_COMPARE_CFG_B_ENABLE = R_ADC0_ADCMPCR_CMPBE_Msk | R_ADC0_ADCMPCR_CMPBIE_Msk,
|
||||
ADC_COMPARE_CFG_WINDOW_ENABLE = R_ADC0_ADCMPCR_WCMPE_Msk,
|
||||
} adc_compare_cfg_t;
|
||||
|
||||
/** ADC Window B channel */
|
||||
typedef enum e_adc_window_b_channel
|
||||
{
|
||||
ADC_WINDOW_B_CHANNEL_0 = 0,
|
||||
ADC_WINDOW_B_CHANNEL_1,
|
||||
ADC_WINDOW_B_CHANNEL_2,
|
||||
ADC_WINDOW_B_CHANNEL_3,
|
||||
ADC_WINDOW_B_CHANNEL_4,
|
||||
ADC_WINDOW_B_CHANNEL_5,
|
||||
ADC_WINDOW_B_CHANNEL_6,
|
||||
ADC_WINDOW_B_CHANNEL_7,
|
||||
ADC_WINDOW_B_CHANNEL_8,
|
||||
ADC_WINDOW_B_CHANNEL_9,
|
||||
ADC_WINDOW_B_CHANNEL_10,
|
||||
ADC_WINDOW_B_CHANNEL_11,
|
||||
ADC_WINDOW_B_CHANNEL_12,
|
||||
ADC_WINDOW_B_CHANNEL_13,
|
||||
ADC_WINDOW_B_CHANNEL_14,
|
||||
ADC_WINDOW_B_CHANNEL_15,
|
||||
ADC_WINDOW_B_CHANNEL_16,
|
||||
ADC_WINDOW_B_CHANNEL_17,
|
||||
ADC_WINDOW_B_CHANNEL_18,
|
||||
ADC_WINDOW_B_CHANNEL_19,
|
||||
ADC_WINDOW_B_CHANNEL_20,
|
||||
ADC_WINDOW_B_CHANNEL_21,
|
||||
ADC_WINDOW_B_CHANNEL_22,
|
||||
ADC_WINDOW_B_CHANNEL_23,
|
||||
ADC_WINDOW_B_CHANNEL_24,
|
||||
ADC_WINDOW_B_CHANNEL_25,
|
||||
ADC_WINDOW_B_CHANNEL_26,
|
||||
ADC_WINDOW_B_CHANNEL_27,
|
||||
ADC_WINDOW_B_CHANNEL_TEMPERATURE = 32,
|
||||
ADC_WINDOW_B_CHANNEL_VOLT = 33,
|
||||
} adc_window_b_channel_t;
|
||||
|
||||
/** ADC Window B comparison mode */
|
||||
typedef enum e_adc_window_b_mode
|
||||
{
|
||||
ADC_WINDOW_B_MODE_LESS_THAN_OR_OUTSIDE = 0,
|
||||
ADC_WINDOW_B_MODE_GREATER_THAN_OR_INSIDE = R_ADC0_ADCMPBNSR_CMPLB_Msk,
|
||||
} adc_window_b_mode_t;
|
||||
|
||||
/** ADC action for group A interrupts group B scan.
|
||||
* This enumeration is used to specify the priority between Group A and B in group mode. */
|
||||
typedef enum e_adc_group_a
|
||||
{
|
||||
ADC_GROUP_A_PRIORITY_OFF = 0, ///< Group A ignored and does not interrupt ongoing group B scan
|
||||
ADC_GROUP_A_GROUP_B_WAIT_FOR_TRIGGER = 1, ///< Group A interrupts Group B(single scan) which restarts at next Group B trigger
|
||||
ADC_GROUP_A_GROUP_B_RESTART_SCAN = 3, ///< Group A interrupts Group B(single scan) which restarts immediately after Group A scan is complete
|
||||
ADC_GROUP_A_GROUP_B_CONTINUOUS_SCAN = 0x8001, ///< Group A interrupts Group B(continuous scan) which continues scanning without a new Group B trigger
|
||||
} adc_group_a_t;
|
||||
|
||||
/** ADC double-trigger mode definitions */
|
||||
typedef enum e_adc_double_trigger
|
||||
{
|
||||
ADC_DOUBLE_TRIGGER_DISABLED = 0, ///< Double-triggering disabled
|
||||
ADC_DOUBLE_TRIGGER_ENABLED = 1, ///< Double-triggering enabled
|
||||
ADC_DOUBLE_TRIGGER_ENABLED_EXTENDED = 2, ///< Double-triggering enabled on both ADC ELC events
|
||||
} adc_double_trigger_t;
|
||||
|
||||
/** ADC sample state configuration */
|
||||
typedef struct st_adc_sample_state
|
||||
{
|
||||
adc_sample_state_reg_t reg_id; ///< Sample state register ID
|
||||
uint8_t num_states; ///< Number of sampling states for conversion. Ch16-20/21 use the same value.
|
||||
} adc_sample_state_t;
|
||||
|
||||
/** ADC Window Compare configuration */
|
||||
typedef struct st_adc_window_cfg
|
||||
{
|
||||
uint32_t compare_mask; ///< Channel mask to compare with Window A
|
||||
uint32_t compare_mode_mask; ///< Per-channel condition mask for Window A
|
||||
adc_compare_cfg_t compare_cfg; ///< Window Compare configuration
|
||||
uint16_t compare_ref_low; ///< Window A lower reference value
|
||||
uint16_t compare_ref_high; ///< Window A upper reference value
|
||||
uint16_t compare_b_ref_low; ///< Window B lower reference value
|
||||
uint16_t compare_b_ref_high; ///< Window A upper reference value
|
||||
adc_window_b_channel_t compare_b_channel; ///< Window B channel
|
||||
adc_window_b_mode_t compare_b_mode; ///< Window B condition setting
|
||||
} adc_window_cfg_t;
|
||||
|
||||
/** Extended configuration structure for ADC. */
|
||||
typedef struct st_adc_extended_cfg
|
||||
{
|
||||
adc_add_t add_average_count; ///< Add or average samples
|
||||
adc_clear_t clearing; ///< Clear after read
|
||||
adc_trigger_t trigger_group_b; ///< Group B trigger source; valid only for group mode
|
||||
adc_double_trigger_t double_trigger_mode; ///< Double-trigger mode setting
|
||||
adc_vref_control_t adc_vref_control; ///< VREFADC output voltage control
|
||||
uint8_t enable_adbuf; ///< Enable ADC Ring Buffer, Valid only to use along with DMAC transfer
|
||||
IRQn_Type window_a_irq; ///< IRQ number for Window Compare A interrupts
|
||||
IRQn_Type window_b_irq; ///< IRQ number for Window Compare B interrupts
|
||||
uint8_t window_a_ipl; ///< Priority for Window Compare A interrupts
|
||||
uint8_t window_b_ipl; ///< Priority for Window Compare B interrupts
|
||||
} adc_extended_cfg_t;
|
||||
|
||||
/** ADC channel(s) configuration */
|
||||
typedef struct st_adc_channel_cfg
|
||||
{
|
||||
uint32_t scan_mask; ///< Channels/bits: bit 0 is ch0; bit 15 is ch15.
|
||||
uint32_t scan_mask_group_b; ///< Valid for group modes.
|
||||
uint32_t add_mask; ///< Valid if add enabled in Open().
|
||||
adc_window_cfg_t * p_window_cfg; ///< Pointer to Window Compare configuration
|
||||
adc_group_a_t priority_group_a; ///< Valid for group modes.
|
||||
uint8_t sample_hold_mask; ///< Channels/bits 0-2.
|
||||
uint8_t sample_hold_states; ///< Number of states to be used for sample and hold. Affects channels 0-2.
|
||||
} adc_channel_cfg_t;
|
||||
|
||||
/* Sample and hold Channel mask. Sample and hold is only available for channel 0,1,2*/
|
||||
#define ADC_SAMPLE_HOLD_CHANNELS (0x07U)
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** ADC instance control block. DO NOT INITIALIZE. Initialized in @ref adc_api_t::open(). */
|
||||
typedef struct
|
||||
{
|
||||
R_ADC0_Type * p_reg; // Base register for this unit
|
||||
adc_cfg_t const * p_cfg;
|
||||
uint32_t opened; // Boolean to verify that the Unit has been initialized
|
||||
uint32_t initialized; // Initialized status of ADC
|
||||
uint32_t scan_mask; // Scan mask used for Normal scan
|
||||
uint16_t scan_start_adcsr;
|
||||
|
||||
void (* p_callback)(adc_callback_args_t *); // Pointer to callback that is called when an adc_event_t occurs.
|
||||
adc_callback_args_t * p_callback_memory; // Pointer to non-secure memory that can be used to pass arguments to a callback in non-secure memory.
|
||||
|
||||
/* Pointer to context to be passed into callback function */
|
||||
void const * p_context;
|
||||
} adc_instance_ctrl_t;
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** @cond INC_HEADER_DEFS_SEC */
|
||||
/** Interface Structure for user access */
|
||||
extern const adc_api_t g_adc_on_adc;
|
||||
|
||||
/** @endcond */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Public APIs
|
||||
**********************************************************************************************************************/
|
||||
fsp_err_t R_ADC_Open(adc_ctrl_t * p_ctrl, adc_cfg_t const * const p_cfg);
|
||||
fsp_err_t R_ADC_ScanCfg(adc_ctrl_t * p_ctrl, void const * const p_channel_cfg);
|
||||
fsp_err_t R_ADC_InfoGet(adc_ctrl_t * p_ctrl, adc_info_t * p_adc_info);
|
||||
fsp_err_t R_ADC_ScanStart(adc_ctrl_t * p_ctrl);
|
||||
fsp_err_t R_ADC_ScanGroupStart(adc_ctrl_t * p_ctrl, adc_group_mask_t group_id);
|
||||
fsp_err_t R_ADC_ScanStop(adc_ctrl_t * p_ctrl);
|
||||
fsp_err_t R_ADC_StatusGet(adc_ctrl_t * p_ctrl, adc_status_t * p_status);
|
||||
fsp_err_t R_ADC_Read(adc_ctrl_t * p_ctrl, adc_channel_t const reg_id, uint16_t * const p_data);
|
||||
fsp_err_t R_ADC_Read32(adc_ctrl_t * p_ctrl, adc_channel_t const reg_id, uint32_t * const p_data);
|
||||
fsp_err_t R_ADC_SampleStateCountSet(adc_ctrl_t * p_ctrl, adc_sample_state_t * p_sample);
|
||||
fsp_err_t R_ADC_Close(adc_ctrl_t * p_ctrl);
|
||||
fsp_err_t R_ADC_OffsetSet(adc_ctrl_t * const p_ctrl, adc_channel_t const reg_id, int32_t offset);
|
||||
fsp_err_t R_ADC_Calibrate(adc_ctrl_t * const p_ctrl, void const * p_extend);
|
||||
fsp_err_t R_ADC_CallbackSet(adc_ctrl_t * const p_api_ctrl,
|
||||
void ( * p_callback)(adc_callback_args_t *),
|
||||
void const * const p_context,
|
||||
adc_callback_args_t * const p_callback_memory);
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @} (end defgroup ADC)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
|
|
@ -1,244 +0,0 @@
|
|||
/***********************************************************************************************************************
|
||||
* Copyright [2020-2021] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products
|
||||
* of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are
|
||||
* sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use
|
||||
* of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property
|
||||
* right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas
|
||||
* reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION
|
||||
* IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT
|
||||
* PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES
|
||||
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR
|
||||
* DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM
|
||||
* EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION
|
||||
* (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING,
|
||||
* WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS,
|
||||
* OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY
|
||||
* OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @addtogroup GLCDC
|
||||
* @{
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef R_GLCDC_H
|
||||
#define R_GLCDC_H
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Includes
|
||||
**********************************************************************************************************************/
|
||||
#include "bsp_api.h"
|
||||
#include "r_display_api.h"
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */
|
||||
FSP_HEADER
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Macro definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Typedef definitions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/** Display control block. DO NOT INITIALIZE. */
|
||||
typedef struct st_glcdc_instance_ctrl
|
||||
{
|
||||
display_state_t state; // Status of GLCDC module
|
||||
|
||||
/* Parameters to Event processing for display devices */
|
||||
void (* p_callback)(display_callback_args_t * p_args); // Pointer to callback function
|
||||
void const * p_context; // Pointer to the higher level device context
|
||||
const display_cfg_t * p_cfg; // Pointer to initial configurations
|
||||
} glcdc_instance_ctrl_t;
|
||||
|
||||
/** Clock source select */
|
||||
typedef enum e_glcdc_clk_src
|
||||
{
|
||||
GLCDC_CLK_SRC_INTERNAL, ///< Internal
|
||||
GLCDC_CLK_SRC_EXTERNAL, ///< External
|
||||
} glcdc_clk_src_t;
|
||||
|
||||
/** Clock frequency division ratio */
|
||||
typedef enum e_glcdc_panel_clk_div
|
||||
{
|
||||
GLCDC_PANEL_CLK_DIVISOR_1 = 1, ///< Division Ratio 1/1
|
||||
GLCDC_PANEL_CLK_DIVISOR_2 = 2, ///< Division Ratio 1/2
|
||||
GLCDC_PANEL_CLK_DIVISOR_3 = 3, ///< Division Ratio 1/3
|
||||
GLCDC_PANEL_CLK_DIVISOR_4 = 4, ///< Division Ratio 1/4
|
||||
GLCDC_PANEL_CLK_DIVISOR_5 = 5, ///< Division Ratio 1/5
|
||||
GLCDC_PANEL_CLK_DIVISOR_6 = 6, ///< Division Ratio 1/6
|
||||
GLCDC_PANEL_CLK_DIVISOR_7 = 7, ///< Division Ratio 1/7
|
||||
GLCDC_PANEL_CLK_DIVISOR_8 = 8, ///< Division Ratio 1/8
|
||||
GLCDC_PANEL_CLK_DIVISOR_9 = 9, ///< Division Ratio 1/9
|
||||
GLCDC_PANEL_CLK_DIVISOR_12 = 12, ///< Division Ratio 1/12
|
||||
GLCDC_PANEL_CLK_DIVISOR_16 = 16, ///< Division Ratio 1/16
|
||||
GLCDC_PANEL_CLK_DIVISOR_24 = 24, ///< Division Ratio 1/24
|
||||
GLCDC_PANEL_CLK_DIVISOR_32 = 32, ///< Division Ratio 1/32
|
||||
} glcdc_panel_clk_div_t;
|
||||
|
||||
/** LCD TCON output pin select */
|
||||
typedef enum e_glcdc_tcon_pin
|
||||
{
|
||||
GLCDC_TCON_PIN_NONE = -1, ///< No output
|
||||
GLCDC_TCON_PIN_0, ///< LCD_TCON0
|
||||
GLCDC_TCON_PIN_1, ///< LCD_TCON1
|
||||
GLCDC_TCON_PIN_2, ///< LCD_TCON2
|
||||
GLCDC_TCON_PIN_3, ///< LCD_TCON3
|
||||
} glcdc_tcon_pin_t;
|
||||
|
||||
/** Bus Arbitration setting */
|
||||
typedef enum e_glcdc_bus_arbitraion
|
||||
{
|
||||
GLCDC_BUS_ARBITRATION_ROUNDROBIN, ///< Round robin
|
||||
GLCDC_BUS_ARBITRATION_FIX_PRIORITY ///< Fixed
|
||||
} glcdc_bus_arbitration_t;
|
||||
|
||||
/** Correction circuit sequence control */
|
||||
typedef enum e_glcdc_correction_proc_order
|
||||
{
|
||||
GLCDC_CORRECTION_PROC_ORDER_BRIGHTNESS_CONTRAST2GAMMA, ///< Brightness -> contrast -> gamma correction
|
||||
GLCDC_CORRECTION_PROC_ORDER_GAMMA2BRIGHTNESS_CONTRAST ///< Gamma correction -> brightness -> contrast
|
||||
} glcdc_correction_proc_order_t;
|
||||
|
||||
/** Timing signals for driving the LCD panel */
|
||||
typedef enum e_glcdc_tcon_signal_select
|
||||
{
|
||||
GLCDC_TCON_SIGNAL_SELECT_STVA_VS = 0, ///< STVA/VS
|
||||
GLCDC_TCON_SIGNAL_SELECT_STVB_VE = 1, ///< STVB/VE
|
||||
GLCDC_TCON_SIGNAL_SELECT_STHA_HS = 2, ///< STH/SP/HS
|
||||
GLCDC_TCON_SIGNAL_SELECT_STHB_HE = 3, ///< STB/LP/HE
|
||||
GLCDC_TCON_SIGNAL_SELECT_DE = 7 ///< DE
|
||||
} glcdc_tcon_signal_select_t;
|
||||
|
||||
/** Clock phase adjustment for serial RGB output */
|
||||
typedef enum e_glcdc_clut_plane
|
||||
{
|
||||
GLCDC_CLUT_PLANE_0 = 0, ///< GLCDC CLUT plane 0
|
||||
GLCDC_CLUT_PLANE_1 = 1, ///< GLCDC CLUT plane 1
|
||||
} glcdc_clut_plane_t;
|
||||
|
||||
/** Dithering mode */
|
||||
typedef enum e_glcdc_dithering_mode
|
||||
{
|
||||
GLCDC_DITHERING_MODE_TRUNCATE = 0, ///< No dithering (truncate)
|
||||
GLCDC_DITHERING_MODE_ROUND_OFF = 1, ///< Dithering with round off
|
||||
GLCDC_DITHERING_MODE_2X2PATTERN = 2, ///< Dithering with 2x2 pattern
|
||||
GLCDC_DITHERING_MODE_SETTING_MAX
|
||||
} glcdc_dithering_mode_t;
|
||||
|
||||
/** Dithering mode */
|
||||
typedef enum e_glcdc_dithering_pattern
|
||||
{
|
||||
GLCDC_DITHERING_PATTERN_00 = 0, ///< 2x2 pattern '00'
|
||||
GLCDC_DITHERING_PATTERN_01 = 1, ///< 2x2 pattern '01'
|
||||
GLCDC_DITHERING_PATTERN_10 = 2, ///< 2x2 pattern '10'
|
||||
GLCDC_DITHERING_PATTERN_11 = 3, ///< 2x2 pattern '11'
|
||||
} glcdc_dithering_pattern_t;
|
||||
|
||||
/** Output interface format */
|
||||
typedef enum e_glcdc_input_interface_format
|
||||
{
|
||||
GLCDC_INPUT_INTERFACE_FORMAT_RGB565 = 0, ///< Input interface format RGB565
|
||||
GLCDC_INPUT_INTERFACE_FORMAT_RGB888 = 1, ///< Input interface format RGB888
|
||||
GLCDC_INPUT_INTERFACE_FORMAT_ARGB1555 = 2, ///< Input interface format ARGB1555
|
||||
GLCDC_INPUT_INTERFACE_FORMAT_ARGB4444 = 3, ///< Input interface format ARGB4444
|
||||
GLCDC_INPUT_INTERFACE_FORMAT_ARGB8888 = 4, ///< Input interface format ARGB8888
|
||||
GLCDC_INPUT_INTERFACE_FORMAT_CLUT8 = 5, ///< Input interface format CLUT8
|
||||
GLCDC_INPUT_INTERFACE_FORMAT_CLUT4 = 6, ///< Input interface format CLUT4
|
||||
GLCDC_INPUT_INTERFACE_FORMAT_CLUT1 = 7, ///< Input interface format CLUT1
|
||||
} glcdc_input_interface_format_t;
|
||||
|
||||
/** Output interface format */
|
||||
typedef enum e_glcdc_output_interface_format
|
||||
{
|
||||
GLCDC_OUTPUT_INTERFACE_FORMAT_RGB888 = 0, ///< Output interface format RGB888
|
||||
GLCDC_OUTPUT_INTERFACE_FORMAT_RGB666 = 1, ///< Output interface format RGB666
|
||||
GLCDC_OUTPUT_INTERFACE_FORMAT_RGB565 = 2, ///< Output interface format RGB565
|
||||
GLCDC_OUTPUT_INTERFACE_FORMAT_SERIAL_RGB = 3, ///< Output interface format Serial RGB
|
||||
} glcdc_output_interface_format_t;
|
||||
|
||||
/** Dithering output format */
|
||||
typedef enum e_glcdc_dithering_output_format
|
||||
{
|
||||
GLCDC_DITHERING_OUTPUT_FORMAT_RGB888 = 0, ///< Dithering output format RGB888
|
||||
GLCDC_DITHERING_OUTPUT_FORMAT_RGB666 = 1, ///< Dithering output format RGB666
|
||||
GLCDC_DITHERING_OUTPUT_FORMAT_RGB565 = 2, ///< Dithering output format RGB565
|
||||
} glcdc_dithering_output_format_t;
|
||||
|
||||
/** GLCDC hardware specific configuration */
|
||||
typedef struct st_glcdc_extended_cfg
|
||||
{
|
||||
glcdc_tcon_pin_t tcon_hsync; ///< GLCDC TCON output pin select
|
||||
glcdc_tcon_pin_t tcon_vsync; ///< GLCDC TCON output pin select
|
||||
glcdc_tcon_pin_t tcon_de; ///< GLCDC TCON output pin select
|
||||
glcdc_correction_proc_order_t correction_proc_order; ///< Correction control route select
|
||||
glcdc_clk_src_t clksrc; ///< Clock Source selection
|
||||
glcdc_panel_clk_div_t clock_div_ratio; ///< Clock divide ratio for dot clock
|
||||
glcdc_dithering_mode_t dithering_mode; ///< Dithering mode
|
||||
glcdc_dithering_pattern_t dithering_pattern_A; ///< Dithering pattern A
|
||||
glcdc_dithering_pattern_t dithering_pattern_B; ///< Dithering pattern B
|
||||
glcdc_dithering_pattern_t dithering_pattern_C; ///< Dithering pattern C
|
||||
glcdc_dithering_pattern_t dithering_pattern_D; ///< Dithering pattern D
|
||||
} glcdc_extended_cfg_t;
|
||||
|
||||
/* GLCDC hardware specific control block */
|
||||
typedef struct st_glcdc_ctrl
|
||||
{
|
||||
display_coordinate_t back_porch; ///< Zero coordinate for graphics plane(Back porch end)
|
||||
uint16_t hsize; ///< Horizontal pixel size in a line
|
||||
uint16_t vsize; ///< Vertical pixel size in a frame
|
||||
void * p_context; ///< Pointer to the function level device context
|
||||
// (e.g. display_ctrl_t type data)
|
||||
} glcdc_ctrl_t;
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Exported global variables
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* @cond INC_HEADER_DEFS_SEC */
|
||||
/* Filled in Interface API structure for this Instance. */
|
||||
extern const display_api_t g_display_on_glcdc;
|
||||
|
||||
/* @endcond */
|
||||
|
||||
/**********************************************************************************************************************
|
||||
* Public APIs
|
||||
**********************************************************************************************************************/
|
||||
|
||||
fsp_err_t R_GLCDC_Open(display_ctrl_t * const p_api_ctrl, display_cfg_t const * const p_cfg);
|
||||
fsp_err_t R_GLCDC_Close(display_ctrl_t * const p_api_ctrl);
|
||||
fsp_err_t R_GLCDC_Start(display_ctrl_t * const p_api_ctrl);
|
||||
fsp_err_t R_GLCDC_Stop(display_ctrl_t * const p_api_ctrl);
|
||||
fsp_err_t R_GLCDC_LayerChange(display_ctrl_t const * const p_api_ctrl,
|
||||
display_runtime_cfg_t const * const p_cfg,
|
||||
display_frame_layer_t layer);
|
||||
fsp_err_t R_GLCDC_BufferChange(display_ctrl_t const * const p_api_ctrl,
|
||||
uint8_t * const framebuffer,
|
||||
display_frame_layer_t layer);
|
||||
|
||||
#if GLCDC_CFG_COLOR_CORRECTION_ENABLE
|
||||
fsp_err_t R_GLCDC_ColorCorrection(display_ctrl_t const * const p_api_ctrl,
|
||||
display_correction_t const * const p_correction);
|
||||
|
||||
#endif
|
||||
|
||||
fsp_err_t R_GLCDC_ClutUpdate(display_ctrl_t const * const p_api_ctrl,
|
||||
display_clut_cfg_t const * const p_clut_cfg,
|
||||
display_frame_layer_t layer);
|
||||
fsp_err_t R_GLCDC_ClutEdit(display_ctrl_t const * const p_api_ctrl,
|
||||
display_frame_layer_t layer,
|
||||
uint8_t index,
|
||||
uint32_t color);
|
||||
fsp_err_t R_GLCDC_StatusGet(display_ctrl_t const * const p_api_ctrl, display_status_t * const status);
|
||||
|
||||
/*******************************************************************************************************************//**
|
||||
* @} (end defgroup GLCDC)
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */
|
||||
FSP_FOOTER
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -1,5 +0,0 @@
|
|||
/* generated configuration header file - do not edit */
|
||||
#ifndef R_ADC_CFG_H_
|
||||
#define R_ADC_CFG_H_
|
||||
#define ADC_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
|
||||
#endif /* R_ADC_CFG_H_ */
|
||||
|
|
@ -1,8 +0,0 @@
|
|||
/* generated configuration header file - do not edit */
|
||||
#ifndef R_GPT_CFG_H_
|
||||
#define R_GPT_CFG_H_
|
||||
#define GPT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
|
||||
#define GPT_CFG_OUTPUT_SUPPORT_ENABLE (1)
|
||||
#define GPT_CFG_WRITE_PROTECT_ENABLE (0)
|
||||
#define GPT_CFG_GPTCLK_BYPASS 1
|
||||
#endif /* R_GPT_CFG_H_ */
|
||||
|
|
@ -1,487 +1,5 @@
|
|||
/* generated HAL source file - do not edit */
|
||||
#include "hal_data.h"
|
||||
|
||||
/* Macros to tie dynamic ELC links to ADC_TRIGGER_SYNC_ELC option in adc_trigger_t. */
|
||||
#define ADC_TRIGGER_ADC0 ADC_TRIGGER_SYNC_ELC
|
||||
#define ADC_TRIGGER_ADC0_B ADC_TRIGGER_SYNC_ELC
|
||||
#define ADC_TRIGGER_ADC1 ADC_TRIGGER_SYNC_ELC
|
||||
#define ADC_TRIGGER_ADC1_B ADC_TRIGGER_SYNC_ELC
|
||||
gpt_instance_ctrl_t g_timer8_ctrl;
|
||||
#if 0
|
||||
const gpt_extended_pwm_cfg_t g_timer8_pwm_extend =
|
||||
{
|
||||
.trough_ipl = (BSP_IRQ_DISABLED),
|
||||
#if defined(VECTOR_NUMBER_GPT8_COUNTER_UNDERFLOW)
|
||||
.trough_irq = VECTOR_NUMBER_GPT8_COUNTER_UNDERFLOW,
|
||||
#else
|
||||
.trough_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
.poeg_link = GPT_POEG_LINK_POEG0,
|
||||
.output_disable = GPT_OUTPUT_DISABLE_NONE,
|
||||
.adc_trigger = GPT_ADC_TRIGGER_NONE,
|
||||
.dead_time_count_up = 0,
|
||||
.dead_time_count_down = 0,
|
||||
.adc_a_compare_match = 0,
|
||||
.adc_b_compare_match = 0,
|
||||
.interrupt_skip_source = GPT_INTERRUPT_SKIP_SOURCE_NONE,
|
||||
.interrupt_skip_count = GPT_INTERRUPT_SKIP_COUNT_0,
|
||||
.interrupt_skip_adc = GPT_INTERRUPT_SKIP_ADC_NONE,
|
||||
.gtioca_disable_setting = GPT_GTIOC_DISABLE_PROHIBITED,
|
||||
.gtiocb_disable_setting = GPT_GTIOC_DISABLE_PROHIBITED,
|
||||
};
|
||||
#endif
|
||||
const gpt_extended_cfg_t g_timer8_extend =
|
||||
{
|
||||
.gtioca = { .output_enabled = true,
|
||||
.stop_level = GPT_PIN_LEVEL_LOW
|
||||
},
|
||||
.gtiocb = { .output_enabled = true,
|
||||
.stop_level = GPT_PIN_LEVEL_LOW
|
||||
},
|
||||
.start_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.stop_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.clear_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.count_up_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.count_down_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.capture_a_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.capture_b_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.capture_a_ipl = (BSP_IRQ_DISABLED),
|
||||
.capture_b_ipl = (BSP_IRQ_DISABLED),
|
||||
#if defined(VECTOR_NUMBER_GPT8_CAPTURE_COMPARE_A)
|
||||
.capture_a_irq = VECTOR_NUMBER_GPT8_CAPTURE_COMPARE_A,
|
||||
#else
|
||||
.capture_a_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
#if defined(VECTOR_NUMBER_GPT8_CAPTURE_COMPARE_B)
|
||||
.capture_b_irq = VECTOR_NUMBER_GPT8_CAPTURE_COMPARE_B,
|
||||
#else
|
||||
.capture_b_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
.capture_filter_gtioca = GPT_CAPTURE_FILTER_NONE,
|
||||
.capture_filter_gtiocb = GPT_CAPTURE_FILTER_NONE,
|
||||
#if 0
|
||||
.p_pwm_cfg = &g_timer8_pwm_extend,
|
||||
#else
|
||||
.p_pwm_cfg = NULL,
|
||||
#endif
|
||||
#if 0
|
||||
.gtior_setting.gtior_b.gtioa = (0U << 4U) | (0U << 2U) | (0U << 0U),
|
||||
.gtior_setting.gtior_b.oadflt = (uint32_t) GPT_PIN_LEVEL_LOW,
|
||||
.gtior_setting.gtior_b.oahld = 0U,
|
||||
.gtior_setting.gtior_b.oae = (uint32_t) true,
|
||||
.gtior_setting.gtior_b.oadf = (uint32_t) GPT_GTIOC_DISABLE_PROHIBITED,
|
||||
.gtior_setting.gtior_b.nfaen = ((uint32_t) GPT_CAPTURE_FILTER_NONE & 1U),
|
||||
.gtior_setting.gtior_b.nfcsa = ((uint32_t) GPT_CAPTURE_FILTER_NONE >> 1U),
|
||||
.gtior_setting.gtior_b.gtiob = (0U << 4U) | (0U << 2U) | (0U << 0U),
|
||||
.gtior_setting.gtior_b.obdflt = (uint32_t) GPT_PIN_LEVEL_LOW,
|
||||
.gtior_setting.gtior_b.obhld = 0U,
|
||||
.gtior_setting.gtior_b.obe = (uint32_t) true,
|
||||
.gtior_setting.gtior_b.obdf = (uint32_t) GPT_GTIOC_DISABLE_PROHIBITED,
|
||||
.gtior_setting.gtior_b.nfben = ((uint32_t) GPT_CAPTURE_FILTER_NONE & 1U),
|
||||
.gtior_setting.gtior_b.nfcsb = ((uint32_t) GPT_CAPTURE_FILTER_NONE >> 1U),
|
||||
#else
|
||||
.gtior_setting.gtior = 0U,
|
||||
#endif
|
||||
};
|
||||
const timer_cfg_t g_timer8_cfg =
|
||||
{
|
||||
.mode = TIMER_MODE_PWM,
|
||||
/* Actual period: 35.791394133333334 seconds. Actual duty: 50%. */ .period_counts = (uint32_t) 0x100000000, .duty_cycle_counts = 0x80000000, .source_div = (timer_source_div_t)0,
|
||||
.channel = 8,
|
||||
.p_callback = NULL,
|
||||
/** If NULL then do not add & */
|
||||
#if defined(NULL)
|
||||
.p_context = NULL,
|
||||
#else
|
||||
.p_context = &NULL,
|
||||
#endif
|
||||
.p_extend = &g_timer8_extend,
|
||||
.cycle_end_ipl = (BSP_IRQ_DISABLED),
|
||||
#if defined(VECTOR_NUMBER_GPT8_COUNTER_OVERFLOW)
|
||||
.cycle_end_irq = VECTOR_NUMBER_GPT8_COUNTER_OVERFLOW,
|
||||
#else
|
||||
.cycle_end_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
};
|
||||
/* Instance structure to use this module. */
|
||||
const timer_instance_t g_timer8 =
|
||||
{
|
||||
.p_ctrl = &g_timer8_ctrl,
|
||||
.p_cfg = &g_timer8_cfg,
|
||||
.p_api = &g_timer_on_gpt
|
||||
};
|
||||
gpt_instance_ctrl_t g_timer0_ctrl;
|
||||
#if 0
|
||||
const gpt_extended_pwm_cfg_t g_timer0_pwm_extend =
|
||||
{
|
||||
.trough_ipl = (BSP_IRQ_DISABLED),
|
||||
#if defined(VECTOR_NUMBER_GPT0_COUNTER_UNDERFLOW)
|
||||
.trough_irq = VECTOR_NUMBER_GPT0_COUNTER_UNDERFLOW,
|
||||
#else
|
||||
.trough_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
.poeg_link = GPT_POEG_LINK_POEG0,
|
||||
.output_disable = GPT_OUTPUT_DISABLE_NONE,
|
||||
.adc_trigger = GPT_ADC_TRIGGER_NONE,
|
||||
.dead_time_count_up = 0,
|
||||
.dead_time_count_down = 0,
|
||||
.adc_a_compare_match = 0,
|
||||
.adc_b_compare_match = 0,
|
||||
.interrupt_skip_source = GPT_INTERRUPT_SKIP_SOURCE_NONE,
|
||||
.interrupt_skip_count = GPT_INTERRUPT_SKIP_COUNT_0,
|
||||
.interrupt_skip_adc = GPT_INTERRUPT_SKIP_ADC_NONE,
|
||||
.gtioca_disable_setting = GPT_GTIOC_DISABLE_PROHIBITED,
|
||||
.gtiocb_disable_setting = GPT_GTIOC_DISABLE_PROHIBITED,
|
||||
};
|
||||
#endif
|
||||
const gpt_extended_cfg_t g_timer0_extend =
|
||||
{
|
||||
.gtioca = { .output_enabled = true,
|
||||
.stop_level = GPT_PIN_LEVEL_LOW
|
||||
},
|
||||
.gtiocb = { .output_enabled = false,
|
||||
.stop_level = GPT_PIN_LEVEL_LOW
|
||||
},
|
||||
.start_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.stop_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.clear_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.count_up_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.count_down_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.capture_a_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.capture_b_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.capture_a_ipl = (BSP_IRQ_DISABLED),
|
||||
.capture_b_ipl = (BSP_IRQ_DISABLED),
|
||||
#if defined(VECTOR_NUMBER_GPT0_CAPTURE_COMPARE_A)
|
||||
.capture_a_irq = VECTOR_NUMBER_GPT0_CAPTURE_COMPARE_A,
|
||||
#else
|
||||
.capture_a_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
#if defined(VECTOR_NUMBER_GPT0_CAPTURE_COMPARE_B)
|
||||
.capture_b_irq = VECTOR_NUMBER_GPT0_CAPTURE_COMPARE_B,
|
||||
#else
|
||||
.capture_b_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
.capture_filter_gtioca = GPT_CAPTURE_FILTER_NONE,
|
||||
.capture_filter_gtiocb = GPT_CAPTURE_FILTER_NONE,
|
||||
#if 0
|
||||
.p_pwm_cfg = &g_timer0_pwm_extend,
|
||||
#else
|
||||
.p_pwm_cfg = NULL,
|
||||
#endif
|
||||
#if 0
|
||||
.gtior_setting.gtior_b.gtioa = (0U << 4U) | (0U << 2U) | (0U << 0U),
|
||||
.gtior_setting.gtior_b.oadflt = (uint32_t) GPT_PIN_LEVEL_LOW,
|
||||
.gtior_setting.gtior_b.oahld = 0U,
|
||||
.gtior_setting.gtior_b.oae = (uint32_t) true,
|
||||
.gtior_setting.gtior_b.oadf = (uint32_t) GPT_GTIOC_DISABLE_PROHIBITED,
|
||||
.gtior_setting.gtior_b.nfaen = ((uint32_t) GPT_CAPTURE_FILTER_NONE & 1U),
|
||||
.gtior_setting.gtior_b.nfcsa = ((uint32_t) GPT_CAPTURE_FILTER_NONE >> 1U),
|
||||
.gtior_setting.gtior_b.gtiob = (0U << 4U) | (0U << 2U) | (0U << 0U),
|
||||
.gtior_setting.gtior_b.obdflt = (uint32_t) GPT_PIN_LEVEL_LOW,
|
||||
.gtior_setting.gtior_b.obhld = 0U,
|
||||
.gtior_setting.gtior_b.obe = (uint32_t) false,
|
||||
.gtior_setting.gtior_b.obdf = (uint32_t) GPT_GTIOC_DISABLE_PROHIBITED,
|
||||
.gtior_setting.gtior_b.nfben = ((uint32_t) GPT_CAPTURE_FILTER_NONE & 1U),
|
||||
.gtior_setting.gtior_b.nfcsb = ((uint32_t) GPT_CAPTURE_FILTER_NONE >> 1U),
|
||||
#else
|
||||
.gtior_setting.gtior = 0U,
|
||||
#endif
|
||||
};
|
||||
const timer_cfg_t g_timer0_cfg =
|
||||
{
|
||||
.mode = TIMER_MODE_PWM,
|
||||
/* Actual period: 35.791394133333334 seconds. Actual duty: 50%. */ .period_counts = (uint32_t) 0x100000000, .duty_cycle_counts = 0x80000000, .source_div = (timer_source_div_t)0,
|
||||
.channel = 0,
|
||||
.p_callback = NULL,
|
||||
/** If NULL then do not add & */
|
||||
#if defined(NULL)
|
||||
.p_context = NULL,
|
||||
#else
|
||||
.p_context = &NULL,
|
||||
#endif
|
||||
.p_extend = &g_timer0_extend,
|
||||
.cycle_end_ipl = (BSP_IRQ_DISABLED),
|
||||
#if defined(VECTOR_NUMBER_GPT0_COUNTER_OVERFLOW)
|
||||
.cycle_end_irq = VECTOR_NUMBER_GPT0_COUNTER_OVERFLOW,
|
||||
#else
|
||||
.cycle_end_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
};
|
||||
/* Instance structure to use this module. */
|
||||
const timer_instance_t g_timer0 =
|
||||
{
|
||||
.p_ctrl = &g_timer0_ctrl,
|
||||
.p_cfg = &g_timer0_cfg,
|
||||
.p_api = &g_timer_on_gpt
|
||||
};
|
||||
gpt_instance_ctrl_t g_timer2_ctrl;
|
||||
#if 0
|
||||
const gpt_extended_pwm_cfg_t g_timer2_pwm_extend =
|
||||
{
|
||||
.trough_ipl = (BSP_IRQ_DISABLED),
|
||||
#if defined(VECTOR_NUMBER_GPT2_COUNTER_UNDERFLOW)
|
||||
.trough_irq = VECTOR_NUMBER_GPT2_COUNTER_UNDERFLOW,
|
||||
#else
|
||||
.trough_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
.poeg_link = GPT_POEG_LINK_POEG0,
|
||||
.output_disable = GPT_OUTPUT_DISABLE_NONE,
|
||||
.adc_trigger = GPT_ADC_TRIGGER_NONE,
|
||||
.dead_time_count_up = 0,
|
||||
.dead_time_count_down = 0,
|
||||
.adc_a_compare_match = 0,
|
||||
.adc_b_compare_match = 0,
|
||||
.interrupt_skip_source = GPT_INTERRUPT_SKIP_SOURCE_NONE,
|
||||
.interrupt_skip_count = GPT_INTERRUPT_SKIP_COUNT_0,
|
||||
.interrupt_skip_adc = GPT_INTERRUPT_SKIP_ADC_NONE,
|
||||
.gtioca_disable_setting = GPT_GTIOC_DISABLE_PROHIBITED,
|
||||
.gtiocb_disable_setting = GPT_GTIOC_DISABLE_PROHIBITED,
|
||||
};
|
||||
#endif
|
||||
const gpt_extended_cfg_t g_timer2_extend =
|
||||
{
|
||||
.gtioca = { .output_enabled = false,
|
||||
.stop_level = GPT_PIN_LEVEL_LOW
|
||||
},
|
||||
.gtiocb = { .output_enabled = true,
|
||||
.stop_level = GPT_PIN_LEVEL_LOW
|
||||
},
|
||||
.start_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.stop_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.clear_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.count_up_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.count_down_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.capture_a_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.capture_b_source = (gpt_source_t) ( GPT_SOURCE_NONE),
|
||||
.capture_a_ipl = (BSP_IRQ_DISABLED),
|
||||
.capture_b_ipl = (BSP_IRQ_DISABLED),
|
||||
#if defined(VECTOR_NUMBER_GPT2_CAPTURE_COMPARE_A)
|
||||
.capture_a_irq = VECTOR_NUMBER_GPT2_CAPTURE_COMPARE_A,
|
||||
#else
|
||||
.capture_a_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
#if defined(VECTOR_NUMBER_GPT2_CAPTURE_COMPARE_B)
|
||||
.capture_b_irq = VECTOR_NUMBER_GPT2_CAPTURE_COMPARE_B,
|
||||
#else
|
||||
.capture_b_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
.capture_filter_gtioca = GPT_CAPTURE_FILTER_NONE,
|
||||
.capture_filter_gtiocb = GPT_CAPTURE_FILTER_NONE,
|
||||
#if 0
|
||||
.p_pwm_cfg = &g_timer2_pwm_extend,
|
||||
#else
|
||||
.p_pwm_cfg = NULL,
|
||||
#endif
|
||||
#if 0
|
||||
.gtior_setting.gtior_b.gtioa = (0U << 4U) | (0U << 2U) | (0U << 0U),
|
||||
.gtior_setting.gtior_b.oadflt = (uint32_t) GPT_PIN_LEVEL_LOW,
|
||||
.gtior_setting.gtior_b.oahld = 0U,
|
||||
.gtior_setting.gtior_b.oae = (uint32_t) false,
|
||||
.gtior_setting.gtior_b.oadf = (uint32_t) GPT_GTIOC_DISABLE_PROHIBITED,
|
||||
.gtior_setting.gtior_b.nfaen = ((uint32_t) GPT_CAPTURE_FILTER_NONE & 1U),
|
||||
.gtior_setting.gtior_b.nfcsa = ((uint32_t) GPT_CAPTURE_FILTER_NONE >> 1U),
|
||||
.gtior_setting.gtior_b.gtiob = (0U << 4U) | (0U << 2U) | (0U << 0U),
|
||||
.gtior_setting.gtior_b.obdflt = (uint32_t) GPT_PIN_LEVEL_LOW,
|
||||
.gtior_setting.gtior_b.obhld = 0U,
|
||||
.gtior_setting.gtior_b.obe = (uint32_t) true,
|
||||
.gtior_setting.gtior_b.obdf = (uint32_t) GPT_GTIOC_DISABLE_PROHIBITED,
|
||||
.gtior_setting.gtior_b.nfben = ((uint32_t) GPT_CAPTURE_FILTER_NONE & 1U),
|
||||
.gtior_setting.gtior_b.nfcsb = ((uint32_t) GPT_CAPTURE_FILTER_NONE >> 1U),
|
||||
#else
|
||||
.gtior_setting.gtior = 0U,
|
||||
#endif
|
||||
};
|
||||
const timer_cfg_t g_timer2_cfg =
|
||||
{
|
||||
.mode = TIMER_MODE_PWM,
|
||||
/* Actual period: 35.791394133333334 seconds. Actual duty: 50%. */ .period_counts = (uint32_t) 0x100000000, .duty_cycle_counts = 0x80000000, .source_div = (timer_source_div_t)0,
|
||||
.channel = 2,
|
||||
.p_callback = NULL,
|
||||
/** If NULL then do not add & */
|
||||
#if defined(NULL)
|
||||
.p_context = NULL,
|
||||
#else
|
||||
.p_context = &NULL,
|
||||
#endif
|
||||
.p_extend = &g_timer2_extend,
|
||||
.cycle_end_ipl = (BSP_IRQ_DISABLED),
|
||||
#if defined(VECTOR_NUMBER_GPT2_COUNTER_OVERFLOW)
|
||||
.cycle_end_irq = VECTOR_NUMBER_GPT2_COUNTER_OVERFLOW,
|
||||
#else
|
||||
.cycle_end_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
};
|
||||
/* Instance structure to use this module. */
|
||||
const timer_instance_t g_timer2 =
|
||||
{
|
||||
.p_ctrl = &g_timer2_ctrl,
|
||||
.p_cfg = &g_timer2_cfg,
|
||||
.p_api = &g_timer_on_gpt
|
||||
};
|
||||
sci_uart_instance_ctrl_t g_uart4_ctrl;
|
||||
|
||||
baud_setting_t g_uart4_baud_setting =
|
||||
{
|
||||
/* Baud rate calculated with 0.160% error. */ .abcse = 0, .abcs = 0, .bgdm = 1, .cks = 0, .brr = 64, .mddr = (uint8_t) 256, .brme = false
|
||||
};
|
||||
|
||||
/** UART extended configuration for UARTonSCI HAL driver */
|
||||
const sci_uart_extended_cfg_t g_uart4_cfg_extend =
|
||||
{
|
||||
.clock = SCI_UART_CLOCK_INT,
|
||||
.rx_edge_start = SCI_UART_START_BIT_FALLING_EDGE,
|
||||
.noise_cancel = SCI_UART_NOISE_CANCELLATION_DISABLE,
|
||||
.rx_fifo_trigger = SCI_UART_RX_FIFO_TRIGGER_MAX,
|
||||
.p_baud_setting = &g_uart4_baud_setting,
|
||||
.flow_control = SCI_UART_FLOW_CONTROL_RTS,
|
||||
#if 0xFF != 0xFF
|
||||
.flow_control_pin = BSP_IO_PORT_FF_PIN_0xFF,
|
||||
#else
|
||||
.flow_control_pin = (bsp_io_port_pin_t) UINT16_MAX,
|
||||
#endif
|
||||
};
|
||||
|
||||
/** UART interface configuration */
|
||||
const uart_cfg_t g_uart4_cfg =
|
||||
{
|
||||
.channel = 4,
|
||||
.data_bits = UART_DATA_BITS_8,
|
||||
.parity = UART_PARITY_OFF,
|
||||
.stop_bits = UART_STOP_BITS_1,
|
||||
.p_callback = user_uart4_callback,
|
||||
.p_context = NULL,
|
||||
.p_extend = &g_uart4_cfg_extend,
|
||||
#define RA_NOT_DEFINED (1)
|
||||
#if (RA_NOT_DEFINED == RA_NOT_DEFINED)
|
||||
.p_transfer_tx = NULL,
|
||||
#else
|
||||
.p_transfer_tx = &RA_NOT_DEFINED,
|
||||
#endif
|
||||
#if (RA_NOT_DEFINED == RA_NOT_DEFINED)
|
||||
.p_transfer_rx = NULL,
|
||||
#else
|
||||
.p_transfer_rx = &RA_NOT_DEFINED,
|
||||
#endif
|
||||
#undef RA_NOT_DEFINED
|
||||
.rxi_ipl = (12),
|
||||
.txi_ipl = (12),
|
||||
.tei_ipl = (12),
|
||||
.eri_ipl = (12),
|
||||
#if defined(VECTOR_NUMBER_SCI4_RXI)
|
||||
.rxi_irq = VECTOR_NUMBER_SCI4_RXI,
|
||||
#else
|
||||
.rxi_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
#if defined(VECTOR_NUMBER_SCI4_TXI)
|
||||
.txi_irq = VECTOR_NUMBER_SCI4_TXI,
|
||||
#else
|
||||
.txi_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
#if defined(VECTOR_NUMBER_SCI4_TEI)
|
||||
.tei_irq = VECTOR_NUMBER_SCI4_TEI,
|
||||
#else
|
||||
.tei_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
#if defined(VECTOR_NUMBER_SCI4_ERI)
|
||||
.eri_irq = VECTOR_NUMBER_SCI4_ERI,
|
||||
#else
|
||||
.eri_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
};
|
||||
|
||||
/* Instance structure to use this module. */
|
||||
const uart_instance_t g_uart4 =
|
||||
{
|
||||
.p_ctrl = &g_uart4_ctrl,
|
||||
.p_cfg = &g_uart4_cfg,
|
||||
.p_api = &g_uart_on_sci
|
||||
};
|
||||
adc_instance_ctrl_t g_adc0_ctrl;
|
||||
const adc_extended_cfg_t g_adc0_cfg_extend =
|
||||
{
|
||||
.add_average_count = ADC_ADD_OFF,
|
||||
.clearing = ADC_CLEAR_AFTER_READ_ON,
|
||||
.trigger_group_b = ADC_TRIGGER_SYNC_ELC,
|
||||
.double_trigger_mode = ADC_DOUBLE_TRIGGER_DISABLED,
|
||||
.adc_vref_control = ADC_VREF_CONTROL_VREFH,
|
||||
.enable_adbuf = 0,
|
||||
#if defined(VECTOR_NUMBER_ADC0_WINDOW_A)
|
||||
.window_a_irq = VECTOR_NUMBER_ADC0_WINDOW_A,
|
||||
#else
|
||||
.window_a_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
.window_a_ipl = (BSP_IRQ_DISABLED),
|
||||
#if defined(VECTOR_NUMBER_ADC0_WINDOW_B)
|
||||
.window_b_irq = VECTOR_NUMBER_ADC0_WINDOW_B,
|
||||
#else
|
||||
.window_b_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
.window_b_ipl = (BSP_IRQ_DISABLED),
|
||||
};
|
||||
const adc_cfg_t g_adc0_cfg =
|
||||
{
|
||||
.unit = 0,
|
||||
.mode = ADC_MODE_CONTINUOUS_SCAN,
|
||||
.resolution = ADC_RESOLUTION_12_BIT,
|
||||
.alignment = (adc_alignment_t) ADC_ALIGNMENT_RIGHT,
|
||||
.trigger = ADC_TRIGGER_SOFTWARE,
|
||||
.p_callback = NULL,
|
||||
/** If NULL then do not add & */
|
||||
#if defined(NULL)
|
||||
.p_context = NULL,
|
||||
#else
|
||||
.p_context = &NULL,
|
||||
#endif
|
||||
.p_extend = &g_adc0_cfg_extend,
|
||||
#if defined(VECTOR_NUMBER_ADC0_SCAN_END)
|
||||
.scan_end_irq = VECTOR_NUMBER_ADC0_SCAN_END,
|
||||
#else
|
||||
.scan_end_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
.scan_end_ipl = (BSP_IRQ_DISABLED),
|
||||
#if defined(VECTOR_NUMBER_ADC0_SCAN_END_B)
|
||||
.scan_end_b_irq = VECTOR_NUMBER_ADC0_SCAN_END_B,
|
||||
#else
|
||||
.scan_end_b_irq = FSP_INVALID_VECTOR,
|
||||
#endif
|
||||
.scan_end_b_ipl = (BSP_IRQ_DISABLED),
|
||||
};
|
||||
#if ((0) | (0))
|
||||
const adc_window_cfg_t g_adc0_window_cfg =
|
||||
{
|
||||
.compare_mask = 0,
|
||||
.compare_mode_mask = 0,
|
||||
.compare_cfg = (0) | (0) | (0) | (ADC_COMPARE_CFG_EVENT_OUTPUT_OR),
|
||||
.compare_ref_low = 0,
|
||||
.compare_ref_high = 0,
|
||||
.compare_b_channel = (ADC_WINDOW_B_CHANNEL_0),
|
||||
.compare_b_mode = (ADC_WINDOW_B_MODE_LESS_THAN_OR_OUTSIDE),
|
||||
.compare_b_ref_low = 0,
|
||||
.compare_b_ref_high = 0,
|
||||
};
|
||||
#endif
|
||||
const adc_channel_cfg_t g_adc0_channel_cfg =
|
||||
{
|
||||
.scan_mask = ADC_MASK_CHANNEL_0 | ADC_MASK_CHANNEL_1 | ADC_MASK_CHANNEL_2 | ADC_MASK_CHANNEL_3 | ADC_MASK_CHANNEL_5 | ADC_MASK_CHANNEL_7 | ADC_MASK_CHANNEL_20 | 0,
|
||||
.scan_mask_group_b = 0,
|
||||
.priority_group_a = ADC_GROUP_A_PRIORITY_OFF,
|
||||
.add_mask = 0,
|
||||
.sample_hold_mask = 0,
|
||||
.sample_hold_states = 24,
|
||||
#if ((0) | (0))
|
||||
.p_window_cfg = (adc_window_cfg_t *) &g_adc0_window_cfg,
|
||||
#else
|
||||
.p_window_cfg = NULL,
|
||||
#endif
|
||||
};
|
||||
/* Instance structure to use this module. */
|
||||
const adc_instance_t g_adc0 =
|
||||
{
|
||||
.p_ctrl = &g_adc0_ctrl,
|
||||
.p_cfg = &g_adc0_cfg,
|
||||
.p_channel_cfg = &g_adc0_channel_cfg,
|
||||
.p_api = &g_adc_on_adc
|
||||
};
|
||||
sci_uart_instance_ctrl_t g_uart9_ctrl;
|
||||
|
||||
baud_setting_t g_uart9_baud_setting =
|
||||
|
|
|
|||
|
|
@ -4,69 +4,9 @@
|
|||
#include <stdint.h>
|
||||
#include "bsp_api.h"
|
||||
#include "common_data.h"
|
||||
#include "r_gpt.h"
|
||||
#include "r_timer_api.h"
|
||||
#include "r_sci_uart.h"
|
||||
#include "r_uart_api.h"
|
||||
#include "r_adc.h"
|
||||
#include "r_adc_api.h"
|
||||
FSP_HEADER
|
||||
/** Timer on GPT Instance. */
|
||||
extern const timer_instance_t g_timer8;
|
||||
|
||||
/** Access the GPT instance using these structures when calling API functions directly (::p_api is not used). */
|
||||
extern gpt_instance_ctrl_t g_timer8_ctrl;
|
||||
extern const timer_cfg_t g_timer8_cfg;
|
||||
|
||||
#ifndef NULL
|
||||
void NULL(timer_callback_args_t * p_args);
|
||||
#endif
|
||||
/** Timer on GPT Instance. */
|
||||
extern const timer_instance_t g_timer0;
|
||||
|
||||
/** Access the GPT instance using these structures when calling API functions directly (::p_api is not used). */
|
||||
extern gpt_instance_ctrl_t g_timer0_ctrl;
|
||||
extern const timer_cfg_t g_timer0_cfg;
|
||||
|
||||
#ifndef NULL
|
||||
void NULL(timer_callback_args_t * p_args);
|
||||
#endif
|
||||
/** Timer on GPT Instance. */
|
||||
extern const timer_instance_t g_timer2;
|
||||
|
||||
/** Access the GPT instance using these structures when calling API functions directly (::p_api is not used). */
|
||||
extern gpt_instance_ctrl_t g_timer2_ctrl;
|
||||
extern const timer_cfg_t g_timer2_cfg;
|
||||
|
||||
#ifndef NULL
|
||||
void NULL(timer_callback_args_t * p_args);
|
||||
#endif
|
||||
/** UART on SCI Instance. */
|
||||
extern const uart_instance_t g_uart4;
|
||||
|
||||
/** Access the UART instance using these structures when calling API functions directly (::p_api is not used). */
|
||||
extern sci_uart_instance_ctrl_t g_uart4_ctrl;
|
||||
extern const uart_cfg_t g_uart4_cfg;
|
||||
extern const sci_uart_extended_cfg_t g_uart4_cfg_extend;
|
||||
|
||||
#ifndef user_uart4_callback
|
||||
void user_uart4_callback(uart_callback_args_t * p_args);
|
||||
#endif
|
||||
/** ADC on ADC Instance. */
|
||||
extern const adc_instance_t g_adc0;
|
||||
|
||||
/** Access the ADC instance using these structures when calling API functions directly (::p_api is not used). */
|
||||
extern adc_instance_ctrl_t g_adc0_ctrl;
|
||||
extern const adc_cfg_t g_adc0_cfg;
|
||||
extern const adc_channel_cfg_t g_adc0_channel_cfg;
|
||||
|
||||
#ifndef NULL
|
||||
void NULL(adc_callback_args_t * p_args);
|
||||
#endif
|
||||
|
||||
#ifndef NULL
|
||||
#define ADC_DMAC_CHANNELS_PER_BLOCK_NULL 7
|
||||
#endif
|
||||
/** UART on SCI Instance. */
|
||||
extern const uart_instance_t g_uart9;
|
||||
|
||||
|
|
|
|||
|
|
@ -8,10 +8,6 @@
|
|||
[1] = sci_uart_txi_isr, /* SCI9 TXI (Transmit data empty) */
|
||||
[2] = sci_uart_tei_isr, /* SCI9 TEI (Transmit end) */
|
||||
[3] = sci_uart_eri_isr, /* SCI9 ERI (Receive error) */
|
||||
[4] = sci_uart_rxi_isr, /* SCI4 RXI (Received data full) */
|
||||
[5] = sci_uart_txi_isr, /* SCI4 TXI (Transmit data empty) */
|
||||
[6] = sci_uart_tei_isr, /* SCI4 TEI (Transmit end) */
|
||||
[7] = sci_uart_eri_isr, /* SCI4 ERI (Receive error) */
|
||||
};
|
||||
const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] =
|
||||
{
|
||||
|
|
@ -19,9 +15,5 @@
|
|||
[1] = BSP_PRV_IELS_ENUM(EVENT_SCI9_TXI), /* SCI9 TXI (Transmit data empty) */
|
||||
[2] = BSP_PRV_IELS_ENUM(EVENT_SCI9_TEI), /* SCI9 TEI (Transmit end) */
|
||||
[3] = BSP_PRV_IELS_ENUM(EVENT_SCI9_ERI), /* SCI9 ERI (Receive error) */
|
||||
[4] = BSP_PRV_IELS_ENUM(EVENT_SCI4_RXI), /* SCI4 RXI (Received data full) */
|
||||
[5] = BSP_PRV_IELS_ENUM(EVENT_SCI4_TXI), /* SCI4 TXI (Transmit data empty) */
|
||||
[6] = BSP_PRV_IELS_ENUM(EVENT_SCI4_TEI), /* SCI4 TEI (Transmit end) */
|
||||
[7] = BSP_PRV_IELS_ENUM(EVENT_SCI4_ERI), /* SCI4 ERI (Receive error) */
|
||||
};
|
||||
#endif
|
||||
|
|
@ -3,7 +3,7 @@
|
|||
#define VECTOR_DATA_H
|
||||
/* Number of interrupts allocated */
|
||||
#ifndef VECTOR_DATA_IRQ_COUNT
|
||||
#define VECTOR_DATA_IRQ_COUNT (8)
|
||||
#define VECTOR_DATA_IRQ_COUNT (4)
|
||||
#endif
|
||||
/* ISR prototypes */
|
||||
void sci_uart_rxi_isr(void);
|
||||
|
|
@ -20,12 +20,4 @@
|
|||
#define SCI9_TEI_IRQn ((IRQn_Type) 2) /* SCI9 TEI (Transmit end) */
|
||||
#define VECTOR_NUMBER_SCI9_ERI ((IRQn_Type) 3) /* SCI9 ERI (Receive error) */
|
||||
#define SCI9_ERI_IRQn ((IRQn_Type) 3) /* SCI9 ERI (Receive error) */
|
||||
#define VECTOR_NUMBER_SCI4_RXI ((IRQn_Type) 4) /* SCI4 RXI (Received data full) */
|
||||
#define SCI4_RXI_IRQn ((IRQn_Type) 4) /* SCI4 RXI (Received data full) */
|
||||
#define VECTOR_NUMBER_SCI4_TXI ((IRQn_Type) 5) /* SCI4 TXI (Transmit data empty) */
|
||||
#define SCI4_TXI_IRQn ((IRQn_Type) 5) /* SCI4 TXI (Transmit data empty) */
|
||||
#define VECTOR_NUMBER_SCI4_TEI ((IRQn_Type) 6) /* SCI4 TEI (Transmit end) */
|
||||
#define SCI4_TEI_IRQn ((IRQn_Type) 6) /* SCI4 TEI (Transmit end) */
|
||||
#define VECTOR_NUMBER_SCI4_ERI ((IRQn_Type) 7) /* SCI4 ERI (Receive error) */
|
||||
#define SCI4_ERI_IRQn ((IRQn_Type) 7) /* SCI4 ERI (Receive error) */
|
||||
#endif /* VECTOR_DATA_H */
|
||||
|
|
@ -27,7 +27,6 @@
|
|||
#define RT_USING_DEBUG
|
||||
#define RT_DEBUGING_COLOR
|
||||
#define RT_DEBUGING_CONTEXT
|
||||
#define RT_DEBUGING_INIT
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
|
|
@ -85,11 +84,7 @@
|
|||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V2
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_USING_I2C
|
||||
#define RT_USING_I2C_BITOPS
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_ADC
|
||||
#define RT_USING_PWM
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
|
@ -113,17 +108,16 @@
|
|||
|
||||
/* Socket is in the 'Network' category */
|
||||
|
||||
#define RT_USING_CPLUSPLUS
|
||||
|
||||
/* Network */
|
||||
|
||||
|
||||
/* Memory protection */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
|
||||
/* Memory management */
|
||||
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
|
||||
|
|
@ -143,6 +137,12 @@
|
|||
/* CYW43012 WiFi */
|
||||
|
||||
|
||||
/* BL808 WiFi */
|
||||
|
||||
|
||||
/* CYW43439 WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
|
|
@ -181,8 +181,6 @@
|
|||
|
||||
/* Micrium: Micrium software products porting for RT-Thread */
|
||||
|
||||
#define PKG_USING_PERF_COUNTER
|
||||
#define PKG_USING_PERF_COUNTER_LATEST_VERSION
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
|
|
@ -213,14 +211,6 @@
|
|||
|
||||
/* Arduino libraries */
|
||||
|
||||
#define PKG_USING_RTDUINO
|
||||
#define RTDUINO_THREAD_SIZE 2048
|
||||
#define RTDUINO_THREAD_PRIO 30
|
||||
#define RTDUINO_SUPPORT_HIGH_PRECISION_MICROS
|
||||
#define RTDUINO_USING_WIRE
|
||||
#define RTDUINO_WIRE_BUFFER_LENGTH 32
|
||||
#define RTDUINO_USING_SERVO
|
||||
#define PKG_USING_RTDUINO_LATEST_VERSION
|
||||
|
||||
/* Projects and Demos */
|
||||
|
||||
|
|
@ -262,24 +252,14 @@
|
|||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_ARDUINO
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_UART4
|
||||
#define BSP_UART4_RX_BUFSIZE 256
|
||||
#define BSP_UART4_TX_BUFSIZE 0
|
||||
#define BSP_USING_UART9
|
||||
#define BSP_UART9_RX_BUFSIZE 256
|
||||
#define BSP_UART9_TX_BUFSIZE 0
|
||||
#define BSP_USING_I2C
|
||||
#define BSP_USING_ADC
|
||||
#define BSP_USING_ADC0
|
||||
#define BSP_USING_PWM
|
||||
#define BSP_USING_PWM2
|
||||
#define BSP_USING_PWM2_CH2
|
||||
|
||||
/* Board extended module Drivers */
|
||||
|
||||
|
|
|
|||
|
|
@ -168,6 +168,15 @@ void hal_entry(void)
|
|||
3. 如何将 **”CPK-RA6M4板级支持包“**添加到 FSP 中，请参考文档[如何导入板级支持包](https://www2.renesas.cn/document/ppt/1527171?language=zh&r=1527191)
|
||||
4. 请查看文档：[使用 FSP 配置外设驱动](../docs/RA系列使用FSP配置外设驱动.md)，在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。
|
||||
|
||||
目前仓库 bsp 默认使能最小体量配置，用户可通过如下步骤使能 env 外设配置：
|
||||
|
||||
1. 在 bsp 目录下打开 env 工具，使用 `scons --target=mdk5`命令生成 MDK 工程。
|
||||
2. 打开 bsp 目录下的`project.uvprojx`文件，选择上方导航栏的 `Software Components`配置，打开后找到`Flex Software`下的`RA Configuration`旁的配置按钮，该操作会自动查找当前电脑环境下安装的 fsp 版本，选择指定版本后进入 fsp。
|
||||
|
||||
3. 在进入 fsp 后我们可以发现，已经存在了一些已经配置完成的外设，此时我们点击`Generate Project Content`按钮即可生成所需驱动文件。
|
||||
|
||||
4. 接下来回到 env，使能所需的外设配置后保存退出即可。
|
||||
|
||||
**ENV 配置**
|
||||
|
||||
- 如何使用 ENV 工具：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/#/development-tools/env/env)
|
||||
|
|
|
|||
|
|
@ -8,11 +8,36 @@ menu "Hardware Drivers Config"
|
|||
default y
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
config BSP_USING_SEGGER_RTT_CONSOLE
|
||||
bool "Enable SEGGER-RTT for console"
|
||||
select PKG_USING_SEGGER_RTT
|
||||
|
||||
config BSP_USING_SEGGER_RTT_CONSOLE
|
||||
bool "Enable SEGGER-RTT for console"
|
||||
select PKG_USING_SEGGER_RTT
|
||||
default n
|
||||
|
||||
config BSP_USING_SPI_LCD
|
||||
bool "Enable SPI LCD"
|
||||
select BSP_USING_GPIO
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SPI1
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_LVGL
|
||||
bool "Enable LVGL for LCD"
|
||||
select PKG_USING_LVGL
|
||||
default n
|
||||
if BSP_USING_LVGL
|
||||
config BSP_USING_LCD_ILI9431
|
||||
bool "Enable LVGL for LCD_ILI9431"
|
||||
select PKG_USING_ILI9341
|
||||
select BSP_USING_SPI_LCD
|
||||
default n
|
||||
|
||||
config BSP_USING_LVGL_DEMO
|
||||
bool "Enable LVGL demo"
|
||||
select PKG_USING_LV_MUSIC_DEMO
|
||||
default y
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
|
@ -446,10 +471,24 @@ menu "Hardware Drivers Config"
|
|||
select RT_LIBC_USING_FILEIO
|
||||
select RT_USING_POSIX_DEVIO
|
||||
if BSP_USING_SDHI
|
||||
config SDHI_USING_1_BIT
|
||||
bool "Use 1-bit Mode(4-bit when disable)"
|
||||
default y
|
||||
endif
|
||||
menuconfig BSP_USING_SDHI0
|
||||
bool "Enable SDHI0"
|
||||
default n
|
||||
if BSP_USING_SDHI0
|
||||
config SDHI_USING_1_BIT
|
||||
bool "Use 1-bit Mode(4-bit when disable)"
|
||||
default y
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SDHI1
|
||||
bool "Enable SDHI1"
|
||||
default n
|
||||
if BSP_USING_SDHI1
|
||||
config SDHI_USING_1_BIT
|
||||
bool "Use 1-bit Mode(4-bit when disable)"
|
||||
default y
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_CAN
|
||||
bool "Enable CAN"
|
||||
|
|
@ -465,32 +504,6 @@ menu "Hardware Drivers Config"
|
|||
default n
|
||||
endif
|
||||
|
||||
config BSP_USING_SPI_LCD
|
||||
bool "Enable SPI LCD"
|
||||
select BSP_USING_GPIO
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SPI1
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_LVGL
|
||||
bool "Enable LVGL for LCD"
|
||||
select PKG_USING_LVGL
|
||||
default n
|
||||
if BSP_USING_LVGL
|
||||
config BSP_USING_LCD_ILI9431
|
||||
bool "Enable LVGL for LCD_ILI9431"
|
||||
select PKG_USING_ILI9341
|
||||
select BSP_USING_SPI_LCD
|
||||
default n
|
||||
endif
|
||||
|
||||
if BSP_USING_LVGL
|
||||
config BSP_USING_LVGL_DEMO
|
||||
bool "Enable LVGL demo"
|
||||
select PKG_USING_LV_MUSIC_DEMO
|
||||
default y
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "Board extended module Drivers"
|
||||
|
|
|
|||
|
|
@ -155,6 +155,15 @@ void hal_entry(void)
|
|||
3. 如何将 **”IOT-RA6M4 板级支持包“**添加到 FSP 中，请参考文档[如何导入板级支持包](https://www2.renesas.cn/document/ppt/1527171?language=zh&r=1527191)
|
||||
4. 请查看文档：[使用瑞萨 FSP 配置工具](../docs/RA系列使用FSP配置外设驱动.md)。在 MDK 中通过添加自定义命名来打开当前工程的 FSP 配置。
|
||||
|
||||
目前仓库 bsp 默认使能最小体量配置，用户可通过如下步骤使能 env 外设配置：
|
||||
|
||||
1. 在 bsp 目录下打开 env 工具，使用 `scons --target=mdk5`命令生成 MDK 工程。
|
||||
2. 打开 bsp 目录下的`project.uvprojx`文件，选择上方导航栏的 `Software Components`配置，打开后找到`Flex Software`下的`RA Configuration`旁的配置按钮，该操作会自动查找当前电脑环境下安装的 fsp 版本，选择指定版本后进入 fsp。
|
||||
|
||||
3. 在进入 fsp 后我们可以发现，已经存在了一些已经配置完成的外设，此时我们点击`Generate Project Content`按钮即可生成所需驱动文件。
|
||||
|
||||
4. 接下来回到 env，使能所需的外设配置后保存退出即可。
|
||||
|
||||
**ENV 配置**
|
||||
|
||||
- 如何使用 ENV 工具：[RT-Thread env 工具用户手册](https://www.rt-thread.org/document/site/#/development-tools/env/env)
|
||||
|
|
@ -167,7 +176,6 @@ void hal_entry(void)
|
|||
3. 输入`pkgs --update`命令更新软件包。
|
||||
4. 输入`scons --target=mdk5` 命令重新生成工程。
|
||||
|
||||
|
||||
## FAQ
|
||||
|
||||
### 使用 MDK 的 DEBUG 时如果遇到提示 “Error: Flash Download failed Cortex-M33” 怎么办？
|
||||
|
|
|
|||
|
|
@ -425,10 +425,24 @@ menu "Hardware Drivers Config"
|
|||
select RT_LIBC_USING_FILEIO
|
||||
select RT_USING_POSIX_DEVIO
|
||||
if BSP_USING_SDHI
|
||||
config SDHI_USING_1_BIT
|
||||
bool "Use 1-bit Mode(4-bit when disable)"
|
||||
default y
|
||||
endif
|
||||
menuconfig BSP_USING_SDHI0
|
||||
bool "Enable SDHI0"
|
||||
default n
|
||||
if BSP_USING_SDHI0
|
||||
config SDHI_USING_1_BIT
|
||||
bool "Use 1-bit Mode(4-bit when disable)"
|
||||
default y
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SDHI1
|
||||
bool "Enable SDHI1"
|
||||
default n
|
||||
if BSP_USING_SDHI1
|
||||
config SDHI_USING_1_BIT
|
||||
bool "Use 1-bit Mode(4-bit when disable)"
|
||||
default y
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_CAN
|
||||
bool "Enable CAN"
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@ CONFIG_RT_TICK_PER_SECOND=1000
|
|||
CONFIG_RT_USING_OVERFLOW_CHECK=y
|
||||
CONFIG_RT_USING_HOOK=y
|
||||
CONFIG_RT_HOOK_USING_FUNC_PTR=y
|
||||
# CONFIG_RT_USING_HOOKLIST is not set
|
||||
CONFIG_RT_USING_IDLE_HOOK=y
|
||||
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
|
||||
CONFIG_IDLE_THREAD_STACK_SIZE=256
|
||||
|
|
@ -73,6 +74,7 @@ CONFIG_RT_USING_HEAP=y
|
|||
CONFIG_RT_USING_DEVICE=y
|
||||
# CONFIG_RT_USING_DEVICE_OPS is not set
|
||||
# CONFIG_RT_USING_INTERRUPT_INFO is not set
|
||||
# CONFIG_RT_USING_THREDSAFE_PRINTF is not set
|
||||
CONFIG_RT_USING_CONSOLE=y
|
||||
CONFIG_RT_CONSOLEBUF_SIZE=128
|
||||
CONFIG_RT_CONSOLE_DEVICE_NAME="uart9"
|
||||
|
|
@ -117,16 +119,6 @@ CONFIG_FINSH_USING_OPTION_COMPLETION=y
|
|||
# DFS: device virtual file system
|
||||
#
|
||||
# CONFIG_RT_USING_DFS is not set
|
||||
# CONFIG_RT_USING_DFS_V1 is not set
|
||||
# CONFIG_RT_USING_DFS_V2 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
|
||||
# CONFIG_RT_DFS_ELM_USE_LFN_3 is not set
|
||||
# CONFIG_RT_DFS_ELM_LFN_UNICODE_0 is not set
|
||||
# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set
|
||||
# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set
|
||||
# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set
|
||||
# CONFIG_RT_USING_FAL is not set
|
||||
|
||||
#
|
||||
|
|
@ -283,6 +275,21 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
#
|
||||
# CONFIG_PKG_USING_WLAN_WICED is not set
|
||||
# CONFIG_PKG_USING_RW007 is not set
|
||||
|
||||
#
|
||||
# CYW43012 WiFi
|
||||
#
|
||||
# CONFIG_PKG_USING_WLAN_CYW43012 is not set
|
||||
|
||||
#
|
||||
# BL808 WiFi
|
||||
#
|
||||
# CONFIG_PKG_USING_WLAN_BL808 is not set
|
||||
|
||||
#
|
||||
# CYW43439 WiFi
|
||||
#
|
||||
# CONFIG_PKG_USING_WLAN_CYW43439 is not set
|
||||
# CONFIG_PKG_USING_COAP is not set
|
||||
# CONFIG_PKG_USING_NOPOLL is not set
|
||||
# CONFIG_PKG_USING_NETUTILS is not set
|
||||
|
|
@ -304,7 +311,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_JIOT-C-SDK is not set
|
||||
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
|
||||
# CONFIG_PKG_USING_JOYLINK is not set
|
||||
# CONFIG_PKG_USING_EZ_IOT_OS is not set
|
||||
# CONFIG_PKG_USING_IOTSHARP_SDK is not set
|
||||
# CONFIG_PKG_USING_NIMBLE is not set
|
||||
# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
|
||||
|
|
@ -325,6 +331,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_NMEALIB is not set
|
||||
# CONFIG_PKG_USING_PDULIB is not set
|
||||
# CONFIG_PKG_USING_BTSTACK is not set
|
||||
# CONFIG_PKG_USING_BT_CYW43012 is not set
|
||||
# CONFIG_PKG_USING_CYW43XX is not set
|
||||
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
|
||||
# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
|
||||
# CONFIG_PKG_USING_MAVLINK is not set
|
||||
|
|
@ -344,6 +352,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ZFTP is not set
|
||||
# CONFIG_PKG_USING_WOL is not set
|
||||
# CONFIG_PKG_USING_ZEPHYR_POLLING is not set
|
||||
# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
|
||||
# CONFIG_PKG_USING_LHC_MODBUS is not set
|
||||
|
||||
#
|
||||
# security packages
|
||||
|
|
@ -390,7 +400,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# LVGL: powerful and easy-to-use embedded GUI library
|
||||
#
|
||||
# CONFIG_PKG_USING_LVGL is not set
|
||||
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
|
||||
# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
|
||||
# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
|
||||
|
||||
|
|
@ -465,6 +474,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_HASH_MATCH is not set
|
||||
# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
|
||||
# CONFIG_PKG_USING_VOFA_PLUS is not set
|
||||
# CONFIG_PKG_USING_ZDEBUG is not set
|
||||
|
||||
#
|
||||
# system packages
|
||||
|
|
@ -501,6 +511,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_UC_COMMON is not set
|
||||
# CONFIG_PKG_USING_UC_MODBUS is not set
|
||||
# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
|
||||
# CONFIG_PKG_USING_LITEOS_SDK is not set
|
||||
# CONFIG_PKG_USING_TZ_DATABASE is not set
|
||||
# CONFIG_PKG_USING_CAIRO is not set
|
||||
# CONFIG_PKG_USING_PIXMAN is not set
|
||||
# CONFIG_PKG_USING_PARTITION is not set
|
||||
|
|
@ -524,6 +536,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_QBOOT is not set
|
||||
# CONFIG_PKG_USING_PPOOL is not set
|
||||
# CONFIG_PKG_USING_OPENAMP is not set
|
||||
# CONFIG_PKG_USING_RPMSG_LITE is not set
|
||||
# CONFIG_PKG_USING_LPM is not set
|
||||
# CONFIG_PKG_USING_TLSF is not set
|
||||
# CONFIG_PKG_USING_EVENT_RECORDER is not set
|
||||
|
|
@ -537,6 +550,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_AGILE_UPGRADE is not set
|
||||
# CONFIG_PKG_USING_FLASH_BLOB is not set
|
||||
# CONFIG_PKG_USING_MLIBC is not set
|
||||
# CONFIG_PKG_USING_TASK_MSG_BUS is not set
|
||||
# CONFIG_PKG_USING_SFDB is not set
|
||||
# CONFIG_PKG_USING_RTP is not set
|
||||
# CONFIG_PKG_USING_REB is not set
|
||||
# CONFIG_PKG_USING_R_RHEALSTONE is not set
|
||||
|
||||
#
|
||||
# peripheral libraries and drivers
|
||||
|
|
@ -601,6 +619,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_BALANCE is not set
|
||||
# CONFIG_PKG_USING_SHT2X is not set
|
||||
# CONFIG_PKG_USING_SHT3X is not set
|
||||
# CONFIG_PKG_USING_SHT4X is not set
|
||||
# CONFIG_PKG_USING_AD7746 is not set
|
||||
# CONFIG_PKG_USING_ADT74XX is not set
|
||||
# CONFIG_PKG_USING_MAX17048 is not set
|
||||
|
|
@ -701,6 +720,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_FINGERPRINT is not set
|
||||
# CONFIG_PKG_USING_BT_ECB02C is not set
|
||||
# CONFIG_PKG_USING_UAT is not set
|
||||
# CONFIG_PKG_USING_ST7789 is not set
|
||||
# CONFIG_PKG_USING_VS1003 is not set
|
||||
# CONFIG_PKG_USING_X9555 is not set
|
||||
# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
|
||||
# CONFIG_PKG_USING_BT_MX01 is not set
|
||||
# CONFIG_PKG_USING_SPI_TOOLS is not set
|
||||
|
||||
#
|
||||
|
|
@ -715,6 +739,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ULAPACK is not set
|
||||
# CONFIG_PKG_USING_QUEST is not set
|
||||
# CONFIG_PKG_USING_NAXOS is not set
|
||||
# CONFIG_PKG_USING_R_TINYMAIX is not set
|
||||
|
||||
#
|
||||
# Signal Processing and Control Algorithm Packages
|
||||
|
|
@ -724,6 +749,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_UKAL is not set
|
||||
# CONFIG_PKG_USING_DIGITALCTRL is not set
|
||||
# CONFIG_PKG_USING_KISSFFT is not set
|
||||
# CONFIG_PKG_USING_CMSIS_DSP is not set
|
||||
|
||||
#
|
||||
# miscellaneous packages
|
||||
|
|
@ -755,12 +781,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_DONUT is not set
|
||||
# CONFIG_PKG_USING_COWSAY is not set
|
||||
# CONFIG_PKG_USING_MORSE is not set
|
||||
# CONFIG_PKG_USING_TINYSQUARE is not set
|
||||
# CONFIG_PKG_USING_LIBCSV is not set
|
||||
# CONFIG_PKG_USING_OPTPARSE is not set
|
||||
# CONFIG_PKG_USING_FASTLZ is not set
|
||||
# CONFIG_PKG_USING_MINILZO is not set
|
||||
# CONFIG_PKG_USING_QUICKLZ is not set
|
||||
# CONFIG_PKG_USING_LZMA is not set
|
||||
# CONFIG_PKG_USING_RALARAM is not set
|
||||
# CONFIG_PKG_USING_MULTIBUTTON is not set
|
||||
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
|
||||
# CONFIG_PKG_USING_CANFESTIVAL is not set
|
||||
|
|
@ -798,6 +826,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
#
|
||||
# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
|
||||
|
||||
|
|
@ -805,13 +834,13 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# Sensors
|
||||
#
|
||||
# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set
|
||||
# CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31855 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set
|
||||
|
|
@ -856,7 +885,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set
|
||||
# CONFIG_PKG_USING_ADAFRUIT_MSA301 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MSA301 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set
|
||||
|
|
@ -895,7 +924,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set
|
||||
|
|
@ -918,7 +946,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set
|
||||
# CONFIG_PKG_USING_SEEED_ITG3200 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_ITG3200 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set
|
||||
|
|
@ -926,7 +954,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set
|
||||
# CONFIG_PKG_USING_SEEED_MP503 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_MP503 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set
|
||||
|
|
@ -939,12 +967,14 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
|
||||
|
||||
#
|
||||
# Display
|
||||
#
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_U8G2 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_TFT_ESPI is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
|
||||
|
|
@ -953,6 +983,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
#
|
||||
# Timing
|
||||
#
|
||||
# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_TICKER is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
|
||||
|
|
@ -978,18 +1009,17 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
|
|||
#
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TPA2016 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DRV2605 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
|
||||
|
||||
#
|
||||
# Other
|
||||
#
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set
|
||||
# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set
|
||||
|
||||
#
|
||||
# Signal IO
|
||||
|
|
@ -1019,6 +1049,12 @@ CONFIG_SOC_SERIES_R7FA8M85=y
|
|||
#
|
||||
CONFIG_SOC_R7FA8D1AH=y
|
||||
|
||||
#
|
||||
# Onboard Peripheral Drivers
|
||||
#
|
||||
# CONFIG_BSP_USING_FS is not set
|
||||
# CONFIG_BSP_USING_LVGL is not set
|
||||
|
||||
#
|
||||
# On-chip Peripheral Drivers
|
||||
#
|
||||
|
|
@ -1037,14 +1073,11 @@ CONFIG_BSP_UART9_TX_BUFSIZE=0
|
|||
# CONFIG_BSP_USING_SCI is not set
|
||||
# CONFIG_BSP_USING_SPI is not set
|
||||
# CONFIG_BSP_USING_I2C is not set
|
||||
# CONFIG_BSP_USING_FS is not set
|
||||
# CONFIG_BSP_USING_SDHI is not set
|
||||
# CONFIG_BSP_USING_PWM is not set
|
||||
# CONFIG_BSP_USING_CAN is not set
|
||||
# CONFIG_BSP_USING_LCD is not set
|
||||
CONFIG_BSP_USING_SDRAM=y
|
||||
CONFIG_BSP_USING_SDRAM_SIZE=0x8000000
|
||||
# CONFIG_BSP_USING_SDRAM is not set
|
||||
# CONFIG_BSP_USING_G2D is not set
|
||||
# CONFIG_BSP_USING_JPEG is not set
|
||||
# CONFIG_BSP_USING_ETH is not set
|
||||
# CONFIG_BSP_USING_LVGL is not set
|
||||
|
|
|
|||
|
|
@ -167,6 +167,19 @@ void hal_entry(void)
|
|||
3. 输入`pkgs --update`命令更新软件包。
|
||||
4. 输入`scons --target=mdk5` 命令重新生成工程。
|
||||
|
||||
**FSP配置**
|
||||
|
||||
* 如何使用 FSP：[RA系列使用 FSP 配置外设驱动](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/tutorial/make-bsp/renesas-ra/RA系列使用FSP配置外设驱动?id=ra系列使用-fsp-配置外设驱动)
|
||||
|
||||
目前仓库 bsp 默认使能最小体量配置，用户可通过如下步骤使能 env 外设配置：
|
||||
|
||||
1. 在 bsp 目录下打开 env 工具，使用 `scons --target=mdk5`命令生成 MDK 工程。
|
||||
2. 打开 bsp 目录下的`project.uvprojx`文件，选择上方导航栏的 `Software Components`配置，打开后找到`Flex Software`下的`RA Configuration`旁的配置按钮，该操作会自动查找当前电脑环境下安装的 fsp 版本，选择指定版本后进入 fsp。
|
||||
|
||||
3. 在进入 fsp 后我们可以发现，已经存在了一些已经配置完成的外设，此时我们点击`Generate Project Content`按钮即可生成所需驱动文件。
|
||||
|
||||
4. 接下来回到 env，使能所需的外设配置后保存退出即可。
|
||||
|
||||
## 联系人信息
|
||||
|
||||
在使用过程中若您有任何的想法和建议，建议您通过以下方式来联系到我们 [RT-Thread 社区论坛](https://club.rt-thread.org/)
|
||||
|
|
|
|||
|
|
@ -138,6 +138,19 @@ The steps are as follows:
|
|||
3. Enter the `pkgs --update` command to update the software package.
|
||||
4. Enter the `scons --target=mdk5` command to regenerate the project.
|
||||
|
||||
**FSP Configuration**
|
||||
|
||||
* How to Use FSP: [Configuring Peripheral Drivers for RA Series Using FSP](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/tutorial/make-bsp/renesas-ra/RA系列使用FSP配置外设驱动?id=ra系列使用-fsp-配置外设驱动)
|
||||
|
||||
The current repository's BSP is configured with the minimum footprint enabled by default. Users can enable peripheral configurations through the following steps:
|
||||
|
||||
1. Open the `env` tool in the BSP directory and use the `scons --target=mdk5` command to generate an MDK project.
|
||||
2. Open the `project.uvprojx` file in the BSP directory, select the `Software Components` configuration in the top navigation bar, and open the configuration button next to `RA Configuration` under `Flex Software`. This operation will automatically detect the installed FSP version on the current computer. After selecting the specified version, enter FSP.
|
||||
|
||||
3. Upon entering FSP, pre-configured peripherals are already present. Click the `Generate Project Content` button to generate the required driver files.
|
||||
|
||||
4. Return to `env`, enable the necessary peripheral configurations, save, and exit.
|
||||
|
||||
## Contribute the Code
|
||||
|
||||
If you’re interested in the EK-RA8D1 and have some cool projects you’d like to share with everyone, we’d love for you to contribute your code! You can check out [how to contribute to RT-Thread’s code](https://www.rt-thread.io/contribution.html). Let’s make something awesome together!
|
||||
|
|
@ -7,6 +7,47 @@ menu "Hardware Drivers Config"
|
|||
select RT_USING_USER_MAIN
|
||||
default y
|
||||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
menuconfig BSP_USING_FS
|
||||
bool "Enable filesystem"
|
||||
default n
|
||||
if BSP_USING_FS
|
||||
config BSP_USING_ONCHIP_FS
|
||||
bool "Enable ONCHIP filesystem"
|
||||
select RT_USING_FAL
|
||||
select RT_USING_DFS_ELMFAT
|
||||
select RT_USING_MTD_NOR
|
||||
select BSP_USING_ONCHIP_FLASH
|
||||
default n
|
||||
config BSP_USING_SDCARD_FS
|
||||
bool "Enable SDCARD filesystem"
|
||||
select BSP_USING_SDHI
|
||||
select BSP_USING_SDHI1
|
||||
select RT_USING_DFS_ELMFAT
|
||||
default n
|
||||
config BSP_USING_SPICARD_FS
|
||||
bool "Enable SPI FLASH filesystem"
|
||||
select BSP_USING_SCI_SPI
|
||||
select BSP_USING_SCI_SPI2
|
||||
select RT_USING_SPI_MSD
|
||||
select RT_USING_DFS_ELMFAT
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_LVGL
|
||||
bool "Enable LVGL for LCD"
|
||||
select PKG_USING_LVGL
|
||||
default n
|
||||
if BSP_USING_LVGL
|
||||
config BSP_USING_LCD_RGB
|
||||
bool "Enable LVGL for LCD_RGB565"
|
||||
select BSP_USING_LCD
|
||||
default n
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
||||
source "../libraries/HAL_Drivers/Kconfig"
|
||||
|
|
@ -473,31 +514,6 @@ menu "Hardware Drivers Config"
|
|||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_FS
|
||||
bool "Enable filesystem"
|
||||
default n
|
||||
if BSP_USING_FS
|
||||
config BSP_USING_ONCHIP_FS
|
||||
bool "Enable ONCHIP filesystem"
|
||||
select RT_USING_FAL
|
||||
select RT_USING_DFS_ELMFAT
|
||||
select RT_USING_MTD_NOR
|
||||
select BSP_USING_ONCHIP_FLASH
|
||||
default n
|
||||
config BSP_USING_SDCARD_FS
|
||||
bool "Enable SDCARD filesystem"
|
||||
select BSP_USING_SDHI
|
||||
select RT_USING_DFS_ELMFAT
|
||||
default n
|
||||
config BSP_USING_SPICARD_FS
|
||||
bool "Enable SPI FLASH filesystem"
|
||||
select BSP_USING_SCI_SPI
|
||||
select BSP_USING_SCI_SPI2
|
||||
select RT_USING_SPI_MSD
|
||||
select RT_USING_DFS_ELMFAT
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SDHI
|
||||
bool "Enable SDHI"
|
||||
default n
|
||||
|
|
@ -506,10 +522,24 @@ menu "Hardware Drivers Config"
|
|||
select RT_LIBC_USING_FILEIO
|
||||
select RT_USING_POSIX_DEVIO
|
||||
if BSP_USING_SDHI
|
||||
config SDHI_USING_1_BIT
|
||||
bool "Use 1-bit Mode(4-bit when disable)"
|
||||
default y
|
||||
endif
|
||||
menuconfig BSP_USING_SDHI0
|
||||
bool "Enable SDHI0"
|
||||
default n
|
||||
if BSP_USING_SDHI0
|
||||
config SDHI_USING_1_BIT
|
||||
bool "Use 1-bit Mode(4-bit when disable)"
|
||||
default y
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_SDHI1
|
||||
bool "Enable SDHI1"
|
||||
default n
|
||||
if BSP_USING_SDHI1
|
||||
config SDHI_USING_1_BIT
|
||||
bool "Use 1-bit Mode(4-bit when disable)"
|
||||
default y
|
||||
endif
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
bool "Enable PWM"
|
||||
|
|
@ -566,16 +596,5 @@ menu "Hardware Drivers Config"
|
|||
select RT_USING_LWIP
|
||||
select RT_USING_NETDEV
|
||||
default n
|
||||
|
||||
menuconfig BSP_USING_LVGL
|
||||
bool "Enable LVGL for LCD"
|
||||
select PKG_USING_LVGL
|
||||
default n
|
||||
if BSP_USING_LVGL
|
||||
config BSP_USING_LCD_RGB
|
||||
bool "Enable LVGL for LCD_RGB565"
|
||||
select BSP_USING_LCD
|
||||
default n
|
||||
endif
|
||||
endmenu
|
||||
endmenu
|
||||
|
|
|
|||
|
|
@ -22,5 +22,9 @@ elif rtconfig.PLATFORM in GetGCCLikePLATFORM():
|
|||
cwd + '/fsp/inc/api',
|
||||
cwd + '/fsp/inc/instances',]
|
||||
|
||||
if GetDepend('BSP_USING_G2D'):
|
||||
src += Glob(cwd + '/tes/dave2d/src/*.c')
|
||||
CPPPATH += [cwd + '/tes/dave2d/inc']
|
||||
|
||||
group = DefineGroup('ra', src, depend = [''], CPPPATH = CPPPATH)
|
||||
Return('group')
|
||||
|
|
|
|||
|
|
@ -137,6 +137,15 @@
|
|||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* CYW43012 WiFi */
|
||||
|
||||
|
||||
/* BL808 WiFi */
|
||||
|
||||
|
||||
/* CYW43439 WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
|
|
@ -244,6 +253,9 @@
|
|||
|
||||
#define SOC_R7FA8D1AH
|
||||
|
||||
/* Onboard Peripheral Drivers */
|
||||
|
||||
|
||||
/* On-chip Peripheral Drivers */
|
||||
|
||||
#define BSP_USING_GPIO
|
||||
|
|
@ -251,7 +263,5 @@
|
|||
#define BSP_USING_UART9
|
||||
#define BSP_UART9_RX_BUFSIZE 256
|
||||
#define BSP_UART9_TX_BUFSIZE 0
|
||||
#define BSP_USING_SDRAM
|
||||
#define BSP_USING_SDRAM_SIZE 0x8000000
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -167,6 +167,19 @@ void hal_entry(void)
|
|||
3. 输入`pkgs --update`命令更新软件包。
|
||||
4. 输入`scons --target=mdk5` 命令重新生成工程。
|
||||
|
||||
**FSP配置**
|
||||
|
||||
* 如何使用 FSP：[RA系列使用 FSP 配置外设驱动](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/tutorial/make-bsp/renesas-ra/RA系列使用FSP配置外设驱动?id=ra系列使用-fsp-配置外设驱动)
|
||||
|
||||
目前仓库 bsp 默认使能最小体量配置，用户可通过如下步骤使能 env 外设配置：
|
||||
|
||||
1. 在 bsp 目录下打开 env 工具，使用 `scons --target=mdk5`命令生成 MDK 工程。
|
||||
2. 打开 bsp 目录下的`project.uvprojx`文件，选择上方导航栏的 `Software Components`配置，打开后找到`Flex Software`下的`RA Configuration`旁的配置按钮，该操作会自动查找当前电脑环境下安装的 fsp 版本，选择指定版本后进入 fsp。
|
||||
|
||||
3. 在进入 fsp 后我们可以发现，已经存在了一些已经配置完成的外设，此时我们点击`Generate Project Content`按钮即可生成所需驱动文件。
|
||||
|
||||
4. 接下来回到 env，使能所需的外设配置后保存退出即可。
|
||||
|
||||
## 联系人信息
|
||||
|
||||
在使用过程中若您有任何的想法和建议，建议您通过以下方式来联系到我们 [RT-Thread 社区论坛](https://club.rt-thread.org/)
|
||||
|
|
|
|||
|
|
@ -127,6 +127,19 @@ The steps are as follows:
|
|||
3. Enter the `pkgs --update` command to update the software package.
|
||||
4. Enter the `scons --target=mdk5` command to regenerate the project.
|
||||
|
||||
**FSP Configuration**
|
||||
|
||||
* How to Use FSP: [Configuring Peripheral Drivers for RA Series Using FSP](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/tutorial/make-bsp/renesas-ra/RA系列使用FSP配置外设驱动?id=ra系列使用-fsp-配置外设驱动)
|
||||
|
||||
The current repository's BSP is configured with the minimum footprint enabled by default. Users can enable peripheral configurations through the following steps:
|
||||
|
||||
1. Open the `env` tool in the BSP directory and use the `scons --target=mdk5` command to generate an MDK project.
|
||||
2. Open the `project.uvprojx` file in the BSP directory, select the `Software Components` configuration in the top navigation bar, and open the configuration button next to `RA Configuration` under `Flex Software`. This operation will automatically detect the installed FSP version on the current computer. After selecting the specified version, enter FSP.
|
||||
|
||||
3. Upon entering FSP, pre-configured peripherals are already present. Click the `Generate Project Content` button to generate the required driver files.
|
||||
|
||||
4. Return to `env`, enable the necessary peripheral configurations, save, and exit.
|
||||
|
||||
## Contribute the Code
|
||||
|
||||
If you’re interested in the EK-RA8M1 and have some cool projects you’d like to share with everyone, we’d love for you to contribute your code! You can check out [how to contribute to RT-Thread’s code](https://www.rt-thread.io/contribution.html). Let’s make something awesome together!
|
||||
|
|
@ -9,6 +9,19 @@ menu "Hardware Drivers Config"
|
|||
|
||||
menu "Onboard Peripheral Drivers"
|
||||
|
||||
menuconfig BSP_USING_FS
|
||||
bool "Enable filesystem"
|
||||
default n
|
||||
if BSP_USING_FS
|
||||
config BSP_USING_SPICARD_FS
|
||||
bool "Enable SPI FLASH filesystem"
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SCI_SPI6
|
||||
select RT_USING_SPI_MSD
|
||||
select RT_USING_DFS_ELMFAT
|
||||
default n
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
menu "On-chip Peripheral Drivers"
|
||||
|
|
@ -495,18 +508,6 @@ menu "Hardware Drivers Config"
|
|||
bool "Enable DAC0"
|
||||
default n
|
||||
endif
|
||||
menuconfig BSP_USING_FS
|
||||
bool "Enable filesystem"
|
||||
default n
|
||||
if BSP_USING_FS
|
||||
config BSP_USING_SPICARD_FS
|
||||
bool "Enable SPI FLASH filesystem"
|
||||
select BSP_USING_SPI
|
||||
select BSP_USING_SCI_SPI6
|
||||
select RT_USING_SPI_MSD
|
||||
select RT_USING_DFS_ELMFAT
|
||||
default n
|
||||
endif
|
||||
|
||||
menuconfig BSP_USING_PWM
|
||||
bool "Enable PWM"
|
||||
|
|
|
|||
|
|
@ -2,9 +2,6 @@ import subprocess
|
|||
import sys
|
||||
import os
|
||||
|
||||
# cwd_path = os.getcwd()
|
||||
# sys.path.append(os.path.join(os.path.dirname(cwd_path), 'rt-thread', 'tools'))
|
||||
|
||||
def check_git_exists():
|
||||
try:
|
||||
# Check if Git is installed
|
||||
|
|
@ -43,7 +40,7 @@ def revert_to_original(filepath):
|
|||
subprocess.call(["git", "checkout", filepath])
|
||||
|
||||
def startup_check():
|
||||
file_path = os.getcwd() + f"/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c"
|
||||
file_path = os.getcwd() + "/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c"
|
||||
python_executable = 'python' if sys.version_info[0] == 2 else 'python3'
|
||||
|
||||
# Check if Git is installed, if not, try to install it
|
||||
|
|
|
|||
Loading…
Reference in New Issue