[bsp][stm32] Update the serialv2 driver for CPU Cache. Simplified the DMA receive code.
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@ -395,49 +395,30 @@ static rt_size_t stm32_transmit(struct rt_serial_device *serial,
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static void dma_recv_isr(struct rt_serial_device *serial, rt_uint8_t isr_flag)
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{
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struct stm32_uart *uart;
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rt_base_t level;
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rt_size_t recv_len, counter;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct stm32_uart, serial);
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level = rt_hw_interrupt_disable();
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recv_len = 0;
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counter = __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
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switch (isr_flag)
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{
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case UART_RX_DMA_IT_IDLE_FLAG:
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if (counter <= uart->dma_rx.remaining_cnt)
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recv_len = uart->dma_rx.remaining_cnt - counter;
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else
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recv_len = serial->config.rx_bufsz + uart->dma_rx.remaining_cnt - counter;
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break;
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case UART_RX_DMA_IT_HT_FLAG:
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if (counter < uart->dma_rx.remaining_cnt)
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recv_len = uart->dma_rx.remaining_cnt - counter;
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break;
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case UART_RX_DMA_IT_TC_FLAG:
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if(counter >= uart->dma_rx.remaining_cnt)
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recv_len = serial->config.rx_bufsz + uart->dma_rx.remaining_cnt - counter;
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default:
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break;
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}
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if (counter <= uart->dma_rx.remaining_cnt)
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recv_len = uart->dma_rx.remaining_cnt - counter;
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else
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recv_len = serial->config.rx_bufsz + uart->dma_rx.remaining_cnt - counter;
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if (recv_len)
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{
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#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
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struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx;
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SCB_InvalidateDCache_by_Addr((uint32_t *)rx_fifo->buffer, serial->config.rx_bufsz);
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#endif
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uart->dma_rx.remaining_cnt = counter;
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
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}
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rt_hw_interrupt_enable(level);
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}
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#endif /* RT_SERIAL_USING_DMA */
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/**
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* Uart common interrupt process. This need add to uart ISR.
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*
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@ -449,7 +430,7 @@ static void uart_isr(struct rt_serial_device *serial)
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct stm32_uart, serial);
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/* If the Read data register is not empty and the RXNE interrupt is enabled (RDR) */
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/* If the Read data register is not empty and the RXNE interrupt is enabled (RDR) */
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if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) &&
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(__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET))
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{
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@ -461,7 +442,7 @@ static void uart_isr(struct rt_serial_device *serial)
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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}
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/* If the Transmit data register is empty and the TXE interrupt enable is enabled (TDR)*/
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/* If the Transmit data register is empty and the TXE interrupt enable is enabled (TDR) */
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else if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET) &&
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(__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_TXE)) != RESET)
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{
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@ -954,6 +935,27 @@ static void stm32_uart_get_config(void)
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static struct dma_config uart4_dma_tx = UART4_DMA_TX_CONFIG;
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uart_config[UART4_INDEX].dma_tx = &uart4_dma_tx;
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#endif
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#ifdef BSP_USING_UART5
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uart_obj[UART5_INDEX].serial.config = config;
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uart_obj[UART5_INDEX].uart_dma_flag = 0;
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uart_obj[UART5_INDEX].serial.config.rx_bufsz = BSP_UART5_RX_BUFSIZE;
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uart_obj[UART5_INDEX].serial.config.tx_bufsz = BSP_UART5_TX_BUFSIZE;
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#ifdef BSP_UART5_RX_USING_DMA
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uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
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static struct dma_config uart5_dma_rx = UART5_DMA_RX_CONFIG;
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uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;
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#endif
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#ifdef BSP_UART5_TX_USING_DMA
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uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
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static struct dma_config uart5_dma_tx = UART5_DMA_TX_CONFIG;
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uart_config[UART5_INDEX].dma_tx = &uart5_dma_tx;
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#endif
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#endif
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#endif
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}
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