add STM32F107 project.
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@111 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
bernard.xiong
parent
bdb748041c
commit
d328291395
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@ -0,0 +1,61 @@
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/*
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* File : application.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard the first version
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*/
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/**
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* @addtogroup STM32
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*/
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/*@{*/
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#include <rtthread.h>
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#ifdef RT_USING_LWIP
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#include <lwip/sys.h>
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#include <lwip/api.h>
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#endif
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void rt_init_thread_entry(void* parameter)
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{
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/* LwIP Initialization */
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#ifdef RT_USING_LWIP
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{
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extern void lwip_sys_init(void);
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/* init lwip system */
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lwip_sys_init();
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rt_kprintf("TCP/IP initialized!\n");
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}
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#endif
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}
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int rt_application_init()
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{
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rt_thread_t init_thread;
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#if (RT_THREAD_PRIORITY_MAX == 32)
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init_thread = rt_thread_create("init",
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rt_init_thread_entry, RT_NULL,
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2048, 8, 20);
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#else
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init_thread = rt_thread_create("init",
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rt_init_thread_entry, RT_NULL,
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2048, 80, 20);
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#endif
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if (init_thread != RT_NULL)
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rt_thread_startup(init_thread);
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return 0;
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}
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/*@}*/
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@ -0,0 +1,55 @@
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/*
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* File : board.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2009-09-22 Bernard add board.h to this bsp
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*/
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// <<< Use Configuration Wizard in Context Menu >>>
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#ifndef __BOARD_H__
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#define __BOARD_H__
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/* board configuration */
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// <o> SDCard Driver <1=>SDIO sdcard <0=>SPI MMC card
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// <i>Default: 1
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#define STM32_USE_SDIO 0
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/* whether use board external SRAM memory */
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// <e>Use external SRAM memory on the board
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// <i>Enable External SRAM memory
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#define STM32_EXT_SRAM 0
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// <o>Begin Address of External SRAM
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// <i>Default: 0x68000000
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#define STM32_EXT_SRAM_BEGIN 0x68000000 /* the begining address of external SRAM */
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// <o>End Address of External SRAM
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// <i>Default: 0x68080000
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#define STM32_EXT_SRAM_END 0x68080000 /* the end address of external SRAM */
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// </e>
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// <o> Internal SRAM memory size[Kbytes] <8-64>
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// <i>Default: 64
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#define STM32_SRAM_SIZE 64
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#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
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// <o> Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3
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// <i>Default: 1
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#define STM32_CONSOLE_USART 2
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void rt_hw_board_led_on(int n);
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void rt_hw_board_led_off(int n);
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void rt_hw_board_init(void);
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void rt_hw_usart_init(void);
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void rt_hw_sdcard_init(void);
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void rt_hw_msd_init(void);
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#endif
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// <<< Use Configuration Wizard in Context Menu >>>
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@ -0,0 +1,206 @@
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### uVision2 Project, (C) Keil Software
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### Do not modify !
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Target (RT-Thread STM32), 0x0004 // Tools: 'ARM-ADS'
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Group (Startup)
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Group (StdPeriph_Driver)
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Group (CMSIS)
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Group (Kernel)
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Group (STM32)
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Group (LwIP)
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Group (finsh)
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File 1,1,<.\stm32f10x_it.c><stm32f10x_it.c>
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File 1,1,<.\board.c><board.c>
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File 1,1,<.\application.c><application.c>
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File 1,1,<.\startup.c><startup.c>
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File 1,1,<.\led.c><led.c>
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File 1,1,<.\usart.c><usart.c>
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File 1,5,<.\rtconfig.h><rtconfig.h>
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File 1,5,<.\board.h><board.h>
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File 1,1,<.\stm32_eth.c><stm32_eth.c>
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File 1,1,<.\rtc.c><rtc.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c><misc.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c><stm32f10x_adc.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c><stm32f10x_bkp.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c><stm32f10x_can.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_crc.c><stm32f10x_crc.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dac.c><stm32f10x_dac.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dbgmcu.c><stm32f10x_dbgmcu.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_dma.c><stm32f10x_dma.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_exti.c><stm32f10x_exti.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_flash.c><stm32f10x_flash.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_fsmc.c><stm32f10x_fsmc.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_gpio.c><stm32f10x_gpio.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_i2c.c><stm32f10x_i2c.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_iwdg.c><stm32f10x_iwdg.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_pwr.c><stm32f10x_pwr.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rcc.c><stm32f10x_rcc.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_rtc.c><stm32f10x_rtc.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c><stm32f10x_sdio.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c><stm32f10x_spi.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c><stm32f10x_tim.c>
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File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c><stm32f10x_usart.c>
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File 3,1,<.\Libraries\CMSIS\Core\CM3\core_cm3.c><core_cm3.c>
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File 3,1,<.\Libraries\CMSIS\Core\CM3\system_stm32f10x.c><system_stm32f10x.c>
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File 4,1,<..\..\src\clock.c><clock.c>
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File 4,1,<..\..\src\device.c><device.c>
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File 4,1,<..\..\src\idle.c><idle.c>
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File 4,1,<..\..\src\ipc.c><ipc.c>
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File 4,1,<..\..\src\irq.c><irq.c>
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File 4,1,<..\..\src\kservice.c><kservice.c>
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File 4,1,<..\..\src\mem.c><mem.c>
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File 4,1,<..\..\src\mempool.c><mempool.c>
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File 4,1,<..\..\src\object.c><object.c>
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File 4,1,<..\..\src\scheduler.c><scheduler.c>
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File 4,1,<..\..\src\slab.c><slab.c>
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File 4,1,<..\..\src\thread.c><thread.c>
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File 4,1,<..\..\src\timer.c><timer.c>
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File 5,1,<..\..\libcpu\arm\stm32\cpu.c><cpu.c>
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File 5,1,<..\..\libcpu\arm\stm32\fault.c><fault.c>
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File 5,1,<..\..\libcpu\arm\stm32\interrupt.c><interrupt.c>
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File 5,1,<..\..\libcpu\arm\stm32\stack.c><stack.c>
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File 5,2,<..\..\libcpu\arm\stm32\context_rvds.S><context_rvds.S>
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File 5,2,<..\..\libcpu\arm\stm32\fault_rvds.S><fault_rvds.S>
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File 5,2,<..\..\libcpu\arm\stm32\start_rvds.s><start_rvds.s>
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File 5,1,<..\..\libcpu\arm\stm32\serial.c><serial.c>
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File 6,1,<..\..\net\lwip\src\core\dhcp.c><dhcp.c>
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File 6,1,<..\..\net\lwip\src\core\dns.c><dns.c>
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File 6,1,<..\..\net\lwip\src\core\init.c><init.c>
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File 6,1,<..\..\net\lwip\src\core\memp_tiny.c><memp_tiny.c>
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File 6,1,<..\..\net\lwip\src\core\netif.c><netif.c>
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File 6,1,<..\..\net\lwip\src\core\pbuf.c><pbuf.c>
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File 6,1,<..\..\net\lwip\src\core\raw.c><raw.c>
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File 6,1,<..\..\net\lwip\src\core\stats.c><stats.c>
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File 6,1,<..\..\net\lwip\src\core\sys.c><sys.c>
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File 6,1,<..\..\net\lwip\src\core\tcp.c><tcp.c>
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File 6,1,<..\..\net\lwip\src\core\tcp_in.c><tcp_in.c>
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File 6,1,<..\..\net\lwip\src\core\tcp_out.c><tcp_out.c>
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File 6,1,<..\..\net\lwip\src\core\udp.c><udp.c>
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File 6,1,<..\..\net\lwip\src\core\ipv4\ip_frag.c><ip_frag.c>
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File 6,1,<..\..\net\lwip\src\core\ipv4\autoip.c><autoip.c>
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File 6,1,<..\..\net\lwip\src\core\ipv4\icmp.c><icmp.c>
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File 6,1,<..\..\net\lwip\src\core\ipv4\igmp.c><igmp.c>
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File 6,1,<..\..\net\lwip\src\core\ipv4\inet.c><inet.c>
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File 6,1,<..\..\net\lwip\src\core\ipv4\inet_chksum.c><inet_chksum.c>
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File 6,1,<..\..\net\lwip\src\core\ipv4\ip.c><ip.c>
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File 6,1,<..\..\net\lwip\src\core\ipv4\ip_addr.c><ip_addr.c>
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File 6,1,<..\..\net\lwip\src\api\tcpip.c><tcpip.c>
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File 6,1,<..\..\net\lwip\src\api\api_lib.c><api_lib.c>
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File 6,1,<..\..\net\lwip\src\api\api_msg.c><api_msg.c>
|
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File 6,1,<..\..\net\lwip\src\api\err.c><err.c>
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File 6,1,<..\..\net\lwip\src\api\netbuf.c><netbuf.c>
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File 6,1,<..\..\net\lwip\src\api\netdb.c><netdb.c>
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File 6,1,<..\..\net\lwip\src\api\netifapi.c><netifapi.c>
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File 6,1,<..\..\net\lwip\src\api\sockets.c><sockets.c>
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File 6,1,<..\..\net\lwip\src\netif\ethernetif.c><ethernetif.c>
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File 6,1,<..\..\net\lwip\src\netif\etharp.c><etharp.c>
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File 6,1,<..\..\net\lwip\src\arch\sys_arch_init.c><sys_arch_init.c>
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File 6,1,<..\..\net\lwip\src\arch\sys_arch.c><sys_arch.c>
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File 7,1,<..\..\finsh\symbol.c><symbol.c>
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File 7,1,<..\..\finsh\cmd.c><cmd.c>
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File 7,1,<..\..\finsh\finsh_compiler.c><finsh_compiler.c>
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File 7,1,<..\..\finsh\finsh_error.c><finsh_error.c>
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File 7,1,<..\..\finsh\finsh_heap.c><finsh_heap.c>
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File 7,1,<..\..\finsh\finsh_init.c><finsh_init.c>
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File 7,1,<..\..\finsh\finsh_node.c><finsh_node.c>
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File 7,1,<..\..\finsh\finsh_ops.c><finsh_ops.c>
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File 7,1,<..\..\finsh\finsh_parser.c><finsh_parser.c>
|
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File 7,1,<..\..\finsh\finsh_token.c><finsh_token.c>
|
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File 7,1,<..\..\finsh\finsh_var.c><finsh_var.c>
|
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File 7,1,<..\..\finsh\finsh_vm.c><finsh_vm.c>
|
||||
File 7,1,<..\..\finsh\shell.c><shell.c>
|
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|
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Options 1,0,0 // Target 'RT-Thread STM32'
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Device (STM32F107xC)
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Vendor (STMicroelectronics)
|
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Cpu (IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x803FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3"))
|
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FlashUt ()
|
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StupF ("STARTUP\ST\STM32F10x.s" ("STM32 Startup Code"))
|
||||
FlashDR (UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_256 -FS08000000 -FL080000))
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||||
DevID (0)
|
||||
Rgf (stm32f10x_lib.h)
|
||||
Mem ()
|
||||
C ()
|
||||
A ()
|
||||
RL ()
|
||||
OH ()
|
||||
DBC_IFX ()
|
||||
DBC_CMS ()
|
||||
DBC_AMS ()
|
||||
DBC_LMS ()
|
||||
UseEnv=0
|
||||
EnvBin ()
|
||||
EnvInc ()
|
||||
EnvLib ()
|
||||
EnvReg (ÿST\STM32F10x\)
|
||||
OrgReg (ÿST\STM32F10x\)
|
||||
TgStat=16
|
||||
OutDir (.\obj\)
|
||||
OutName (rtthread-stm32)
|
||||
GenApp=1
|
||||
GenLib=0
|
||||
GenHex=0
|
||||
Debug=1
|
||||
Browse=0
|
||||
LstDir (.\obj\)
|
||||
HexSel=1
|
||||
MG32K=0
|
||||
TGMORE=0
|
||||
RunUsr 0 0 <>
|
||||
RunUsr 1 0 <>
|
||||
BrunUsr 0 0 <>
|
||||
BrunUsr 1 0 <>
|
||||
CrunUsr 0 0 <>
|
||||
CrunUsr 1 0 <>
|
||||
SVCSID <>
|
||||
GLFLAGS=1790
|
||||
ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
ACPUTYP ("Cortex-M3")
|
||||
RVDEV ()
|
||||
ADSTFLGA { 0,12,0,2,99,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
OCMADSIRAM { 0,0,0,0,32,0,0,1,0 }
|
||||
OCMADSIROM { 1,0,0,0,8,0,0,4,0 }
|
||||
OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }
|
||||
OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,8,0,0,4,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,0,1,0,0,0,0,0,0,0,0,0,0 }
|
||||
RV_STAVEC ()
|
||||
ADSCCFLG { 5,32,0,4,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
ADSCMISC ()
|
||||
ADSCDEFN (USE_STDPERIPH_DRIVER, STM32F10X_CL,)
|
||||
ADSCUDEF ()
|
||||
ADSCINCD (.\Libraries\STM32F10x_StdPeriph_Driver\inc;.\Libraries\CMSIS\Core\CM3;..\..\include;.;..\..\libcpu\arm\stm32;..\..\finsh;..\..\net\lwip\src;..\..\net\lwip\src\include;..\..\net\lwip\src\arch\include;..\..\net\lwip\src\include\ipv4)
|
||||
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
ADSAMISC ()
|
||||
ADSADEFN ()
|
||||
ADSAUDEF ()
|
||||
ADSAINCD ()
|
||||
PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
IncBld=1
|
||||
AlwaysBuild=0
|
||||
GenAsm=0
|
||||
AsmAsm=0
|
||||
PublicsOnly=0
|
||||
StopCode=3
|
||||
CustArgs ()
|
||||
LibMods ()
|
||||
ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
|
||||
ADSLDTA (0x08000000)
|
||||
ADSLDDA (0x20000000)
|
||||
ADSLDSC ()
|
||||
ADSLDIB ()
|
||||
ADSLDIC ()
|
||||
ADSLDMC ()
|
||||
ADSLDIF ()
|
||||
ADSLDDW ()
|
||||
OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F107xCSchedule)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F107xC)
|
||||
OPTDBG 49150,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
|
||||
FLASH1 { 9,0,0,0,1,0,0,0,5,16,0,0,0,0,0,0,0,0,0,0 }
|
||||
FLASH2 (Segger\JL2CM3.dll)
|
||||
FLASH3 ("" ())
|
||||
FLASH4 ()
|
||||
EndOpt
|
||||
|
||||
|
|
@ -0,0 +1,113 @@
|
|||
/* RT-Thread config file */
|
||||
#ifndef __RTTHREAD_CFG_H__
|
||||
#define __RTTHREAD_CFG_H__
|
||||
|
||||
/* RT_NAME_MAX*/
|
||||
#define RT_NAME_MAX 8
|
||||
|
||||
/* RT_ALIGN_SIZE*/
|
||||
#define RT_ALIGN_SIZE 4
|
||||
|
||||
/* PRIORITY_MAX */
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
|
||||
/* Tick per Second */
|
||||
#define RT_TICK_PER_SECOND 100
|
||||
|
||||
/* SECTION: RT_DEBUG */
|
||||
/* Thread Debug */
|
||||
#define RT_DEBUG
|
||||
#define RT_THREAD_DEBUG
|
||||
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
|
||||
/* Using Hook */
|
||||
#define RT_USING_HOOK
|
||||
|
||||
/* SECTION: IPC */
|
||||
/* Using Semaphore*/
|
||||
#define RT_USING_SEMAPHORE
|
||||
|
||||
/* Using Mutex */
|
||||
#define RT_USING_MUTEX
|
||||
|
||||
/* Using Event */
|
||||
#define RT_USING_EVENT
|
||||
|
||||
/* Using MailBox */
|
||||
#define RT_USING_MAILBOX
|
||||
|
||||
/* Using Message Queue */
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* SECTION: Memory Management */
|
||||
/* Using Memory Pool Management*/
|
||||
#define RT_USING_MEMPOOL
|
||||
|
||||
/* Using Dynamic Heap Management */
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Using Small MM */
|
||||
#define RT_USING_SMALL_MEM
|
||||
|
||||
/* SECTION: Device System */
|
||||
/* Using Device System */
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_UART1
|
||||
#define RT_USING_UART2
|
||||
|
||||
/* SECTION: Console options */
|
||||
/* the buffer size of console*/
|
||||
#define RT_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* SECTION: finsh shell */
|
||||
#define RT_USING_FINSH
|
||||
/* Using symbol table */
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_DEVICE_NAME "uart2"
|
||||
|
||||
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
|
||||
#define RT_USING_LWIP
|
||||
|
||||
/* Enable ICMP protocol*/
|
||||
#define RT_LWIP_ICMP
|
||||
/* Enable UDP protocol*/
|
||||
#define RT_LWIP_UDP
|
||||
/* Enable TCP protocol*/
|
||||
#define RT_LWIP_TCP
|
||||
/* Enable DNS */
|
||||
#define RT_LWIP_DNS
|
||||
|
||||
/* the number of simulatenously active TCP connections*/
|
||||
#define RT_LWIP_TCP_PCB_NUM 5
|
||||
|
||||
/* ip address of target*/
|
||||
#define RT_LWIP_IPADDR0 192
|
||||
#define RT_LWIP_IPADDR1 168
|
||||
#define RT_LWIP_IPADDR2 1
|
||||
#define RT_LWIP_IPADDR3 30
|
||||
|
||||
/* gateway address of target*/
|
||||
#define RT_LWIP_GWADDR0 192
|
||||
#define RT_LWIP_GWADDR1 168
|
||||
#define RT_LWIP_GWADDR2 1
|
||||
#define RT_LWIP_GWADDR3 1
|
||||
|
||||
/* mask address of target*/
|
||||
#define RT_LWIP_MSKADDR0 255
|
||||
#define RT_LWIP_MSKADDR1 255
|
||||
#define RT_LWIP_MSKADDR2 255
|
||||
#define RT_LWIP_MSKADDR3 0
|
||||
|
||||
/* tcp thread options */
|
||||
#define RT_LWIP_TCPTHREAD_PRIORITY 12
|
||||
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4
|
||||
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
|
||||
|
||||
/* ethernet if thread options */
|
||||
#define RT_LWIP_ETHTHREAD_PRIORITY 15
|
||||
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4
|
||||
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,172 @@
|
|||
/*
|
||||
* File : startup.c
|
||||
* This file is part of RT-Thread RTOS
|
||||
* COPYRIGHT (C) 2006, RT-Thread Develop Team
|
||||
*
|
||||
* The license and distribution terms for this file may be
|
||||
* found in the file LICENSE in this distribution or at
|
||||
* http://openlab.rt-thread.com/license/LICENSE
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2006-08-31 Bernard first implementation
|
||||
*/
|
||||
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "stm32f10x.h"
|
||||
#include "board.h"
|
||||
#include "rtc.h"
|
||||
|
||||
/**
|
||||
* @addtogroup STM32
|
||||
*/
|
||||
|
||||
/*@{*/
|
||||
|
||||
#ifdef RT_USING_LWIP
|
||||
#ifdef STM32F10X_CL
|
||||
void rt_hw_stm32_eth_init(void);
|
||||
#else
|
||||
#include "enc28j60.h"
|
||||
#endif
|
||||
#include <netif/ethernetif.h>
|
||||
#endif
|
||||
|
||||
extern int rt_application_init(void);
|
||||
#ifdef RT_USING_FINSH
|
||||
extern void finsh_system_init(void);
|
||||
extern void finsh_set_device(const char* device);
|
||||
#endif
|
||||
|
||||
#ifdef __CC_ARM
|
||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||
#elif __ICCARM__
|
||||
#pragma section="HEAP"
|
||||
#else
|
||||
extern int __bss_end;
|
||||
#endif
|
||||
|
||||
#ifdef DEBUG
|
||||
/*******************************************************************************
|
||||
* Function Name : assert_failed
|
||||
* Description : Reports the name of the source file and the source line number
|
||||
* where the assert error has occurred.
|
||||
* Input : - file: pointer to the source file name
|
||||
* - line: assert error line source number
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void assert_failed(u8* file, u32 line)
|
||||
{
|
||||
rt_kprintf("\n\r Wrong parameter value detected on\r\n");
|
||||
rt_kprintf(" file %s\r\n", file);
|
||||
rt_kprintf(" line %d\r\n", line);
|
||||
|
||||
while (1) ;
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* This function will startup RT-Thread RTOS.
|
||||
*/
|
||||
void rtthread_startup(void)
|
||||
{
|
||||
/* init board */
|
||||
rt_hw_board_init();
|
||||
|
||||
/* show version */
|
||||
rt_show_version();
|
||||
|
||||
/* init tick */
|
||||
rt_system_tick_init();
|
||||
|
||||
/* init kernel object */
|
||||
rt_system_object_init();
|
||||
|
||||
/* init timer system */
|
||||
rt_system_timer_init();
|
||||
|
||||
#ifdef RT_USING_HEAP
|
||||
#if STM32_EXT_SRAM
|
||||
rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
|
||||
#else
|
||||
#ifdef __CC_ARM
|
||||
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
|
||||
#elif __ICCARM__
|
||||
rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
|
||||
#else
|
||||
/* init memory system */
|
||||
rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* init scheduler system */
|
||||
rt_system_scheduler_init();
|
||||
|
||||
/* init hardware serial device */
|
||||
rt_hw_usart_init();
|
||||
|
||||
#ifdef RT_USINS_DFS
|
||||
/* init sdcard driver */
|
||||
#if STM32_USE_SDIO
|
||||
rt_hw_sdcard_init();
|
||||
#else
|
||||
rt_hw_msd_init();
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_LWIP
|
||||
eth_system_device_init();
|
||||
|
||||
#ifdef STM32F10X_CL
|
||||
rt_hw_stm32_eth_init();
|
||||
#else
|
||||
/* register ethernetif device */
|
||||
rt_hw_enc28j60_init();
|
||||
#endif
|
||||
#endif // end of RT_USING_LWIP
|
||||
|
||||
rt_hw_rtc_init();
|
||||
|
||||
/* init all device */
|
||||
rt_device_init_all();
|
||||
|
||||
/* init application */
|
||||
rt_application_init();
|
||||
|
||||
#ifdef RT_USING_FINSH
|
||||
/* init finsh */
|
||||
finsh_system_init();
|
||||
finsh_set_device(FINSH_DEVICE_NAME);
|
||||
#endif
|
||||
|
||||
/* init idle thread */
|
||||
rt_thread_idle_init();
|
||||
|
||||
/* start scheduler */
|
||||
rt_system_scheduler_start();
|
||||
|
||||
/* never reach here */
|
||||
return ;
|
||||
}
|
||||
|
||||
int main(void)
|
||||
{
|
||||
rt_uint32_t UNUSED level;
|
||||
|
||||
/* disable interrupt first */
|
||||
level = rt_hw_interrupt_disable();
|
||||
|
||||
/* init system setting */
|
||||
SystemInit();
|
||||
|
||||
/* startup RT-Thread RTOS */
|
||||
rtthread_startup();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
|
|
@ -0,0 +1,281 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file Project/Template/stm32f10x_it.c
|
||||
* @author MCD Application Team
|
||||
* @version V3.1.0
|
||||
* @date 06/19/2009
|
||||
* @brief Main Interrupt Service Routines.
|
||||
* This file provides template for all exceptions handler and
|
||||
* peripherals interrupt service routine.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x_it.h"
|
||||
#include "stm32f10x_dma.h"
|
||||
|
||||
#include <rtthread.h>
|
||||
|
||||
/** @addtogroup Template_Project
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Private functions ---------------------------------------------------------*/
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M3 Processor Exceptions Handlers */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles NMI exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Hard Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory Manage exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Memory Manage exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Bus Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Bus Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Usage Fault exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* Go to infinite loop when Usage Fault exception occurs */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles SVCall exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug Monitor exception.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32F10x Peripherals Interrupt Handlers */
|
||||
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
|
||||
/* available peripheral interrupt handler's name please refer to the startup */
|
||||
/* file (startup_stm32f10x_xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA1_Channel2_IRQHandler
|
||||
* Description : This function handles DMA1 Channel 2 interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void DMA1_Channel2_IRQHandler(void)
|
||||
{
|
||||
#ifdef RT_USING_UART3
|
||||
extern struct rt_device uart3_device;
|
||||
extern void rt_hw_serial_dma_tx_isr(struct rt_device *device);
|
||||
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
if (DMA_GetITStatus(DMA1_IT_TC2))
|
||||
{
|
||||
/* transmission complete, invoke serial dma tx isr */
|
||||
rt_hw_serial_dma_tx_isr(&uart3_device);
|
||||
}
|
||||
|
||||
/* clear DMA flag */
|
||||
DMA_ClearFlag(DMA1_FLAG_TC2 | DMA1_FLAG_TE2);
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : DMA1_Channel6_IRQHandler
|
||||
* Description : This function handles DMA1 Channel 6 interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void DMA1_Channel6_IRQHandler(void)
|
||||
{
|
||||
#ifdef RT_USING_UART2
|
||||
extern struct rt_device uart2_device;
|
||||
extern void rt_hw_serial_dma_rx_isr(struct rt_device *device);
|
||||
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
/* clear DMA flag */
|
||||
DMA_ClearFlag(DMA1_FLAG_TC6 | DMA1_FLAG_TE6);
|
||||
rt_hw_serial_dma_rx_isr(&uart2_device);
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : USART1_IRQHandler
|
||||
* Description : This function handles USART1 global interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void USART1_IRQHandler(void)
|
||||
{
|
||||
#ifdef RT_USING_UART1
|
||||
extern struct rt_device uart1_device;
|
||||
extern void rt_hw_serial_isr(struct rt_device *device);
|
||||
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_hw_serial_isr(&uart1_device);
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : USART2_IRQHandler
|
||||
* Description : This function handles USART2 global interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void USART2_IRQHandler(void)
|
||||
{
|
||||
#ifdef RT_USING_UART2
|
||||
extern struct rt_device uart2_device;
|
||||
extern void rt_hw_serial_isr(struct rt_device *device);
|
||||
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_hw_serial_isr(&uart2_device);
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : USART3_IRQHandler
|
||||
* Description : This function handles USART3 global interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void USART3_IRQHandler(void)
|
||||
{
|
||||
#ifdef RT_USING_UART3
|
||||
extern struct rt_device uart3_device;
|
||||
extern void rt_hw_serial_isr(struct rt_device *device);
|
||||
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_hw_serial_isr(&uart3_device);
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
#endif
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
* Function Name : ETH_IRQHandler
|
||||
* Description : This function handles ETH interrupt request.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
*******************************************************************************/
|
||||
void ETH_IRQHandler(void)
|
||||
{
|
||||
#ifdef RT_USING_LWIP
|
||||
extern void rt_hw_stm32_eth_isr(void);
|
||||
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_hw_stm32_eth_isr();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file Project/Template/stm32f10x_it.h
|
||||
* @author MCD Application Team
|
||||
* @version V3.1.0
|
||||
* @date 06/19/2009
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F10x_IT_H
|
||||
#define __STM32F10x_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F10x_IT_H */
|
||||
|
||||
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
|
||||
Loading…
Reference in New Issue