[bsp][renesas]Update drv_adc,i2c dirvers.
This commit is contained in:
parent
30c3eb9a56
commit
d2555d2169
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@ -19,18 +19,19 @@ extern "C" {
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#endif
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#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1)
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struct ra_adc_map
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struct rt_adc_dev
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{
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char name;
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const adc_cfg_t *g_cfg;
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const adc_instance_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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struct rt_adc_ops ops;
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struct rt_adc_device adc_device;
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};
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struct ra_dev
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struct ra_adc_map
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{
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rt_adc_device_t ra_adc_device_t;
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struct ra_adc_map *ra_adc_dev;
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const char *device_name;
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const adc_cfg_t *g_cfg;
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const adc_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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};
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#endif
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#endif
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@ -19,18 +19,19 @@ extern "C" {
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#endif
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#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1)
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struct ra_adc_map
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struct rt_adc_dev
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{
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char name;
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const adc_cfg_t *g_cfg;
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const adc_instance_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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struct rt_adc_ops ops;
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struct rt_adc_device adc_device;
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};
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struct ra_dev
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struct ra_adc_map
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{
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rt_adc_device_t ra_adc_device_t;
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struct ra_adc_map *ra_adc_dev;
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const char *device_name;
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const adc_cfg_t *g_cfg;
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const adc_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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};
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#endif
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#endif
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@ -19,18 +19,19 @@ extern "C" {
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#endif
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#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1)
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struct ra_adc_map
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struct rt_adc_dev
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{
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char name;
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const adc_cfg_t *g_cfg;
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const adc_instance_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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struct rt_adc_ops ops;
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struct rt_adc_device adc_device;
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};
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struct ra_dev
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struct ra_adc_map
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{
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rt_adc_device_t ra_adc_device_t;
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struct ra_adc_map *ra_adc_dev;
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const char *device_name;
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const adc_cfg_t *g_cfg;
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const adc_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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};
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#endif
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#endif
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@ -19,18 +19,19 @@ extern "C" {
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#endif
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#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1)
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struct ra_adc_map
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struct rt_adc_dev
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{
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char name;
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const adc_cfg_t *g_cfg;
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const adc_instance_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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struct rt_adc_ops ops;
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struct rt_adc_device adc_device;
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};
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struct ra_dev
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struct ra_adc_map
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{
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rt_adc_device_t ra_adc_device_t;
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struct ra_adc_map *ra_adc_dev;
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const char *device_name;
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const adc_cfg_t *g_cfg;
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const adc_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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};
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#endif
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#endif
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@ -19,18 +19,19 @@ extern "C" {
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#endif
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#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1)
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struct ra_adc_map
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struct rt_adc_dev
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{
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char name;
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const adc_cfg_t *g_cfg;
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const adc_instance_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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struct rt_adc_ops ops;
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struct rt_adc_device adc_device;
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};
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struct ra_dev
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struct ra_adc_map
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{
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rt_adc_device_t ra_adc_device_t;
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struct ra_adc_map *ra_adc_dev;
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const char *device_name;
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const adc_cfg_t *g_cfg;
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const adc_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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};
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#endif
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#endif
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@ -19,18 +19,19 @@ extern "C" {
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#endif
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#if defined(BSP_USING_ADC0) || defined(BSP_USING_ADC1)
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struct ra_adc_map
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struct rt_adc_dev
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{
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char name;
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const adc_cfg_t *g_cfg;
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const adc_instance_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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struct rt_adc_ops ops;
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struct rt_adc_device adc_device;
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};
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struct ra_dev
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struct ra_adc_map
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{
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rt_adc_device_t ra_adc_device_t;
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struct ra_adc_map *ra_adc_dev;
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const char *device_name;
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const adc_cfg_t *g_cfg;
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const adc_ctrl_t *g_ctrl;
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const adc_channel_cfg_t *g_channel_cfg;
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};
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#endif
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#endif
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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#include "drv_config.h"
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#ifdef RT_USING_ADC
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// #define DRV_DEBUG
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#define DRV_DEBUG
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#define DBG_TAG "drv.adc"
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#ifdef DRV_DEBUG
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#define DBG_LVL DBG_LOG
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struct ra_adc_map ra_adc[] =
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{
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#if defined(BSP_USING_ADC0)
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{'0', &g_adc0_cfg, &g_adc0_ctrl, &g_adc0_channel_cfg},
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#ifdef BSP_USING_ADC0
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{
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.device_name = "adc0",
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.g_cfg = &g_adc0_cfg,
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.g_ctrl = &g_adc0_ctrl,
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.g_channel_cfg = &g_adc0_channel_cfg,
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},
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#endif
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#if defined(BSP_USING_ADC1)
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{'1', &g_adc1_cfg, &g_adc1_ctrl, &g_adc1_channel_cfg},
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#ifdef BSP_USING_ADC1
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{
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.device_name = "adc1",
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.g_cfg = &g_adc1_cfg,
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.g_ctrl = &g_adc1_ctrl,
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.g_channel_cfg = &g_adc1_channel_cfg,
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},
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#endif
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};
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#if defined(BSP_USING_ADC0)
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struct rt_adc_device adc0_device;
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struct ra_dev _ra_adc0_device = {.ra_adc_device_t = &adc0_device, .ra_adc_dev = &ra_adc[0]};
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#endif
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#if defined(BSP_USING_ADC1)
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struct rt_adc_device adc1_device;
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struct ra_dev _ra_adc1_device = {.ra_adc_device_t = &adc1_device, .ra_adc_dev = &ra_adc[1]};
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#endif
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static struct rt_adc_dev adc_obj[sizeof(ra_adc) / sizeof(ra_adc[0])] = {0};
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static rt_err_t ra_adc_enabled(struct rt_adc_device *device, rt_int8_t channel, rt_bool_t enabled)
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{
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@ -50,7 +51,7 @@ static rt_err_t ra_adc_enabled(struct rt_adc_device *device, rt_int8_t channel,
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{
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if (FSP_SUCCESS != R_ADC_ScanStart((adc_ctrl_t *)adc->g_ctrl))
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{
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LOG_E("start adc%c failed.", adc->name);
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LOG_E("start %s failed.", adc->device_name);
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return -RT_ERROR;
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}
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}
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/**< stop adc*/
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if (FSP_SUCCESS != R_ADC_ScanStop((adc_ctrl_t *)adc->g_ctrl))
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{
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LOG_E("stop adc%c failed.", adc->name);
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LOG_E("stop %s failed.", adc->device_name);
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return -RT_ERROR;
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}
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}
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rt_err_t ra_adc_close(struct rt_adc_device *device)
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{
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RT_ASSERT(device != RT_NULL);
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struct ra_adc_map *adc = (struct ra_adc_map *)(struct ra_adc_map *)device->parent.user_data;
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struct ra_adc_map *adc = (struct ra_adc_map *)device->parent.user_data;
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if (FSP_SUCCESS != R_ADC_Close((adc_ctrl_t *)adc->g_ctrl))
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{
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LOG_E("close adc%c failed.", adc->name);
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LOG_E("close %s failed.", adc->device_name);
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return -RT_ERROR;
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}
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return RT_EOK;
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static int ra_adc_init(void)
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{
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#if defined(BSP_USING_ADC0)
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R_ADC_Open((adc_ctrl_t *)_ra_adc0_device.ra_adc_dev->g_ctrl,
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(adc_cfg_t const * const)_ra_adc0_device.ra_adc_dev->g_cfg);
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rt_err_t result = 0;
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rt_size_t obj_num = sizeof(adc_obj) / sizeof(struct rt_adc_dev);
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R_ADC_ScanCfg((adc_ctrl_t *)_ra_adc0_device.ra_adc_dev->g_ctrl,
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(adc_cfg_t const * const)_ra_adc0_device.ra_adc_dev->g_channel_cfg);
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if (RT_EOK != rt_hw_adc_register(_ra_adc0_device.ra_adc_device_t, "adc0", &ra_adc_ops, (void *)_ra_adc0_device.ra_adc_dev))
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for (int i = 0; i < obj_num; i++)
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{
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LOG_E("adc0 register failed");
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return -RT_ERROR;
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/* init ADC object */
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result = R_ADC_Open((adc_ctrl_t *)ra_adc[i].g_ctrl, ra_adc[i].g_cfg);
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result = R_ADC_ScanCfg((adc_ctrl_t *)ra_adc[i].g_ctrl, ra_adc[i].g_channel_cfg);
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/* register ADC device */
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if(rt_hw_adc_register(&adc_obj[i].adc_device,
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ra_adc[i].device_name,
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&ra_adc_ops,
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&ra_adc[i]) == RT_EOK)
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{
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LOG_D("%s init success", ra_adc[i].device_name);
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}
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else
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{
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LOG_E("%s register failed", ra_adc[i].device_name);
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result = -RT_ERROR;
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}
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RT_ASSERT(result == RT_EOK);
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}
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#endif
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#if defined(BSP_USING_ADC1)
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R_ADC_Open((adc_ctrl_t *)_ra_adc1_device.ra_adc_dev->g_ctrl,
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(adc_cfg_t const * const)_ra_adc1_device.ra_adc_dev->g_cfg);
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R_ADC_ScanCfg((adc_ctrl_t *)_ra_adc1_device.ra_adc_dev->g_ctrl,
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(adc_cfg_t const * const)_ra_adc1_device.ra_adc_dev->g_channel_cfg);
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if (RT_EOK != rt_hw_adc_register(_ra_adc1_device.ra_adc_device_t, "adc1", &ra_adc_ops, (void *)_ra_adc1_device.ra_adc_dev))
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{
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LOG_E("adc1 register failed");
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return -RT_ERROR;
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}
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#endif
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return RT_EOK;
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}
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INIT_BOARD_EXPORT(ra_adc_init);
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INIT_DEVICE_EXPORT(ra_adc_init);
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#endif
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#ifdef BSP_USING_HW_I2C
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#define DBG_TAG "drv.hwi2c"
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#ifdef DRV_DEBUG
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#define DBG_LVL DBG_LOG
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#else
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#define DBG_LVL DBG_INFO
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#endif /* DRV_DEBUG */
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#include <rtdbg.h>
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#define DRV_DEBUG
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#define LOG_TAG "drv.hwi2c"
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#include <drv_log.h>
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#include <hal_data.h>
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static struct rt_i2c_bus_device prv_ra_i2c;
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static volatile i2c_master_event_t i2c_event = I2C_MASTER_EVENT_ABORTED;
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#define RA_SCI_EVENT_ABORTED 1
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#define RA_SCI_EVENT_RX_COMPLETE 2
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#define RA_SCI_EVENT_TX_COMPLETE 4
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#define RA_SCI_EVENT_ERROR 8
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#define RA_SCI_EVENT_ALL 15
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struct ra_i2c_handle
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{
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struct rt_i2c_bus_device bus;
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char bus_name[RT_NAME_MAX];
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const i2c_master_cfg_t *i2c_cfg;
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void *i2c_ctrl;
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struct rt_event event;
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};
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static struct ra_i2c_handle ra_i2cs[] =
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{
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#ifdef BSP_USING_HW_I2C0
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{.bus_name = "i2c0", .i2c_cfg = &g_i2c_master0_cfg, .i2c_ctrl = &g_i2c_master0_ctrl,},
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#endif
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#ifdef BSP_USING_HW_I2C1
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{.bus_name = "i2c1", .i2c_cfg = &g_i2c_master1_cfg, .i2c_ctrl = &g_i2c_master1_ctrl,},
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#endif
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};
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void i2c_master_callback(i2c_master_callback_args_t *p_args)
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{
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rt_interrupt_enter();
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if (NULL != p_args)
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{
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/* capture callback event for validating the i2c transfer event*/
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i2c_event = p_args->event;
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struct ra_i2c_handle *obj = (struct ra_i2c_handle *)p_args->p_context;
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uint32_t event = 0;
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RT_ASSERT(obj != RT_NULL);
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switch (p_args->event)
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{
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case I2C_MASTER_EVENT_ABORTED:
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event |= RA_SCI_EVENT_ABORTED;
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break;
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case I2C_MASTER_EVENT_RX_COMPLETE:
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event |= RA_SCI_EVENT_RX_COMPLETE;
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break;
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case I2C_MASTER_EVENT_TX_COMPLETE:
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event |= RA_SCI_EVENT_TX_COMPLETE;
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break;
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}
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rt_event_send(&obj->event, event);
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}
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rt_interrupt_leave();
|
||||
}
|
||||
|
||||
static fsp_err_t validate_i2c_event(void)
|
||||
static rt_err_t validate_i2c_event(struct ra_i2c_handle *handle)
|
||||
{
|
||||
uint16_t local_time_out = UINT16_MAX;
|
||||
|
||||
/* resetting call back event capture variable */
|
||||
i2c_event = (i2c_master_event_t)0;
|
||||
|
||||
do
|
||||
rt_uint32_t event = 0;
|
||||
if (RT_EOK != rt_event_recv(&handle->event, RA_SCI_EVENT_ALL, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, (int32_t)rt_tick_from_millisecond(100), &event))
|
||||
{
|
||||
/* This is to avoid infinite loop */
|
||||
--local_time_out;
|
||||
|
||||
if(0 == local_time_out)
|
||||
{
|
||||
return FSP_ERR_TRANSFER_ABORTED;
|
||||
}
|
||||
|
||||
}while(i2c_event == 0);
|
||||
|
||||
if(i2c_event != I2C_MASTER_EVENT_ABORTED)
|
||||
return -RT_ETIMEOUT;
|
||||
}
|
||||
if ((event & (RA_SCI_EVENT_ABORTED | RA_SCI_EVENT_ERROR)) == 0)
|
||||
{
|
||||
/* Make sure this is always Reset before return*/
|
||||
i2c_event = (i2c_master_event_t)0;
|
||||
return FSP_SUCCESS;
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
/* Make sure this is always Reset before return */
|
||||
i2c_event = (i2c_master_event_t)0;
|
||||
return FSP_ERR_TRANSFER_ABORTED;
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
static rt_ssize_t ra_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
|
||||
struct rt_i2c_msg msgs[],
|
||||
rt_uint32_t num)
|
||||
struct rt_i2c_msg msgs[],
|
||||
rt_uint32_t num)
|
||||
{
|
||||
rt_size_t i;
|
||||
struct rt_i2c_msg *msg = msgs;
|
||||
RT_ASSERT(bus != RT_NULL);
|
||||
fsp_err_t err = FSP_SUCCESS;
|
||||
fsp_err_t err = FSP_SUCCESS;
|
||||
bool restart = false;
|
||||
|
||||
struct ra_i2c_handle *ra_i2c = rt_container_of(bus, struct ra_i2c_handle, bus);
|
||||
i2c_master_ctrl_t *master_ctrl = ra_i2c->i2c_ctrl;
|
||||
|
||||
for (i = 0; i < num; i++)
|
||||
{
|
||||
if (msg[i].flags & RT_I2C_NO_START)
|
||||
|
@ -87,22 +109,19 @@ static rt_ssize_t ra_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
|
|||
}
|
||||
if (msg[i].flags & RT_I2C_ADDR_10BIT)
|
||||
{
|
||||
LOG_E("10Bit not support");
|
||||
break;
|
||||
R_IIC_MASTER_SlaveAddressSet(master_ctrl, msg[i].addr, I2C_MASTER_ADDR_MODE_10BIT);
|
||||
}
|
||||
else
|
||||
{
|
||||
g_i2c_master1_ctrl.slave = msg[i].addr;
|
||||
R_IIC_MASTER_SlaveAddressSet(master_ctrl, msg[i].addr, I2C_MASTER_ADDR_MODE_7BIT);
|
||||
}
|
||||
|
||||
if (msg[i].flags & RT_I2C_RD)
|
||||
{
|
||||
err = R_IIC_MASTER_Read(&g_i2c_master1_ctrl, msg[i].buf, msg[i].len, restart);
|
||||
err = R_IIC_MASTER_Read(master_ctrl, msg[i].buf, msg[i].len, restart);
|
||||
if (FSP_SUCCESS == err)
|
||||
{
|
||||
err = validate_i2c_event();
|
||||
/* handle error */
|
||||
if(FSP_ERR_TRANSFER_ABORTED == err)
|
||||
if (RT_EOK != validate_i2c_event(ra_i2c))
|
||||
{
|
||||
LOG_E("POWER_CTL reg I2C read failed");
|
||||
break;
|
||||
|
@ -112,18 +131,16 @@ static rt_ssize_t ra_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
|
|||
else
|
||||
{
|
||||
/* Write API returns itself is not successful */
|
||||
LOG_E("R_IIC_MASTER_Write API failed");
|
||||
LOG_E("R_I2C_MASTER_Write API failed");
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
err = R_IIC_MASTER_Write(&g_i2c_master1_ctrl, msg[i].buf, msg[i].len, restart);
|
||||
err = R_IIC_MASTER_Write(master_ctrl, msg[i].buf, msg[i].len, restart);
|
||||
if (FSP_SUCCESS == err)
|
||||
{
|
||||
err = validate_i2c_event();
|
||||
/* handle error */
|
||||
if(FSP_ERR_TRANSFER_ABORTED == err)
|
||||
if (RT_EOK != validate_i2c_event(ra_i2c))
|
||||
{
|
||||
LOG_E("POWER_CTL reg I2C write failed");
|
||||
break;
|
||||
|
@ -133,12 +150,12 @@ static rt_ssize_t ra_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
|
|||
else
|
||||
{
|
||||
/* Write API returns itself is not successful */
|
||||
LOG_E("R_IIC_MASTER_Write API failed");
|
||||
LOG_E("R_I2C_MASTER_Write API failed");
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
return i;
|
||||
return (rt_ssize_t)i;
|
||||
}
|
||||
|
||||
static const struct rt_i2c_bus_device_ops ra_i2c_ops =
|
||||
|
@ -151,17 +168,32 @@ static const struct rt_i2c_bus_device_ops ra_i2c_ops =
|
|||
int ra_hw_i2c_init(void)
|
||||
{
|
||||
fsp_err_t err = FSP_SUCCESS;
|
||||
prv_ra_i2c.ops = &ra_i2c_ops;
|
||||
prv_ra_i2c.priv = 0;
|
||||
/* opening IIC master module */
|
||||
err = R_IIC_MASTER_Open(&g_i2c_master1_ctrl, &g_i2c_master1_cfg);
|
||||
/* handle error */
|
||||
if (FSP_SUCCESS != err)
|
||||
for (rt_uint32_t i = 0; i < sizeof(ra_i2cs) / sizeof(ra_i2cs[0]); i++)
|
||||
{
|
||||
LOG_E("R_IIC_MASTER_Open API failed");
|
||||
return err;
|
||||
ra_i2cs[i].bus.ops = &ra_i2c_ops;
|
||||
ra_i2cs[i].bus.priv = 0;
|
||||
|
||||
if (RT_EOK != rt_event_init(&ra_i2cs[i].event, ra_i2cs[i].bus_name, RT_IPC_FLAG_FIFO))
|
||||
{
|
||||
LOG_E("Init event failed");
|
||||
continue;
|
||||
}
|
||||
/* opening IIC master module */
|
||||
err = R_IIC_MASTER_Open(ra_i2cs[i].i2c_ctrl, ra_i2cs[i].i2c_cfg);
|
||||
if (FSP_SUCCESS != err)
|
||||
{
|
||||
LOG_E("R_I2C_MASTER_Open API failed,%d", err);
|
||||
continue;
|
||||
}
|
||||
err = R_IIC_MASTER_CallbackSet(ra_i2cs[i].i2c_ctrl, i2c_master_callback, &ra_i2cs[i], RT_NULL);
|
||||
/* handle error */
|
||||
if (FSP_SUCCESS != err)
|
||||
{
|
||||
LOG_E("R_I2C_CallbackSet API failed,%d", err);
|
||||
continue;
|
||||
}
|
||||
rt_i2c_bus_device_register(&ra_i2cs[i].bus, ra_i2cs[i].bus_name);
|
||||
}
|
||||
rt_i2c_bus_device_register(&prv_ra_i2c, "i2c1");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue