diff --git a/bsp/stm32/stm32f429-st-disco/applications/lcd_init.c b/bsp/stm32/stm32f429-st-disco/applications/lcd_init.c new file mode 100644 index 0000000000..277a754ae6 --- /dev/null +++ b/bsp/stm32/stm32f429-st-disco/applications/lcd_init.c @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-06-12 Tanek first version + */ + +#include + +#if defined(PKG_USING_GUIENGINE) + +#include +int lcd_init(void) +{ + struct rt_device *device; + device = rt_device_find("lcd"); + if (device) + { + rtgui_graphic_set_device(device); + } + + return 0; +} +INIT_ENV_EXPORT(lcd_init); +#endif diff --git a/bsp/stm32/stm32f429-st-disco/applications/main.c b/bsp/stm32/stm32f429-st-disco/applications/main.c index 2aac50cc11..8e6e8caef1 100644 --- a/bsp/stm32/stm32f429-st-disco/applications/main.c +++ b/bsp/stm32/stm32f429-st-disco/applications/main.c @@ -13,8 +13,8 @@ #include #include -/* defined the LED1 pin: PG6 */ -#define LED1_PIN GET_PIN(G, 6) +/* defined the LED1 pin: PG13 */ +#define LED1_PIN GET_PIN(G, 13) int main(void) { diff --git a/bsp/stm32/stm32f429-st-disco/board/board.h b/bsp/stm32/stm32f429-st-disco/board/board.h index 40673e42af..47e439a260 100644 --- a/bsp/stm32/stm32f429-st-disco/board/board.h +++ b/bsp/stm32/stm32f429-st-disco/board/board.h @@ -25,7 +25,7 @@ extern "C" { #define STM32_FLASH_SIZE (2048 * 1024) #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE)) -#define STM32_SRAM_SIZE (384 - 64) +#define STM32_SRAM_SIZE (256 - 64) #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024) #if defined(__CC_ARM) || defined(__CLANG_ARM) diff --git a/bsp/stm32/stm32f429-st-disco/board/ports/fal_cfg.h b/bsp/stm32/stm32f429-st-disco/board/ports/fal_cfg.h new file mode 100644 index 0000000000..46ecb322c4 --- /dev/null +++ b/bsp/stm32/stm32f429-st-disco/board/ports/fal_cfg.h @@ -0,0 +1,97 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2019-04-10 ZYH first version + */ + +#ifndef _FAL_CFG_H_ +#define _FAL_CFG_H_ + +#include +#include +#if defined(BSP_USING_ON_CHIP_FLASH) +#define FLASH_SIZE_GRANULARITY_16K (4 * 16 * 1024) +#define FLASH_SIZE_GRANULARITY_64K (64 * 1024) +#define FLASH_SIZE_GRANULARITY_128K (15 * 128 * 1024) + +#define STM32_FLASH_START_ADRESS_16K STM32_FLASH_START_ADRESS +#define STM32_FLASH_START_ADRESS_64K (STM32_FLASH_START_ADRESS_16K + FLASH_SIZE_GRANULARITY_16K) +#define STM32_FLASH_START_ADRESS_128K (STM32_FLASH_START_ADRESS_64K + FLASH_SIZE_GRANULARITY_64K) + +extern const struct fal_flash_dev stm32_onchip_flash_16k; +extern const struct fal_flash_dev stm32_onchip_flash_64k; +extern const struct fal_flash_dev stm32_onchip_flash_128k; +#endif + +#if defined(BSP_USING_QSPI_FLASH) +extern struct fal_flash_dev nor_flash0; +#endif + +/* flash device table */ +#if defined(BSP_USING_QSPI_FLASH) && defined(BSP_USING_ON_CHIP_FLASH) + +#define FAL_FLASH_DEV_TABLE \ +{ \ + &stm32_onchip_flash_16k, \ + &stm32_onchip_flash_64k, \ + &stm32_onchip_flash_128k, \ + &nor_flash0, \ +} + +#define ONCHIP_FLASH_PART_TABLE \ + {FAL_PART_MAGIC_WROD, "bootloader", "onchip_flash_16k", 0 , FLASH_SIZE_GRANULARITY_16K , 0}, \ + {FAL_PART_MAGIC_WROD, "param", "onchip_flash_64k", 0 , FLASH_SIZE_GRANULARITY_64K , 0}, \ + {FAL_PART_MAGIC_WROD, "app", "onchip_flash_128k", 0 , FLASH_SIZE_GRANULARITY_128K, 0}, + +#define QSPI_FLASH_PART_TABLE \ + {FAL_PART_MAGIC_WROD, "qspiflash", FAL_USING_NOR_FLASH_DEV_NAME, 0 , (16 * 1024 * 1024), 0}, + +#elif defined(BSP_USING_QSPI_FLASH) + +#define FAL_FLASH_DEV_TABLE \ +{ \ + &nor_flash0, \ +} + +#define ONCHIP_FLASH_PART_TABLE + +#define QSPI_FLASH_PART_TABLE \ + {FAL_PART_MAGIC_WROD, "qspiflash", FAL_USING_NOR_FLASH_DEV_NAME, 0 , (16 * 1024 * 1024), 0}, + +#elif defined(BSP_USING_ON_CHIP_FLASH) + +#define FAL_FLASH_DEV_TABLE \ +{ \ + &stm32_onchip_flash_16k, \ + &stm32_onchip_flash_64k, \ + &stm32_onchip_flash_128k, \ +} + +#define ONCHIP_FLASH_PART_TABLE \ + {FAL_PART_MAGIC_WROD, "bootloader", "onchip_flash_16k", 0 , FLASH_SIZE_GRANULARITY_16K , 0}, \ + {FAL_PART_MAGIC_WROD, "param", "onchip_flash_64k", 0 , FLASH_SIZE_GRANULARITY_64K , 0}, \ + {FAL_PART_MAGIC_WROD, "app", "onchip_flash_128k", 0 , FLASH_SIZE_GRANULARITY_128K, 0}, + +#define QSPI_FLASH_PART_TABLE + +#else + +#define FAL_FLASH_DEV_TABLE { 0 } +#define FAL_PART_TABLE { 0 } + +#endif + +#ifdef FAL_PART_HAS_TABLE_CFG +/* partition table */ +#define FAL_PART_TABLE \ +{ \ + ONCHIP_FLASH_PART_TABLE \ + QSPI_FLASH_PART_TABLE \ +} +#endif /* FAL_PART_HAS_TABLE_CFG */ + +#endif /* _FAL_CFG_H_ */ diff --git a/bsp/stm32/stm32f429-st-disco/project.uvoptx b/bsp/stm32/stm32f429-st-disco/project.uvoptx index 7a5ab6729f..d9992dd6cd 100644 --- a/bsp/stm32/stm32f429-st-disco/project.uvoptx +++ b/bsp/stm32/stm32f429-st-disco/project.uvoptx @@ -28,7 +28,7 @@ 12000000 - 0 + 1 1 0 1 @@ -103,7 +103,7 @@ 1 0 0 - 1 + 11 @@ -114,28 +114,70 @@ - BIN\UL2CM3.DLL + STLink\ST-LINKIII-KEIL_SWO.dll + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U0672FF535550755187193631 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32F429ZITx$CMSIS\Flash\STM32F4xx_2048.FLM) + 0 UL2CM3 UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048 -FS08000000 -FL0200000 -FP0($$Device:STM32F429ZITx$CMSIS\Flash\STM32F4xx_2048.FLM)) - + + + 0 + 0 + 223 + 1 +
134284924
+ 0 + 0 + 0 + 0 + 0 + 1 + ..\..\..\src\components.c + + \\template\../../../src/components.c\223 + + 0 0 0 - 0 + 1 0 0 0 0 - 0 + 1 0 0 0 @@ -168,7 +210,7 @@ 1 - 1 + 0 0 2 10000000 @@ -374,7 +416,7 @@ 2 16 1 - 0 + 1 0 0 applications\main.c diff --git a/bsp/stm32/stm32f429-st-disco/template.uvoptx b/bsp/stm32/stm32f429-st-disco/template.uvoptx new file mode 100644 index 0000000000..facf69ddd6 --- /dev/null +++ b/bsp/stm32/stm32f429-st-disco/template.uvoptx @@ -0,0 +1,192 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt_thread_stm32f429 + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\Listings\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 18 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 11 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + ST-LINKIII-KEIL_SWO + -U0672FF535550755187193631 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048.FLM -FS08000000 -FL0200000 -FP0($$Device:STM32F429ZITx$CMSIS\Flash\STM32F4xx_2048.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F4xx_2048 -FS08000000 -FL0200000 -FP0($$Device:STM32F429ZITx$CMSIS\Flash\STM32F4xx_2048.FLM)) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + 1 + 0 + 0 + 2 + 10000000 + + + + + + Source Group 1 + 0 + 0 + 0 + 0 + + + diff --git a/bsp/stm32/stm32f429-st-disco/template.uvprojx b/bsp/stm32/stm32f429-st-disco/template.uvprojx index f4c15edeec..27fd79bb4c 100644 --- a/bsp/stm32/stm32f429-st-disco/template.uvprojx +++ b/bsp/stm32/stm32f429-st-disco/template.uvprojx @@ -11,11 +11,12 @@ 0x4 ARM-ADS 5060300::V5.06 update 3 (build 300)::ARMCC + 0 STM32F429ZITx STMicroelectronics - Keil.STM32F4xx_DFP.2.5.0 + Keil.STM32F4xx_DFP.2.11.0 http://www.keil.com/pack IRAM(0x20000000,0x30000) IRAM2(0x10000000,0x10000) IROM(0x08000000,0x200000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE @@ -132,7 +133,7 @@ 0 0 1 - 0 + 1 -1 1 @@ -183,6 +184,7 @@ 0 0 2 + 0 1 0 8 @@ -323,6 +325,7 @@ 0 0 1 + 0 0 1 1 @@ -383,4 +386,10 @@ + + + + + +