Merge pull request #5088 from mysterywolf/LONGXINDABAOBEN

[ci][action.yml]CI加入龙芯ls2kdev
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guo 2021-09-22 20:58:51 +08:00 committed by GitHub
commit cf82025470
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6 changed files with 16 additions and 15 deletions

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@ -59,6 +59,7 @@ jobs:
- {RTT_BSP: "lpc54114-lite", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "lpc54114-lite", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "ls1bdev", RTT_TOOL_CHAIN: "sourcery-mips"} - {RTT_BSP: "ls1bdev", RTT_TOOL_CHAIN: "sourcery-mips"}
- {RTT_BSP: "ls1cdev", RTT_TOOL_CHAIN: "sourcery-mips"} - {RTT_BSP: "ls1cdev", RTT_TOOL_CHAIN: "sourcery-mips"}
- {RTT_BSP: "ls2kdev", RTT_TOOL_CHAIN: "sourcery-mips"}
- {RTT_BSP: "mb9bf500r", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "mb9bf500r", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "mb9bf506r", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "mb9bf506r", RTT_TOOL_CHAIN: "sourcery-arm"}
- {RTT_BSP: "mb9bf618s", RTT_TOOL_CHAIN: "sourcery-arm"} - {RTT_BSP: "mb9bf618s", RTT_TOOL_CHAIN: "sourcery-arm"}

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@ -415,6 +415,7 @@ CONFIG_RT_LWIP_USING_PING=y
# CONFIG_PKG_USING_AGILE_FTP is not set # CONFIG_PKG_USING_AGILE_FTP is not set
# CONFIG_PKG_USING_EMBEDDEDPROTO is not set # CONFIG_PKG_USING_EMBEDDEDPROTO is not set
# CONFIG_PKG_USING_RT_LINK_HW is not set # CONFIG_PKG_USING_RT_LINK_HW is not set
# CONFIG_PKG_USING_HM is not set
# #
# security packages # security packages
@ -688,4 +689,4 @@ CONFIG_RT_LWIP_USING_PING=y
CONFIG_SOC_LS=y CONFIG_SOC_LS=y
CONFIG_SOC_LS2K1000=y CONFIG_SOC_LS2K1000=y
CONFIG_RT_USING_UART0=y CONFIG_RT_USING_UART0=y
CONFIG_RT_USING_UART4=y # CONFIG_RT_USING_UART4 is not set

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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@ -8,13 +8,15 @@
* 2020-10-28 0xcccccccccccc Initial Version * 2020-10-28 0xcccccccccccc Initial Version
* 2021-01-17 0xcccccccccccc Bug Fixed : clock division cannot been adjusted as expected due to wrong register configuration. * 2021-01-17 0xcccccccccccc Bug Fixed : clock division cannot been adjusted as expected due to wrong register configuration.
*/ */
/** /**
* @addtogroup ls2k * @addtogroup ls2k
*/ */
/*@{*/ /*@{*/
#include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
#include <ctype.h> #include <ctype.h>
#include <stdint.h>
#include <rtthread.h> #include <rtthread.h>
#include <drivers/spi.h> #include <drivers/spi.h>
#include "drv_spi.h" #include "drv_spi.h"

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@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2006-2020, RT-Thread Development Team * Copyright (c) 2006-2021, RT-Thread Development Team
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
* *
@ -14,9 +14,6 @@
#ifndef LS2K_DRV_SPI_H #ifndef LS2K_DRV_SPI_H
#define LS2K_DRV_SPI_H #define LS2K_DRV_SPI_H
#include <rtthread.h>
#include <rthw.h>
// kseg1 byte operation // kseg1 byte operation
#define KSEG1_STORE8(addr,val) *(volatile char *)(0xffffffffa0000000 | addr) = val #define KSEG1_STORE8(addr,val) *(volatile char *)(0xffffffffa0000000 | addr) = val
#define KSEG1_LOAD8(addr) *(volatile char *)(0xffffffffa0000000 | addr) #define KSEG1_LOAD8(addr) *(volatile char *)(0xffffffffa0000000 | addr)

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@ -253,6 +253,5 @@
#define SOC_LS #define SOC_LS
#define SOC_LS2K1000 #define SOC_LS2K1000
#define RT_USING_UART0 #define RT_USING_UART0
#define RT_USING_UART4
#endif #endif

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@ -12,6 +12,7 @@
#include <rtthread.h> #include <rtthread.h>
#include <rthw.h> #include <rthw.h>
#include <board.h> #include <board.h>
#include <stddef.h>
#include "cache.h" #include "cache.h"
#include "mips_mmu.h" #include "mips_mmu.h"