[bsp][stm32][stm32g431-st-nucleo] Add stm32g431-st-nucleo bsp
This commit is contained in:
parent
f30a03f093
commit
cd267a30e4
|
@ -0,0 +1,87 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2018-12-06 zylx first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __ADC_CONFIG_H__
|
||||||
|
#define __ADC_CONFIG_H__
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_USING_ADC1
|
||||||
|
#ifndef ADC1_CONFIG
|
||||||
|
#define ADC1_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = ADC1, \
|
||||||
|
.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4, \
|
||||||
|
.Init.Resolution = ADC_RESOLUTION_12B, \
|
||||||
|
.Init.DataAlign = ADC_DATAALIGN_RIGHT, \
|
||||||
|
.Init.ScanConvMode = DISABLE, \
|
||||||
|
.Init.EOCSelection = DISABLE, \
|
||||||
|
.Init.ContinuousConvMode = DISABLE, \
|
||||||
|
.Init.NbrOfConversion = 1, \
|
||||||
|
.Init.DiscontinuousConvMode = DISABLE, \
|
||||||
|
.Init.NbrOfDiscConversion = 0, \
|
||||||
|
.Init.ExternalTrigConv = ADC_SOFTWARE_START, \
|
||||||
|
.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE, \
|
||||||
|
.Init.DMAContinuousRequests = DISABLE, \
|
||||||
|
}
|
||||||
|
#endif /* ADC1_CONFIG */
|
||||||
|
#endif /* BSP_USING_ADC1 */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_ADC2
|
||||||
|
#ifndef ADC2_CONFIG
|
||||||
|
#define ADC2_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = ADC2, \
|
||||||
|
.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4, \
|
||||||
|
.Init.Resolution = ADC_RESOLUTION_12B, \
|
||||||
|
.Init.DataAlign = ADC_DATAALIGN_RIGHT, \
|
||||||
|
.Init.ScanConvMode = DISABLE, \
|
||||||
|
.Init.EOCSelection = DISABLE, \
|
||||||
|
.Init.ContinuousConvMode = DISABLE, \
|
||||||
|
.Init.NbrOfConversion = 1, \
|
||||||
|
.Init.DiscontinuousConvMode = DISABLE, \
|
||||||
|
.Init.NbrOfDiscConversion = 0, \
|
||||||
|
.Init.ExternalTrigConv = ADC_SOFTWARE_START, \
|
||||||
|
.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE, \
|
||||||
|
.Init.DMAContinuousRequests = DISABLE, \
|
||||||
|
}
|
||||||
|
#endif /* ADC2_CONFIG */
|
||||||
|
#endif /* BSP_USING_ADC2 */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_ADC3
|
||||||
|
#ifndef ADC3_CONFIG
|
||||||
|
#define ADC3_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = ADC3, \
|
||||||
|
.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4, \
|
||||||
|
.Init.Resolution = ADC_RESOLUTION_12B, \
|
||||||
|
.Init.DataAlign = ADC_DATAALIGN_RIGHT, \
|
||||||
|
.Init.ScanConvMode = DISABLE, \
|
||||||
|
.Init.EOCSelection = DISABLE, \
|
||||||
|
.Init.ContinuousConvMode = DISABLE, \
|
||||||
|
.Init.NbrOfConversion = 1, \
|
||||||
|
.Init.DiscontinuousConvMode = DISABLE, \
|
||||||
|
.Init.NbrOfDiscConversion = 0, \
|
||||||
|
.Init.ExternalTrigConv = ADC_SOFTWARE_START, \
|
||||||
|
.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE, \
|
||||||
|
.Init.DMAContinuousRequests = DISABLE, \
|
||||||
|
}
|
||||||
|
#endif /* ADC3_CONFIG */
|
||||||
|
#endif /* BSP_USING_ADC3 */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __ADC_CONFIG_H__ */
|
|
@ -0,0 +1,284 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2019-01-02 zylx first version
|
||||||
|
* 2019-01-08 SummerGift clean up the code
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __DMA_CONFIG_H__
|
||||||
|
#define __DMA_CONFIG_H__
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA1 stream0 */
|
||||||
|
#if defined(BSP_SPI3_RX_USING_DMA) && !defined(SPI3_RX_DMA_INSTANCE)
|
||||||
|
#define SPI3_DMA_RX_IRQHandler DMA1_Stream0_IRQHandler
|
||||||
|
#define SPI3_RX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define SPI3_RX_DMA_INSTANCE DMA1_Stream0
|
||||||
|
#define SPI3_RX_DMA_CHANNEL DMA_CHANNEL_0
|
||||||
|
#define SPI3_RX_DMA_IRQ DMA1_Stream0_IRQn
|
||||||
|
#elif defined(BSP_UART5_RX_USING_DMA) && !defined(UART5_RX_DMA_INSTANCE)
|
||||||
|
#define UART5_DMA_RX_IRQHandler DMA1_Stream0_IRQHandler
|
||||||
|
#define UART5_RX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define UART5_RX_DMA_INSTANCE DMA1_Stream0
|
||||||
|
#define UART5_RX_DMA_CHANNEL DMA_CHANNEL_4
|
||||||
|
#define UART5_RX_DMA_IRQ DMA1_Stream0_IRQn
|
||||||
|
#elif defined(BSP_UART8_TX_USING_DMA) && !defined(UART8_TX_DMA_INSTANCE)
|
||||||
|
#define UART8_DMA_TX_IRQHandler DMA1_Stream0_IRQHandler
|
||||||
|
#define UART8_TX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define UART8_TX_DMA_INSTANCE DMA1_Stream0
|
||||||
|
#define UART8_TX_DMA_CHANNEL DMA_CHANNEL_5
|
||||||
|
#define UART8_TX_DMA_IRQ DMA1_Stream0_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA1 stream1 */
|
||||||
|
#if defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE)
|
||||||
|
#define UART3_DMA_RX_IRQHandler DMA1_Stream1_IRQHandler
|
||||||
|
#define UART3_RX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define UART3_RX_DMA_INSTANCE DMA1_Stream1
|
||||||
|
#define UART3_RX_DMA_CHANNEL DMA_CHANNEL_4
|
||||||
|
#define UART3_RX_DMA_IRQ DMA1_Stream1_IRQn
|
||||||
|
#elif defined(BSP_UART7_RX_USING_DMA) && !defined(UART7_RX_DMA_INSTANCE)
|
||||||
|
#define UART7_DMA_RX_IRQHandler DMA1_Stream1_IRQHandler
|
||||||
|
#define UART7_RX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define UART7_RX_DMA_INSTANCE DMA1_Stream1
|
||||||
|
#define UART7_RX_DMA_CHANNEL DMA_CHANNEL_5
|
||||||
|
#define UART7_RX_DMA_IRQ DMA1_Stream1_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA1 stream2 */
|
||||||
|
#if defined(BSP_SPI3_RX_USING_DMA) && !defined(SPI3_RX_DMA_INSTANCE)
|
||||||
|
#define SPI3_DMA_RX_IRQHandler DMA1_Stream2_IRQHandler
|
||||||
|
#define SPI3_RX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define SPI3_RX_DMA_INSTANCE DMA1_Stream2
|
||||||
|
#define SPI3_RX_DMA_CHANNEL DMA_CHANNEL_0
|
||||||
|
#define SPI3_RX_DMA_IRQ DMA1_Stream2_IRQn
|
||||||
|
#elif defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_INSTANCE)
|
||||||
|
#define UART4_DMA_RX_IRQHandler DMA1_Stream2_IRQHandler
|
||||||
|
#define UART4_RX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define UART4_RX_DMA_INSTANCE DMA1_Stream2
|
||||||
|
#define UART4_RX_DMA_CHANNEL DMA_CHANNEL_4
|
||||||
|
#define UART4_RX_DMA_IRQ DMA1_Stream2_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA1 stream3 */
|
||||||
|
#if defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE)
|
||||||
|
#define SPI2_DMA_RX_IRQHandler DMA1_Stream3_IRQHandler
|
||||||
|
#define SPI2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define SPI2_RX_DMA_INSTANCE DMA1_Stream3
|
||||||
|
#define SPI2_RX_DMA_CHANNEL DMA_CHANNEL_0
|
||||||
|
#define SPI2_RX_DMA_IRQ DMA1_Stream3_IRQn
|
||||||
|
#elif defined(BSP_UART3_TX_USING_DMA) && !defined(UART3_TX_DMA_INSTANCE)
|
||||||
|
#define UART3_DMA_TX_IRQHandler DMA1_Stream3_IRQHandler
|
||||||
|
#define UART3_TX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define UART3_TX_DMA_INSTANCE DMA1_Stream3
|
||||||
|
#define UART3_TX_DMA_CHANNEL DMA_CHANNEL_4
|
||||||
|
#define UART3_TX_DMA_IRQ DMA1_Stream3_IRQn
|
||||||
|
#elif defined(BSP_UART7_TX_USING_DMA) && !defined(UART7_TX_DMA_INSTANCE)
|
||||||
|
#define UART7_DMA_RX_IRQHandler DMA1_Stream3_IRQHandler
|
||||||
|
#define UART7_RX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define UART7_RX_DMA_INSTANCE DMA1_Stream3
|
||||||
|
#define UART7_RX_DMA_CHANNEL DMA_CHANNEL_5
|
||||||
|
#define UART7_RX_DMA_IRQ DMA1_Stream3_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA1 stream4 */
|
||||||
|
#if defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE)
|
||||||
|
#define SPI2_DMA_TX_IRQHandler DMA1_Stream4_IRQHandler
|
||||||
|
#define SPI2_TX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define SPI2_TX_DMA_INSTANCE DMA1_Stream4
|
||||||
|
#define SPI2_TX_DMA_CHANNEL DMA_CHANNEL_0
|
||||||
|
#define SPI2_TX_DMA_IRQ DMA1_Stream4_IRQn
|
||||||
|
#elif defined(BSP_UART4_TX_USING_DMA) && !defined(UART4_TX_DMA_INSTANCE)
|
||||||
|
#define UART4_DMA_TX_IRQHandler DMA1_Stream4_IRQHandler
|
||||||
|
#define UART4_TX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define UART4_TX_DMA_INSTANCE DMA1_Stream4
|
||||||
|
#define UART4_TX_DMA_CHANNEL DMA_CHANNEL_4
|
||||||
|
#define UART4_TX_DMA_IRQ DMA1_Stream4_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA1 stream5 */
|
||||||
|
#if defined(BSP_SPI3_TX_USING_DMA) && !defined(SPI3_TX_DMA_INSTANCE)
|
||||||
|
#define SPI3_DMA_TX_IRQHandler DMA1_Stream5_IRQHandler
|
||||||
|
#define SPI3_TX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define SPI3_TX_DMA_INSTANCE DMA1_Stream5
|
||||||
|
#define SPI3_TX_DMA_CHANNEL DMA_CHANNEL_0
|
||||||
|
#define SPI3_TX_DMA_IRQ DMA1_Stream5_IRQn
|
||||||
|
#elif defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
|
||||||
|
#define UART2_DMA_RX_IRQHandler DMA1_Stream5_IRQHandler
|
||||||
|
#define UART2_RX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define UART2_RX_DMA_INSTANCE DMA1_Stream5
|
||||||
|
#define UART2_RX_DMA_CHANNEL DMA_CHANNEL_4
|
||||||
|
#define UART2_RX_DMA_IRQ DMA1_Stream5_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA1 stream6 */
|
||||||
|
#if defined(BSP_UART2_TX_USING_DMA) && !defined(UART2_TX_DMA_INSTANCE)
|
||||||
|
#define UART2_DMA_TX_IRQHandler DMA1_Stream6_IRQHandler
|
||||||
|
#define UART2_TX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define UART2_TX_DMA_INSTANCE DMA1_Stream6
|
||||||
|
#define UART2_TX_DMA_CHANNEL DMA_CHANNEL_4
|
||||||
|
#define UART2_TX_DMA_IRQ DMA1_Stream6_IRQn
|
||||||
|
#elif defined(BSP_UART8_RX_USING_DMA) && !defined(UART8_RX_DMA_INSTANCE)
|
||||||
|
#define UART8_DMA_RX_IRQHandler DMA1_Stream6_IRQHandler
|
||||||
|
#define UART8_RX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define UART8_RX_DMA_INSTANCE DMA1_Stream6
|
||||||
|
#define UART8_RX_DMA_CHANNEL DMA_CHANNEL_5
|
||||||
|
#define UART8_RX_DMA_IRQ DMA1_Stream6_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA1 stream7 */
|
||||||
|
#if defined(BSP_SPI3_TX_USING_DMA) && !defined(SPI3_TX_DMA_INSTANCE)
|
||||||
|
#define SPI3_DMA_TX_IRQHandler DMA1_Stream7_IRQHandler
|
||||||
|
#define SPI3_TX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define SPI3_TX_DMA_INSTANCE DMA1_Stream7
|
||||||
|
#define SPI3_TX_DMA_CHANNEL DMA_CHANNEL_0
|
||||||
|
#define SPI3_TX_DMA_IRQ DMA1_Stream7_IRQn
|
||||||
|
#elif defined(BSP_UART5_TX_USING_DMA) && !defined(UART5_TX_DMA_INSTANCE)
|
||||||
|
#define UART5_DMA_TX_IRQHandler DMA1_Stream7_IRQHandler
|
||||||
|
#define UART5_TX_DMA_RCC RCC_AHB1ENR_DMA1EN
|
||||||
|
#define UART5_TX_DMA_INSTANCE DMA1_Stream7
|
||||||
|
#define UART5_TX_DMA_CHANNEL DMA_CHANNEL_4
|
||||||
|
#define UART5_TX_DMA_IRQ DMA1_Stream7_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA2 stream0 */
|
||||||
|
#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
|
||||||
|
#define SPI1_DMA_RX_IRQHandler DMA2_Stream0_IRQHandler
|
||||||
|
#define SPI1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define SPI1_RX_DMA_INSTANCE DMA2_Stream0
|
||||||
|
#define SPI1_RX_DMA_CHANNEL DMA_CHANNEL_3
|
||||||
|
#define SPI1_RX_DMA_IRQ DMA2_Stream0_IRQn
|
||||||
|
#elif defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_INSTANCE)
|
||||||
|
#define SPI4_DMA_TX_IRQHandler DMA2_Stream0_IRQHandler
|
||||||
|
#define SPI4_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define SPI4_TX_DMA_INSTANCE DMA2_Stream0
|
||||||
|
#define SPI4_TX_DMA_CHANNEL DMA_CHANNEL_4
|
||||||
|
#define SPI4_TX_DMA_IRQ DMA2_Stream0_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA2 stream1 */
|
||||||
|
#if defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_INSTANCE)
|
||||||
|
#define SPI4_DMA_TX_IRQHandler DMA2_Stream1_IRQHandler
|
||||||
|
#define SPI4_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define SPI4_TX_DMA_INSTANCE DMA2_Stream1
|
||||||
|
#define SPI4_TX_DMA_CHANNEL DMA_CHANNEL_4
|
||||||
|
#define SPI4_TX_DMA_IRQ DMA2_Stream1_IRQn
|
||||||
|
#elif defined(BSP_UART6_RX_USING_DMA) && !defined(UART6_RX_DMA_INSTANCE)
|
||||||
|
#define UART6_DMA_RX_IRQHandler DMA2_Stream1_IRQHandler
|
||||||
|
#define UART6_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define UART6_RX_DMA_INSTANCE DMA2_Stream1
|
||||||
|
#define UART6_RX_DMA_CHANNEL DMA_CHANNEL_5
|
||||||
|
#define UART6_RX_DMA_IRQ DMA2_Stream1_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA2 stream2 */
|
||||||
|
#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
|
||||||
|
#define SPI1_DMA_RX_IRQHandler DMA2_Stream2_IRQHandler
|
||||||
|
#define SPI1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define SPI1_RX_DMA_INSTANCE DMA2_Stream2
|
||||||
|
#define SPI1_RX_DMA_CHANNEL DMA_CHANNEL_3
|
||||||
|
#define SPI1_RX_DMA_IRQ DMA2_Stream2_IRQn
|
||||||
|
#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
|
||||||
|
#define UART1_DMA_RX_IRQHandler DMA2_Stream2_IRQHandler
|
||||||
|
#define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define UART1_RX_DMA_INSTANCE DMA2_Stream2
|
||||||
|
#define UART1_RX_DMA_CHANNEL DMA_CHANNEL_4
|
||||||
|
#define UART1_RX_DMA_IRQ DMA2_Stream2_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA2 stream3 */
|
||||||
|
#if defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE)
|
||||||
|
#define SPI5_DMA_RX_IRQHandler DMA2_Stream3_IRQHandler
|
||||||
|
#define SPI5_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define SPI5_RX_DMA_INSTANCE DMA2_Stream3
|
||||||
|
#define SPI5_RX_DMA_CHANNEL DMA_CHANNEL_2
|
||||||
|
#define SPI5_RX_DMA_IRQ DMA2_Stream3_IRQn
|
||||||
|
#elif defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
|
||||||
|
#define SPI1_DMA_TX_IRQHandler DMA2_Stream3_IRQHandler
|
||||||
|
#define SPI1_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define SPI1_TX_DMA_INSTANCE DMA2_Stream3
|
||||||
|
#define SPI1_TX_DMA_CHANNEL DMA_CHANNEL_3
|
||||||
|
#define SPI1_TX_DMA_IRQ DMA2_Stream3_IRQn
|
||||||
|
#elif defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_INSTANCE)
|
||||||
|
#define SPI4_DMA_TX_IRQHandler DMA2_Stream3_IRQHandler
|
||||||
|
#define SPI4_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define SPI4_TX_DMA_INSTANCE DMA2_Stream3
|
||||||
|
#define SPI4_TX_DMA_CHANNEL DMA_CHANNEL_5
|
||||||
|
#define SPI4_TX_DMA_IRQ DMA2_Stream3_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA2 stream4 */
|
||||||
|
#if defined(BSP_SPI5_TX_USING_DMA) && !defined(SPI5_TX_DMA_INSTANCE)
|
||||||
|
#define SPI5_DMA_TX_IRQHandler DMA2_Stream4_IRQHandler
|
||||||
|
#define SPI5_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define SPI5_TX_DMA_INSTANCE DMA2_Stream4
|
||||||
|
#define SPI5_TX_DMA_CHANNEL DMA_CHANNEL_2
|
||||||
|
#define SPI5_TX_DMA_IRQ DMA2_Stream4_IRQn
|
||||||
|
#elif defined(BSP_SPI4_TX_USING_DMA) && !defined(SPI4_TX_DMA_INSTANCE)
|
||||||
|
#define SPI4_DMA_TX_IRQHandler DMA2_Stream4_IRQHandler
|
||||||
|
#define SPI4_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define SPI4_TX_DMA_INSTANCE DMA2_Stream4
|
||||||
|
#define SPI4_TX_DMA_CHANNEL DMA_CHANNEL_5
|
||||||
|
#define SPI4_TX_DMA_IRQ DMA2_Stream4_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA2 stream5 */
|
||||||
|
#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
|
||||||
|
#define SPI1_DMA_TX_IRQHandler DMA2_Stream5_IRQHandler
|
||||||
|
#define SPI1_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define SPI1_TX_DMA_INSTANCE DMA2_Stream5
|
||||||
|
#define SPI1_TX_DMA_CHANNEL DMA_CHANNEL_3
|
||||||
|
#define SPI1_TX_DMA_IRQ DMA2_Stream5_IRQn
|
||||||
|
#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
|
||||||
|
#define UART1_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler
|
||||||
|
#define UART1_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define UART1_RX_DMA_INSTANCE DMA2_Stream5
|
||||||
|
#define UART1_RX_DMA_CHANNEL DMA_CHANNEL_4
|
||||||
|
#define UART1_RX_DMA_IRQ DMA2_Stream5_IRQn
|
||||||
|
#elif defined(BSP_SPI5_RX_USING_DMA) && !defined(SPI5_RX_DMA_INSTANCE)
|
||||||
|
#define SPI5_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler
|
||||||
|
#define SPI5_RX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define SPI5_RX_DMA_INSTANCE DMA2_Stream5
|
||||||
|
#define SPI5_RX_DMA_CHANNEL DMA_CHANNEL_7
|
||||||
|
#define SPI5_RX_DMA_IRQ DMA2_Stream5_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA2 stream6 */
|
||||||
|
#if defined(BSP_SPI5_TX_USING_DMA) && !defined(SPI5_TX_DMA_INSTANCE)
|
||||||
|
#define SPI5_DMA_TX_IRQHandler DMA2_Stream6_IRQHandler
|
||||||
|
#define SPI5_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define SPI5_TX_DMA_INSTANCE DMA2_Stream6
|
||||||
|
#define SPI5_TX_DMA_CHANNEL DMA_CHANNEL_7
|
||||||
|
#define SPI5_TX_DMA_IRQ DMA2_Stream6_IRQn
|
||||||
|
#elif defined(BSP_UART6_TX_USING_DMA) && !defined(UART6_TX_DMA_INSTANCE)
|
||||||
|
#define UART6_DMA_TX_IRQHandler DMA2_Stream6_IRQHandler
|
||||||
|
#define UART6_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define UART6_TX_DMA_INSTANCE DMA2_Stream6
|
||||||
|
#define UART6_TX_DMA_CHANNEL DMA_CHANNEL_5
|
||||||
|
#define UART6_TX_DMA_IRQ DMA2_Stream6_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* DMA2 stream7 */
|
||||||
|
#if defined(BSP_UART1_TX_USING_DMA) && !defined(UART1_TX_DMA_INSTANCE)
|
||||||
|
#define UART1_DMA_TX_IRQHandler DMA2_Stream7_IRQHandler
|
||||||
|
#define UART1_TX_DMA_RCC RCC_AHB1ENR_DMA2EN
|
||||||
|
#define UART1_TX_DMA_INSTANCE DMA2_Stream7
|
||||||
|
#define UART1_TX_DMA_CHANNEL DMA_CHANNEL_4
|
||||||
|
#define UART1_TX_DMA_IRQ DMA2_Stream7_IRQn
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* __DMA_CONFIG_H__ */
|
|
@ -0,0 +1,68 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2019-08-23 balanceTWK first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __PULSE_ENCODER_CONFIG_H__
|
||||||
|
#define __PULSE_ENCODER_CONFIG_H__
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_USING_PULSE_ENCODER1
|
||||||
|
#ifndef PULSE_ENCODER1_CONFIG
|
||||||
|
#define PULSE_ENCODER1_CONFIG \
|
||||||
|
{ \
|
||||||
|
.tim_handler.Instance = TIM1, \
|
||||||
|
.encoder_irqn = TIM1_UP_TIM10_IRQn, \
|
||||||
|
.name = "pulse1" \
|
||||||
|
}
|
||||||
|
#endif /* PULSE_ENCODER1_CONFIG */
|
||||||
|
#endif /* BSP_USING_PULSE_ENCODER1 */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_PULSE_ENCODER2
|
||||||
|
#ifndef PULSE_ENCODER2_CONFIG
|
||||||
|
#define PULSE_ENCODER2_CONFIG \
|
||||||
|
{ \
|
||||||
|
.tim_handler.Instance = TIM2, \
|
||||||
|
.encoder_irqn = TIM2_IRQn, \
|
||||||
|
.name = "pulse2" \
|
||||||
|
}
|
||||||
|
#endif /* PULSE_ENCODER2_CONFIG */
|
||||||
|
#endif /* BSP_USING_PULSE_ENCODER2 */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_PULSE_ENCODER3
|
||||||
|
#ifndef PULSE_ENCODER3_CONFIG
|
||||||
|
#define PULSE_ENCODER3_CONFIG \
|
||||||
|
{ \
|
||||||
|
.tim_handler.Instance = TIM3, \
|
||||||
|
.encoder_irqn = TIM3_IRQn, \
|
||||||
|
.name = "pulse3" \
|
||||||
|
}
|
||||||
|
#endif /* PULSE_ENCODER3_CONFIG */
|
||||||
|
#endif /* BSP_USING_PULSE_ENCODER3 */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_PULSE_ENCODER4
|
||||||
|
#ifndef PULSE_ENCODER4_CONFIG
|
||||||
|
#define PULSE_ENCODER4_CONFIG \
|
||||||
|
{ \
|
||||||
|
.tim_handler.Instance = TIM4, \
|
||||||
|
.encoder_irqn = TIM4_IRQn, \
|
||||||
|
.name = "pulse4" \
|
||||||
|
}
|
||||||
|
#endif /* PULSE_ENCODER4_CONFIG */
|
||||||
|
#endif /* BSP_USING_PULSE_ENCODER4 */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __PULSE_ENCODER_CONFIG_H__ */
|
|
@ -0,0 +1,79 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2018-12-13 zylx first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __PWM_CONFIG_H__
|
||||||
|
#define __PWM_CONFIG_H__
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_USING_PWM2
|
||||||
|
#ifndef PWM2_CONFIG
|
||||||
|
#define PWM2_CONFIG \
|
||||||
|
{ \
|
||||||
|
.tim_handle.Instance = TIM2, \
|
||||||
|
.name = "pwm2", \
|
||||||
|
.channel = 0 \
|
||||||
|
}
|
||||||
|
#endif /* PWM2_CONFIG */
|
||||||
|
#endif /* BSP_USING_PWM2 */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_PWM3
|
||||||
|
#ifndef PWM3_CONFIG
|
||||||
|
#define PWM3_CONFIG \
|
||||||
|
{ \
|
||||||
|
.tim_handle.Instance = TIM3, \
|
||||||
|
.name = "pwm3", \
|
||||||
|
.channel = 0 \
|
||||||
|
}
|
||||||
|
#endif /* PWM3_CONFIG */
|
||||||
|
#endif /* BSP_USING_PWM3 */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_PWM4
|
||||||
|
#ifndef PWM4_CONFIG
|
||||||
|
#define PWM4_CONFIG \
|
||||||
|
{ \
|
||||||
|
.tim_handle.Instance = TIM4, \
|
||||||
|
.name = "pwm4", \
|
||||||
|
.channel = 0 \
|
||||||
|
}
|
||||||
|
#endif /* PWM4_CONFIG */
|
||||||
|
#endif /* BSP_USING_PWM4 */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_PWM5
|
||||||
|
#ifndef PWM5_CONFIG
|
||||||
|
#define PWM5_CONFIG \
|
||||||
|
{ \
|
||||||
|
.tim_handle.Instance = TIM5, \
|
||||||
|
.name = "pwm5", \
|
||||||
|
.channel = 0 \
|
||||||
|
}
|
||||||
|
#endif /* PWM5_CONFIG */
|
||||||
|
#endif /* BSP_USING_PWM5 */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_PWM12
|
||||||
|
#ifndef PWM12_CONFIG
|
||||||
|
#define PWM12_CONFIG \
|
||||||
|
{ \
|
||||||
|
.tim_handle.Instance = TIM12, \
|
||||||
|
.name = "pwm12", \
|
||||||
|
.channel = 0 \
|
||||||
|
}
|
||||||
|
#endif /* PWM12_CONFIG */
|
||||||
|
#endif /* BSP_USING_PWM12 */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __PWM_CONFIG_H__ */
|
|
@ -0,0 +1,56 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2018-12-22 zylx first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __QSPI_CONFIG_H__
|
||||||
|
#define __QSPI_CONFIG_H__
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_USING_QSPI
|
||||||
|
#ifndef QSPI_BUS_CONFIG
|
||||||
|
#define QSPI_BUS_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = QUADSPI, \
|
||||||
|
.Init.FifoThreshold = 4, \
|
||||||
|
.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_HALFCYCLE, \
|
||||||
|
.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_5_CYCLE, \
|
||||||
|
}
|
||||||
|
#endif /* QSPI_BUS_CONFIG */
|
||||||
|
#endif /* BSP_USING_QSPI */
|
||||||
|
|
||||||
|
#ifdef BSP_QSPI_USING_DMA
|
||||||
|
#ifndef QSPI_DMA_CONFIG
|
||||||
|
#define QSPI_DMA_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = QSPI_DMA_INSTANCE, \
|
||||||
|
.Init.Channel = QSPI_DMA_CHANNEL, \
|
||||||
|
.Init.Direction = DMA_PERIPH_TO_MEMORY, \
|
||||||
|
.Init.PeriphInc = DMA_PINC_DISABLE, \
|
||||||
|
.Init.MemInc = DMA_MINC_ENABLE, \
|
||||||
|
.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE, \
|
||||||
|
.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE, \
|
||||||
|
.Init.Mode = DMA_NORMAL, \
|
||||||
|
.Init.Priority = DMA_PRIORITY_LOW \
|
||||||
|
}
|
||||||
|
#endif /* QSPI_DMA_CONFIG */
|
||||||
|
#endif /* BSP_QSPI_USING_DMA */
|
||||||
|
|
||||||
|
#define QSPI_IRQn QUADSPI_IRQn
|
||||||
|
#define QSPI_IRQHandler QUADSPI_IRQHandler
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __QSPI_CONFIG_H__ */
|
|
@ -0,0 +1,44 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2018-12-13 BalanceTWK first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __SDIO_CONFIG_H__
|
||||||
|
#define __SDIO_CONFIG_H__
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
#include "stm32g4xx_hal.h"
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_USING_SDIO
|
||||||
|
#define SDIO_BUS_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = SDIO, \
|
||||||
|
.dma_rx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
|
||||||
|
.dma_tx.dma_rcc = RCC_AHB1ENR_DMA2EN, \
|
||||||
|
.dma_rx.Instance = DMA2_Stream3, \
|
||||||
|
.dma_rx.channel = DMA_CHANNEL_4, \
|
||||||
|
.dma_rx.dma_irq = DMA2_Stream3_IRQn, \
|
||||||
|
.dma_tx.Instance = DMA2_Stream6, \
|
||||||
|
.dma_tx.channel = DMA_CHANNEL_4, \
|
||||||
|
.dma_tx.dma_irq = DMA2_Stream6_IRQn, \
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__SDIO_CONFIG_H__ */
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,195 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2018-11-06 SummerGift first version
|
||||||
|
* 2019-01-03 zylx modify DMA support
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __SPI_CONFIG_H__
|
||||||
|
#define __SPI_CONFIG_H__
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef BSP_USING_SPI1
|
||||||
|
#ifndef SPI1_BUS_CONFIG
|
||||||
|
#define SPI1_BUS_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = SPI1, \
|
||||||
|
.bus_name = "spi1", \
|
||||||
|
}
|
||||||
|
#endif /* SPI1_BUS_CONFIG */
|
||||||
|
#endif /* BSP_USING_SPI1 */
|
||||||
|
|
||||||
|
#ifdef BSP_SPI1_TX_USING_DMA
|
||||||
|
#ifndef SPI1_TX_DMA_CONFIG
|
||||||
|
#define SPI1_TX_DMA_CONFIG \
|
||||||
|
{ \
|
||||||
|
.dma_rcc = SPI1_TX_DMA_RCC, \
|
||||||
|
.Instance = SPI1_TX_DMA_INSTANCE, \
|
||||||
|
.channel = SPI1_TX_DMA_CHANNEL, \
|
||||||
|
.dma_irq = SPI1_TX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* SPI1_TX_DMA_CONFIG */
|
||||||
|
#endif /* BSP_SPI1_TX_USING_DMA */
|
||||||
|
|
||||||
|
#ifdef BSP_SPI1_RX_USING_DMA
|
||||||
|
#ifndef SPI1_RX_DMA_CONFIG
|
||||||
|
#define SPI1_RX_DMA_CONFIG \
|
||||||
|
{ \
|
||||||
|
.dma_rcc = SPI1_RX_DMA_RCC, \
|
||||||
|
.Instance = SPI1_RX_DMA_INSTANCE, \
|
||||||
|
.channel = SPI1_RX_DMA_CHANNEL, \
|
||||||
|
.dma_irq = SPI1_RX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* SPI1_RX_DMA_CONFIG */
|
||||||
|
#endif /* BSP_SPI1_RX_USING_DMA */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_SPI2
|
||||||
|
#ifndef SPI2_BUS_CONFIG
|
||||||
|
#define SPI2_BUS_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = SPI2, \
|
||||||
|
.bus_name = "spi2", \
|
||||||
|
}
|
||||||
|
#endif /* SPI2_BUS_CONFIG */
|
||||||
|
#endif /* BSP_USING_SPI2 */
|
||||||
|
|
||||||
|
#ifdef BSP_SPI2_TX_USING_DMA
|
||||||
|
#ifndef SPI2_TX_DMA_CONFIG
|
||||||
|
#define SPI2_TX_DMA_CONFIG \
|
||||||
|
{ \
|
||||||
|
.dma_rcc = SPI2_TX_DMA_RCC, \
|
||||||
|
.Instance = SPI2_TX_DMA_INSTANCE, \
|
||||||
|
.channel = SPI2_TX_DMA_CHANNEL, \
|
||||||
|
.dma_irq = SPI2_TX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* SPI2_TX_DMA_CONFIG */
|
||||||
|
#endif /* BSP_SPI2_TX_USING_DMA */
|
||||||
|
|
||||||
|
#ifdef BSP_SPI2_RX_USING_DMA
|
||||||
|
#ifndef SPI2_RX_DMA_CONFIG
|
||||||
|
#define SPI2_RX_DMA_CONFIG \
|
||||||
|
{ \
|
||||||
|
.dma_rcc = SPI2_RX_DMA_RCC, \
|
||||||
|
.Instance = SPI2_RX_DMA_INSTANCE, \
|
||||||
|
.channel = SPI2_RX_DMA_CHANNEL, \
|
||||||
|
.dma_irq = SPI2_RX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* SPI2_RX_DMA_CONFIG */
|
||||||
|
#endif /* BSP_SPI2_RX_USING_DMA */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_SPI3
|
||||||
|
#ifndef SPI3_BUS_CONFIG
|
||||||
|
#define SPI3_BUS_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = SPI3, \
|
||||||
|
.bus_name = "spi3", \
|
||||||
|
}
|
||||||
|
#endif /* SPI3_BUS_CONFIG */
|
||||||
|
#endif /* BSP_USING_SPI3 */
|
||||||
|
|
||||||
|
#ifdef BSP_SPI3_TX_USING_DMA
|
||||||
|
#ifndef SPI3_TX_DMA_CONFIG
|
||||||
|
#define SPI3_TX_DMA_CONFIG \
|
||||||
|
{ \
|
||||||
|
.dma_rcc = SPI3_TX_DMA_RCC, \
|
||||||
|
.Instance = SPI3_TX_DMA_INSTANCE, \
|
||||||
|
.channel = SPI3_TX_DMA_CHANNEL, \
|
||||||
|
.dma_irq = SPI3_TX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* SPI3_TX_DMA_CONFIG */
|
||||||
|
#endif /* BSP_SPI3_TX_USING_DMA */
|
||||||
|
|
||||||
|
#ifdef BSP_SPI3_RX_USING_DMA
|
||||||
|
#ifndef SPI3_RX_DMA_CONFIG
|
||||||
|
#define SPI3_RX_DMA_CONFIG \
|
||||||
|
{ \
|
||||||
|
.dma_rcc = SPI3_RX_DMA_RCC, \
|
||||||
|
.Instance = SPI3_RX_DMA_INSTANCE, \
|
||||||
|
.channel = SPI3_RX_DMA_CHANNEL, \
|
||||||
|
.dma_irq = SPI3_RX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* SPI3_RX_DMA_CONFIG */
|
||||||
|
#endif /* BSP_SPI3_RX_USING_DMA */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_SPI4
|
||||||
|
#ifndef SPI4_BUS_CONFIG
|
||||||
|
#define SPI4_BUS_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = SPI4, \
|
||||||
|
.bus_name = "spi4", \
|
||||||
|
}
|
||||||
|
#endif /* SPI4_BUS_CONFIG */
|
||||||
|
#endif /* BSP_USING_SPI4 */
|
||||||
|
|
||||||
|
#ifdef BSP_SPI4_TX_USING_DMA
|
||||||
|
#ifndef SPI4_TX_DMA_CONFIG
|
||||||
|
#define SPI4_TX_DMA_CONFIG \
|
||||||
|
{ \
|
||||||
|
.dma_rcc = SPI4_TX_DMA_RCC, \
|
||||||
|
.Instance = SPI4_TX_DMA_INSTANCE, \
|
||||||
|
.channel = SPI4_TX_DMA_CHANNEL, \
|
||||||
|
.dma_irq = SPI4_TX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* SPI4_TX_DMA_CONFIG */
|
||||||
|
#endif /* BSP_SPI4_TX_USING_DMA */
|
||||||
|
|
||||||
|
#ifdef BSP_SPI4_RX_USING_DMA
|
||||||
|
#ifndef SPI4_RX_DMA_CONFIG
|
||||||
|
#define SPI4_RX_DMA_CONFIG \
|
||||||
|
{ \
|
||||||
|
.dma_rcc = SPI4_RX_DMA_RCC, \
|
||||||
|
.Instance = SPI4_RX_DMA_INSTANCE, \
|
||||||
|
.channel = SPI4_RX_DMA_CHANNEL, \
|
||||||
|
.dma_irq = SPI4_RX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* SPI4_RX_DMA_CONFIG */
|
||||||
|
#endif /* BSP_SPI4_RX_USING_DMA */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_SPI5
|
||||||
|
#ifndef SPI5_BUS_CONFIG
|
||||||
|
#define SPI5_BUS_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = SPI5, \
|
||||||
|
.bus_name = "spi5", \
|
||||||
|
}
|
||||||
|
#endif /* SPI5_BUS_CONFIG */
|
||||||
|
#endif /* BSP_USING_SPI5 */
|
||||||
|
|
||||||
|
#ifdef BSP_SPI5_TX_USING_DMA
|
||||||
|
#ifndef SPI5_TX_DMA_CONFIG
|
||||||
|
#define SPI5_TX_DMA_CONFIG \
|
||||||
|
{ \
|
||||||
|
.dma_rcc = SPI5_TX_DMA_RCC, \
|
||||||
|
.Instance = SPI5_TX_DMA_INSTANCE, \
|
||||||
|
.channel = SPI5_TX_DMA_CHANNEL, \
|
||||||
|
.dma_irq = SPI5_TX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* SPI5_TX_DMA_CONFIG */
|
||||||
|
#endif /* BSP_SPI5_TX_USING_DMA */
|
||||||
|
|
||||||
|
#ifdef BSP_SPI5_RX_USING_DMA
|
||||||
|
#ifndef SPI5_RX_DMA_CONFIG
|
||||||
|
#define SPI5_RX_DMA_CONFIG \
|
||||||
|
{ \
|
||||||
|
.dma_rcc = SPI5_RX_DMA_RCC, \
|
||||||
|
.Instance = SPI5_RX_DMA_INSTANCE, \
|
||||||
|
.channel = SPI5_RX_DMA_CHANNEL, \
|
||||||
|
.dma_irq = SPI5_RX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* SPI5_RX_DMA_CONFIG */
|
||||||
|
#endif /* BSP_SPI5_RX_USING_DMA */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /*__SPI_CONFIG_H__ */
|
|
@ -0,0 +1,67 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2018-12-11 zylx first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __TIM_CONFIG_H__
|
||||||
|
#define __TIM_CONFIG_H__
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef TIM_DEV_INFO_CONFIG
|
||||||
|
#define TIM_DEV_INFO_CONFIG \
|
||||||
|
{ \
|
||||||
|
.maxfreq = 1000000, \
|
||||||
|
.minfreq = 3000, \
|
||||||
|
.maxcnt = 0xFFFF, \
|
||||||
|
.cntmode = HWTIMER_CNTMODE_UP, \
|
||||||
|
}
|
||||||
|
#endif /* TIM_DEV_INFO_CONFIG */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_TIM11
|
||||||
|
#ifndef TIM11_CONFIG
|
||||||
|
#define TIM11_CONFIG \
|
||||||
|
{ \
|
||||||
|
.tim_handle.Instance = TIM11, \
|
||||||
|
.tim_irqn = TIM1_TRG_COM_TIM11_IRQn, \
|
||||||
|
.name = "timer11", \
|
||||||
|
}
|
||||||
|
#endif /* TIM11_CONFIG */
|
||||||
|
#endif /* BSP_USING_TIM11 */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_TIM13
|
||||||
|
#ifndef TIM13_CONFIG
|
||||||
|
#define TIM13_CONFIG \
|
||||||
|
{ \
|
||||||
|
.tim_handle.Instance = TIM13, \
|
||||||
|
.tim_irqn = TIM8_UP_TIM13_IRQn, \
|
||||||
|
.name = "timer13", \
|
||||||
|
}
|
||||||
|
#endif /* TIM13_CONFIG */
|
||||||
|
#endif /* BSP_USING_TIM13 */
|
||||||
|
|
||||||
|
#ifdef BSP_USING_TIM14
|
||||||
|
#ifndef TIM14_CONFIG
|
||||||
|
#define TIM14_CONFIG \
|
||||||
|
{ \
|
||||||
|
.tim_handle.Instance = TIM14, \
|
||||||
|
.tim_irqn = TIM8_TRG_COM_TIM14_IRQn, \
|
||||||
|
.name = "timer14", \
|
||||||
|
}
|
||||||
|
#endif /* TIM14_CONFIG */
|
||||||
|
#endif /* BSP_USING_TIM14 */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __TIM_CONFIG_H__ */
|
|
@ -0,0 +1,223 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2018-10-30 SummerGift first version
|
||||||
|
* 2019-01-03 zylx modify dma support
|
||||||
|
* 2019-10-03 xuzhuoyi modify for STM32G4
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __UART_CONFIG_H__
|
||||||
|
#define __UART_CONFIG_H__
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined(BSP_USING_LPUART1)
|
||||||
|
#ifndef LPUART1_CONFIG
|
||||||
|
#define LPUART1_CONFIG \
|
||||||
|
{ \
|
||||||
|
.name = "lpuart1", \
|
||||||
|
.Instance = LPUART1, \
|
||||||
|
.irq_type = LPUART1_IRQn, \
|
||||||
|
}
|
||||||
|
#endif /* LPUART1_CONFIG */
|
||||||
|
#if defined(BSP_LPUART1_RX_USING_DMA)
|
||||||
|
#ifndef LPUART1_DMA_CONFIG
|
||||||
|
#define LPUART1_DMA_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = LPUART1_RX_DMA_INSTANCE, \
|
||||||
|
.request = LPUART1_RX_DMA_REQUEST, \
|
||||||
|
.dma_rcc = LPUART1_RX_DMA_RCC, \
|
||||||
|
.dma_irq = LPUART1_RX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* LPUART1_DMA_CONFIG */
|
||||||
|
#endif /* BSP_LPUART1_RX_USING_DMA */
|
||||||
|
#endif /* BSP_USING_LPUART1 */
|
||||||
|
|
||||||
|
#if defined(BSP_USING_UART1)
|
||||||
|
#ifndef UART1_CONFIG
|
||||||
|
#define UART1_CONFIG \
|
||||||
|
{ \
|
||||||
|
.name = "uart1", \
|
||||||
|
.Instance = USART1, \
|
||||||
|
.irq_type = USART1_IRQn, \
|
||||||
|
}
|
||||||
|
#endif /* UART1_CONFIG */
|
||||||
|
|
||||||
|
#if defined(BSP_UART1_RX_USING_DMA)
|
||||||
|
#ifndef UART1_DMA_RX_CONFIG
|
||||||
|
#define UART1_DMA_RX_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = UART1_RX_DMA_INSTANCE, \
|
||||||
|
.channel = UART1_RX_DMA_CHANNEL, \
|
||||||
|
.dma_rcc = UART1_RX_DMA_RCC, \
|
||||||
|
.dma_irq = UART1_RX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* UART1_DMA_RX_CONFIG */
|
||||||
|
#endif /* BSP_UART1_RX_USING_DMA */
|
||||||
|
|
||||||
|
#if defined(BSP_UART1_TX_USING_DMA)
|
||||||
|
#ifndef UART1_DMA_TX_CONFIG
|
||||||
|
#define UART1_DMA_TX_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = UART1_TX_DMA_INSTANCE, \
|
||||||
|
.channel = UART1_TX_DMA_CHANNEL, \
|
||||||
|
.dma_rcc = UART1_TX_DMA_RCC, \
|
||||||
|
.dma_irq = UART1_TX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* UART1_DMA_TX_CONFIG */
|
||||||
|
#endif /* BSP_UART1_TX_USING_DMA */
|
||||||
|
#endif /* BSP_USING_UART1 */
|
||||||
|
|
||||||
|
#if defined(BSP_USING_UART2)
|
||||||
|
#ifndef UART2_CONFIG
|
||||||
|
#define UART2_CONFIG \
|
||||||
|
{ \
|
||||||
|
.name = "uart2", \
|
||||||
|
.Instance = USART2, \
|
||||||
|
.irq_type = USART2_IRQn, \
|
||||||
|
}
|
||||||
|
#endif /* UART2_CONFIG */
|
||||||
|
|
||||||
|
#if defined(BSP_UART2_RX_USING_DMA)
|
||||||
|
#ifndef UART2_DMA_RX_CONFIG
|
||||||
|
#define UART2_DMA_RX_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = UART2_RX_DMA_INSTANCE, \
|
||||||
|
.channel = UART2_RX_DMA_CHANNEL, \
|
||||||
|
.dma_rcc = UART2_RX_DMA_RCC, \
|
||||||
|
.dma_irq = UART2_RX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* UART2_DMA_RX_CONFIG */
|
||||||
|
#endif /* BSP_UART2_RX_USING_DMA */
|
||||||
|
|
||||||
|
#if defined(BSP_UART2_TX_USING_DMA)
|
||||||
|
#ifndef UART2_DMA_TX_CONFIG
|
||||||
|
#define UART2_DMA_TX_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = UART2_TX_DMA_INSTANCE, \
|
||||||
|
.channel = UART2_TX_DMA_CHANNEL, \
|
||||||
|
.dma_rcc = UART2_TX_DMA_RCC, \
|
||||||
|
.dma_irq = UART2_TX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* UART2_DMA_TX_CONFIG */
|
||||||
|
#endif /* BSP_UART2_TX_USING_DMA */
|
||||||
|
#endif /* BSP_USING_UART2 */
|
||||||
|
|
||||||
|
#if defined(BSP_USING_UART3)
|
||||||
|
#ifndef UART3_CONFIG
|
||||||
|
#define UART3_CONFIG \
|
||||||
|
{ \
|
||||||
|
.name = "uart3", \
|
||||||
|
.Instance = USART3, \
|
||||||
|
.irq_type = USART3_IRQn, \
|
||||||
|
}
|
||||||
|
#endif /* UART3_CONFIG */
|
||||||
|
|
||||||
|
#if defined(BSP_UART3_RX_USING_DMA)
|
||||||
|
#ifndef UART3_DMA_RX_CONFIG
|
||||||
|
#define UART3_DMA_RX_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = UART3_RX_DMA_INSTANCE, \
|
||||||
|
.channel = UART3_RX_DMA_CHANNEL, \
|
||||||
|
.dma_rcc = UART3_RX_DMA_RCC, \
|
||||||
|
.dma_irq = UART3_RX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* UART3_DMA_RX_CONFIG */
|
||||||
|
#endif /* BSP_UART3_RX_USING_DMA */
|
||||||
|
|
||||||
|
#if defined(BSP_UART3_TX_USING_DMA)
|
||||||
|
#ifndef UART3_DMA_TX_CONFIG
|
||||||
|
#define UART3_DMA_TX_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = UART3_TX_DMA_INSTANCE, \
|
||||||
|
.channel = UART3_TX_DMA_CHANNEL, \
|
||||||
|
.dma_rcc = UART3_TX_DMA_RCC, \
|
||||||
|
.dma_irq = UART3_TX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* UART3_DMA_TX_CONFIG */
|
||||||
|
#endif /* BSP_UART3_TX_USING_DMA */
|
||||||
|
#endif /* BSP_USING_UART3 */
|
||||||
|
|
||||||
|
#if defined(BSP_USING_UART4)
|
||||||
|
#ifndef UART4_CONFIG
|
||||||
|
#define UART4_CONFIG \
|
||||||
|
{ \
|
||||||
|
.name = "uart4", \
|
||||||
|
.Instance = UART4, \
|
||||||
|
.irq_type = UART4_IRQn, \
|
||||||
|
}
|
||||||
|
#endif /* UART4_CONFIG */
|
||||||
|
|
||||||
|
#if defined(BSP_UART4_RX_USING_DMA)
|
||||||
|
#ifndef UART4_DMA_RX_CONFIG
|
||||||
|
#define UART4_DMA_RX_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = UART4_RX_DMA_INSTANCE, \
|
||||||
|
.channel = UART4_RX_DMA_CHANNEL, \
|
||||||
|
.dma_rcc = UART4_RX_DMA_RCC, \
|
||||||
|
.dma_irq = UART4_RX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* UART4_DMA_RX_CONFIG */
|
||||||
|
#endif /* BSP_UART4_RX_USING_DMA */
|
||||||
|
|
||||||
|
#if defined(BSP_UART4_TX_USING_DMA)
|
||||||
|
#ifndef UART4_DMA_TX_CONFIG
|
||||||
|
#define UART4_DMA_TX_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = UART4_TX_DMA_INSTANCE, \
|
||||||
|
.channel = UART4_TX_DMA_CHANNEL, \
|
||||||
|
.dma_rcc = UART4_TX_DMA_RCC, \
|
||||||
|
.dma_irq = UART4_TX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* UART4_DMA_TX_CONFIG */
|
||||||
|
#endif /* BSP_UART4_RX_USING_DMA */
|
||||||
|
#endif /* BSP_USING_UART4 */
|
||||||
|
|
||||||
|
#if defined(BSP_USING_UART5)
|
||||||
|
#ifndef UART5_CONFIG
|
||||||
|
#define UART5_CONFIG \
|
||||||
|
{ \
|
||||||
|
.name = "uart5", \
|
||||||
|
.Instance = UART5, \
|
||||||
|
.irq_type = UART5_IRQn, \
|
||||||
|
}
|
||||||
|
#endif /* UART5_CONFIG */
|
||||||
|
|
||||||
|
#if defined(BSP_UART5_RX_USING_DMA)
|
||||||
|
#ifndef UART5_DMA_RX_CONFIG
|
||||||
|
#define UART5_DMA_RX_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = UART5_RX_DMA_INSTANCE, \
|
||||||
|
.channel = UART5_RX_DMA_CHANNEL, \
|
||||||
|
.dma_rcc = UART5_RX_DMA_RCC, \
|
||||||
|
.dma_irq = UART5_RX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* UART5_DMA_RX_CONFIG */
|
||||||
|
#endif /* BSP_UART5_RX_USING_DMA */
|
||||||
|
|
||||||
|
#if defined(BSP_UART5_TX_USING_DMA)
|
||||||
|
#ifndef UART5_DMA_TX_CONFIG
|
||||||
|
#define UART5_DMA_TX_CONFIG \
|
||||||
|
{ \
|
||||||
|
.Instance = UART5_TX_DMA_INSTANCE, \
|
||||||
|
.channel = UART5_TX_DMA_CHANNEL, \
|
||||||
|
.dma_rcc = UART5_TX_DMA_RCC, \
|
||||||
|
.dma_irq = UART5_TX_DMA_IRQ, \
|
||||||
|
}
|
||||||
|
#endif /* UART5_DMA_TX_CONFIG */
|
||||||
|
#endif /* BSP_UART5_TX_USING_DMA */
|
||||||
|
#endif /* BSP_USING_UART5 */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif
|
|
@ -0,0 +1,15 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2019-04-10 ZYH first version
|
||||||
|
*/
|
||||||
|
#ifndef __USBD_FS_CONFIG_H__
|
||||||
|
#define __USBD_FS_CONFIG_H__
|
||||||
|
|
||||||
|
#define USBD_FS_IRQ_HANDLER OTG_FS_IRQHandler
|
||||||
|
#define USBD_INSTANCE USB_OTG_FS
|
||||||
|
#endif
|
|
@ -83,6 +83,17 @@ extern "C" {
|
||||||
#include "g0/adc_config.h"
|
#include "g0/adc_config.h"
|
||||||
#include "g0/tim_config.h"
|
#include "g0/tim_config.h"
|
||||||
#include "g0/pwm_config.h"
|
#include "g0/pwm_config.h"
|
||||||
|
#elif defined(SOC_SERIES_STM32G4)
|
||||||
|
#include "g4/dma_config.h"
|
||||||
|
#include "g4/uart_config.h"
|
||||||
|
#include "g4/spi_config.h"
|
||||||
|
#include "g4/qspi_config.h"
|
||||||
|
#include "g4/usbd_fs_config.h"
|
||||||
|
#include "g4/adc_config.h"
|
||||||
|
#include "g4/tim_config.h"
|
||||||
|
#include "g4/sdio_config.h"
|
||||||
|
#include "g4/pwm_config.h"
|
||||||
|
#include "g4/pulse_encoder_config.h"
|
||||||
#elif defined(SOC_SERIES_STM32H7)
|
#elif defined(SOC_SERIES_STM32H7)
|
||||||
#include "h7/dma_config.h"
|
#include "h7/dma_config.h"
|
||||||
#include "h7/uart_config.h"
|
#include "h7/uart_config.h"
|
||||||
|
|
|
@ -19,7 +19,7 @@ extern "C" {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L0) \
|
#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L0) \
|
||||||
|| defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
|
|| defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)
|
||||||
#define DMA_INSTANCE_TYPE DMA_Channel_TypeDef
|
#define DMA_INSTANCE_TYPE DMA_Channel_TypeDef
|
||||||
#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)\
|
#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)\
|
||||||
|| defined(SOC_SERIES_STM32H7)
|
|| defined(SOC_SERIES_STM32H7)
|
||||||
|
@ -35,7 +35,7 @@ struct dma_config {
|
||||||
rt_uint32_t channel;
|
rt_uint32_t channel;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
|
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)
|
||||||
rt_uint32_t request;
|
rt_uint32_t request;
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
|
|
@ -198,7 +198,8 @@ static int stm32_putc(struct rt_serial_device *serial, char c)
|
||||||
uart = rt_container_of(serial, struct stm32_uart, serial);
|
uart = rt_container_of(serial, struct stm32_uart, serial);
|
||||||
UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
|
UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
|
||||||
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
|
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
|
||||||
|| defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7)
|
|| defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) \
|
||||||
|
|| defined(SOC_SERIES_STM32G4)
|
||||||
uart->handle.Instance->TDR = c;
|
uart->handle.Instance->TDR = c;
|
||||||
#else
|
#else
|
||||||
uart->handle.Instance->DR = c;
|
uart->handle.Instance->DR = c;
|
||||||
|
@ -218,7 +219,8 @@ static int stm32_getc(struct rt_serial_device *serial)
|
||||||
if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
|
if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
|
||||||
{
|
{
|
||||||
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
|
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
|
||||||
|| defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7)
|
|| defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) \
|
||||||
|
|| defined(SOC_SERIES_STM32G4)
|
||||||
ch = uart->handle.Instance->RDR & 0xff;
|
ch = uart->handle.Instance->RDR & 0xff;
|
||||||
#else
|
#else
|
||||||
ch = uart->handle.Instance->DR & 0xff;
|
ch = uart->handle.Instance->DR & 0xff;
|
||||||
|
@ -330,7 +332,8 @@ static void uart_isr(struct rt_serial_device *serial)
|
||||||
__HAL_UART_CLEAR_PEFLAG(&uart->handle);
|
__HAL_UART_CLEAR_PEFLAG(&uart->handle);
|
||||||
}
|
}
|
||||||
#if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \
|
#if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \
|
||||||
&& !defined(SOC_SERIES_STM32L0) && !defined(SOC_SERIES_STM32G0) && !defined(SOC_SERIES_STM32H7)
|
&& !defined(SOC_SERIES_STM32L0) && !defined(SOC_SERIES_STM32G0) && !defined(SOC_SERIES_STM32H7) \
|
||||||
|
&& !defined(SOC_SERIES_STM32G4)
|
||||||
if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)
|
if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)
|
||||||
{
|
{
|
||||||
UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD);
|
UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD);
|
||||||
|
@ -741,7 +744,8 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
|
||||||
/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
|
/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
|
||||||
SET_BIT(RCC->AHBENR, dma_config->dma_rcc);
|
SET_BIT(RCC->AHBENR, dma_config->dma_rcc);
|
||||||
tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc);
|
tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc);
|
||||||
#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
|
#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) \
|
||||||
|
|| defined(SOC_SERIES_STM32G4)
|
||||||
/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
|
/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
|
||||||
SET_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
|
SET_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
|
||||||
tmpreg = READ_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
|
tmpreg = READ_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
|
||||||
|
@ -763,7 +767,7 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
|
||||||
#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
|
#elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
|
||||||
DMA_Handle->Instance = dma_config->Instance;
|
DMA_Handle->Instance = dma_config->Instance;
|
||||||
DMA_Handle->Init.Channel = dma_config->channel;
|
DMA_Handle->Init.Channel = dma_config->channel;
|
||||||
#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
|
#elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)
|
||||||
DMA_Handle->Instance = dma_config->Instance;
|
DMA_Handle->Instance = dma_config->Instance;
|
||||||
DMA_Handle->Init.Request = dma_config->request;
|
DMA_Handle->Init.Request = dma_config->request;
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -21,14 +21,15 @@
|
||||||
int rt_hw_usart_init(void);
|
int rt_hw_usart_init(void);
|
||||||
|
|
||||||
#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) \
|
#if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) \
|
||||||
|| defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0)
|
|| defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)
|
||||||
#define DMA_INSTANCE_TYPE DMA_Channel_TypeDef
|
#define DMA_INSTANCE_TYPE DMA_Channel_TypeDef
|
||||||
#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32H7)
|
#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32H7)
|
||||||
#define DMA_INSTANCE_TYPE DMA_Stream_TypeDef
|
#define DMA_INSTANCE_TYPE DMA_Stream_TypeDef
|
||||||
#endif /* defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) */
|
#endif /* defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) */
|
||||||
|
|
||||||
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F2) \
|
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F2) \
|
||||||
|| defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0)
|
|| defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) \
|
||||||
|
|| defined(SOC_SERIES_STM32G4)
|
||||||
#define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_FLAG
|
#define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_FLAG
|
||||||
#elif defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7)
|
#elif defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7)
|
||||||
#define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_IT
|
#define UART_INSTANCE_CLEAR_FUNCTION __HAL_UART_CLEAR_IT
|
||||||
|
|
|
@ -9,7 +9,6 @@ cwd = GetCurrentDir()
|
||||||
src = Split('''
|
src = Split('''
|
||||||
CMSIS/Device/ST/STM32G4xx/Source/Templates/system_stm32g4xx.c
|
CMSIS/Device/ST/STM32G4xx/Source/Templates/system_stm32g4xx.c
|
||||||
STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
|
STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c
|
||||||
STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cec.c
|
|
||||||
STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
|
STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c
|
||||||
STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c
|
STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c
|
||||||
STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp.c
|
STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp.c
|
||||||
|
@ -26,7 +25,9 @@ STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c
|
||||||
|
|
||||||
if GetDepend(['RT_USING_SERIAL']):
|
if GetDepend(['RT_USING_SERIAL']):
|
||||||
src += ['STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c']
|
src += ['STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c']
|
||||||
|
src += ['STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c']
|
||||||
src += ['STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart.c']
|
src += ['STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart.c']
|
||||||
|
src += ['STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart_ex.c']
|
||||||
|
|
||||||
if GetDepend(['RT_USING_I2C']):
|
if GetDepend(['RT_USING_I2C']):
|
||||||
src += ['STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c']
|
src += ['STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c']
|
||||||
|
|
|
@ -0,0 +1,394 @@
|
||||||
|
#
|
||||||
|
# Automatically generated file; DO NOT EDIT.
|
||||||
|
# RT-Thread Configuration
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# RT-Thread Kernel
|
||||||
|
#
|
||||||
|
CONFIG_RT_NAME_MAX=8
|
||||||
|
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
|
||||||
|
# CONFIG_RT_USING_SMP is not set
|
||||||
|
CONFIG_RT_ALIGN_SIZE=4
|
||||||
|
# CONFIG_RT_THREAD_PRIORITY_8 is not set
|
||||||
|
CONFIG_RT_THREAD_PRIORITY_32=y
|
||||||
|
# CONFIG_RT_THREAD_PRIORITY_256 is not set
|
||||||
|
CONFIG_RT_THREAD_PRIORITY_MAX=32
|
||||||
|
CONFIG_RT_TICK_PER_SECOND=1000
|
||||||
|
CONFIG_RT_USING_OVERFLOW_CHECK=y
|
||||||
|
CONFIG_RT_USING_HOOK=y
|
||||||
|
CONFIG_RT_USING_IDLE_HOOK=y
|
||||||
|
CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
|
||||||
|
CONFIG_IDLE_THREAD_STACK_SIZE=256
|
||||||
|
# CONFIG_RT_USING_TIMER_SOFT is not set
|
||||||
|
CONFIG_RT_DEBUG=y
|
||||||
|
CONFIG_RT_DEBUG_COLOR=y
|
||||||
|
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
|
||||||
|
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Inter-Thread communication
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_SEMAPHORE=y
|
||||||
|
CONFIG_RT_USING_MUTEX=y
|
||||||
|
CONFIG_RT_USING_EVENT=y
|
||||||
|
CONFIG_RT_USING_MAILBOX=y
|
||||||
|
CONFIG_RT_USING_MESSAGEQUEUE=y
|
||||||
|
# CONFIG_RT_USING_SIGNALS is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Memory Management
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_MEMPOOL=y
|
||||||
|
# CONFIG_RT_USING_MEMHEAP is not set
|
||||||
|
# CONFIG_RT_USING_NOHEAP is not set
|
||||||
|
CONFIG_RT_USING_SMALL_MEM=y
|
||||||
|
# CONFIG_RT_USING_SLAB is not set
|
||||||
|
# CONFIG_RT_USING_MEMTRACE is not set
|
||||||
|
CONFIG_RT_USING_HEAP=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Kernel Device Object
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_DEVICE=y
|
||||||
|
# CONFIG_RT_USING_DEVICE_OPS is not set
|
||||||
|
# CONFIG_RT_USING_INTERRUPT_INFO is not set
|
||||||
|
CONFIG_RT_USING_CONSOLE=y
|
||||||
|
CONFIG_RT_CONSOLEBUF_SIZE=128
|
||||||
|
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
|
||||||
|
CONFIG_RT_VER_NUM=0x40002
|
||||||
|
CONFIG_ARCH_ARM=y
|
||||||
|
CONFIG_RT_USING_CPU_FFS=y
|
||||||
|
CONFIG_ARCH_ARM_CORTEX_M=y
|
||||||
|
CONFIG_ARCH_ARM_CORTEX_M4=y
|
||||||
|
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# RT-Thread Components
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_COMPONENTS_INIT=y
|
||||||
|
CONFIG_RT_USING_USER_MAIN=y
|
||||||
|
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
|
||||||
|
CONFIG_RT_MAIN_THREAD_PRIORITY=10
|
||||||
|
|
||||||
|
#
|
||||||
|
# C++ features
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_CPLUSPLUS is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Command shell
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_FINSH=y
|
||||||
|
CONFIG_FINSH_THREAD_NAME="tshell"
|
||||||
|
CONFIG_FINSH_USING_HISTORY=y
|
||||||
|
CONFIG_FINSH_HISTORY_LINES=5
|
||||||
|
CONFIG_FINSH_USING_SYMTAB=y
|
||||||
|
CONFIG_FINSH_USING_DESCRIPTION=y
|
||||||
|
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
|
||||||
|
CONFIG_FINSH_THREAD_PRIORITY=20
|
||||||
|
CONFIG_FINSH_THREAD_STACK_SIZE=4096
|
||||||
|
CONFIG_FINSH_CMD_SIZE=80
|
||||||
|
# CONFIG_FINSH_USING_AUTH is not set
|
||||||
|
CONFIG_FINSH_USING_MSH=y
|
||||||
|
CONFIG_FINSH_USING_MSH_DEFAULT=y
|
||||||
|
CONFIG_FINSH_USING_MSH_ONLY=y
|
||||||
|
CONFIG_FINSH_ARG_MAX=10
|
||||||
|
|
||||||
|
#
|
||||||
|
# Device virtual file system
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_DFS is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Device Drivers
|
||||||
|
#
|
||||||
|
CONFIG_RT_USING_DEVICE_IPC=y
|
||||||
|
CONFIG_RT_PIPE_BUFSZ=512
|
||||||
|
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
|
||||||
|
CONFIG_RT_USING_SERIAL=y
|
||||||
|
CONFIG_RT_SERIAL_USING_DMA=y
|
||||||
|
CONFIG_RT_SERIAL_RB_BUFSZ=64
|
||||||
|
# CONFIG_RT_USING_CAN is not set
|
||||||
|
# CONFIG_RT_USING_HWTIMER is not set
|
||||||
|
# CONFIG_RT_USING_CPUTIME is not set
|
||||||
|
# CONFIG_RT_USING_I2C is not set
|
||||||
|
CONFIG_RT_USING_PIN=y
|
||||||
|
# CONFIG_RT_USING_ADC is not set
|
||||||
|
# CONFIG_RT_USING_PWM is not set
|
||||||
|
# CONFIG_RT_USING_MTD_NOR is not set
|
||||||
|
# CONFIG_RT_USING_MTD_NAND is not set
|
||||||
|
# CONFIG_RT_USING_PM is not set
|
||||||
|
# CONFIG_RT_USING_RTC is not set
|
||||||
|
# CONFIG_RT_USING_SDIO is not set
|
||||||
|
# CONFIG_RT_USING_SPI is not set
|
||||||
|
# CONFIG_RT_USING_WDT is not set
|
||||||
|
# CONFIG_RT_USING_AUDIO is not set
|
||||||
|
# CONFIG_RT_USING_SENSOR is not set
|
||||||
|
# CONFIG_RT_USING_TOUCH is not set
|
||||||
|
# CONFIG_RT_USING_HWCRYPTO is not set
|
||||||
|
# CONFIG_RT_USING_PULSE_ENCODER is not set
|
||||||
|
# CONFIG_RT_USING_INPUT_CAPTURE is not set
|
||||||
|
# CONFIG_RT_USING_WIFI is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Using USB
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_USB_HOST is not set
|
||||||
|
# CONFIG_RT_USING_USB_DEVICE is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# POSIX layer and C standard library
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_LIBC is not set
|
||||||
|
# CONFIG_RT_USING_PTHREADS is not set
|
||||||
|
CONFIG_RT_LIBC_USING_TIME=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Network
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Socket abstraction layer
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_SAL is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Network interface device
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_NETDEV is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# light weight TCP/IP stack
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_LWIP is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# AT commands
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_AT is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# VBUS(Virtual Software BUS)
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_VBUS is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Utilities
|
||||||
|
#
|
||||||
|
# CONFIG_RT_USING_RYM is not set
|
||||||
|
# CONFIG_RT_USING_ULOG is not set
|
||||||
|
# CONFIG_RT_USING_UTEST is not set
|
||||||
|
# CONFIG_RT_USING_LWP is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# RT-Thread online packages
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# IoT - internet of things
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_PAHOMQTT is not set
|
||||||
|
# CONFIG_PKG_USING_WEBCLIENT is not set
|
||||||
|
# CONFIG_PKG_USING_WEBNET is not set
|
||||||
|
# CONFIG_PKG_USING_MONGOOSE is not set
|
||||||
|
# CONFIG_PKG_USING_WEBTERMINAL is not set
|
||||||
|
# CONFIG_PKG_USING_CJSON is not set
|
||||||
|
# CONFIG_PKG_USING_JSMN is not set
|
||||||
|
# CONFIG_PKG_USING_LIBMODBUS is not set
|
||||||
|
# CONFIG_PKG_USING_FREEMODBUS is not set
|
||||||
|
# CONFIG_PKG_USING_LJSON is not set
|
||||||
|
# CONFIG_PKG_USING_EZXML is not set
|
||||||
|
# CONFIG_PKG_USING_NANOPB is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Wi-Fi
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Marvell WiFi
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_WLANMARVELL is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Wiced WiFi
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_WLAN_WICED is not set
|
||||||
|
# CONFIG_PKG_USING_RW007 is not set
|
||||||
|
# CONFIG_PKG_USING_COAP is not set
|
||||||
|
# CONFIG_PKG_USING_NOPOLL is not set
|
||||||
|
# CONFIG_PKG_USING_NETUTILS is not set
|
||||||
|
# CONFIG_PKG_USING_PPP_DEVICE is not set
|
||||||
|
# CONFIG_PKG_USING_AT_DEVICE is not set
|
||||||
|
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
|
||||||
|
# CONFIG_PKG_USING_WIZNET is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# IoT Cloud
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_ONENET is not set
|
||||||
|
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
|
||||||
|
# CONFIG_PKG_USING_ALI_IOTKIT is not set
|
||||||
|
# CONFIG_PKG_USING_AZURE is not set
|
||||||
|
# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
|
||||||
|
# CONFIG_PKG_USING_JIOT-C-SDK is not set
|
||||||
|
# CONFIG_PKG_USING_NIMBLE is not set
|
||||||
|
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
|
||||||
|
# CONFIG_PKG_USING_IPMSG is not set
|
||||||
|
# CONFIG_PKG_USING_LSSDP is not set
|
||||||
|
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
|
||||||
|
# CONFIG_PKG_USING_LIBRWS is not set
|
||||||
|
# CONFIG_PKG_USING_TCPSERVER is not set
|
||||||
|
# CONFIG_PKG_USING_PROTOBUF_C is not set
|
||||||
|
# CONFIG_PKG_USING_ONNX_PARSER is not set
|
||||||
|
# CONFIG_PKG_USING_ONNX_BACKEND is not set
|
||||||
|
# CONFIG_PKG_USING_DLT645 is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# security packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_MBEDTLS is not set
|
||||||
|
# CONFIG_PKG_USING_libsodium is not set
|
||||||
|
# CONFIG_PKG_USING_TINYCRYPT is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# language packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_LUA is not set
|
||||||
|
# CONFIG_PKG_USING_JERRYSCRIPT is not set
|
||||||
|
# CONFIG_PKG_USING_MICROPYTHON is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# multimedia packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_OPENMV is not set
|
||||||
|
# CONFIG_PKG_USING_MUPDF is not set
|
||||||
|
# CONFIG_PKG_USING_STEMWIN is not set
|
||||||
|
# CONFIG_PKG_USING_WAVPLAYER is not set
|
||||||
|
# CONFIG_PKG_USING_TJPGD is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# tools packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_CMBACKTRACE is not set
|
||||||
|
# CONFIG_PKG_USING_EASYFLASH is not set
|
||||||
|
# CONFIG_PKG_USING_EASYLOGGER is not set
|
||||||
|
# CONFIG_PKG_USING_SYSTEMVIEW is not set
|
||||||
|
# CONFIG_PKG_USING_RDB is not set
|
||||||
|
# CONFIG_PKG_USING_QRCODE is not set
|
||||||
|
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
|
||||||
|
# CONFIG_PKG_USING_ADBD is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# system packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_GUIENGINE is not set
|
||||||
|
# CONFIG_PKG_USING_PERSIMMON is not set
|
||||||
|
# CONFIG_PKG_USING_CAIRO is not set
|
||||||
|
# CONFIG_PKG_USING_PIXMAN is not set
|
||||||
|
# CONFIG_PKG_USING_LWEXT4 is not set
|
||||||
|
# CONFIG_PKG_USING_PARTITION is not set
|
||||||
|
# CONFIG_PKG_USING_FAL is not set
|
||||||
|
# CONFIG_PKG_USING_SQLITE is not set
|
||||||
|
# CONFIG_PKG_USING_RTI is not set
|
||||||
|
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
|
||||||
|
# CONFIG_PKG_USING_CMSIS is not set
|
||||||
|
# CONFIG_PKG_USING_DFS_YAFFS is not set
|
||||||
|
# CONFIG_PKG_USING_LITTLEFS is not set
|
||||||
|
# CONFIG_PKG_USING_THREAD_POOL is not set
|
||||||
|
# CONFIG_PKG_USING_ROBOTS is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# peripheral libraries and drivers
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
|
||||||
|
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
|
||||||
|
# CONFIG_PKG_USING_SHT2X is not set
|
||||||
|
# CONFIG_PKG_USING_STM32_SDIO is not set
|
||||||
|
# CONFIG_PKG_USING_ICM20608 is not set
|
||||||
|
# CONFIG_PKG_USING_U8G2 is not set
|
||||||
|
# CONFIG_PKG_USING_BUTTON is not set
|
||||||
|
# CONFIG_PKG_USING_PCF8574 is not set
|
||||||
|
# CONFIG_PKG_USING_SX12XX is not set
|
||||||
|
# CONFIG_PKG_USING_SIGNAL_LED is not set
|
||||||
|
# CONFIG_PKG_USING_LEDBLINK is not set
|
||||||
|
# CONFIG_PKG_USING_WM_LIBRARIES is not set
|
||||||
|
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
|
||||||
|
# CONFIG_PKG_USING_INFRARED is not set
|
||||||
|
# CONFIG_PKG_USING_ROSSERIAL is not set
|
||||||
|
# CONFIG_PKG_USING_AT24CXX is not set
|
||||||
|
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
|
||||||
|
# CONFIG_PKG_USING_AD7746 is not set
|
||||||
|
# CONFIG_PKG_USING_PCA9685 is not set
|
||||||
|
# CONFIG_PKG_USING_I2C_TOOLS is not set
|
||||||
|
# CONFIG_PKG_USING_NRF24L01 is not set
|
||||||
|
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
|
||||||
|
# CONFIG_PKG_USING_LCD_DRIVERS is not set
|
||||||
|
# CONFIG_PKG_USING_MAX17048 is not set
|
||||||
|
# CONFIG_PKG_USING_RPLIDAR is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# miscellaneous packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_LIBCSV is not set
|
||||||
|
# CONFIG_PKG_USING_OPTPARSE is not set
|
||||||
|
# CONFIG_PKG_USING_FASTLZ is not set
|
||||||
|
# CONFIG_PKG_USING_MINILZO is not set
|
||||||
|
# CONFIG_PKG_USING_QUICKLZ is not set
|
||||||
|
# CONFIG_PKG_USING_MULTIBUTTON is not set
|
||||||
|
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
|
||||||
|
# CONFIG_PKG_USING_CANFESTIVAL is not set
|
||||||
|
# CONFIG_PKG_USING_ZLIB is not set
|
||||||
|
# CONFIG_PKG_USING_DSTR is not set
|
||||||
|
# CONFIG_PKG_USING_TINYFRAME is not set
|
||||||
|
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
|
||||||
|
# CONFIG_PKG_USING_DIGITALCTRL is not set
|
||||||
|
# CONFIG_PKG_USING_UPACKER is not set
|
||||||
|
# CONFIG_PKG_USING_UPARAM is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# samples: kernel and components samples
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
|
||||||
|
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
|
||||||
|
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
|
||||||
|
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
|
||||||
|
# CONFIG_PKG_USING_HELLO is not set
|
||||||
|
# CONFIG_PKG_USING_VI is not set
|
||||||
|
# CONFIG_PKG_USING_NNOM is not set
|
||||||
|
# CONFIG_PKG_USING_LIBANN is not set
|
||||||
|
# CONFIG_PKG_USING_ELAPACK is not set
|
||||||
|
# CONFIG_PKG_USING_ARMv7M_DWT is not set
|
||||||
|
# CONFIG_PKG_USING_VT100 is not set
|
||||||
|
CONFIG_SOC_FAMILY_STM32=y
|
||||||
|
CONFIG_SOC_SERIES_STM32G4=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Hardware Drivers Config
|
||||||
|
#
|
||||||
|
CONFIG_SOC_STM32G431RB=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Onboard Peripheral Drivers
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# On-chip Peripheral Drivers
|
||||||
|
#
|
||||||
|
CONFIG_BSP_USING_GPIO=y
|
||||||
|
CONFIG_BSP_USING_UART=y
|
||||||
|
CONFIG_BSP_USING_UART1=y
|
||||||
|
# CONFIG_BSP_UART1_RX_USING_DMA is not set
|
||||||
|
# CONFIG_BSP_USING_UDID is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Board extended module Drivers
|
||||||
|
#
|
|
@ -0,0 +1,42 @@
|
||||||
|
*.pyc
|
||||||
|
*.map
|
||||||
|
*.dblite
|
||||||
|
*.elf
|
||||||
|
*.bin
|
||||||
|
*.hex
|
||||||
|
*.axf
|
||||||
|
*.exe
|
||||||
|
*.pdb
|
||||||
|
*.idb
|
||||||
|
*.ilk
|
||||||
|
*.old
|
||||||
|
build
|
||||||
|
Debug
|
||||||
|
documentation/html
|
||||||
|
packages/
|
||||||
|
*~
|
||||||
|
*.o
|
||||||
|
*.obj
|
||||||
|
*.out
|
||||||
|
*.bak
|
||||||
|
*.dep
|
||||||
|
*.lib
|
||||||
|
*.i
|
||||||
|
*.d
|
||||||
|
.DS_Stor*
|
||||||
|
.config 3
|
||||||
|
.config 4
|
||||||
|
.config 5
|
||||||
|
Midea-X1
|
||||||
|
*.uimg
|
||||||
|
GPATH
|
||||||
|
GRTAGS
|
||||||
|
GTAGS
|
||||||
|
.vscode
|
||||||
|
JLinkLog.txt
|
||||||
|
JLinkSettings.ini
|
||||||
|
DebugConfig/
|
||||||
|
RTE/
|
||||||
|
settings/
|
||||||
|
*.uvguix*
|
||||||
|
cconfig.h
|
|
@ -0,0 +1,21 @@
|
||||||
|
mainmenu "RT-Thread Configuration"
|
||||||
|
|
||||||
|
config BSP_DIR
|
||||||
|
string
|
||||||
|
option env="BSP_ROOT"
|
||||||
|
default "."
|
||||||
|
|
||||||
|
config RTT_DIR
|
||||||
|
string
|
||||||
|
option env="RTT_ROOT"
|
||||||
|
default "../../.."
|
||||||
|
|
||||||
|
config PKGS_DIR
|
||||||
|
string
|
||||||
|
option env="PKGS_ROOT"
|
||||||
|
default "packages"
|
||||||
|
|
||||||
|
source "$RTT_DIR/Kconfig"
|
||||||
|
source "$PKGS_DIR/Kconfig"
|
||||||
|
source "../libraries/Kconfig"
|
||||||
|
source "board/Kconfig"
|
|
@ -0,0 +1,15 @@
|
||||||
|
# for module compiling
|
||||||
|
import os
|
||||||
|
Import('RTT_ROOT')
|
||||||
|
from building import *
|
||||||
|
|
||||||
|
cwd = GetCurrentDir()
|
||||||
|
objs = []
|
||||||
|
list = os.listdir(cwd)
|
||||||
|
|
||||||
|
for d in list:
|
||||||
|
path = os.path.join(cwd, d)
|
||||||
|
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||||
|
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||||
|
|
||||||
|
Return('objs')
|
|
@ -0,0 +1,59 @@
|
||||||
|
import os
|
||||||
|
import sys
|
||||||
|
import rtconfig
|
||||||
|
|
||||||
|
if os.getenv('RTT_ROOT'):
|
||||||
|
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||||
|
else:
|
||||||
|
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
|
||||||
|
|
||||||
|
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||||
|
try:
|
||||||
|
from building import *
|
||||||
|
except:
|
||||||
|
print('Cannot found RT-Thread root directory, please check RTT_ROOT')
|
||||||
|
print(RTT_ROOT)
|
||||||
|
exit(-1)
|
||||||
|
|
||||||
|
TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
|
||||||
|
|
||||||
|
env = Environment(tools = ['mingw'],
|
||||||
|
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||||
|
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||||
|
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||||
|
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
|
||||||
|
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||||
|
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||||
|
|
||||||
|
if rtconfig.PLATFORM == 'iar':
|
||||||
|
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
|
||||||
|
env.Replace(ARFLAGS = [''])
|
||||||
|
env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
|
||||||
|
|
||||||
|
Export('RTT_ROOT')
|
||||||
|
Export('rtconfig')
|
||||||
|
|
||||||
|
SDK_ROOT = os.path.abspath('./')
|
||||||
|
|
||||||
|
if os.path.exists(SDK_ROOT + '/libraries'):
|
||||||
|
libraries_path_prefix = SDK_ROOT + '/libraries'
|
||||||
|
else:
|
||||||
|
libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
|
||||||
|
|
||||||
|
SDK_LIB = libraries_path_prefix
|
||||||
|
Export('SDK_LIB')
|
||||||
|
|
||||||
|
# prepare building environment
|
||||||
|
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
|
||||||
|
|
||||||
|
stm32_library = 'STM32G4xx_HAL'
|
||||||
|
rtconfig.BSP_LIBRARY_TYPE = stm32_library
|
||||||
|
|
||||||
|
# include libraries
|
||||||
|
objs.extend(SConscript(os.path.join(libraries_path_prefix, stm32_library, 'SConscript')))
|
||||||
|
|
||||||
|
# include drivers
|
||||||
|
objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript')))
|
||||||
|
|
||||||
|
# make a building
|
||||||
|
DoBuilding(TARGET, objs)
|
|
@ -0,0 +1,12 @@
|
||||||
|
import rtconfig
|
||||||
|
from building import *
|
||||||
|
|
||||||
|
cwd = GetCurrentDir()
|
||||||
|
CPPPATH = [cwd, str(Dir('#'))]
|
||||||
|
src = Split("""
|
||||||
|
main.c
|
||||||
|
""")
|
||||||
|
|
||||||
|
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
|
||||||
|
|
||||||
|
Return('group')
|
|
@ -0,0 +1,33 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2018-11-06 SummerGift first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
#include <rtdevice.h>
|
||||||
|
#include <board.h>
|
||||||
|
|
||||||
|
/* defined the LED2 pin: PA5 */
|
||||||
|
#define LED2_PIN GET_PIN(A, 5)
|
||||||
|
|
||||||
|
int main(void)
|
||||||
|
{
|
||||||
|
int count = 1;
|
||||||
|
/* set LED2 pin mode to output */
|
||||||
|
rt_pin_mode(LED2_PIN, PIN_MODE_OUTPUT);
|
||||||
|
|
||||||
|
while (count++)
|
||||||
|
{
|
||||||
|
rt_pin_write(LED2_PIN, PIN_HIGH);
|
||||||
|
rt_thread_mdelay(500);
|
||||||
|
rt_pin_write(LED2_PIN, PIN_LOW);
|
||||||
|
rt_thread_mdelay(500);
|
||||||
|
}
|
||||||
|
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
|
@ -0,0 +1,18 @@
|
||||||
|
[PreviousGenFiles]
|
||||||
|
HeaderPath=E:/Users/xzy47/Documents/GitHub/rt-thread/bsp/stm32/stm32g431-st-nucleo/board/CubeMX_Config/Inc
|
||||||
|
HeaderFiles=stm32f4xx_it.h;stm32f4xx_hal_conf.h;main.h;stm32g4xx_it.h;stm32g4xx_hal_conf.h;
|
||||||
|
SourcePath=E:/Users/xzy47/Documents/GitHub/rt-thread/bsp/stm32/stm32g431-st-nucleo/board/CubeMX_Config/Src
|
||||||
|
SourceFiles=stm32f4xx_it.c;stm32f4xx_hal_msp.c;main.c;stm32g4xx_it.c;stm32g4xx_hal_msp.c;
|
||||||
|
|
||||||
|
[PreviousLibFiles]
|
||||||
|
LibFiles=Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h;Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h;Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h;Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h;Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h;Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h;Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h;Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/system_stm32g4xx.c;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/core_cm1.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/tz_context.h;
|
||||||
|
|
||||||
|
[PreviousUsedIarFiles]
|
||||||
|
SourceFiles=..\Src\main.c;..\Src\stm32f4xx_it.c;..\Src\stm32f4xx_hal_msp.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../\Src/system_stm32f4xx.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c;../Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c;../\Src/system_stm32f4xx.c;../Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c;null;
|
||||||
|
HeaderPath=..\Drivers\STM32F4xx_HAL_Driver\Inc;..\Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32F4xx\Include;..\Drivers\CMSIS\Include;..\Inc;
|
||||||
|
|
||||||
|
[PreviousUsedKeilFiles]
|
||||||
|
SourceFiles=..\Src\main.c;..\Src\stm32g4xx_it.c;..\Src\stm32g4xx_hal_msp.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c;../\Src/system_stm32g4xx.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c;../Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c;../\Src/system_stm32g4xx.c;../Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/system_stm32g4xx.c;null;
|
||||||
|
HeaderPath=..\Drivers\STM32G4xx_HAL_Driver\Inc;..\Drivers\STM32G4xx_HAL_Driver\Inc\Legacy;..\Drivers\CMSIS\Device\ST\STM32G4xx\Include;..\Drivers\CMSIS\Include;..\Inc;
|
||||||
|
CDefines=USE_HAL_DRIVER;STM32G431xx;USE_HAL_DRIVER;STM32G431xx;
|
||||||
|
|
|
@ -0,0 +1,176 @@
|
||||||
|
#MicroXplorer Configuration settings - do not modify
|
||||||
|
File.Version=6
|
||||||
|
KeepUserPlacement=true
|
||||||
|
Mcu.Family=STM32G4
|
||||||
|
Mcu.IP0=NVIC
|
||||||
|
Mcu.IP1=RCC
|
||||||
|
Mcu.IP2=SYS
|
||||||
|
Mcu.IP3=USART1
|
||||||
|
Mcu.IPNb=4
|
||||||
|
Mcu.Name=STM32G431R(6-8-B)Tx
|
||||||
|
Mcu.Package=LQFP64
|
||||||
|
Mcu.Pin0=PC13
|
||||||
|
Mcu.Pin1=PC14-OSC32_IN
|
||||||
|
Mcu.Pin10=PB3
|
||||||
|
Mcu.Pin11=VP_SYS_VS_Systick
|
||||||
|
Mcu.Pin12=VP_SYS_VS_DBSignals
|
||||||
|
Mcu.Pin2=PC15-OSC32_OUT
|
||||||
|
Mcu.Pin3=PF0-OSC_IN
|
||||||
|
Mcu.Pin4=PF1-OSC_OUT
|
||||||
|
Mcu.Pin5=PA5
|
||||||
|
Mcu.Pin6=PC4
|
||||||
|
Mcu.Pin7=PC5
|
||||||
|
Mcu.Pin8=PA13
|
||||||
|
Mcu.Pin9=PA14
|
||||||
|
Mcu.PinsNb=13
|
||||||
|
Mcu.ThirdPartyNb=0
|
||||||
|
Mcu.UserConstants=
|
||||||
|
Mcu.UserName=STM32G431RBTx
|
||||||
|
MxCube.Version=5.3.0
|
||||||
|
MxDb.Version=DB.5.0.30
|
||||||
|
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||||
|
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||||
|
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||||
|
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||||
|
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||||
|
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||||
|
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
|
||||||
|
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||||
|
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
|
||||||
|
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
|
||||||
|
PA13.GPIOParameters=GPIO_Label
|
||||||
|
PA13.GPIO_Label=T_SWDIO
|
||||||
|
PA13.Locked=true
|
||||||
|
PA13.Mode=Serial_Wire
|
||||||
|
PA13.Signal=SYS_JTMS-SWDIO
|
||||||
|
PA14.GPIOParameters=GPIO_Label
|
||||||
|
PA14.GPIO_Label=T_SWCLK
|
||||||
|
PA14.Locked=true
|
||||||
|
PA14.Mode=Serial_Wire
|
||||||
|
PA14.Signal=SYS_JTCK-SWCLK
|
||||||
|
PA5.GPIOParameters=GPIO_Label
|
||||||
|
PA5.GPIO_Label=LD2 [green]
|
||||||
|
PA5.Locked=true
|
||||||
|
PA5.Signal=GPIO_Output
|
||||||
|
PB3.GPIOParameters=GPIO_Label
|
||||||
|
PB3.GPIO_Label=T_SWO
|
||||||
|
PB3.Locked=true
|
||||||
|
PB3.Signal=SYS_JTDO-SWO
|
||||||
|
PC13.GPIOParameters=GPIO_Label
|
||||||
|
PC13.GPIO_Label=B1 [blue push button]
|
||||||
|
PC13.Locked=true
|
||||||
|
PC13.Signal=GPXTI13
|
||||||
|
PC14-OSC32_IN.Locked=true
|
||||||
|
PC14-OSC32_IN.Mode=LSE-External-Oscillator
|
||||||
|
PC14-OSC32_IN.Signal=RCC_OSC32_IN
|
||||||
|
PC15-OSC32_OUT.Locked=true
|
||||||
|
PC15-OSC32_OUT.Mode=LSE-External-Oscillator
|
||||||
|
PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
|
||||||
|
PC4.GPIOParameters=GPIO_Label
|
||||||
|
PC4.GPIO_Label=USART1_TX [STLINKV3E_VCP_RX]
|
||||||
|
PC4.Locked=true
|
||||||
|
PC4.Mode=Asynchronous
|
||||||
|
PC4.Signal=USART1_TX
|
||||||
|
PC5.GPIOParameters=GPIO_Label
|
||||||
|
PC5.GPIO_Label=USART1_RX [STLINKV3E_VCP_TX]
|
||||||
|
PC5.Locked=true
|
||||||
|
PC5.Mode=Asynchronous
|
||||||
|
PC5.Signal=USART1_RX
|
||||||
|
PCC.Checker=true
|
||||||
|
PCC.Line=STM32G4x1
|
||||||
|
PCC.MCU=STM32G431R(6-8-B)Tx
|
||||||
|
PCC.PartNumber=STM32G431RBTx
|
||||||
|
PCC.Seq0=0
|
||||||
|
PCC.Series=STM32G4
|
||||||
|
PCC.Temperature=25
|
||||||
|
PCC.Vdd=3.0
|
||||||
|
PF0-OSC_IN.Locked=true
|
||||||
|
PF0-OSC_IN.Mode=HSE-External-Oscillator
|
||||||
|
PF0-OSC_IN.Signal=RCC_OSC_IN
|
||||||
|
PF1-OSC_OUT.Locked=true
|
||||||
|
PF1-OSC_OUT.Mode=HSE-External-Oscillator
|
||||||
|
PF1-OSC_OUT.Signal=RCC_OSC_OUT
|
||||||
|
PinOutPanel.RotationAngle=0
|
||||||
|
ProjectManager.AskForMigrate=true
|
||||||
|
ProjectManager.BackupPrevious=false
|
||||||
|
ProjectManager.CompilerOptimize=6
|
||||||
|
ProjectManager.ComputerToolchain=false
|
||||||
|
ProjectManager.CoupleFile=false
|
||||||
|
ProjectManager.CustomerFirmwarePackage=
|
||||||
|
ProjectManager.DefaultFWLocation=true
|
||||||
|
ProjectManager.DeletePrevious=true
|
||||||
|
ProjectManager.DeviceId=STM32G431RBTx
|
||||||
|
ProjectManager.FirmwarePackage=STM32Cube FW_G4 V1.1.0
|
||||||
|
ProjectManager.FreePins=false
|
||||||
|
ProjectManager.HalAssertFull=false
|
||||||
|
ProjectManager.HeapSize=0x200
|
||||||
|
ProjectManager.KeepUserCode=true
|
||||||
|
ProjectManager.LastFirmware=true
|
||||||
|
ProjectManager.LibraryCopy=0
|
||||||
|
ProjectManager.MainLocation=Src
|
||||||
|
ProjectManager.NoMain=false
|
||||||
|
ProjectManager.PreviousToolchain=
|
||||||
|
ProjectManager.ProjectBuild=false
|
||||||
|
ProjectManager.ProjectFileName=CubeMX_Config.ioc
|
||||||
|
ProjectManager.ProjectName=CubeMX_Config
|
||||||
|
ProjectManager.StackSize=0x400
|
||||||
|
ProjectManager.TargetToolchain=MDK-ARM V5
|
||||||
|
ProjectManager.ToolChainLocation=
|
||||||
|
ProjectManager.UnderRoot=false
|
||||||
|
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_USART1_UART_Init-USART1-false-HAL-true
|
||||||
|
RCC.ADC12Freq_Value=170000000
|
||||||
|
RCC.AHBFreq_Value=170000000
|
||||||
|
RCC.APB1Freq_Value=170000000
|
||||||
|
RCC.APB1TimFreq_Value=170000000
|
||||||
|
RCC.APB2Freq_Value=170000000
|
||||||
|
RCC.APB2TimFreq_Value=170000000
|
||||||
|
RCC.CRSFreq_Value=48000000
|
||||||
|
RCC.CortexFreq_Value=170000000
|
||||||
|
RCC.EXTERNAL_CLOCK_VALUE=12288000
|
||||||
|
RCC.FCLKCortexFreq_Value=170000000
|
||||||
|
RCC.FDCANFreq_Value=170000000
|
||||||
|
RCC.FamilyName=M
|
||||||
|
RCC.HCLKFreq_Value=170000000
|
||||||
|
RCC.HSE_VALUE=24000000
|
||||||
|
RCC.HSI48_VALUE=48000000
|
||||||
|
RCC.HSI_VALUE=16000000
|
||||||
|
RCC.I2C1Freq_Value=170000000
|
||||||
|
RCC.I2C2Freq_Value=170000000
|
||||||
|
RCC.I2C3Freq_Value=170000000
|
||||||
|
RCC.I2SFreq_Value=170000000
|
||||||
|
RCC.IPParameters=ADC12Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
|
||||||
|
RCC.LPTIM1Freq_Value=170000000
|
||||||
|
RCC.LPUART1Freq_Value=170000000
|
||||||
|
RCC.LSCOPinFreq_Value=32000
|
||||||
|
RCC.LSI_VALUE=32000
|
||||||
|
RCC.MCO1PinFreq_Value=16000000
|
||||||
|
RCC.PLLM=RCC_PLLM_DIV4
|
||||||
|
RCC.PLLN=85
|
||||||
|
RCC.PLLPoutputFreq_Value=170000000
|
||||||
|
RCC.PLLQoutputFreq_Value=170000000
|
||||||
|
RCC.PLLRCLKFreq_Value=170000000
|
||||||
|
RCC.PWRFreq_Value=170000000
|
||||||
|
RCC.RNGFreq_Value=170000000
|
||||||
|
RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
|
||||||
|
RCC.RTCFreq_Value=32768
|
||||||
|
RCC.SAI1Freq_Value=170000000
|
||||||
|
RCC.SYSCLKFreq_VALUE=170000000
|
||||||
|
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
|
||||||
|
RCC.UART4Freq_Value=170000000
|
||||||
|
RCC.USART1Freq_Value=170000000
|
||||||
|
RCC.USART2Freq_Value=170000000
|
||||||
|
RCC.USART3Freq_Value=170000000
|
||||||
|
RCC.USBFreq_Value=170000000
|
||||||
|
RCC.VCOInputFreq_Value=4000000
|
||||||
|
RCC.VCOOutputFreq_Value=340000000
|
||||||
|
SH.GPXTI13.0=GPIO_EXTI13
|
||||||
|
SH.GPXTI13.ConfNb=1
|
||||||
|
USART1.IPParameters=VirtualMode-Asynchronous,WordLength
|
||||||
|
USART1.VirtualMode-Asynchronous=VM_ASYNC
|
||||||
|
USART1.WordLength=WORDLENGTH_8B
|
||||||
|
VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals
|
||||||
|
VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals
|
||||||
|
VP_SYS_VS_Systick.Mode=SysTick
|
||||||
|
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
|
||||||
|
board=NUCLEO-G431RB
|
||||||
|
boardIOC=true
|
|
@ -0,0 +1,86 @@
|
||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file : main.h
|
||||||
|
* @brief : Header for main.c file.
|
||||||
|
* This file contains the common defines of the application.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __MAIN_H
|
||||||
|
#define __MAIN_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32g4xx_hal.h"
|
||||||
|
#include "stm32g4xx_ll_pwr.h"
|
||||||
|
|
||||||
|
/* Private includes ----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN ET */
|
||||||
|
|
||||||
|
/* USER CODE END ET */
|
||||||
|
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN EC */
|
||||||
|
|
||||||
|
/* USER CODE END EC */
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN EM */
|
||||||
|
|
||||||
|
/* USER CODE END EM */
|
||||||
|
|
||||||
|
/* Exported functions prototypes ---------------------------------------------*/
|
||||||
|
void Error_Handler(void);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN EFP */
|
||||||
|
|
||||||
|
/* USER CODE END EFP */
|
||||||
|
|
||||||
|
/* Private defines -----------------------------------------------------------*/
|
||||||
|
#define B1_Pin GPIO_PIN_13
|
||||||
|
#define B1_GPIO_Port GPIOC
|
||||||
|
#define LD2_Pin GPIO_PIN_5
|
||||||
|
#define LD2_GPIO_Port GPIOA
|
||||||
|
#define USART1_TX_Pin GPIO_PIN_4
|
||||||
|
#define USART1_TX_GPIO_Port GPIOC
|
||||||
|
#define USART1_RX_Pin GPIO_PIN_5
|
||||||
|
#define USART1_RX_GPIO_Port GPIOC
|
||||||
|
#define T_SWDIO_Pin GPIO_PIN_13
|
||||||
|
#define T_SWDIO_GPIO_Port GPIOA
|
||||||
|
#define T_SWCLK_Pin GPIO_PIN_14
|
||||||
|
#define T_SWCLK_GPIO_Port GPIOA
|
||||||
|
#define T_SWO_Pin GPIO_PIN_3
|
||||||
|
#define T_SWO_GPIO_Port GPIOB
|
||||||
|
/* USER CODE BEGIN Private defines */
|
||||||
|
|
||||||
|
/* USER CODE END Private defines */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __MAIN_H */
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,381 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32g4xx_hal_conf.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief HAL configuration file
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2018 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef STM32G4xx_HAL_CONF_H
|
||||||
|
#define STM32G4xx_HAL_CONF_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* ########################## Module Selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief This is the list of modules to be used in the HAL driver
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define HAL_MODULE_ENABLED
|
||||||
|
|
||||||
|
/*#define HAL_ADC_MODULE_ENABLED */
|
||||||
|
/*#define HAL_COMP_MODULE_ENABLED */
|
||||||
|
/*#define HAL_CORDIC_MODULE_ENABLED */
|
||||||
|
/*#define HAL_CRC_MODULE_ENABLED */
|
||||||
|
/*#define HAL_CRYP_MODULE_ENABLED */
|
||||||
|
/*#define HAL_DAC_MODULE_ENABLED */
|
||||||
|
/*#define HAL_FDCAN_MODULE_ENABLED */
|
||||||
|
/*#define HAL_FMAC_MODULE_ENABLED */
|
||||||
|
/*#define HAL_HRTIM_MODULE_ENABLED */
|
||||||
|
/*#define HAL_IRDA_MODULE_ENABLED */
|
||||||
|
/*#define HAL_IWDG_MODULE_ENABLED */
|
||||||
|
/*#define HAL_I2C_MODULE_ENABLED */
|
||||||
|
/*#define HAL_I2S_MODULE_ENABLED */
|
||||||
|
/*#define HAL_LPTIM_MODULE_ENABLED */
|
||||||
|
/*#define HAL_NAND_MODULE_ENABLED */
|
||||||
|
/*#define HAL_NOR_MODULE_ENABLED */
|
||||||
|
/*#define HAL_OPAMP_MODULE_ENABLED */
|
||||||
|
/*#define HAL_PCD_MODULE_ENABLED */
|
||||||
|
/*#define HAL_QSPI_MODULE_ENABLED */
|
||||||
|
/*#define HAL_RNG_MODULE_ENABLED */
|
||||||
|
/*#define HAL_RTC_MODULE_ENABLED */
|
||||||
|
/*#define HAL_SAI_MODULE_ENABLED */
|
||||||
|
/*#define HAL_SMARTCARD_MODULE_ENABLED */
|
||||||
|
/*#define HAL_SMBUS_MODULE_ENABLED */
|
||||||
|
/*#define HAL_SPI_MODULE_ENABLED */
|
||||||
|
/*#define HAL_SRAM_MODULE_ENABLED */
|
||||||
|
/*#define HAL_TIM_MODULE_ENABLED */
|
||||||
|
#define HAL_UART_MODULE_ENABLED
|
||||||
|
/*#define HAL_USART_MODULE_ENABLED */
|
||||||
|
/*#define HAL_WWDG_MODULE_ENABLED */
|
||||||
|
#define HAL_GPIO_MODULE_ENABLED
|
||||||
|
#define HAL_EXTI_MODULE_ENABLED
|
||||||
|
#define HAL_DMA_MODULE_ENABLED
|
||||||
|
#define HAL_RCC_MODULE_ENABLED
|
||||||
|
#define HAL_FLASH_MODULE_ENABLED
|
||||||
|
#define HAL_PWR_MODULE_ENABLED
|
||||||
|
#define HAL_CORTEX_MODULE_ENABLED
|
||||||
|
|
||||||
|
/* ########################## Register Callbacks selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief This is the list of modules where register callback can be used
|
||||||
|
*/
|
||||||
|
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_UART_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_USART_REGISTER_CALLBACKS 0U
|
||||||
|
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
|
||||||
|
|
||||||
|
/* ########################## Oscillator Values adaptation ####################*/
|
||||||
|
/**
|
||||||
|
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||||
|
* This value is used by the RCC HAL module to compute the system frequency
|
||||||
|
* (when HSE is used as system clock source, directly or through the PLL).
|
||||||
|
*/
|
||||||
|
#if !defined (HSE_VALUE)
|
||||||
|
#define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
|
||||||
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||||
|
#define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
|
||||||
|
#endif /* HSE_STARTUP_TIMEOUT */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal High Speed oscillator (HSI) value.
|
||||||
|
* This value is used by the RCC HAL module to compute the system frequency
|
||||||
|
* (when HSI is used as system clock source, directly or through the PLL).
|
||||||
|
*/
|
||||||
|
#if !defined (HSI_VALUE)
|
||||||
|
#define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
|
||||||
|
* This internal oscillator is mainly dedicated to provide a high precision clock to
|
||||||
|
* the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
|
||||||
|
* When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
|
||||||
|
* which is subject to manufacturing process variations.
|
||||||
|
*/
|
||||||
|
#if !defined (HSI48_VALUE)
|
||||||
|
#define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
|
||||||
|
The real value my vary depending on manufacturing process variations.*/
|
||||||
|
#endif /* HSI48_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal Low Speed oscillator (LSI) value.
|
||||||
|
*/
|
||||||
|
#if !defined (LSI_VALUE)
|
||||||
|
/*!< Value of the Internal Low Speed oscillator in Hz
|
||||||
|
The real value may vary depending on the variations in voltage and temperature.*/
|
||||||
|
#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
|
||||||
|
#endif /* LSI_VALUE */
|
||||||
|
/**
|
||||||
|
* @brief External Low Speed oscillator (LSE) value.
|
||||||
|
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||||
|
*/
|
||||||
|
#if !defined (LSE_VALUE)
|
||||||
|
#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
|
||||||
|
#endif /* LSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||||
|
#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
|
||||||
|
#endif /* LSE_STARTUP_TIMEOUT */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief External clock source for I2S and SAI peripherals
|
||||||
|
* This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
|
||||||
|
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||||
|
*/
|
||||||
|
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||||
|
#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
|
||||||
|
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||||
|
|
||||||
|
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||||
|
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||||
|
|
||||||
|
/* ########################### System Configuration ######################### */
|
||||||
|
/**
|
||||||
|
* @brief This is the HAL system configuration section
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
|
||||||
|
#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
|
||||||
|
#define USE_RTOS 0U
|
||||||
|
#define PREFETCH_ENABLE 0U
|
||||||
|
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||||
|
#define DATA_CACHE_ENABLE 1U
|
||||||
|
|
||||||
|
/* ########################## Assert Selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||||
|
* HAL drivers code
|
||||||
|
*/
|
||||||
|
/* #define USE_FULL_ASSERT 1U */
|
||||||
|
|
||||||
|
/* ################## SPI peripheral configuration ########################## */
|
||||||
|
|
||||||
|
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||||
|
* Activated: CRC code is present inside driver
|
||||||
|
* Deactivated: CRC code cleaned from driver
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USE_SPI_CRC 0U
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
/**
|
||||||
|
* @brief Include module's header file
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef HAL_RCC_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_rcc.h"
|
||||||
|
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_gpio.h"
|
||||||
|
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DMA_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_dma.h"
|
||||||
|
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_cortex.h"
|
||||||
|
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_ADC_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_adc.h"
|
||||||
|
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_COMP_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_comp.h"
|
||||||
|
#endif /* HAL_COMP_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CORDIC_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_cordic.h"
|
||||||
|
#endif /* HAL_CORDIC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CRC_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_crc.h"
|
||||||
|
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_cryp.h"
|
||||||
|
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DAC_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_dac.h"
|
||||||
|
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_exti.h"
|
||||||
|
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_FDCAN_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_fdcan.h"
|
||||||
|
#endif /* HAL_FDCAN_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_flash.h"
|
||||||
|
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_FMAC_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_fmac.h"
|
||||||
|
#endif /* HAL_FMAC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_HRTIM_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_hrtim.h"
|
||||||
|
#endif /* HAL_HRTIM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_irda.h"
|
||||||
|
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_iwdg.h"
|
||||||
|
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_I2C_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_i2c.h"
|
||||||
|
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_I2S_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_i2s.h"
|
||||||
|
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_lptim.h"
|
||||||
|
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_NAND_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_nand.h"
|
||||||
|
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_NOR_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_nor.h"
|
||||||
|
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_OPAMP_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_opamp.h"
|
||||||
|
#endif /* HAL_OPAMP_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PCD_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_pcd.h"
|
||||||
|
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PWR_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_pwr.h"
|
||||||
|
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_qspi.h"
|
||||||
|
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_RNG_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_rng.h"
|
||||||
|
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_RTC_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_rtc.h"
|
||||||
|
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SAI_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_sai.h"
|
||||||
|
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_smartcard.h"
|
||||||
|
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_smbus.h"
|
||||||
|
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SPI_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_spi.h"
|
||||||
|
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_sram.h"
|
||||||
|
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_TIM_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_tim.h"
|
||||||
|
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_UART_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_uart.h"
|
||||||
|
#endif /* HAL_UART_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_USART_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_usart.h"
|
||||||
|
#endif /* HAL_USART_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||||
|
#include "stm32g4xx_hal_wwdg.h"
|
||||||
|
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
/**
|
||||||
|
* @brief The assert_param macro is used for function's parameters check.
|
||||||
|
* @param expr: If expr is false, it calls assert_failed function
|
||||||
|
* which reports the name of the source file and the source
|
||||||
|
* line number of the call that failed.
|
||||||
|
* If expr is true, it returns no value.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||||
|
/* Exported functions ------------------------------------------------------- */
|
||||||
|
void assert_failed(uint8_t *file, uint32_t line);
|
||||||
|
#else
|
||||||
|
#define assert_param(expr) ((void)0U)
|
||||||
|
#endif /* USE_FULL_ASSERT */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* STM32G4xx_HAL_CONF_H */
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,69 @@
|
||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32g4xx_it.h
|
||||||
|
* @brief This file contains the headers of the interrupt handlers.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32G4xx_IT_H
|
||||||
|
#define __STM32G4xx_IT_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Private includes ----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN ET */
|
||||||
|
|
||||||
|
/* USER CODE END ET */
|
||||||
|
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN EC */
|
||||||
|
|
||||||
|
/* USER CODE END EC */
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN EM */
|
||||||
|
|
||||||
|
/* USER CODE END EM */
|
||||||
|
|
||||||
|
/* Exported functions prototypes ---------------------------------------------*/
|
||||||
|
void NMI_Handler(void);
|
||||||
|
void HardFault_Handler(void);
|
||||||
|
void MemManage_Handler(void);
|
||||||
|
void BusFault_Handler(void);
|
||||||
|
void UsageFault_Handler(void);
|
||||||
|
void SVC_Handler(void);
|
||||||
|
void DebugMon_Handler(void);
|
||||||
|
void PendSV_Handler(void);
|
||||||
|
void SysTick_Handler(void);
|
||||||
|
/* USER CODE BEGIN EFP */
|
||||||
|
|
||||||
|
/* USER CODE END EFP */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32G4xx_IT_H */
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,275 @@
|
||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file : main.c
|
||||||
|
* @brief : Main program body
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
|
||||||
|
/* Private includes ----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PTD */
|
||||||
|
|
||||||
|
/* USER CODE END PTD */
|
||||||
|
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PD */
|
||||||
|
|
||||||
|
/* USER CODE END PD */
|
||||||
|
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PM */
|
||||||
|
|
||||||
|
/* USER CODE END PM */
|
||||||
|
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
UART_HandleTypeDef huart1;
|
||||||
|
|
||||||
|
/* USER CODE BEGIN PV */
|
||||||
|
|
||||||
|
/* USER CODE END PV */
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
void SystemClock_Config(void);
|
||||||
|
static void MX_GPIO_Init(void);
|
||||||
|
static void MX_USART1_UART_Init(void);
|
||||||
|
/* USER CODE BEGIN PFP */
|
||||||
|
|
||||||
|
/* USER CODE END PFP */
|
||||||
|
|
||||||
|
/* Private user code ---------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief The application entry point.
|
||||||
|
* @retval int
|
||||||
|
*/
|
||||||
|
int main(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
|
|
||||||
|
|
||||||
|
/* MCU Configuration--------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
||||||
|
HAL_Init();
|
||||||
|
|
||||||
|
/* USER CODE BEGIN Init */
|
||||||
|
|
||||||
|
/* USER CODE END Init */
|
||||||
|
|
||||||
|
/* Configure the system clock */
|
||||||
|
SystemClock_Config();
|
||||||
|
|
||||||
|
/* USER CODE BEGIN SysInit */
|
||||||
|
|
||||||
|
/* USER CODE END SysInit */
|
||||||
|
|
||||||
|
/* Initialize all configured peripherals */
|
||||||
|
MX_GPIO_Init();
|
||||||
|
MX_USART1_UART_Init();
|
||||||
|
/* USER CODE BEGIN 2 */
|
||||||
|
|
||||||
|
/* USER CODE END 2 */
|
||||||
|
|
||||||
|
/* Infinite loop */
|
||||||
|
/* USER CODE BEGIN WHILE */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE END WHILE */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 3 */
|
||||||
|
}
|
||||||
|
/* USER CODE END 3 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief System Clock Configuration
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemClock_Config(void)
|
||||||
|
{
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||||
|
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
||||||
|
|
||||||
|
/** Configure the main internal regulator output voltage
|
||||||
|
*/
|
||||||
|
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
|
||||||
|
/** Initializes the CPU, AHB and APB busses clocks
|
||||||
|
*/
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
|
||||||
|
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||||
|
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 85;
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/** Initializes the CPU, AHB and APB busses clocks
|
||||||
|
*/
|
||||||
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||||
|
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/** Initializes the peripherals clocks
|
||||||
|
*/
|
||||||
|
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
|
||||||
|
PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief USART1 Initialization Function
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
static void MX_USART1_UART_Init(void)
|
||||||
|
{
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART1_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_Init 0 */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART1_Init 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_Init 1 */
|
||||||
|
huart1.Instance = USART1;
|
||||||
|
huart1.Init.BaudRate = 115200;
|
||||||
|
huart1.Init.WordLength = UART_WORDLENGTH_8B;
|
||||||
|
huart1.Init.StopBits = UART_STOPBITS_1;
|
||||||
|
huart1.Init.Parity = UART_PARITY_NONE;
|
||||||
|
huart1.Init.Mode = UART_MODE_TX_RX;
|
||||||
|
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
||||||
|
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
|
||||||
|
huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
|
||||||
|
huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
|
||||||
|
huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
|
||||||
|
if (HAL_UART_Init(&huart1) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/* USER CODE BEGIN USART1_Init 2 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_Init 2 */
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief GPIO Initialization Function
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
static void MX_GPIO_Init(void)
|
||||||
|
{
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
|
||||||
|
/* GPIO Ports Clock Enable */
|
||||||
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOF_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
|
|
||||||
|
/*Configure GPIO pin Output Level */
|
||||||
|
HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET);
|
||||||
|
|
||||||
|
/*Configure GPIO pin : B1_Pin */
|
||||||
|
GPIO_InitStruct.Pin = B1_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/*Configure GPIO pin : LD2_Pin */
|
||||||
|
GPIO_InitStruct.Pin = LD2_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
HAL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 4 */
|
||||||
|
|
||||||
|
/* USER CODE END 4 */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function is executed in case of error occurrence.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void Error_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN Error_Handler_Debug */
|
||||||
|
/* User can add his own implementation to report the HAL error return state */
|
||||||
|
|
||||||
|
/* USER CODE END Error_Handler_Debug */
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
/**
|
||||||
|
* @brief Reports the name of the source file and the source line number
|
||||||
|
* where the assert_param error has occurred.
|
||||||
|
* @param file: pointer to the source file name
|
||||||
|
* @param line: assert_param error line source number
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void assert_failed(uint8_t *file, uint32_t line)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN 6 */
|
||||||
|
/* User can add his own implementation to report the file name and line number,
|
||||||
|
tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
|
||||||
|
/* USER CODE END 6 */
|
||||||
|
}
|
||||||
|
#endif /* USE_FULL_ASSERT */
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,153 @@
|
||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* File Name : stm32g4xx_hal_msp.c
|
||||||
|
* Description : This file provides code for the MSP Initialization
|
||||||
|
* and de-Initialization codes.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN TD */
|
||||||
|
|
||||||
|
/* USER CODE END TD */
|
||||||
|
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Define */
|
||||||
|
|
||||||
|
/* USER CODE END Define */
|
||||||
|
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Macro */
|
||||||
|
|
||||||
|
/* USER CODE END Macro */
|
||||||
|
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PV */
|
||||||
|
|
||||||
|
/* USER CODE END PV */
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PFP */
|
||||||
|
|
||||||
|
/* USER CODE END PFP */
|
||||||
|
|
||||||
|
/* External functions --------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN ExternalFunctions */
|
||||||
|
|
||||||
|
/* USER CODE END ExternalFunctions */
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
/**
|
||||||
|
* Initializes the Global MSP.
|
||||||
|
*/
|
||||||
|
void HAL_MspInit(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END MspInit 0 */
|
||||||
|
|
||||||
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||||||
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* System interrupt init*/
|
||||||
|
|
||||||
|
/** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
|
||||||
|
*/
|
||||||
|
LL_PWR_DisableDeadBatteryPD();
|
||||||
|
|
||||||
|
/* USER CODE BEGIN MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END MspInit 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief UART MSP Initialization
|
||||||
|
* This function configures the hardware resources used in this example
|
||||||
|
* @param huart: UART handle pointer
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
|
||||||
|
{
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||||
|
if(huart->Instance==USART1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART1_MspInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_MspInit 0 */
|
||||||
|
/* Peripheral clock enable */
|
||||||
|
__HAL_RCC_USART1_CLK_ENABLE();
|
||||||
|
|
||||||
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||||
|
/**USART1 GPIO Configuration
|
||||||
|
PC4 ------> USART1_TX
|
||||||
|
PC5 ------> USART1_RX
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = USART1_TX_Pin|USART1_RX_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
|
||||||
|
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART1_MspInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_MspInit 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief UART MSP De-Initialization
|
||||||
|
* This function freeze the hardware resources used in this example
|
||||||
|
* @param huart: UART handle pointer
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
|
||||||
|
{
|
||||||
|
if(huart->Instance==USART1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN USART1_MspDeInit 0 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_MspDeInit 0 */
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_USART1_CLK_DISABLE();
|
||||||
|
|
||||||
|
/**USART1 GPIO Configuration
|
||||||
|
PC4 ------> USART1_TX
|
||||||
|
PC5 ------> USART1_RX
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(GPIOC, USART1_TX_Pin|USART1_RX_Pin);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN USART1_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END USART1_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,203 @@
|
||||||
|
/* USER CODE BEGIN Header */
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32g4xx_it.c
|
||||||
|
* @brief Interrupt Service Routines.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
/* USER CODE END Header */
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "main.h"
|
||||||
|
#include "stm32g4xx_it.h"
|
||||||
|
/* Private includes ----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN Includes */
|
||||||
|
/* USER CODE END Includes */
|
||||||
|
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN TD */
|
||||||
|
|
||||||
|
/* USER CODE END TD */
|
||||||
|
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PD */
|
||||||
|
|
||||||
|
/* USER CODE END PD */
|
||||||
|
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PM */
|
||||||
|
|
||||||
|
/* USER CODE END PM */
|
||||||
|
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PV */
|
||||||
|
|
||||||
|
/* USER CODE END PV */
|
||||||
|
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN PFP */
|
||||||
|
|
||||||
|
/* USER CODE END PFP */
|
||||||
|
|
||||||
|
/* Private user code ---------------------------------------------------------*/
|
||||||
|
/* USER CODE BEGIN 0 */
|
||||||
|
|
||||||
|
/* USER CODE END 0 */
|
||||||
|
|
||||||
|
/* External variables --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* USER CODE BEGIN EV */
|
||||||
|
|
||||||
|
/* USER CODE END EV */
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
/* Cortex-M4 Processor Interruption and Exception Handlers */
|
||||||
|
/******************************************************************************/
|
||||||
|
/**
|
||||||
|
* @brief This function handles Non maskable interrupt.
|
||||||
|
*/
|
||||||
|
void NMI_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||||
|
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Hard fault interrupt.
|
||||||
|
*/
|
||||||
|
void HardFault_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END HardFault_IRQn 0 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||||
|
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Memory management fault.
|
||||||
|
*/
|
||||||
|
void MemManage_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||||
|
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Prefetch fault, memory access fault.
|
||||||
|
*/
|
||||||
|
void BusFault_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END BusFault_IRQn 0 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||||
|
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Undefined instruction or illegal state.
|
||||||
|
*/
|
||||||
|
void UsageFault_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END UsageFault_IRQn 0 */
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||||
|
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles System service call via SWI instruction.
|
||||||
|
*/
|
||||||
|
void SVC_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN SVCall_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END SVCall_IRQn 0 */
|
||||||
|
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END SVCall_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Debug monitor.
|
||||||
|
*/
|
||||||
|
void DebugMon_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||||
|
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles Pendable request for system service.
|
||||||
|
*/
|
||||||
|
void PendSV_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END PendSV_IRQn 0 */
|
||||||
|
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END PendSV_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles System tick timer.
|
||||||
|
*/
|
||||||
|
void SysTick_Handler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END SysTick_IRQn 0 */
|
||||||
|
HAL_IncTick();
|
||||||
|
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END SysTick_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
/* STM32G4xx Peripheral Interrupt Handlers */
|
||||||
|
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||||
|
/* For the available peripheral interrupt handler names, */
|
||||||
|
/* please refer to the startup file (startup_stm32g4xx.s). */
|
||||||
|
/******************************************************************************/
|
||||||
|
|
||||||
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
|
/* USER CODE END 1 */
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
@ -0,0 +1,271 @@
|
||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file system_stm32g4xx.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
|
||||||
|
*
|
||||||
|
* This file provides two functions and one global variable to be called from
|
||||||
|
* user application:
|
||||||
|
* - SystemInit(): This function is called at startup just after reset and
|
||||||
|
* before branch to main program. This call is made inside
|
||||||
|
* the "startup_stm32g4xx.s" file.
|
||||||
|
*
|
||||||
|
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||||
|
* by the user application to setup the SysTick
|
||||||
|
* timer or configure other parameters.
|
||||||
|
*
|
||||||
|
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||||
|
* be called whenever the core clock is changed
|
||||||
|
* during program execution.
|
||||||
|
*
|
||||||
|
* After each device reset the HSI (16 MHz) is used as system clock source.
|
||||||
|
* Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
|
||||||
|
* configure the system clock before to branch to main program.
|
||||||
|
*
|
||||||
|
* This file configures the system clock as follows:
|
||||||
|
*=============================================================================
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* System Clock source | HSI
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* SYSCLK(Hz) | 16000000
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* HCLK(Hz) | 16000000
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* AHB Prescaler | 1
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* APB1 Prescaler | 1
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* APB2 Prescaler | 1
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLL_M | 1
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLL_N | 16
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLL_P | 7
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLL_Q | 2
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* PLL_R | 2
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
* Require 48MHz for RNG | Disabled
|
||||||
|
*-----------------------------------------------------------------------------
|
||||||
|
*=============================================================================
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup CMSIS
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup stm32g4xx_system
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32G4xx_System_Private_Includes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "stm32g4xx.h"
|
||||||
|
|
||||||
|
#if !defined (HSE_VALUE)
|
||||||
|
#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
|
||||||
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (HSI_VALUE)
|
||||||
|
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32G4xx_System_Private_Defines
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/************************* Miscellaneous Configuration ************************/
|
||||||
|
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||||
|
Internal SRAM. */
|
||||||
|
/* #define VECT_TAB_SRAM */
|
||||||
|
#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
|
||||||
|
This value must be a multiple of 0x200. */
|
||||||
|
/******************************************************************************/
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32G4xx_System_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32G4xx_System_Private_Variables
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* The SystemCoreClock variable is updated in three ways:
|
||||||
|
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||||
|
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||||
|
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||||
|
Note: If you use this function to configure the system clock; then there
|
||||||
|
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||||
|
variable is updated automatically.
|
||||||
|
*/
|
||||||
|
uint32_t SystemCoreClock = HSI_VALUE;
|
||||||
|
|
||||||
|
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
|
||||||
|
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup STM32G4xx_System_Private_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Setup the microcontroller system.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
|
||||||
|
void SystemInit(void)
|
||||||
|
{
|
||||||
|
/* FPU settings ------------------------------------------------------------*/
|
||||||
|
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||||
|
SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Configure the Vector Table location add offset address ------------------*/
|
||||||
|
#ifdef VECT_TAB_SRAM
|
||||||
|
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||||
|
#else
|
||||||
|
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||||
|
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||||
|
* be used by the user application to setup the SysTick timer or configure
|
||||||
|
* other parameters.
|
||||||
|
*
|
||||||
|
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||||
|
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||||
|
* based on this variable will be incorrect.
|
||||||
|
*
|
||||||
|
* @note - The system frequency computed by this function is not the real
|
||||||
|
* frequency in the chip. It is calculated based on the predefined
|
||||||
|
* constant and the selected clock source:
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
|
||||||
|
*
|
||||||
|
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
|
||||||
|
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||||
|
*
|
||||||
|
* (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
|
||||||
|
* 16 MHz) but the real value may vary depending on the variations
|
||||||
|
* in voltage and temperature.
|
||||||
|
*
|
||||||
|
* (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
|
||||||
|
* 8 MHz), user has to ensure that HSE_VALUE is same as the real
|
||||||
|
* frequency of the crystal used. Otherwise, this function may
|
||||||
|
* have wrong result.
|
||||||
|
*
|
||||||
|
* - The result of this function could be not correct when using fractional
|
||||||
|
* value for HSE crystal.
|
||||||
|
*
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
void SystemCoreClockUpdate(void)
|
||||||
|
{
|
||||||
|
uint32_t tmp, pllvco, pllr, pllsource, pllm;
|
||||||
|
|
||||||
|
/* Get SYSCLK source -------------------------------------------------------*/
|
||||||
|
switch (RCC->CFGR & RCC_CFGR_SWS)
|
||||||
|
{
|
||||||
|
case 0x04: /* HSI used as system clock source */
|
||||||
|
SystemCoreClock = HSI_VALUE;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x08: /* HSE used as system clock source */
|
||||||
|
SystemCoreClock = HSE_VALUE;
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 0x0C: /* PLL used as system clock source */
|
||||||
|
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
|
||||||
|
SYSCLK = PLL_VCO / PLLR
|
||||||
|
*/
|
||||||
|
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
|
||||||
|
pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
|
||||||
|
if (pllsource == 0x02UL) /* HSI used as PLL clock source */
|
||||||
|
{
|
||||||
|
pllvco = (HSI_VALUE / pllm);
|
||||||
|
}
|
||||||
|
else /* HSE used as PLL clock source */
|
||||||
|
{
|
||||||
|
pllvco = (HSE_VALUE / pllm);
|
||||||
|
}
|
||||||
|
pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
|
||||||
|
pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
|
||||||
|
SystemCoreClock = pllvco/pllr;
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
/* Compute HCLK clock frequency --------------------------------------------*/
|
||||||
|
/* Get HCLK prescaler */
|
||||||
|
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||||
|
/* HCLK clock frequency */
|
||||||
|
SystemCoreClock >>= tmp;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
|
@ -0,0 +1,43 @@
|
||||||
|
menu "Hardware Drivers Config"
|
||||||
|
|
||||||
|
config SOC_STM32G431RB
|
||||||
|
bool
|
||||||
|
select SOC_SERIES_STM32G4
|
||||||
|
select RT_USING_COMPONENTS_INIT
|
||||||
|
select RT_USING_USER_MAIN
|
||||||
|
default y
|
||||||
|
|
||||||
|
menu "Onboard Peripheral Drivers"
|
||||||
|
|
||||||
|
endmenu
|
||||||
|
|
||||||
|
menu "On-chip Peripheral Drivers"
|
||||||
|
|
||||||
|
config BSP_USING_GPIO
|
||||||
|
bool "Enable GPIO"
|
||||||
|
select RT_USING_PIN
|
||||||
|
default y
|
||||||
|
|
||||||
|
menuconfig BSP_USING_UART
|
||||||
|
bool "Enable UART"
|
||||||
|
default y
|
||||||
|
select RT_USING_SERIAL
|
||||||
|
if BSP_USING_UART
|
||||||
|
config BSP_USING_UART1
|
||||||
|
bool "Enable UART1"
|
||||||
|
default y
|
||||||
|
|
||||||
|
config BSP_UART1_RX_USING_DMA
|
||||||
|
bool "Enable UART1 RX DMA"
|
||||||
|
depends on BSP_USING_UART1 && RT_SERIAL_USING_DMA
|
||||||
|
default n
|
||||||
|
endif
|
||||||
|
source "../libraries/HAL_Drivers/Kconfig"
|
||||||
|
|
||||||
|
endmenu
|
||||||
|
|
||||||
|
menu "Board extended module Drivers"
|
||||||
|
|
||||||
|
endmenu
|
||||||
|
|
||||||
|
endmenu
|
|
@ -0,0 +1,30 @@
|
||||||
|
import os
|
||||||
|
import rtconfig
|
||||||
|
from building import *
|
||||||
|
|
||||||
|
Import('SDK_LIB')
|
||||||
|
|
||||||
|
cwd = GetCurrentDir()
|
||||||
|
|
||||||
|
# add general drivers
|
||||||
|
src = Split('''
|
||||||
|
board.c
|
||||||
|
CubeMX_Config/Src/stm32g4xx_hal_msp.c
|
||||||
|
''')
|
||||||
|
|
||||||
|
path = [cwd]
|
||||||
|
path += [cwd + '/CubeMX_Config/Inc']
|
||||||
|
|
||||||
|
startup_path_prefix = SDK_LIB
|
||||||
|
|
||||||
|
if rtconfig.CROSS_TOOL == 'gcc':
|
||||||
|
src += [startup_path_prefix + '/STM32G4xx_HAL/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g431xx.s']
|
||||||
|
elif rtconfig.CROSS_TOOL == 'keil':
|
||||||
|
src += [startup_path_prefix + '/STM32G4xx_HAL/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g431xx.s']
|
||||||
|
elif rtconfig.CROSS_TOOL == 'iar':
|
||||||
|
src += [startup_path_prefix + '/STM32G4xx_HAL/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g431xx.s']
|
||||||
|
|
||||||
|
CPPDEFINES = ['STM32G431xx']
|
||||||
|
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
|
||||||
|
|
||||||
|
Return('group')
|
|
@ -0,0 +1,60 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2018-11-06 SummerGift first version
|
||||||
|
* 2019-10-03 xuzhuoyi add stm32g431-st-nucleo bsp
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "board.h"
|
||||||
|
|
||||||
|
void SystemClock_Config(void)
|
||||||
|
{
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||||
|
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
|
||||||
|
|
||||||
|
/** Configure the main internal regulator output voltage
|
||||||
|
*/
|
||||||
|
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
|
||||||
|
/** Initializes the CPU, AHB and APB busses clocks
|
||||||
|
*/
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
|
||||||
|
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||||
|
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 85;
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
|
||||||
|
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
|
||||||
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/** Initializes the CPU, AHB and APB busses clocks
|
||||||
|
*/
|
||||||
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||||
|
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
|
||||||
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
/** Initializes the peripherals clocks
|
||||||
|
*/
|
||||||
|
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
|
||||||
|
PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
}
|
|
@ -0,0 +1,43 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2018-11-06 SummerGift first version
|
||||||
|
* 2019-01-08 AndeyQi add stm32f446-st-nucleo bsp
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __BOARD_H__
|
||||||
|
#define __BOARD_H__
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
#include <stm32g4xx.h>
|
||||||
|
#include "drv_common.h"
|
||||||
|
#include "drv_gpio.h"
|
||||||
|
|
||||||
|
#define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
|
||||||
|
#define STM32_FLASH_SIZE (128 * 1024)
|
||||||
|
#define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
|
||||||
|
|
||||||
|
#define STM32_SRAM_SIZE 32
|
||||||
|
#define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
|
||||||
|
|
||||||
|
#if defined(__CC_ARM) || defined(__CLANG_ARM)
|
||||||
|
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||||
|
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
|
||||||
|
#elif __ICCARM__
|
||||||
|
#pragma section="CSTACK"
|
||||||
|
#define HEAP_BEGIN (__segment_end("CSTACK"))
|
||||||
|
#else
|
||||||
|
extern int __bss_end;
|
||||||
|
#define HEAP_BEGIN (&__bss_end)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define HEAP_END STM32_SRAM_END
|
||||||
|
|
||||||
|
void SystemClock_Config(void);
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
|
@ -0,0 +1,28 @@
|
||||||
|
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||||
|
/*-Editor annotation file-*/
|
||||||
|
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||||
|
/*-Specials-*/
|
||||||
|
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
|
||||||
|
/*-Memory Regions-*/
|
||||||
|
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
|
||||||
|
define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
|
||||||
|
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
|
||||||
|
define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF;
|
||||||
|
/*-Sizes-*/
|
||||||
|
define symbol __ICFEDIT_size_cstack__ = 0x0400;
|
||||||
|
define symbol __ICFEDIT_size_heap__ = 0x0000;
|
||||||
|
/**** End of ICF editor section. ###ICF###*/
|
||||||
|
|
||||||
|
define memory mem with size = 4G;
|
||||||
|
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
|
||||||
|
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||||
|
|
||||||
|
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||||
|
|
||||||
|
initialize by copy { readwrite };
|
||||||
|
do not initialize { section .noinit };
|
||||||
|
|
||||||
|
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
|
||||||
|
|
||||||
|
place in ROM_region { readonly };
|
||||||
|
place in RAM_region { readwrite, last block CSTACK};
|
|
@ -0,0 +1,158 @@
|
||||||
|
/*
|
||||||
|
* linker script for STM32F4xx with GNU ld
|
||||||
|
* bernard.xiong 2009-10-14
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Program Entry, set to mark it as "used" and avoid gc */
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 512k /* 512KB flash */
|
||||||
|
RAM (rw) : ORIGIN = 0x20000000, LENGTH = 128k /* 128K sram */
|
||||||
|
}
|
||||||
|
ENTRY(Reset_Handler)
|
||||||
|
_system_stack_size = 0x200;
|
||||||
|
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
.text :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_stext = .;
|
||||||
|
KEEP(*(.isr_vector)) /* Startup code */
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
*(.text) /* remaining code */
|
||||||
|
*(.text.*) /* remaining code */
|
||||||
|
*(.rodata) /* read-only data (constants) */
|
||||||
|
*(.rodata*)
|
||||||
|
*(.glue_7)
|
||||||
|
*(.glue_7t)
|
||||||
|
*(.gnu.linkonce.t*)
|
||||||
|
|
||||||
|
/* section information for finsh shell */
|
||||||
|
. = ALIGN(4);
|
||||||
|
__fsymtab_start = .;
|
||||||
|
KEEP(*(FSymTab))
|
||||||
|
__fsymtab_end = .;
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
__vsymtab_start = .;
|
||||||
|
KEEP(*(VSymTab))
|
||||||
|
__vsymtab_end = .;
|
||||||
|
|
||||||
|
/* section information for initial. */
|
||||||
|
. = ALIGN(4);
|
||||||
|
__rt_init_start = .;
|
||||||
|
KEEP(*(SORT(.rti_fn*)))
|
||||||
|
__rt_init_end = .;
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
|
||||||
|
PROVIDE(__ctors_start__ = .);
|
||||||
|
KEEP (*(SORT(.init_array.*)))
|
||||||
|
KEEP (*(.init_array))
|
||||||
|
PROVIDE(__ctors_end__ = .);
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
|
||||||
|
_etext = .;
|
||||||
|
} > ROM = 0
|
||||||
|
|
||||||
|
/* .ARM.exidx is sorted, so has to go in its own output section. */
|
||||||
|
__exidx_start = .;
|
||||||
|
.ARM.exidx :
|
||||||
|
{
|
||||||
|
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||||
|
|
||||||
|
/* This is used by the startup in order to initialize the .data secion */
|
||||||
|
_sidata = .;
|
||||||
|
} > ROM
|
||||||
|
__exidx_end = .;
|
||||||
|
|
||||||
|
/* .data section which is used for initialized data */
|
||||||
|
|
||||||
|
.data : AT (_sidata)
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* This is used by the startup in order to initialize the .data secion */
|
||||||
|
_sdata = . ;
|
||||||
|
|
||||||
|
*(.data)
|
||||||
|
*(.data.*)
|
||||||
|
*(.gnu.linkonce.d*)
|
||||||
|
|
||||||
|
|
||||||
|
PROVIDE(__dtors_start__ = .);
|
||||||
|
KEEP(*(SORT(.dtors.*)))
|
||||||
|
KEEP(*(.dtors))
|
||||||
|
PROVIDE(__dtors_end__ = .);
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* This is used by the startup in order to initialize the .data secion */
|
||||||
|
_edata = . ;
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
.stack :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_sstack = .;
|
||||||
|
. = . + _system_stack_size;
|
||||||
|
. = ALIGN(4);
|
||||||
|
_estack = .;
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
__bss_start = .;
|
||||||
|
.bss :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* This is used by the startup in order to initialize the .bss secion */
|
||||||
|
_sbss = .;
|
||||||
|
|
||||||
|
*(.bss)
|
||||||
|
*(.bss.*)
|
||||||
|
*(COMMON)
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
/* This is used by the startup in order to initialize the .bss secion */
|
||||||
|
_ebss = . ;
|
||||||
|
|
||||||
|
*(.bss.init)
|
||||||
|
} > RAM
|
||||||
|
__bss_end = .;
|
||||||
|
|
||||||
|
_end = .;
|
||||||
|
|
||||||
|
/* Stabs debugging sections. */
|
||||||
|
.stab 0 : { *(.stab) }
|
||||||
|
.stabstr 0 : { *(.stabstr) }
|
||||||
|
.stab.excl 0 : { *(.stab.excl) }
|
||||||
|
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||||
|
.stab.index 0 : { *(.stab.index) }
|
||||||
|
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||||
|
.comment 0 : { *(.comment) }
|
||||||
|
/* DWARF debug sections.
|
||||||
|
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||||
|
* of the section so we begin them at 0. */
|
||||||
|
/* DWARF 1 */
|
||||||
|
.debug 0 : { *(.debug) }
|
||||||
|
.line 0 : { *(.line) }
|
||||||
|
/* GNU DWARF 1 extensions */
|
||||||
|
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||||
|
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||||
|
/* DWARF 1.1 and DWARF 2 */
|
||||||
|
.debug_aranges 0 : { *(.debug_aranges) }
|
||||||
|
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||||
|
/* DWARF 2 */
|
||||||
|
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||||
|
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||||
|
.debug_line 0 : { *(.debug_line) }
|
||||||
|
.debug_frame 0 : { *(.debug_frame) }
|
||||||
|
.debug_str 0 : { *(.debug_str) }
|
||||||
|
.debug_loc 0 : { *(.debug_loc) }
|
||||||
|
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||||
|
/* SGI/MIPS DWARF 2 extensions */
|
||||||
|
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||||
|
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||||
|
.debug_typenames 0 : { *(.debug_typenames) }
|
||||||
|
.debug_varnames 0 : { *(.debug_varnames) }
|
||||||
|
}
|
|
@ -0,0 +1,15 @@
|
||||||
|
; *************************************************************
|
||||||
|
; *** Scatter-Loading Description File generated by uVision ***
|
||||||
|
; *************************************************************
|
||||||
|
|
||||||
|
LR_IROM1 0x08000000 0x00080000 { ; load region size_region
|
||||||
|
ER_IROM1 0x08000000 0x00080000 { ; load address = execution address
|
||||||
|
*.o (RESET, +First)
|
||||||
|
*(InRoot$$Sections)
|
||||||
|
.ANY (+RO)
|
||||||
|
}
|
||||||
|
RW_IRAM1 0x20000000 0x00020000 { ; RW data
|
||||||
|
.ANY (+RW +ZI)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
Binary file not shown.
After Width: | Height: | Size: 56 KiB |
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,10 @@
|
||||||
|
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||||
|
|
||||||
|
<workspace>
|
||||||
|
<project>
|
||||||
|
<path>$WS_DIR$\project.ewp</path>
|
||||||
|
</project>
|
||||||
|
<batchBuild/>
|
||||||
|
</workspace>
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,952 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>1.0</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Extensions>
|
||||||
|
<cExt>*.c</cExt>
|
||||||
|
<aExt>*.s*; *.src; *.a*</aExt>
|
||||||
|
<oExt>*.obj; *.o</oExt>
|
||||||
|
<lExt>*.lib</lExt>
|
||||||
|
<tExt>*.txt; *.h; *.inc</tExt>
|
||||||
|
<pExt>*.plm</pExt>
|
||||||
|
<CppX>*.cpp</CppX>
|
||||||
|
<nMigrate>0</nMigrate>
|
||||||
|
</Extensions>
|
||||||
|
|
||||||
|
<DaveTm>
|
||||||
|
<dwLowDateTime>0</dwLowDateTime>
|
||||||
|
<dwHighDateTime>0</dwHighDateTime>
|
||||||
|
</DaveTm>
|
||||||
|
|
||||||
|
<Target>
|
||||||
|
<TargetName>rt-thread</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<TargetOption>
|
||||||
|
<CLKADS>12000000</CLKADS>
|
||||||
|
<OPTTT>
|
||||||
|
<gFlags>1</gFlags>
|
||||||
|
<BeepAtEnd>1</BeepAtEnd>
|
||||||
|
<RunSim>0</RunSim>
|
||||||
|
<RunTarget>1</RunTarget>
|
||||||
|
<RunAbUc>0</RunAbUc>
|
||||||
|
</OPTTT>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<FlashByte>65535</FlashByte>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
</OPTHX>
|
||||||
|
<OPTLEX>
|
||||||
|
<PageWidth>79</PageWidth>
|
||||||
|
<PageLength>66</PageLength>
|
||||||
|
<TabStop>8</TabStop>
|
||||||
|
<ListingPath>.\build\keil\List\</ListingPath>
|
||||||
|
</OPTLEX>
|
||||||
|
<ListingPage>
|
||||||
|
<CreateCListing>1</CreateCListing>
|
||||||
|
<CreateAListing>1</CreateAListing>
|
||||||
|
<CreateLListing>1</CreateLListing>
|
||||||
|
<CreateIListing>0</CreateIListing>
|
||||||
|
<AsmCond>1</AsmCond>
|
||||||
|
<AsmSymb>1</AsmSymb>
|
||||||
|
<AsmXref>0</AsmXref>
|
||||||
|
<CCond>1</CCond>
|
||||||
|
<CCode>0</CCode>
|
||||||
|
<CListInc>0</CListInc>
|
||||||
|
<CSymb>0</CSymb>
|
||||||
|
<LinkerCodeListing>0</LinkerCodeListing>
|
||||||
|
</ListingPage>
|
||||||
|
<OPTXL>
|
||||||
|
<LMap>1</LMap>
|
||||||
|
<LComments>1</LComments>
|
||||||
|
<LGenerateSymbols>1</LGenerateSymbols>
|
||||||
|
<LLibSym>1</LLibSym>
|
||||||
|
<LLines>1</LLines>
|
||||||
|
<LLocSym>1</LLocSym>
|
||||||
|
<LPubSym>1</LPubSym>
|
||||||
|
<LXref>0</LXref>
|
||||||
|
<LExpSel>0</LExpSel>
|
||||||
|
</OPTXL>
|
||||||
|
<OPTFL>
|
||||||
|
<tvExp>1</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<IsCurrentTarget>1</IsCurrentTarget>
|
||||||
|
</OPTFL>
|
||||||
|
<CpuCode>18</CpuCode>
|
||||||
|
<DebugOpt>
|
||||||
|
<uSim>0</uSim>
|
||||||
|
<uTrg>1</uTrg>
|
||||||
|
<sLdApp>1</sLdApp>
|
||||||
|
<sGomain>1</sGomain>
|
||||||
|
<sRbreak>1</sRbreak>
|
||||||
|
<sRwatch>1</sRwatch>
|
||||||
|
<sRmem>1</sRmem>
|
||||||
|
<sRfunc>1</sRfunc>
|
||||||
|
<sRbox>1</sRbox>
|
||||||
|
<tLdApp>1</tLdApp>
|
||||||
|
<tGomain>1</tGomain>
|
||||||
|
<tRbreak>1</tRbreak>
|
||||||
|
<tRwatch>1</tRwatch>
|
||||||
|
<tRmem>1</tRmem>
|
||||||
|
<tRfunc>0</tRfunc>
|
||||||
|
<tRbox>1</tRbox>
|
||||||
|
<tRtrace>1</tRtrace>
|
||||||
|
<sRSysVw>1</sRSysVw>
|
||||||
|
<tRSysVw>1</tRSysVw>
|
||||||
|
<sRunDeb>0</sRunDeb>
|
||||||
|
<sLrtime>0</sLrtime>
|
||||||
|
<bEvRecOn>1</bEvRecOn>
|
||||||
|
<bSchkAxf>0</bSchkAxf>
|
||||||
|
<bTchkAxf>0</bTchkAxf>
|
||||||
|
<nTsel>11</nTsel>
|
||||||
|
<sDll></sDll>
|
||||||
|
<sDllPa></sDllPa>
|
||||||
|
<sDlgDll></sDlgDll>
|
||||||
|
<sDlgPa></sDlgPa>
|
||||||
|
<sIfile></sIfile>
|
||||||
|
<tDll></tDll>
|
||||||
|
<tDllPa></tDllPa>
|
||||||
|
<tDlgDll></tDlgDll>
|
||||||
|
<tDlgPa></tDlgPa>
|
||||||
|
<tIfile></tIfile>
|
||||||
|
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
|
||||||
|
</DebugOpt>
|
||||||
|
<TargetDriverDllRegistry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>ARMRTXEVENTFLAGS</Key>
|
||||||
|
<Name>-L70 -Z18 -C0 -M0 -T1</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>DLGTARM</Key>
|
||||||
|
<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>ARMDBGFLAGS</Key>
|
||||||
|
<Name></Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>DLGUARM</Key>
|
||||||
|
<Name>(105=-1,-1,-1,-1,0)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>ST-LINKIII-KEIL_SWO</Key>
|
||||||
|
<Name>-U004600413137511233333639 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32G431RBTx$CMSIS\Flash\STM32G4xx_128.FLM)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>UL2CM3</Key>
|
||||||
|
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32G4xx_128 -FL020000 -FS08000000 -FP0($$Device:STM32G431RBTx$CMSIS\Flash\STM32G4xx_128.FLM)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
</TargetDriverDllRegistry>
|
||||||
|
<Breakpoint/>
|
||||||
|
<Tracepoint>
|
||||||
|
<THDelay>0</THDelay>
|
||||||
|
</Tracepoint>
|
||||||
|
<DebugFlag>
|
||||||
|
<trace>0</trace>
|
||||||
|
<periodic>0</periodic>
|
||||||
|
<aLwin>1</aLwin>
|
||||||
|
<aCover>0</aCover>
|
||||||
|
<aSer1>0</aSer1>
|
||||||
|
<aSer2>0</aSer2>
|
||||||
|
<aPa>0</aPa>
|
||||||
|
<viewmode>1</viewmode>
|
||||||
|
<vrSel>0</vrSel>
|
||||||
|
<aSym>0</aSym>
|
||||||
|
<aTbox>0</aTbox>
|
||||||
|
<AscS1>0</AscS1>
|
||||||
|
<AscS2>0</AscS2>
|
||||||
|
<AscS3>0</AscS3>
|
||||||
|
<aSer3>0</aSer3>
|
||||||
|
<eProf>0</eProf>
|
||||||
|
<aLa>0</aLa>
|
||||||
|
<aPa1>0</aPa1>
|
||||||
|
<AscS4>0</AscS4>
|
||||||
|
<aSer4>0</aSer4>
|
||||||
|
<StkLoc>0</StkLoc>
|
||||||
|
<TrcWin>0</TrcWin>
|
||||||
|
<newCpu>0</newCpu>
|
||||||
|
<uProt>0</uProt>
|
||||||
|
</DebugFlag>
|
||||||
|
<LintExecutable></LintExecutable>
|
||||||
|
<LintConfigFile></LintConfigFile>
|
||||||
|
<bLintAuto>0</bLintAuto>
|
||||||
|
<bAutoGenD>0</bAutoGenD>
|
||||||
|
<LntExFlags>0</LntExFlags>
|
||||||
|
<pMisraName></pMisraName>
|
||||||
|
<pszMrule></pszMrule>
|
||||||
|
<pSingCmds></pSingCmds>
|
||||||
|
<pMultCmds></pMultCmds>
|
||||||
|
<pMisraNamep></pMisraNamep>
|
||||||
|
<pszMrulep></pszMrulep>
|
||||||
|
<pSingCmdsp></pSingCmdsp>
|
||||||
|
<pMultCmdsp></pMultCmdsp>
|
||||||
|
<DebugDescription>
|
||||||
|
<Enable>1</Enable>
|
||||||
|
<EnableFlashSeq>0</EnableFlashSeq>
|
||||||
|
<EnableLog>0</EnableLog>
|
||||||
|
<Protocol>2</Protocol>
|
||||||
|
<DbgClock>10000000</DbgClock>
|
||||||
|
</DebugDescription>
|
||||||
|
</TargetOption>
|
||||||
|
</Target>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>Kernel</GroupName>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>1</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\clock.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>clock.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>2</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\components.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>components.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>3</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\device.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>device.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>4</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\idle.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>idle.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>5</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\ipc.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>ipc.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>6</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\irq.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>irq.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>7</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\kservice.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>kservice.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>8</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\mem.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>mem.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>9</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\mempool.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>mempool.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>10</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\object.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>object.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>11</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\scheduler.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>scheduler.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>12</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\signal.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>signal.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>13</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\thread.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>thread.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>1</GroupNumber>
|
||||||
|
<FileNumber>14</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\src\timer.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>timer.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>Applications</GroupName>
|
||||||
|
<tvExp>1</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>2</GroupNumber>
|
||||||
|
<FileNumber>15</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>applications\main.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>main.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>Drivers</GroupName>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>3</GroupNumber>
|
||||||
|
<FileNumber>16</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>1</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>board\board.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>board.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>3</GroupNumber>
|
||||||
|
<FileNumber>17</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>board\CubeMX_Config\Src\stm32g4xx_hal_msp.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_msp.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>3</GroupNumber>
|
||||||
|
<FileNumber>18</FileNumber>
|
||||||
|
<FileType>2</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\CMSIS\Device\ST\STM32G4xx\Source\Templates\arm\startup_stm32g431xx.s</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>startup_stm32g431xx.s</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>3</GroupNumber>
|
||||||
|
<FileNumber>19</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\HAL_Drivers\drv_gpio.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>drv_gpio.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>3</GroupNumber>
|
||||||
|
<FileNumber>20</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\HAL_Drivers\drv_usart.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>drv_usart.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>3</GroupNumber>
|
||||||
|
<FileNumber>21</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\HAL_Drivers\drv_common.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>drv_common.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>cpu</GroupName>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>4</GroupNumber>
|
||||||
|
<FileNumber>22</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\libcpu\arm\common\backtrace.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>backtrace.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>4</GroupNumber>
|
||||||
|
<FileNumber>23</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\libcpu\arm\common\div0.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>div0.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>4</GroupNumber>
|
||||||
|
<FileNumber>24</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\libcpu\arm\common\showmem.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>showmem.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>4</GroupNumber>
|
||||||
|
<FileNumber>25</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\libcpu\arm\cortex-m4\cpuport.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>cpuport.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>4</GroupNumber>
|
||||||
|
<FileNumber>26</FileNumber>
|
||||||
|
<FileType>2</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>context_rvds.S</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>DeviceDrivers</GroupName>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>5</GroupNumber>
|
||||||
|
<FileNumber>27</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\components\drivers\misc\pin.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>pin.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>5</GroupNumber>
|
||||||
|
<FileNumber>28</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\components\drivers\serial\serial.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>serial.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>5</GroupNumber>
|
||||||
|
<FileNumber>29</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\components\drivers\src\completion.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>completion.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>5</GroupNumber>
|
||||||
|
<FileNumber>30</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\components\drivers\src\dataqueue.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>dataqueue.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>5</GroupNumber>
|
||||||
|
<FileNumber>31</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\components\drivers\src\pipe.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>pipe.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>5</GroupNumber>
|
||||||
|
<FileNumber>32</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\components\drivers\src\ringblk_buf.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>ringblk_buf.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>5</GroupNumber>
|
||||||
|
<FileNumber>33</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\components\drivers\src\ringbuffer.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>ringbuffer.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>5</GroupNumber>
|
||||||
|
<FileNumber>34</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\components\drivers\src\waitqueue.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>waitqueue.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>5</GroupNumber>
|
||||||
|
<FileNumber>35</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\components\drivers\src\workqueue.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>workqueue.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>finsh</GroupName>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>6</GroupNumber>
|
||||||
|
<FileNumber>36</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\components\finsh\shell.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>shell.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>6</GroupNumber>
|
||||||
|
<FileNumber>37</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\components\finsh\cmd.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>cmd.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>6</GroupNumber>
|
||||||
|
<FileNumber>38</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\components\finsh\msh.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>msh.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>libc</GroupName>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>7</GroupNumber>
|
||||||
|
<FileNumber>39</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\..\..\components\libc\compilers\common\time.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>time.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>STM32_HAL</GroupName>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>40</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>system_stm32g4xx.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>41</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>42</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cortex.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_cortex.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>43</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_crc.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_crc.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>44</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cryp.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_cryp.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>45</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cryp_ex.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_cryp_ex.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>46</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_dma.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>47</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma_ex.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_dma_ex.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>48</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_pwr.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>49</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr_ex.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_pwr_ex.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>50</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_rcc.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>51</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc_ex.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_rcc_ex.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>52</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rng.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_rng.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>53</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_gpio.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_gpio.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>54</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_uart.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>55</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart_ex.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_uart_ex.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>56</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_usart.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_usart.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<GroupNumber>8</GroupNumber>
|
||||||
|
<FileNumber>57</FileNumber>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<bDave2>0</bDave2>
|
||||||
|
<PathWithFileName>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_usart_ex.c</PathWithFileName>
|
||||||
|
<FilenameWithoutPath>stm32g4xx_hal_usart_ex.c</FilenameWithoutPath>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
<bShared>0</bShared>
|
||||||
|
</File>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
</ProjectOpt>
|
|
@ -0,0 +1,717 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>2.1</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Targets>
|
||||||
|
<Target>
|
||||||
|
<TargetName>rt-thread</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||||
|
<uAC6>0</uAC6>
|
||||||
|
<TargetOption>
|
||||||
|
<TargetCommonOption>
|
||||||
|
<Device>STM32G431RBTx</Device>
|
||||||
|
<Vendor>STMicroelectronics</Vendor>
|
||||||
|
<PackID>Keil.STM32G4xx_DFP.1.1.0</PackID>
|
||||||
|
<PackURL>http://www.keil.com/pack</PackURL>
|
||||||
|
<Cpu>IRAM(0x20000000,0x00008000) IROM(0x08000000,0x00020000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
|
||||||
|
<FlashUtilSpec></FlashUtilSpec>
|
||||||
|
<StartupFile></StartupFile>
|
||||||
|
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_128 -FS08000000 -FL020000 -FP0($$Device:STM32G431RBTx$CMSIS\Flash\STM32G4xx_128.FLM))</FlashDriverDll>
|
||||||
|
<DeviceId>0</DeviceId>
|
||||||
|
<RegisterFile>$$Device:STM32G431RBTx$Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g4xx.h</RegisterFile>
|
||||||
|
<MemoryEnv></MemoryEnv>
|
||||||
|
<Cmp></Cmp>
|
||||||
|
<Asm></Asm>
|
||||||
|
<Linker></Linker>
|
||||||
|
<OHString></OHString>
|
||||||
|
<InfinionOptionDll></InfinionOptionDll>
|
||||||
|
<SLE66CMisc></SLE66CMisc>
|
||||||
|
<SLE66AMisc></SLE66AMisc>
|
||||||
|
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||||
|
<SFDFile>$$Device:STM32G431RBTx$CMSIS\SVD\STM32G431xx.svd</SFDFile>
|
||||||
|
<bCustSvd>0</bCustSvd>
|
||||||
|
<UseEnv>0</UseEnv>
|
||||||
|
<BinPath></BinPath>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
<LibPath></LibPath>
|
||||||
|
<RegisterFilePath></RegisterFilePath>
|
||||||
|
<DBRegisterFilePath></DBRegisterFilePath>
|
||||||
|
<TargetStatus>
|
||||||
|
<Error>0</Error>
|
||||||
|
<ExitCodeStop>0</ExitCodeStop>
|
||||||
|
<ButtonStop>0</ButtonStop>
|
||||||
|
<NotGenerated>0</NotGenerated>
|
||||||
|
<InvalidFlash>1</InvalidFlash>
|
||||||
|
</TargetStatus>
|
||||||
|
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
|
||||||
|
<OutputName>rt-thread</OutputName>
|
||||||
|
<CreateExecutable>1</CreateExecutable>
|
||||||
|
<CreateLib>0</CreateLib>
|
||||||
|
<CreateHexFile>0</CreateHexFile>
|
||||||
|
<DebugInformation>1</DebugInformation>
|
||||||
|
<BrowseInformation>1</BrowseInformation>
|
||||||
|
<ListingPath>.\build\keil\List\</ListingPath>
|
||||||
|
<HexFormatSelection>1</HexFormatSelection>
|
||||||
|
<Merge32K>0</Merge32K>
|
||||||
|
<CreateBatchFile>0</CreateBatchFile>
|
||||||
|
<BeforeCompile>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopU1X>0</nStopU1X>
|
||||||
|
<nStopU2X>0</nStopU2X>
|
||||||
|
</BeforeCompile>
|
||||||
|
<BeforeMake>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopB1X>0</nStopB1X>
|
||||||
|
<nStopB2X>0</nStopB2X>
|
||||||
|
</BeforeMake>
|
||||||
|
<AfterMake>
|
||||||
|
<RunUserProg1>1</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopA1X>0</nStopA1X>
|
||||||
|
<nStopA2X>0</nStopA2X>
|
||||||
|
</AfterMake>
|
||||||
|
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||||
|
<SVCSIdString></SVCSIdString>
|
||||||
|
</TargetCommonOption>
|
||||||
|
<CommonProperty>
|
||||||
|
<UseCPPCompiler>0</UseCPPCompiler>
|
||||||
|
<RVCTCodeConst>0</RVCTCodeConst>
|
||||||
|
<RVCTZI>0</RVCTZI>
|
||||||
|
<RVCTOtherData>0</RVCTOtherData>
|
||||||
|
<ModuleSelection>0</ModuleSelection>
|
||||||
|
<IncludeInBuild>1</IncludeInBuild>
|
||||||
|
<AlwaysBuild>0</AlwaysBuild>
|
||||||
|
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||||
|
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||||
|
<PublicsOnly>0</PublicsOnly>
|
||||||
|
<StopOnExitCode>3</StopOnExitCode>
|
||||||
|
<CustomArgument></CustomArgument>
|
||||||
|
<IncludeLibraryModules></IncludeLibraryModules>
|
||||||
|
<ComprImg>1</ComprImg>
|
||||||
|
</CommonProperty>
|
||||||
|
<DllOption>
|
||||||
|
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||||
|
<SimDllArguments> -REMAP -MPU</SimDllArguments>
|
||||||
|
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||||
|
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||||
|
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||||
|
<TargetDllArguments> -MPU</TargetDllArguments>
|
||||||
|
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||||
|
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||||
|
</DllOption>
|
||||||
|
<DebugOption>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
<Oh166RecLen>16</Oh166RecLen>
|
||||||
|
</OPTHX>
|
||||||
|
</DebugOption>
|
||||||
|
<Utilities>
|
||||||
|
<Flash1>
|
||||||
|
<UseTargetDll>1</UseTargetDll>
|
||||||
|
<UseExternalTool>0</UseExternalTool>
|
||||||
|
<RunIndependent>0</RunIndependent>
|
||||||
|
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||||
|
<Capability>1</Capability>
|
||||||
|
<DriverSelection>4096</DriverSelection>
|
||||||
|
</Flash1>
|
||||||
|
<bUseTDR>1</bUseTDR>
|
||||||
|
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||||
|
<Flash3>"" ()</Flash3>
|
||||||
|
<Flash4></Flash4>
|
||||||
|
<pFcarmOut></pFcarmOut>
|
||||||
|
<pFcarmGrp></pFcarmGrp>
|
||||||
|
<pFcArmRoot></pFcArmRoot>
|
||||||
|
<FcArmLst>0</FcArmLst>
|
||||||
|
</Utilities>
|
||||||
|
<TargetArmAds>
|
||||||
|
<ArmAdsMisc>
|
||||||
|
<GenerateListings>0</GenerateListings>
|
||||||
|
<asHll>1</asHll>
|
||||||
|
<asAsm>1</asAsm>
|
||||||
|
<asMacX>1</asMacX>
|
||||||
|
<asSyms>1</asSyms>
|
||||||
|
<asFals>1</asFals>
|
||||||
|
<asDbgD>1</asDbgD>
|
||||||
|
<asForm>1</asForm>
|
||||||
|
<ldLst>0</ldLst>
|
||||||
|
<ldmm>1</ldmm>
|
||||||
|
<ldXref>1</ldXref>
|
||||||
|
<BigEnd>0</BigEnd>
|
||||||
|
<AdsALst>1</AdsALst>
|
||||||
|
<AdsACrf>1</AdsACrf>
|
||||||
|
<AdsANop>0</AdsANop>
|
||||||
|
<AdsANot>0</AdsANot>
|
||||||
|
<AdsLLst>1</AdsLLst>
|
||||||
|
<AdsLmap>1</AdsLmap>
|
||||||
|
<AdsLcgr>1</AdsLcgr>
|
||||||
|
<AdsLsym>1</AdsLsym>
|
||||||
|
<AdsLszi>1</AdsLszi>
|
||||||
|
<AdsLtoi>1</AdsLtoi>
|
||||||
|
<AdsLsun>1</AdsLsun>
|
||||||
|
<AdsLven>1</AdsLven>
|
||||||
|
<AdsLsxf>1</AdsLsxf>
|
||||||
|
<RvctClst>0</RvctClst>
|
||||||
|
<GenPPlst>0</GenPPlst>
|
||||||
|
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||||
|
<RvctDeviceName></RvctDeviceName>
|
||||||
|
<mOS>0</mOS>
|
||||||
|
<uocRom>0</uocRom>
|
||||||
|
<uocRam>0</uocRam>
|
||||||
|
<hadIROM>1</hadIROM>
|
||||||
|
<hadIRAM>1</hadIRAM>
|
||||||
|
<hadXRAM>0</hadXRAM>
|
||||||
|
<uocXRam>0</uocXRam>
|
||||||
|
<RvdsVP>2</RvdsVP>
|
||||||
|
<RvdsMve>0</RvdsMve>
|
||||||
|
<hadIRAM2>0</hadIRAM2>
|
||||||
|
<hadIROM2>0</hadIROM2>
|
||||||
|
<StupSel>8</StupSel>
|
||||||
|
<useUlib>0</useUlib>
|
||||||
|
<EndSel>0</EndSel>
|
||||||
|
<uLtcg>0</uLtcg>
|
||||||
|
<nSecure>0</nSecure>
|
||||||
|
<RoSelD>3</RoSelD>
|
||||||
|
<RwSelD>3</RwSelD>
|
||||||
|
<CodeSel>0</CodeSel>
|
||||||
|
<OptFeed>0</OptFeed>
|
||||||
|
<NoZi1>0</NoZi1>
|
||||||
|
<NoZi2>0</NoZi2>
|
||||||
|
<NoZi3>0</NoZi3>
|
||||||
|
<NoZi4>0</NoZi4>
|
||||||
|
<NoZi5>0</NoZi5>
|
||||||
|
<Ro1Chk>0</Ro1Chk>
|
||||||
|
<Ro2Chk>0</Ro2Chk>
|
||||||
|
<Ro3Chk>0</Ro3Chk>
|
||||||
|
<Ir1Chk>1</Ir1Chk>
|
||||||
|
<Ir2Chk>0</Ir2Chk>
|
||||||
|
<Ra1Chk>0</Ra1Chk>
|
||||||
|
<Ra2Chk>0</Ra2Chk>
|
||||||
|
<Ra3Chk>0</Ra3Chk>
|
||||||
|
<Im1Chk>1</Im1Chk>
|
||||||
|
<Im2Chk>0</Im2Chk>
|
||||||
|
<OnChipMemories>
|
||||||
|
<Ocm1>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm1>
|
||||||
|
<Ocm2>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm2>
|
||||||
|
<Ocm3>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm3>
|
||||||
|
<Ocm4>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm4>
|
||||||
|
<Ocm5>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm5>
|
||||||
|
<Ocm6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm6>
|
||||||
|
<IRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x8000</Size>
|
||||||
|
</IRAM>
|
||||||
|
<IROM>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8000000</StartAddress>
|
||||||
|
<Size>0x20000</Size>
|
||||||
|
</IROM>
|
||||||
|
<XRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</XRAM>
|
||||||
|
<OCR_RVCT1>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT1>
|
||||||
|
<OCR_RVCT2>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT2>
|
||||||
|
<OCR_RVCT3>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT3>
|
||||||
|
<OCR_RVCT4>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8000000</StartAddress>
|
||||||
|
<Size>0x20000</Size>
|
||||||
|
</OCR_RVCT4>
|
||||||
|
<OCR_RVCT5>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT5>
|
||||||
|
<OCR_RVCT6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT6>
|
||||||
|
<OCR_RVCT7>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT7>
|
||||||
|
<OCR_RVCT8>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT8>
|
||||||
|
<OCR_RVCT9>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x8000</Size>
|
||||||
|
</OCR_RVCT9>
|
||||||
|
<OCR_RVCT10>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT10>
|
||||||
|
</OnChipMemories>
|
||||||
|
<RvctStartVector></RvctStartVector>
|
||||||
|
</ArmAdsMisc>
|
||||||
|
<Cads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Optim>1</Optim>
|
||||||
|
<oTime>0</oTime>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<OneElfS>1</OneElfS>
|
||||||
|
<Strict>0</Strict>
|
||||||
|
<EnumInt>0</EnumInt>
|
||||||
|
<PlainCh>0</PlainCh>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<wLevel>2</wLevel>
|
||||||
|
<uThumb>0</uThumb>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<uC99>1</uC99>
|
||||||
|
<uGnu>0</uGnu>
|
||||||
|
<useXO>0</useXO>
|
||||||
|
<v6Lang>1</v6Lang>
|
||||||
|
<v6LangP>1</v6LangP>
|
||||||
|
<vShortEn>1</vShortEn>
|
||||||
|
<vShortWch>1</vShortWch>
|
||||||
|
<v6Lto>0</v6Lto>
|
||||||
|
<v6WtE>0</v6WtE>
|
||||||
|
<v6Rtti>0</v6Rtti>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define>USE_HAL_DRIVER, STM32G431xx</Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath>.;..\..\..\include;applications;.;board;board\CubeMX_Config\Inc;..\libraries\HAL_Drivers;..\libraries\HAL_Drivers\config;..\..\..\libcpu\arm\common;..\..\..\libcpu\arm\cortex-m4;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\compilers\common;..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Inc;..\libraries\STM32G4xx_HAL\CMSIS\Device\ST\STM32G4xx\Include;..\libraries\STM32G4xx_HAL\CMSIS\Include</IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Cads>
|
||||||
|
<Aads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<thumb>0</thumb>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<SwStkChk>0</SwStkChk>
|
||||||
|
<NoWarn>0</NoWarn>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<useXO>0</useXO>
|
||||||
|
<uClangAs>0</uClangAs>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Aads>
|
||||||
|
<LDads>
|
||||||
|
<umfTarg>0</umfTarg>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<noStLib>0</noStLib>
|
||||||
|
<RepFail>1</RepFail>
|
||||||
|
<useFile>0</useFile>
|
||||||
|
<TextAddressRange>0x08000000</TextAddressRange>
|
||||||
|
<DataAddressRange>0x20000000</DataAddressRange>
|
||||||
|
<pXoBase></pXoBase>
|
||||||
|
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
|
||||||
|
<IncludeLibs></IncludeLibs>
|
||||||
|
<IncludeLibsPath></IncludeLibsPath>
|
||||||
|
<Misc></Misc>
|
||||||
|
<LinkerInputFile></LinkerInputFile>
|
||||||
|
<DisabledWarnings></DisabledWarnings>
|
||||||
|
</LDads>
|
||||||
|
</TargetArmAds>
|
||||||
|
</TargetOption>
|
||||||
|
<Groups>
|
||||||
|
<Group>
|
||||||
|
<GroupName>Kernel</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>clock.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\clock.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>components.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\components.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>device.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\device.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>idle.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\idle.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>ipc.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\ipc.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>irq.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\irq.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>kservice.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\kservice.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>mem.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\mem.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>mempool.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\mempool.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>object.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\object.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>scheduler.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\scheduler.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>signal.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\signal.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>thread.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\thread.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>timer.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\src\timer.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>Applications</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>main.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>applications\main.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>Drivers</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>board.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>board\board.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_msp.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>board\CubeMX_Config\Src\stm32g4xx_hal_msp.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>startup_stm32g431xx.s</FileName>
|
||||||
|
<FileType>2</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\CMSIS\Device\ST\STM32G4xx\Source\Templates\arm\startup_stm32g431xx.s</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>drv_gpio.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\HAL_Drivers\drv_gpio.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>drv_usart.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\HAL_Drivers\drv_usart.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>drv_common.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\HAL_Drivers\drv_common.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>cpu</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>backtrace.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\libcpu\arm\common\backtrace.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>div0.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\libcpu\arm\common\div0.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>showmem.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\libcpu\arm\common\showmem.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>cpuport.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\libcpu\arm\cortex-m4\cpuport.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>context_rvds.S</FileName>
|
||||||
|
<FileType>2</FileType>
|
||||||
|
<FilePath>..\..\..\libcpu\arm\cortex-m4\context_rvds.S</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>DeviceDrivers</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>pin.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>serial.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\components\drivers\serial\serial.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>completion.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\components\drivers\src\completion.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>dataqueue.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\components\drivers\src\dataqueue.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>pipe.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\components\drivers\src\pipe.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>ringblk_buf.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\components\drivers\src\ringblk_buf.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>ringbuffer.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\components\drivers\src\ringbuffer.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>waitqueue.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\components\drivers\src\waitqueue.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>workqueue.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\components\drivers\src\workqueue.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>finsh</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>shell.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\components\finsh\shell.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>cmd.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\components\finsh\cmd.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>msh.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\components\finsh\msh.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>libc</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>time.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\..\..\components\libc\compilers\common\time.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
<Group>
|
||||||
|
<GroupName>STM32_HAL</GroupName>
|
||||||
|
<Files>
|
||||||
|
<File>
|
||||||
|
<FileName>system_stm32g4xx.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\CMSIS\Device\ST\STM32G4xx\Source\Templates\system_stm32g4xx.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_cortex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cortex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_crc.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_crc.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_cryp.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cryp.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_cryp_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_cryp_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_dma.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_dma_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_dma_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_pwr.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_pwr_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_pwr_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_rcc.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_rcc_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rcc_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_rng.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_rng.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_gpio.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_gpio.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_uart.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_uart_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_uart_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_usart.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_usart.c</FilePath>
|
||||||
|
</File>
|
||||||
|
<File>
|
||||||
|
<FileName>stm32g4xx_hal_usart_ex.c</FileName>
|
||||||
|
<FileType>1</FileType>
|
||||||
|
<FilePath>..\libraries\STM32G4xx_HAL\STM32G4xx_HAL_Driver\Src\stm32g4xx_hal_usart_ex.c</FilePath>
|
||||||
|
</File>
|
||||||
|
</Files>
|
||||||
|
</Group>
|
||||||
|
</Groups>
|
||||||
|
</Target>
|
||||||
|
</Targets>
|
||||||
|
|
||||||
|
<RTE>
|
||||||
|
<apis/>
|
||||||
|
<components/>
|
||||||
|
<files/>
|
||||||
|
</RTE>
|
||||||
|
|
||||||
|
</Project>
|
|
@ -0,0 +1,170 @@
|
||||||
|
#ifndef RT_CONFIG_H__
|
||||||
|
#define RT_CONFIG_H__
|
||||||
|
|
||||||
|
/* Automatically generated file; DO NOT EDIT. */
|
||||||
|
/* RT-Thread Configuration */
|
||||||
|
|
||||||
|
/* RT-Thread Kernel */
|
||||||
|
|
||||||
|
#define RT_NAME_MAX 8
|
||||||
|
#define RT_ALIGN_SIZE 4
|
||||||
|
#define RT_THREAD_PRIORITY_32
|
||||||
|
#define RT_THREAD_PRIORITY_MAX 32
|
||||||
|
#define RT_TICK_PER_SECOND 1000
|
||||||
|
#define RT_USING_OVERFLOW_CHECK
|
||||||
|
#define RT_USING_HOOK
|
||||||
|
#define RT_USING_IDLE_HOOK
|
||||||
|
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||||
|
#define IDLE_THREAD_STACK_SIZE 256
|
||||||
|
#define RT_DEBUG
|
||||||
|
#define RT_DEBUG_COLOR
|
||||||
|
|
||||||
|
/* Inter-Thread communication */
|
||||||
|
|
||||||
|
#define RT_USING_SEMAPHORE
|
||||||
|
#define RT_USING_MUTEX
|
||||||
|
#define RT_USING_EVENT
|
||||||
|
#define RT_USING_MAILBOX
|
||||||
|
#define RT_USING_MESSAGEQUEUE
|
||||||
|
|
||||||
|
/* Memory Management */
|
||||||
|
|
||||||
|
#define RT_USING_MEMPOOL
|
||||||
|
#define RT_USING_SMALL_MEM
|
||||||
|
#define RT_USING_HEAP
|
||||||
|
|
||||||
|
/* Kernel Device Object */
|
||||||
|
|
||||||
|
#define RT_USING_DEVICE
|
||||||
|
#define RT_USING_CONSOLE
|
||||||
|
#define RT_CONSOLEBUF_SIZE 128
|
||||||
|
#define RT_CONSOLE_DEVICE_NAME "uart1"
|
||||||
|
#define RT_VER_NUM 0x40002
|
||||||
|
#define ARCH_ARM
|
||||||
|
#define RT_USING_CPU_FFS
|
||||||
|
#define ARCH_ARM_CORTEX_M
|
||||||
|
#define ARCH_ARM_CORTEX_M4
|
||||||
|
|
||||||
|
/* RT-Thread Components */
|
||||||
|
|
||||||
|
#define RT_USING_COMPONENTS_INIT
|
||||||
|
#define RT_USING_USER_MAIN
|
||||||
|
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||||
|
#define RT_MAIN_THREAD_PRIORITY 10
|
||||||
|
|
||||||
|
/* C++ features */
|
||||||
|
|
||||||
|
|
||||||
|
/* Command shell */
|
||||||
|
|
||||||
|
#define RT_USING_FINSH
|
||||||
|
#define FINSH_THREAD_NAME "tshell"
|
||||||
|
#define FINSH_USING_HISTORY
|
||||||
|
#define FINSH_HISTORY_LINES 5
|
||||||
|
#define FINSH_USING_SYMTAB
|
||||||
|
#define FINSH_USING_DESCRIPTION
|
||||||
|
#define FINSH_THREAD_PRIORITY 20
|
||||||
|
#define FINSH_THREAD_STACK_SIZE 4096
|
||||||
|
#define FINSH_CMD_SIZE 80
|
||||||
|
#define FINSH_USING_MSH
|
||||||
|
#define FINSH_USING_MSH_DEFAULT
|
||||||
|
#define FINSH_USING_MSH_ONLY
|
||||||
|
#define FINSH_ARG_MAX 10
|
||||||
|
|
||||||
|
/* Device virtual file system */
|
||||||
|
|
||||||
|
|
||||||
|
/* Device Drivers */
|
||||||
|
|
||||||
|
#define RT_USING_DEVICE_IPC
|
||||||
|
#define RT_PIPE_BUFSZ 512
|
||||||
|
#define RT_USING_SERIAL
|
||||||
|
#define RT_SERIAL_USING_DMA
|
||||||
|
#define RT_SERIAL_RB_BUFSZ 64
|
||||||
|
#define RT_USING_PIN
|
||||||
|
|
||||||
|
/* Using USB */
|
||||||
|
|
||||||
|
|
||||||
|
/* POSIX layer and C standard library */
|
||||||
|
|
||||||
|
#define RT_LIBC_USING_TIME
|
||||||
|
|
||||||
|
/* Network */
|
||||||
|
|
||||||
|
/* Socket abstraction layer */
|
||||||
|
|
||||||
|
|
||||||
|
/* Network interface device */
|
||||||
|
|
||||||
|
|
||||||
|
/* light weight TCP/IP stack */
|
||||||
|
|
||||||
|
|
||||||
|
/* AT commands */
|
||||||
|
|
||||||
|
|
||||||
|
/* VBUS(Virtual Software BUS) */
|
||||||
|
|
||||||
|
|
||||||
|
/* Utilities */
|
||||||
|
|
||||||
|
|
||||||
|
/* RT-Thread online packages */
|
||||||
|
|
||||||
|
/* IoT - internet of things */
|
||||||
|
|
||||||
|
|
||||||
|
/* Wi-Fi */
|
||||||
|
|
||||||
|
/* Marvell WiFi */
|
||||||
|
|
||||||
|
|
||||||
|
/* Wiced WiFi */
|
||||||
|
|
||||||
|
|
||||||
|
/* IoT Cloud */
|
||||||
|
|
||||||
|
|
||||||
|
/* security packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* language packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* multimedia packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* tools packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* system packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* peripheral libraries and drivers */
|
||||||
|
|
||||||
|
|
||||||
|
/* miscellaneous packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* samples: kernel and components samples */
|
||||||
|
|
||||||
|
#define SOC_FAMILY_STM32
|
||||||
|
#define SOC_SERIES_STM32G4
|
||||||
|
|
||||||
|
/* Hardware Drivers Config */
|
||||||
|
|
||||||
|
#define SOC_STM32G431RB
|
||||||
|
|
||||||
|
/* Onboard Peripheral Drivers */
|
||||||
|
|
||||||
|
/* On-chip Peripheral Drivers */
|
||||||
|
|
||||||
|
#define BSP_USING_GPIO
|
||||||
|
#define BSP_USING_UART
|
||||||
|
#define BSP_USING_UART1
|
||||||
|
|
||||||
|
/* Board extended module Drivers */
|
||||||
|
|
||||||
|
|
||||||
|
#endif
|
|
@ -0,0 +1,143 @@
|
||||||
|
import os
|
||||||
|
|
||||||
|
# toolchains options
|
||||||
|
ARCH='arm'
|
||||||
|
CPU='cortex-m4'
|
||||||
|
CROSS_TOOL='gcc'
|
||||||
|
|
||||||
|
# bsp lib config
|
||||||
|
BSP_LIBRARY_TYPE = None
|
||||||
|
|
||||||
|
if os.getenv('RTT_CC'):
|
||||||
|
CROSS_TOOL = os.getenv('RTT_CC')
|
||||||
|
if os.getenv('RTT_ROOT'):
|
||||||
|
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||||
|
|
||||||
|
# cross_tool provides the cross compiler
|
||||||
|
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
|
||||||
|
if CROSS_TOOL == 'gcc':
|
||||||
|
PLATFORM = 'gcc'
|
||||||
|
EXEC_PATH = r'C:\Users\XXYYZZ'
|
||||||
|
elif CROSS_TOOL == 'keil':
|
||||||
|
PLATFORM = 'armcc'
|
||||||
|
EXEC_PATH = r'C:/Keil_v5'
|
||||||
|
elif CROSS_TOOL == 'iar':
|
||||||
|
PLATFORM = 'iar'
|
||||||
|
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
|
||||||
|
|
||||||
|
if os.getenv('RTT_EXEC_PATH'):
|
||||||
|
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||||
|
|
||||||
|
BUILD = 'debug'
|
||||||
|
|
||||||
|
if PLATFORM == 'gcc':
|
||||||
|
# toolchains
|
||||||
|
PREFIX = 'arm-none-eabi-'
|
||||||
|
CC = PREFIX + 'gcc'
|
||||||
|
AS = PREFIX + 'gcc'
|
||||||
|
AR = PREFIX + 'ar'
|
||||||
|
CXX = PREFIX + 'g++'
|
||||||
|
LINK = PREFIX + 'gcc'
|
||||||
|
TARGET_EXT = 'elf'
|
||||||
|
SIZE = PREFIX + 'size'
|
||||||
|
OBJDUMP = PREFIX + 'objdump'
|
||||||
|
OBJCPY = PREFIX + 'objcopy'
|
||||||
|
|
||||||
|
DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
|
||||||
|
CFLAGS = DEVICE + ' -Dgcc'
|
||||||
|
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
|
||||||
|
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rt-thread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
|
||||||
|
|
||||||
|
CPATH = ''
|
||||||
|
LPATH = ''
|
||||||
|
|
||||||
|
if BUILD == 'debug':
|
||||||
|
CFLAGS += ' -O0 -gdwarf-2 -g'
|
||||||
|
AFLAGS += ' -gdwarf-2'
|
||||||
|
else:
|
||||||
|
CFLAGS += ' -O2'
|
||||||
|
|
||||||
|
CXXFLAGS = CFLAGS
|
||||||
|
|
||||||
|
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||||
|
|
||||||
|
elif PLATFORM == 'armcc':
|
||||||
|
# toolchains
|
||||||
|
CC = 'armcc'
|
||||||
|
CXX = 'armcc'
|
||||||
|
AS = 'armasm'
|
||||||
|
AR = 'armar'
|
||||||
|
LINK = 'armlink'
|
||||||
|
TARGET_EXT = 'axf'
|
||||||
|
|
||||||
|
DEVICE = ' --cpu Cortex-M4.fp '
|
||||||
|
CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
|
||||||
|
AFLAGS = DEVICE + ' --apcs=interwork '
|
||||||
|
LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rt-thread.map --strict'
|
||||||
|
CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
|
||||||
|
LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
|
||||||
|
|
||||||
|
CFLAGS += ' -D__MICROLIB '
|
||||||
|
AFLAGS += ' --pd "__MICROLIB SETA 1" '
|
||||||
|
LFLAGS += ' --library_type=microlib '
|
||||||
|
EXEC_PATH += '/ARM/ARMCC/bin/'
|
||||||
|
|
||||||
|
if BUILD == 'debug':
|
||||||
|
CFLAGS += ' -g -O0'
|
||||||
|
AFLAGS += ' -g'
|
||||||
|
else:
|
||||||
|
CFLAGS += ' -O2'
|
||||||
|
|
||||||
|
CXXFLAGS = CFLAGS
|
||||||
|
CFLAGS += ' -std=c99'
|
||||||
|
|
||||||
|
POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
|
||||||
|
|
||||||
|
elif PLATFORM == 'iar':
|
||||||
|
# toolchains
|
||||||
|
CC = 'iccarm'
|
||||||
|
CXX = 'iccarm'
|
||||||
|
AS = 'iasmarm'
|
||||||
|
AR = 'iarchive'
|
||||||
|
LINK = 'ilinkarm'
|
||||||
|
TARGET_EXT = 'out'
|
||||||
|
|
||||||
|
DEVICE = '-Dewarm'
|
||||||
|
|
||||||
|
CFLAGS = DEVICE
|
||||||
|
CFLAGS += ' --diag_suppress Pa050'
|
||||||
|
CFLAGS += ' --no_cse'
|
||||||
|
CFLAGS += ' --no_unroll'
|
||||||
|
CFLAGS += ' --no_inline'
|
||||||
|
CFLAGS += ' --no_code_motion'
|
||||||
|
CFLAGS += ' --no_tbaa'
|
||||||
|
CFLAGS += ' --no_clustering'
|
||||||
|
CFLAGS += ' --no_scheduling'
|
||||||
|
CFLAGS += ' --endian=little'
|
||||||
|
CFLAGS += ' --cpu=Cortex-M4'
|
||||||
|
CFLAGS += ' -e'
|
||||||
|
CFLAGS += ' --fpu=VFPv4_sp'
|
||||||
|
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
|
||||||
|
CFLAGS += ' --silent'
|
||||||
|
|
||||||
|
AFLAGS = DEVICE
|
||||||
|
AFLAGS += ' -s+'
|
||||||
|
AFLAGS += ' -w+'
|
||||||
|
AFLAGS += ' -r'
|
||||||
|
AFLAGS += ' --cpu Cortex-M4'
|
||||||
|
AFLAGS += ' --fpu VFPv4_sp'
|
||||||
|
AFLAGS += ' -S'
|
||||||
|
|
||||||
|
if BUILD == 'debug':
|
||||||
|
CFLAGS += ' --debug'
|
||||||
|
CFLAGS += ' -On'
|
||||||
|
else:
|
||||||
|
CFLAGS += ' -Oh'
|
||||||
|
|
||||||
|
LFLAGS = ' --config "board/linker_scripts/link.icf"'
|
||||||
|
LFLAGS += ' --entry __iar_program_start'
|
||||||
|
|
||||||
|
CXXFLAGS = CFLAGS
|
||||||
|
|
||||||
|
EXEC_PATH = EXEC_PATH + '/arm/bin/'
|
||||||
|
POST_ACTION = 'ielftool --bin $TARGET rtthread.bin'
|
File diff suppressed because it is too large
Load Diff
|
@ -0,0 +1,10 @@
|
||||||
|
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||||
|
|
||||||
|
<workspace>
|
||||||
|
<project>
|
||||||
|
<path>$WS_DIR$\template.ewp</path>
|
||||||
|
</project>
|
||||||
|
<batchBuild/>
|
||||||
|
</workspace>
|
||||||
|
|
||||||
|
|
|
@ -0,0 +1,192 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>1.0</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Extensions>
|
||||||
|
<cExt>*.c</cExt>
|
||||||
|
<aExt>*.s*; *.src; *.a*</aExt>
|
||||||
|
<oExt>*.obj; *.o</oExt>
|
||||||
|
<lExt>*.lib</lExt>
|
||||||
|
<tExt>*.txt; *.h; *.inc</tExt>
|
||||||
|
<pExt>*.plm</pExt>
|
||||||
|
<CppX>*.cpp</CppX>
|
||||||
|
<nMigrate>0</nMigrate>
|
||||||
|
</Extensions>
|
||||||
|
|
||||||
|
<DaveTm>
|
||||||
|
<dwLowDateTime>0</dwLowDateTime>
|
||||||
|
<dwHighDateTime>0</dwHighDateTime>
|
||||||
|
</DaveTm>
|
||||||
|
|
||||||
|
<Target>
|
||||||
|
<TargetName>rt-thread</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<TargetOption>
|
||||||
|
<CLKADS>12000000</CLKADS>
|
||||||
|
<OPTTT>
|
||||||
|
<gFlags>1</gFlags>
|
||||||
|
<BeepAtEnd>1</BeepAtEnd>
|
||||||
|
<RunSim>0</RunSim>
|
||||||
|
<RunTarget>1</RunTarget>
|
||||||
|
<RunAbUc>0</RunAbUc>
|
||||||
|
</OPTTT>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<FlashByte>65535</FlashByte>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
</OPTHX>
|
||||||
|
<OPTLEX>
|
||||||
|
<PageWidth>79</PageWidth>
|
||||||
|
<PageLength>66</PageLength>
|
||||||
|
<TabStop>8</TabStop>
|
||||||
|
<ListingPath>.\build\keil\List\</ListingPath>
|
||||||
|
</OPTLEX>
|
||||||
|
<ListingPage>
|
||||||
|
<CreateCListing>1</CreateCListing>
|
||||||
|
<CreateAListing>1</CreateAListing>
|
||||||
|
<CreateLListing>1</CreateLListing>
|
||||||
|
<CreateIListing>0</CreateIListing>
|
||||||
|
<AsmCond>1</AsmCond>
|
||||||
|
<AsmSymb>1</AsmSymb>
|
||||||
|
<AsmXref>0</AsmXref>
|
||||||
|
<CCond>1</CCond>
|
||||||
|
<CCode>0</CCode>
|
||||||
|
<CListInc>0</CListInc>
|
||||||
|
<CSymb>0</CSymb>
|
||||||
|
<LinkerCodeListing>0</LinkerCodeListing>
|
||||||
|
</ListingPage>
|
||||||
|
<OPTXL>
|
||||||
|
<LMap>1</LMap>
|
||||||
|
<LComments>1</LComments>
|
||||||
|
<LGenerateSymbols>1</LGenerateSymbols>
|
||||||
|
<LLibSym>1</LLibSym>
|
||||||
|
<LLines>1</LLines>
|
||||||
|
<LLocSym>1</LLocSym>
|
||||||
|
<LPubSym>1</LPubSym>
|
||||||
|
<LXref>0</LXref>
|
||||||
|
<LExpSel>0</LExpSel>
|
||||||
|
</OPTXL>
|
||||||
|
<OPTFL>
|
||||||
|
<tvExp>1</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<IsCurrentTarget>1</IsCurrentTarget>
|
||||||
|
</OPTFL>
|
||||||
|
<CpuCode>18</CpuCode>
|
||||||
|
<DebugOpt>
|
||||||
|
<uSim>0</uSim>
|
||||||
|
<uTrg>1</uTrg>
|
||||||
|
<sLdApp>1</sLdApp>
|
||||||
|
<sGomain>1</sGomain>
|
||||||
|
<sRbreak>1</sRbreak>
|
||||||
|
<sRwatch>1</sRwatch>
|
||||||
|
<sRmem>1</sRmem>
|
||||||
|
<sRfunc>1</sRfunc>
|
||||||
|
<sRbox>1</sRbox>
|
||||||
|
<tLdApp>1</tLdApp>
|
||||||
|
<tGomain>1</tGomain>
|
||||||
|
<tRbreak>1</tRbreak>
|
||||||
|
<tRwatch>1</tRwatch>
|
||||||
|
<tRmem>1</tRmem>
|
||||||
|
<tRfunc>0</tRfunc>
|
||||||
|
<tRbox>1</tRbox>
|
||||||
|
<tRtrace>1</tRtrace>
|
||||||
|
<sRSysVw>1</sRSysVw>
|
||||||
|
<tRSysVw>1</tRSysVw>
|
||||||
|
<sRunDeb>0</sRunDeb>
|
||||||
|
<sLrtime>0</sLrtime>
|
||||||
|
<bEvRecOn>1</bEvRecOn>
|
||||||
|
<bSchkAxf>0</bSchkAxf>
|
||||||
|
<bTchkAxf>0</bTchkAxf>
|
||||||
|
<nTsel>11</nTsel>
|
||||||
|
<sDll></sDll>
|
||||||
|
<sDllPa></sDllPa>
|
||||||
|
<sDlgDll></sDlgDll>
|
||||||
|
<sDlgPa></sDlgPa>
|
||||||
|
<sIfile></sIfile>
|
||||||
|
<tDll></tDll>
|
||||||
|
<tDllPa></tDllPa>
|
||||||
|
<tDlgDll></tDlgDll>
|
||||||
|
<tDlgPa></tDlgPa>
|
||||||
|
<tIfile></tIfile>
|
||||||
|
<pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
|
||||||
|
</DebugOpt>
|
||||||
|
<TargetDriverDllRegistry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>ST-LINKIII-KEIL_SWO</Key>
|
||||||
|
<Name>-U004600413137511233333639 -O206 -SF10000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP (ARM Core") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_128.FLM -FS08000000 -FL020000 -FP0($$Device:STM32G431RBTx$CMSIS\Flash\STM32G4xx_128.FLM)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
<SetRegEntry>
|
||||||
|
<Number>0</Number>
|
||||||
|
<Key>UL2CM3</Key>
|
||||||
|
<Name>UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0STM32G4xx_128 -FL020000 -FS08000000 -FP0($$Device:STM32G431RBTx$CMSIS\Flash\STM32G4xx_128.FLM)</Name>
|
||||||
|
</SetRegEntry>
|
||||||
|
</TargetDriverDllRegistry>
|
||||||
|
<Breakpoint/>
|
||||||
|
<Tracepoint>
|
||||||
|
<THDelay>0</THDelay>
|
||||||
|
</Tracepoint>
|
||||||
|
<DebugFlag>
|
||||||
|
<trace>0</trace>
|
||||||
|
<periodic>0</periodic>
|
||||||
|
<aLwin>0</aLwin>
|
||||||
|
<aCover>0</aCover>
|
||||||
|
<aSer1>0</aSer1>
|
||||||
|
<aSer2>0</aSer2>
|
||||||
|
<aPa>0</aPa>
|
||||||
|
<viewmode>0</viewmode>
|
||||||
|
<vrSel>0</vrSel>
|
||||||
|
<aSym>0</aSym>
|
||||||
|
<aTbox>0</aTbox>
|
||||||
|
<AscS1>0</AscS1>
|
||||||
|
<AscS2>0</AscS2>
|
||||||
|
<AscS3>0</AscS3>
|
||||||
|
<aSer3>0</aSer3>
|
||||||
|
<eProf>0</eProf>
|
||||||
|
<aLa>0</aLa>
|
||||||
|
<aPa1>0</aPa1>
|
||||||
|
<AscS4>0</AscS4>
|
||||||
|
<aSer4>0</aSer4>
|
||||||
|
<StkLoc>0</StkLoc>
|
||||||
|
<TrcWin>0</TrcWin>
|
||||||
|
<newCpu>0</newCpu>
|
||||||
|
<uProt>0</uProt>
|
||||||
|
</DebugFlag>
|
||||||
|
<LintExecutable></LintExecutable>
|
||||||
|
<LintConfigFile></LintConfigFile>
|
||||||
|
<bLintAuto>0</bLintAuto>
|
||||||
|
<bAutoGenD>0</bAutoGenD>
|
||||||
|
<LntExFlags>0</LntExFlags>
|
||||||
|
<pMisraName></pMisraName>
|
||||||
|
<pszMrule></pszMrule>
|
||||||
|
<pSingCmds></pSingCmds>
|
||||||
|
<pMultCmds></pMultCmds>
|
||||||
|
<pMisraNamep></pMisraNamep>
|
||||||
|
<pszMrulep></pszMrulep>
|
||||||
|
<pSingCmdsp></pSingCmdsp>
|
||||||
|
<pMultCmdsp></pMultCmdsp>
|
||||||
|
<DebugDescription>
|
||||||
|
<Enable>1</Enable>
|
||||||
|
<EnableFlashSeq>0</EnableFlashSeq>
|
||||||
|
<EnableLog>0</EnableLog>
|
||||||
|
<Protocol>2</Protocol>
|
||||||
|
<DbgClock>10000000</DbgClock>
|
||||||
|
</DebugDescription>
|
||||||
|
</TargetOption>
|
||||||
|
</Target>
|
||||||
|
|
||||||
|
<Group>
|
||||||
|
<GroupName>Source Group 1</GroupName>
|
||||||
|
<tvExp>0</tvExp>
|
||||||
|
<tvExpOptDlg>0</tvExpOptDlg>
|
||||||
|
<cbSel>0</cbSel>
|
||||||
|
<RteFlg>0</RteFlg>
|
||||||
|
</Group>
|
||||||
|
|
||||||
|
</ProjectOpt>
|
|
@ -0,0 +1,395 @@
|
||||||
|
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||||
|
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||||
|
|
||||||
|
<SchemaVersion>2.1</SchemaVersion>
|
||||||
|
|
||||||
|
<Header>### uVision Project, (C) Keil Software</Header>
|
||||||
|
|
||||||
|
<Targets>
|
||||||
|
<Target>
|
||||||
|
<TargetName>rt-thread</TargetName>
|
||||||
|
<ToolsetNumber>0x4</ToolsetNumber>
|
||||||
|
<ToolsetName>ARM-ADS</ToolsetName>
|
||||||
|
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||||
|
<uAC6>0</uAC6>
|
||||||
|
<TargetOption>
|
||||||
|
<TargetCommonOption>
|
||||||
|
<Device>STM32G431RBTx</Device>
|
||||||
|
<Vendor>STMicroelectronics</Vendor>
|
||||||
|
<PackID>Keil.STM32G4xx_DFP.1.1.0</PackID>
|
||||||
|
<PackURL>http://www.keil.com/pack</PackURL>
|
||||||
|
<Cpu>IRAM(0x20000000,0x00008000) IROM(0x08000000,0x00020000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
|
||||||
|
<FlashUtilSpec></FlashUtilSpec>
|
||||||
|
<StartupFile></StartupFile>
|
||||||
|
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32G4xx_128 -FS08000000 -FL020000 -FP0($$Device:STM32G431RBTx$CMSIS\Flash\STM32G4xx_128.FLM))</FlashDriverDll>
|
||||||
|
<DeviceId>0</DeviceId>
|
||||||
|
<RegisterFile>$$Device:STM32G431RBTx$Drivers\CMSIS\Device\ST\STM32G4xx\Include\stm32g4xx.h</RegisterFile>
|
||||||
|
<MemoryEnv></MemoryEnv>
|
||||||
|
<Cmp></Cmp>
|
||||||
|
<Asm></Asm>
|
||||||
|
<Linker></Linker>
|
||||||
|
<OHString></OHString>
|
||||||
|
<InfinionOptionDll></InfinionOptionDll>
|
||||||
|
<SLE66CMisc></SLE66CMisc>
|
||||||
|
<SLE66AMisc></SLE66AMisc>
|
||||||
|
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||||
|
<SFDFile>$$Device:STM32G431RBTx$CMSIS\SVD\STM32G431xx.svd</SFDFile>
|
||||||
|
<bCustSvd>0</bCustSvd>
|
||||||
|
<UseEnv>0</UseEnv>
|
||||||
|
<BinPath></BinPath>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
<LibPath></LibPath>
|
||||||
|
<RegisterFilePath></RegisterFilePath>
|
||||||
|
<DBRegisterFilePath></DBRegisterFilePath>
|
||||||
|
<TargetStatus>
|
||||||
|
<Error>0</Error>
|
||||||
|
<ExitCodeStop>0</ExitCodeStop>
|
||||||
|
<ButtonStop>0</ButtonStop>
|
||||||
|
<NotGenerated>0</NotGenerated>
|
||||||
|
<InvalidFlash>1</InvalidFlash>
|
||||||
|
</TargetStatus>
|
||||||
|
<OutputDirectory>.\build\keil\Obj\</OutputDirectory>
|
||||||
|
<OutputName>rt-thread</OutputName>
|
||||||
|
<CreateExecutable>1</CreateExecutable>
|
||||||
|
<CreateLib>0</CreateLib>
|
||||||
|
<CreateHexFile>0</CreateHexFile>
|
||||||
|
<DebugInformation>1</DebugInformation>
|
||||||
|
<BrowseInformation>0</BrowseInformation>
|
||||||
|
<ListingPath>.\build\keil\List\</ListingPath>
|
||||||
|
<HexFormatSelection>1</HexFormatSelection>
|
||||||
|
<Merge32K>0</Merge32K>
|
||||||
|
<CreateBatchFile>0</CreateBatchFile>
|
||||||
|
<BeforeCompile>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopU1X>0</nStopU1X>
|
||||||
|
<nStopU2X>0</nStopU2X>
|
||||||
|
</BeforeCompile>
|
||||||
|
<BeforeMake>
|
||||||
|
<RunUserProg1>0</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name></UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopB1X>0</nStopB1X>
|
||||||
|
<nStopB2X>0</nStopB2X>
|
||||||
|
</BeforeMake>
|
||||||
|
<AfterMake>
|
||||||
|
<RunUserProg1>1</RunUserProg1>
|
||||||
|
<RunUserProg2>0</RunUserProg2>
|
||||||
|
<UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
|
||||||
|
<UserProg2Name></UserProg2Name>
|
||||||
|
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||||
|
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||||
|
<nStopA1X>0</nStopA1X>
|
||||||
|
<nStopA2X>0</nStopA2X>
|
||||||
|
</AfterMake>
|
||||||
|
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||||
|
<SVCSIdString></SVCSIdString>
|
||||||
|
</TargetCommonOption>
|
||||||
|
<CommonProperty>
|
||||||
|
<UseCPPCompiler>0</UseCPPCompiler>
|
||||||
|
<RVCTCodeConst>0</RVCTCodeConst>
|
||||||
|
<RVCTZI>0</RVCTZI>
|
||||||
|
<RVCTOtherData>0</RVCTOtherData>
|
||||||
|
<ModuleSelection>0</ModuleSelection>
|
||||||
|
<IncludeInBuild>1</IncludeInBuild>
|
||||||
|
<AlwaysBuild>0</AlwaysBuild>
|
||||||
|
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||||
|
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||||
|
<PublicsOnly>0</PublicsOnly>
|
||||||
|
<StopOnExitCode>3</StopOnExitCode>
|
||||||
|
<CustomArgument></CustomArgument>
|
||||||
|
<IncludeLibraryModules></IncludeLibraryModules>
|
||||||
|
<ComprImg>1</ComprImg>
|
||||||
|
</CommonProperty>
|
||||||
|
<DllOption>
|
||||||
|
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||||
|
<SimDllArguments> -REMAP -MPU</SimDllArguments>
|
||||||
|
<SimDlgDll>DCM.DLL</SimDlgDll>
|
||||||
|
<SimDlgDllArguments>-pCM4</SimDlgDllArguments>
|
||||||
|
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||||
|
<TargetDllArguments> -MPU</TargetDllArguments>
|
||||||
|
<TargetDlgDll>TCM.DLL</TargetDlgDll>
|
||||||
|
<TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
|
||||||
|
</DllOption>
|
||||||
|
<DebugOption>
|
||||||
|
<OPTHX>
|
||||||
|
<HexSelection>1</HexSelection>
|
||||||
|
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||||
|
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||||
|
<HexOffset>0</HexOffset>
|
||||||
|
<Oh166RecLen>16</Oh166RecLen>
|
||||||
|
</OPTHX>
|
||||||
|
</DebugOption>
|
||||||
|
<Utilities>
|
||||||
|
<Flash1>
|
||||||
|
<UseTargetDll>1</UseTargetDll>
|
||||||
|
<UseExternalTool>0</UseExternalTool>
|
||||||
|
<RunIndependent>0</RunIndependent>
|
||||||
|
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||||
|
<Capability>1</Capability>
|
||||||
|
<DriverSelection>4096</DriverSelection>
|
||||||
|
</Flash1>
|
||||||
|
<bUseTDR>1</bUseTDR>
|
||||||
|
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||||
|
<Flash3></Flash3>
|
||||||
|
<Flash4></Flash4>
|
||||||
|
<pFcarmOut></pFcarmOut>
|
||||||
|
<pFcarmGrp></pFcarmGrp>
|
||||||
|
<pFcArmRoot></pFcArmRoot>
|
||||||
|
<FcArmLst>0</FcArmLst>
|
||||||
|
</Utilities>
|
||||||
|
<TargetArmAds>
|
||||||
|
<ArmAdsMisc>
|
||||||
|
<GenerateListings>0</GenerateListings>
|
||||||
|
<asHll>1</asHll>
|
||||||
|
<asAsm>1</asAsm>
|
||||||
|
<asMacX>1</asMacX>
|
||||||
|
<asSyms>1</asSyms>
|
||||||
|
<asFals>1</asFals>
|
||||||
|
<asDbgD>1</asDbgD>
|
||||||
|
<asForm>1</asForm>
|
||||||
|
<ldLst>0</ldLst>
|
||||||
|
<ldmm>1</ldmm>
|
||||||
|
<ldXref>1</ldXref>
|
||||||
|
<BigEnd>0</BigEnd>
|
||||||
|
<AdsALst>1</AdsALst>
|
||||||
|
<AdsACrf>1</AdsACrf>
|
||||||
|
<AdsANop>0</AdsANop>
|
||||||
|
<AdsANot>0</AdsANot>
|
||||||
|
<AdsLLst>1</AdsLLst>
|
||||||
|
<AdsLmap>1</AdsLmap>
|
||||||
|
<AdsLcgr>1</AdsLcgr>
|
||||||
|
<AdsLsym>1</AdsLsym>
|
||||||
|
<AdsLszi>1</AdsLszi>
|
||||||
|
<AdsLtoi>1</AdsLtoi>
|
||||||
|
<AdsLsun>1</AdsLsun>
|
||||||
|
<AdsLven>1</AdsLven>
|
||||||
|
<AdsLsxf>1</AdsLsxf>
|
||||||
|
<RvctClst>0</RvctClst>
|
||||||
|
<GenPPlst>0</GenPPlst>
|
||||||
|
<AdsCpuType>"Cortex-M4"</AdsCpuType>
|
||||||
|
<RvctDeviceName></RvctDeviceName>
|
||||||
|
<mOS>0</mOS>
|
||||||
|
<uocRom>0</uocRom>
|
||||||
|
<uocRam>0</uocRam>
|
||||||
|
<hadIROM>1</hadIROM>
|
||||||
|
<hadIRAM>1</hadIRAM>
|
||||||
|
<hadXRAM>0</hadXRAM>
|
||||||
|
<uocXRam>0</uocXRam>
|
||||||
|
<RvdsVP>2</RvdsVP>
|
||||||
|
<RvdsMve>0</RvdsMve>
|
||||||
|
<hadIRAM2>0</hadIRAM2>
|
||||||
|
<hadIROM2>0</hadIROM2>
|
||||||
|
<StupSel>8</StupSel>
|
||||||
|
<useUlib>0</useUlib>
|
||||||
|
<EndSel>0</EndSel>
|
||||||
|
<uLtcg>0</uLtcg>
|
||||||
|
<nSecure>0</nSecure>
|
||||||
|
<RoSelD>3</RoSelD>
|
||||||
|
<RwSelD>3</RwSelD>
|
||||||
|
<CodeSel>0</CodeSel>
|
||||||
|
<OptFeed>0</OptFeed>
|
||||||
|
<NoZi1>0</NoZi1>
|
||||||
|
<NoZi2>0</NoZi2>
|
||||||
|
<NoZi3>0</NoZi3>
|
||||||
|
<NoZi4>0</NoZi4>
|
||||||
|
<NoZi5>0</NoZi5>
|
||||||
|
<Ro1Chk>0</Ro1Chk>
|
||||||
|
<Ro2Chk>0</Ro2Chk>
|
||||||
|
<Ro3Chk>0</Ro3Chk>
|
||||||
|
<Ir1Chk>1</Ir1Chk>
|
||||||
|
<Ir2Chk>0</Ir2Chk>
|
||||||
|
<Ra1Chk>0</Ra1Chk>
|
||||||
|
<Ra2Chk>0</Ra2Chk>
|
||||||
|
<Ra3Chk>0</Ra3Chk>
|
||||||
|
<Im1Chk>1</Im1Chk>
|
||||||
|
<Im2Chk>0</Im2Chk>
|
||||||
|
<OnChipMemories>
|
||||||
|
<Ocm1>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm1>
|
||||||
|
<Ocm2>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm2>
|
||||||
|
<Ocm3>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm3>
|
||||||
|
<Ocm4>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm4>
|
||||||
|
<Ocm5>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm5>
|
||||||
|
<Ocm6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</Ocm6>
|
||||||
|
<IRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x8000</Size>
|
||||||
|
</IRAM>
|
||||||
|
<IROM>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8000000</StartAddress>
|
||||||
|
<Size>0x20000</Size>
|
||||||
|
</IROM>
|
||||||
|
<XRAM>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</XRAM>
|
||||||
|
<OCR_RVCT1>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT1>
|
||||||
|
<OCR_RVCT2>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT2>
|
||||||
|
<OCR_RVCT3>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT3>
|
||||||
|
<OCR_RVCT4>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x8000000</StartAddress>
|
||||||
|
<Size>0x20000</Size>
|
||||||
|
</OCR_RVCT4>
|
||||||
|
<OCR_RVCT5>
|
||||||
|
<Type>1</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT5>
|
||||||
|
<OCR_RVCT6>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT6>
|
||||||
|
<OCR_RVCT7>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT7>
|
||||||
|
<OCR_RVCT8>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT8>
|
||||||
|
<OCR_RVCT9>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x20000000</StartAddress>
|
||||||
|
<Size>0x8000</Size>
|
||||||
|
</OCR_RVCT9>
|
||||||
|
<OCR_RVCT10>
|
||||||
|
<Type>0</Type>
|
||||||
|
<StartAddress>0x0</StartAddress>
|
||||||
|
<Size>0x0</Size>
|
||||||
|
</OCR_RVCT10>
|
||||||
|
</OnChipMemories>
|
||||||
|
<RvctStartVector></RvctStartVector>
|
||||||
|
</ArmAdsMisc>
|
||||||
|
<Cads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Optim>1</Optim>
|
||||||
|
<oTime>0</oTime>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<OneElfS>1</OneElfS>
|
||||||
|
<Strict>0</Strict>
|
||||||
|
<EnumInt>0</EnumInt>
|
||||||
|
<PlainCh>0</PlainCh>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<wLevel>2</wLevel>
|
||||||
|
<uThumb>0</uThumb>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<uC99>1</uC99>
|
||||||
|
<uGnu>0</uGnu>
|
||||||
|
<useXO>0</useXO>
|
||||||
|
<v6Lang>1</v6Lang>
|
||||||
|
<v6LangP>1</v6LangP>
|
||||||
|
<vShortEn>1</vShortEn>
|
||||||
|
<vShortWch>1</vShortWch>
|
||||||
|
<v6Lto>0</v6Lto>
|
||||||
|
<v6WtE>0</v6WtE>
|
||||||
|
<v6Rtti>0</v6Rtti>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Cads>
|
||||||
|
<Aads>
|
||||||
|
<interw>1</interw>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<thumb>0</thumb>
|
||||||
|
<SplitLS>0</SplitLS>
|
||||||
|
<SwStkChk>0</SwStkChk>
|
||||||
|
<NoWarn>0</NoWarn>
|
||||||
|
<uSurpInc>0</uSurpInc>
|
||||||
|
<useXO>0</useXO>
|
||||||
|
<uClangAs>0</uClangAs>
|
||||||
|
<VariousControls>
|
||||||
|
<MiscControls></MiscControls>
|
||||||
|
<Define></Define>
|
||||||
|
<Undefine></Undefine>
|
||||||
|
<IncludePath></IncludePath>
|
||||||
|
</VariousControls>
|
||||||
|
</Aads>
|
||||||
|
<LDads>
|
||||||
|
<umfTarg>0</umfTarg>
|
||||||
|
<Ropi>0</Ropi>
|
||||||
|
<Rwpi>0</Rwpi>
|
||||||
|
<noStLib>0</noStLib>
|
||||||
|
<RepFail>1</RepFail>
|
||||||
|
<useFile>0</useFile>
|
||||||
|
<TextAddressRange>0x08000000</TextAddressRange>
|
||||||
|
<DataAddressRange>0x20000000</DataAddressRange>
|
||||||
|
<pXoBase></pXoBase>
|
||||||
|
<ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
|
||||||
|
<IncludeLibs></IncludeLibs>
|
||||||
|
<IncludeLibsPath></IncludeLibsPath>
|
||||||
|
<Misc></Misc>
|
||||||
|
<LinkerInputFile></LinkerInputFile>
|
||||||
|
<DisabledWarnings></DisabledWarnings>
|
||||||
|
</LDads>
|
||||||
|
</TargetArmAds>
|
||||||
|
</TargetOption>
|
||||||
|
<Groups>
|
||||||
|
<Group>
|
||||||
|
<GroupName>Source Group 1</GroupName>
|
||||||
|
</Group>
|
||||||
|
</Groups>
|
||||||
|
</Target>
|
||||||
|
</Targets>
|
||||||
|
|
||||||
|
<RTE>
|
||||||
|
<apis/>
|
||||||
|
<components/>
|
||||||
|
<files/>
|
||||||
|
</RTE>
|
||||||
|
|
||||||
|
</Project>
|
Loading…
Reference in New Issue