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synced 2025-02-19 04:31:36 +08:00
[bsp][bluetrum] update link.lds
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76dbf1936d
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cd15ffedfe
@ -34,20 +34,6 @@ SECTIONS
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} > init
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.ram1 __ram1_vma : {
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. = ALIGN(4);
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PROVIDE(__ctors_start__ = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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PROVIDE(__ctors_end__ = .);
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. = ALIGN(4);
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*components*drivers**.o (.text*)
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*device.o (.text*)
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*components.o (.text*)
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*idle.o (.text*)
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} > ram1 AT > flash
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.rti : {
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. = ALIGN(4);
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/* section information for initial */
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__rt_init_start = .;
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@ -64,10 +50,21 @@ SECTIONS
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KEEP(*(VSymTab))
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__vsymtab_end = .;
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. = ALIGN(32);
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. = ALIGN(4);
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PROVIDE(__ctors_start__ = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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PROVIDE(__ctors_end__ = .);
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. = ALIGN(4);
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*components*drivers**.o (.text*)
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*components.o (.text*)
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*idle.o (.text*)
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*object.o (.text*)
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*scheduler.o (.text*)
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} > ram1 AT > flash
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.comm : {
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.comm __comm_vma : {
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. = ALIGN(4);
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KEEP(*(.vector))
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EXCLUDE_FILE(*components*finsh**.o *components*libc**.o *dfs*filesystems**.o
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@ -124,4 +121,4 @@ __bank_size = SIZEOF(.flash);
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__comm_lma = LOADADDR(.comm);
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__comm_size = SIZEOF(.comm);
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__ram1_lma = LOADADDR(.ram1);
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__ram1_size = SIZEOF(.ram1) + SIZEOF(.rti);
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__ram1_size = SIZEOF(.ram1);
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