Merge pull request #2462 from jinsheng20/746

增加看门狗和 tft 屏驱动
This commit is contained in:
Bernard Xiong 2019-03-16 08:49:23 +08:00 committed by GitHub
commit cac8e7aab5
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
11 changed files with 668 additions and 162 deletions

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@ -207,6 +207,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
@ -240,6 +241,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
#
# security packages
@ -293,6 +295,18 @@ CONFIG_RT_USING_PIN=y
#
# peripheral libraries and drivers
#
#
# sensors drivers
#
# CONFIG_PKG_USING_LSM6DSL is not set
# CONFIG_PKG_USING_LPS22HB is not set
# CONFIG_PKG_USING_HTS221 is not set
# CONFIG_PKG_USING_LSM303AGR is not set
# CONFIG_PKG_USING_BME280 is not set
# CONFIG_PKG_USING_BMA400 is not set
# CONFIG_PKG_USING_BMI160_BMX160 is not set
# CONFIG_PKG_USING_SPL0601 is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AHT10 is not set
@ -303,6 +317,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_MPU6XXX is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
#
@ -343,6 +358,7 @@ CONFIG_SOC_STM32F746NG=y
CONFIG_BSP_USING_USB_TO_USART=y
# CONFIG_BSP_USING_SDRAM is not set
# CONFIG_BSP_USING_QSPI_FLASH is not set
# CONFIG_BSP_USING_LCD is not set
# CONFIG_BSP_USING_ETH is not set
# CONFIG_BSP_USING_SDCARD is not set
@ -355,7 +371,10 @@ CONFIG_BSP_USING_UART1=y
# CONFIG_BSP_UART1_RX_USING_DMA is not set
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
# CONFIG_BSP_USING_QSPI is not set
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_SDIO is not set
# CONFIG_BSP_USING_FMC is not set
# CONFIG_BSP_USING_LTDC is not set
#
# Board extended module Drivers

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@ -43,7 +43,7 @@ STM32F746-disco 是 ST 推出的一款基于 ARM Cortex-M7 内核的开发板,
| 以太网 | 支持 | RMII |
| SDRAM | 支持 | SDRAM1 |
| SD卡 | 支持 | SD 4bits |
| 4.3寸电容屏 | 暂不支持 | |
| 4.3寸电容屏 | 支持 | LTDC |
| MEMS麦克风 | 暂不支持 | |
| **片上外设** | **支持情况** | **备注** |
@ -54,8 +54,8 @@ STM32F746-disco 是 ST 推出的一款基于 ARM Cortex-M7 内核的开发板,
| QSPI | 支持 | QSPI1 |
| I2C | 暂不支持 | 即将支持 |
| FLASH | 支持 | |
| WDT | 暂不支持 | 即将支持 |
| SDIO | 支持 | 支持 |
| WDT | 支持 | |
| SDIO | 支持 | |
| USB Device | 暂不支持 | 即将支持 |
| USB Host | 暂不支持 | 即将支持 |
| SAI | 暂不支持 | 即将支持 |

File diff suppressed because one or more lines are too long

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@ -6,84 +6,115 @@ KeepUserPlacement=false
Mcu.Family=STM32F7
Mcu.IP0=CORTEX_M7
Mcu.IP1=ETH
Mcu.IP10=USART1
Mcu.IP2=FMC
Mcu.IP3=NVIC
Mcu.IP4=QUADSPI
Mcu.IP5=RCC
Mcu.IP6=SDMMC1
Mcu.IP7=SYS
Mcu.IP8=USART1
Mcu.IPNb=9
Mcu.IP3=IWDG
Mcu.IP4=LTDC
Mcu.IP5=NVIC
Mcu.IP6=QUADSPI
Mcu.IP7=RCC
Mcu.IP8=SDMMC1
Mcu.IP9=SYS
Mcu.IPNb=11
Mcu.Name=STM32F746NGHx
Mcu.Package=TFBGA216
Mcu.Pin0=PE2
Mcu.Pin1=PG14
Mcu.Pin10=PD0
Mcu.Pin11=PC11
Mcu.Pin12=PC10
Mcu.Pin13=PD1
Mcu.Pin14=PF0
Mcu.Pin15=PD2
Mcu.Pin16=PC14/OSC32_IN
Mcu.Pin17=PF1
Mcu.Pin18=PA9
Mcu.Pin19=PC15/OSC32_OUT
Mcu.Pin2=PC12
Mcu.Pin20=PK1
Mcu.Pin21=PC9
Mcu.Pin22=PH0/OSC_IN
Mcu.Pin23=PF2
Mcu.Pin24=PC8
Mcu.Pin25=PH1/OSC_OUT
Mcu.Pin26=PF3
Mcu.Pin27=PJ8
Mcu.Pin28=PG8
Mcu.Pin29=PF4
Mcu.Pin3=PA14
Mcu.Pin30=PH5
Mcu.Pin31=PH3
Mcu.Pin32=PF5
Mcu.Pin33=PD15
Mcu.Pin34=PD10
Mcu.Pin35=PC3
Mcu.Pin36=PD14
Mcu.Pin37=PD9
Mcu.Pin38=PD8
Mcu.Pin39=PC1
Mcu.Pin4=PA13
Mcu.Pin40=PB2
Mcu.Pin41=PF12
Mcu.Pin42=PF15
Mcu.Pin43=PD12
Mcu.Pin44=PD13
Mcu.Pin45=PA1
Mcu.Pin46=PC4
Mcu.Pin47=PF13
Mcu.Pin48=PG0
Mcu.Pin49=PE8
Mcu.Pin5=PG13
Mcu.Pin50=PD11
Mcu.Pin51=PG5
Mcu.Pin52=PG4
Mcu.Pin53=PA2
Mcu.Pin54=PC5
Mcu.Pin55=PF14
Mcu.Pin56=PF11
Mcu.Pin57=PE9
Mcu.Pin58=PE11
Mcu.Pin59=PE14
Mcu.Pin6=PB7
Mcu.Pin60=PA7
Mcu.Pin61=PE7
Mcu.Pin62=PE10
Mcu.Pin63=PE12
Mcu.Pin64=PE15
Mcu.Pin65=PE13
Mcu.Pin66=VP_SYS_VS_Systick
Mcu.Pin7=PB6
Mcu.Pin8=PG15
Mcu.Pin9=PG11
Mcu.PinsNb=67
Mcu.Pin0=PE4
Mcu.Pin1=PE2
Mcu.Pin10=PG11
Mcu.Pin11=PJ13
Mcu.Pin12=PD0
Mcu.Pin13=PC11
Mcu.Pin14=PC10
Mcu.Pin15=PK7
Mcu.Pin16=PK6
Mcu.Pin17=PK5
Mcu.Pin18=PG12
Mcu.Pin19=PJ14
Mcu.Pin2=PG14
Mcu.Pin20=PD1
Mcu.Pin21=PF0
Mcu.Pin22=PI10
Mcu.Pin23=PK4
Mcu.Pin24=PK3
Mcu.Pin25=PJ15
Mcu.Pin26=PD2
Mcu.Pin27=PC14/OSC32_IN
Mcu.Pin28=PF1
Mcu.Pin29=PI12
Mcu.Pin3=PC12
Mcu.Pin30=PI9
Mcu.Pin31=PA9
Mcu.Pin32=PC15/OSC32_OUT
Mcu.Pin33=PK1
Mcu.Pin34=PK2
Mcu.Pin35=PC9
Mcu.Pin36=PH0/OSC_IN
Mcu.Pin37=PF2
Mcu.Pin38=PI15
Mcu.Pin39=PJ11
Mcu.Pin4=PA14
Mcu.Pin40=PK0
Mcu.Pin41=PC8
Mcu.Pin42=PH1/OSC_OUT
Mcu.Pin43=PF3
Mcu.Pin44=PI14
Mcu.Pin45=PJ8
Mcu.Pin46=PJ10
Mcu.Pin47=PG8
Mcu.Pin48=PF4
Mcu.Pin49=PH5
Mcu.Pin5=PA13
Mcu.Pin50=PH3
Mcu.Pin51=PJ7
Mcu.Pin52=PJ9
Mcu.Pin53=PF5
Mcu.Pin54=PJ6
Mcu.Pin55=PD15
Mcu.Pin56=PD10
Mcu.Pin57=PC3
Mcu.Pin58=PD14
Mcu.Pin59=PD9
Mcu.Pin6=PG13
Mcu.Pin60=PD8
Mcu.Pin61=PC1
Mcu.Pin62=PB2
Mcu.Pin63=PF12
Mcu.Pin64=PF15
Mcu.Pin65=PJ4
Mcu.Pin66=PD12
Mcu.Pin67=PD13
Mcu.Pin68=PJ5
Mcu.Pin69=PA1
Mcu.Pin7=PB7
Mcu.Pin70=PC4
Mcu.Pin71=PF13
Mcu.Pin72=PG0
Mcu.Pin73=PJ3
Mcu.Pin74=PE8
Mcu.Pin75=PD11
Mcu.Pin76=PG5
Mcu.Pin77=PG4
Mcu.Pin78=PA2
Mcu.Pin79=PC5
Mcu.Pin8=PB6
Mcu.Pin80=PF14
Mcu.Pin81=PJ2
Mcu.Pin82=PF11
Mcu.Pin83=PE9
Mcu.Pin84=PE11
Mcu.Pin85=PE14
Mcu.Pin86=PA7
Mcu.Pin87=PJ0
Mcu.Pin88=PJ1
Mcu.Pin89=PE7
Mcu.Pin9=PG15
Mcu.Pin90=PE10
Mcu.Pin91=PE12
Mcu.Pin92=PE15
Mcu.Pin93=PE13
Mcu.Pin94=VP_IWDG_VS_IWDG
Mcu.Pin95=VP_SYS_VS_Systick
Mcu.PinsNb=96
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F746NGHx
@ -176,6 +207,8 @@ PE15.Signal=FMC_D12_DA12
PE2.Locked=true
PE2.Mode=Single Bank 1
PE2.Signal=QUADSPI_BK1_IO2
PE4.Mode=RGB888
PE4.Signal=LTDC_B0
PE7.Signal=FMC_D4_DA4
PE8.Signal=FMC_D5_DA5
PE9.Signal=FMC_D6_DA6
@ -193,6 +226,9 @@ PF5.Signal=FMC_A5
PG0.Signal=FMC_A10
PG11.Mode=RMII
PG11.Signal=ETH_TX_EN
PG12.Locked=true
PG12.Mode=RGB888
PG12.Signal=LTDC_B4
PG13.Mode=RMII
PG13.Signal=ETH_TXD0
PG14.Mode=RMII
@ -208,10 +244,84 @@ PH1/OSC_OUT.Signal=RCC_OSC_OUT
PH3.Mode=SdramChipSelect1_1
PH3.Signal=FMC_SDNE0
PH5.Signal=FMC_SDNWE
PI10.Locked=true
PI10.Mode=RGB888
PI10.Signal=LTDC_HSYNC
PI12.Locked=true
PI12.Signal=GPIO_Output
PI14.Mode=RGB888
PI14.Signal=LTDC_CLK
PI15.Mode=RGB888
PI15.Signal=LTDC_R0
PI9.Locked=true
PI9.Mode=RGB888
PI9.Signal=LTDC_VSYNC
PJ0.Mode=RGB888
PJ0.Signal=LTDC_R1
PJ1.Locked=true
PJ1.Mode=RGB888
PJ1.Signal=LTDC_R2
PJ10.Locked=true
PJ10.Mode=RGB888
PJ10.Signal=LTDC_G3
PJ11.Locked=true
PJ11.Mode=RGB888
PJ11.Signal=LTDC_G4
PJ13.Locked=true
PJ13.Mode=RGB888
PJ13.Signal=LTDC_B1
PJ14.Locked=true
PJ14.Mode=RGB888
PJ14.Signal=LTDC_B2
PJ15.Locked=true
PJ15.Mode=RGB888
PJ15.Signal=LTDC_B3
PJ2.Locked=true
PJ2.Mode=RGB888
PJ2.Signal=LTDC_R3
PJ3.Locked=true
PJ3.Mode=RGB888
PJ3.Signal=LTDC_R4
PJ4.Locked=true
PJ4.Mode=RGB888
PJ4.Signal=LTDC_R5
PJ5.Locked=true
PJ5.Mode=RGB888
PJ5.Signal=LTDC_R6
PJ6.Locked=true
PJ6.Mode=RGB888
PJ6.Signal=LTDC_R7
PJ7.Locked=true
PJ7.Mode=RGB888
PJ7.Signal=LTDC_G0
PJ8.Locked=true
PJ8.Signal=GPXTI8
PJ8.Mode=RGB888
PJ8.Signal=LTDC_G1
PJ9.Locked=true
PJ9.Mode=RGB888
PJ9.Signal=LTDC_G2
PK0.Locked=true
PK0.Mode=RGB888
PK0.Signal=LTDC_G5
PK1.Locked=true
PK1.Signal=EVENTOUT
PK1.Mode=RGB888
PK1.Signal=LTDC_G6
PK2.Locked=true
PK2.Mode=RGB888
PK2.Signal=LTDC_G7
PK3.Locked=true
PK3.Signal=GPIO_Output
PK4.Locked=true
PK4.Mode=RGB888
PK4.Signal=LTDC_B5
PK5.Locked=true
PK5.Mode=RGB888
PK5.Signal=LTDC_B6
PK6.Locked=true
PK6.Mode=RGB888
PK6.Signal=LTDC_B7
PK7.Mode=RGB888
PK7.Signal=LTDC_DE
PinOutPanel.CurrentBGAView=Top
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
@ -240,72 +350,75 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=MDK-ARM V5
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_QUADSPI_Init-QUADSPI-false-HAL-true,6-MX_ETH_Init-ETH-false-HAL-true,7-MX_FMC_Init-FMC-false-HAL-true,8-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_QUADSPI_Init-QUADSPI-false-HAL-true,6-MX_ETH_Init-ETH-false-HAL-true,7-MX_FMC_Init-FMC-false-HAL-true,8-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,9-MX_LTDC_Init-LTDC-false-HAL-true,10-MX_IWDG_Init-IWDG-false-HAL-true
QUADSPI.ChipSelectHighTime=QSPI_CS_HIGH_TIME_6_CYCLE
QUADSPI.ClockPrescaler=1
QUADSPI.FifoThreshold=4
QUADSPI.IPParameters=ClockPrescaler,FifoThreshold,SampleShifting,ChipSelectHighTime
QUADSPI.SampleShifting=QSPI_SAMPLE_SHIFTING_HALFCYCLE
RCC.AHBFreq_Value=50000000
RCC.AHBFreq_Value=216000000
RCC.APB1CLKDivider=RCC_HCLK_DIV4
RCC.APB1Freq_Value=12500000
RCC.APB1TimFreq_Value=25000000
RCC.APB1Freq_Value=54000000
RCC.APB1TimFreq_Value=108000000
RCC.APB2CLKDivider=RCC_HCLK_DIV2
RCC.APB2Freq_Value=25000000
RCC.APB2TimFreq_Value=50000000
RCC.APB2Freq_Value=108000000
RCC.APB2TimFreq_Value=216000000
RCC.CECFreq_Value=32786.88524590164
RCC.CortexFreq_Value=50000000
RCC.EthernetFreq_Value=50000000
RCC.FCLKCortexFreq_Value=50000000
RCC.CortexFreq_Value=216000000
RCC.EthernetFreq_Value=216000000
RCC.FCLKCortexFreq_Value=216000000
RCC.FamilyName=M
RCC.HCLKFreq_Value=50000000
RCC.HCLKFreq_Value=216000000
RCC.HSE_VALUE=25000000
RCC.HSI_VALUE=16000000
RCC.I2C1Freq_Value=12500000
RCC.I2C2Freq_Value=12500000
RCC.I2C3Freq_Value=12500000
RCC.I2C4Freq_Value=12500000
RCC.I2SFreq_Value=200000000
RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LCDTFToutputFreq_Value,LPTIM1Freq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLN,PLLP,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,PLLSourceVirtual,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value
RCC.LCDTFToutputFreq_Value=100000000
RCC.LPTIM1Freq_Value=12500000
RCC.I2C1Freq_Value=54000000
RCC.I2C2Freq_Value=54000000
RCC.I2C3Freq_Value=54000000
RCC.I2C4Freq_Value=54000000
RCC.I2SFreq_Value=96000000
RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LCDTFToutputFreq_Value,LPTIM1Freq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIR,PLLSAIRCLKFreq_Value,PLLSAIRDiv,PLLSAIoutputFreq_Value,PLLSourceVirtual,RNGFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCClockSelection,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value
RCC.LCDTFToutputFreq_Value=9600000
RCC.LPTIM1Freq_Value=54000000
RCC.LSI_VALUE=32000
RCC.MCO2PinFreq_Value=50000000
RCC.PLLCLKFreq_Value=50000000
RCC.PLLI2SPCLKFreq_Value=200000000
RCC.PLLI2SQCLKFreq_Value=200000000
RCC.PLLI2SRCLKFreq_Value=200000000
RCC.PLLI2SRoutputFreq_Value=200000000
RCC.PLLM=12
RCC.PLLN=96
RCC.PLLP=RCC_PLLP_DIV4
RCC.PLLQCLKFreq_Value=100000000
RCC.PLLQoutputFreq_Value=100000000
RCC.PLLSAIPCLKFreq_Value=200000000
RCC.PLLSAIQCLKFreq_Value=200000000
RCC.PLLSAIRCLKFreq_Value=200000000
RCC.PLLSAIoutputFreq_Value=200000000
RCC.MCO2PinFreq_Value=216000000
RCC.PLLCLKFreq_Value=216000000
RCC.PLLI2SPCLKFreq_Value=96000000
RCC.PLLI2SQCLKFreq_Value=96000000
RCC.PLLI2SRCLKFreq_Value=96000000
RCC.PLLI2SRoutputFreq_Value=96000000
RCC.PLLM=25
RCC.PLLN=432
RCC.PLLQ=9
RCC.PLLQCLKFreq_Value=48000000
RCC.PLLQoutputFreq_Value=48000000
RCC.PLLSAIPCLKFreq_Value=96000000
RCC.PLLSAIQCLKFreq_Value=96000000
RCC.PLLSAIR=5
RCC.PLLSAIRCLKFreq_Value=38400000
RCC.PLLSAIRDiv=RCC_PLLSAIDIVR_4
RCC.PLLSAIoutputFreq_Value=96000000
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
RCC.RNGFreq_Value=100000000
RCC.SAI1Freq_Value=200000000
RCC.SAI2Freq_Value=200000000
RCC.SDMMCFreq_Value=50000000
RCC.SPDIFRXFreq_Value=200000000
RCC.SYSCLKFreq_VALUE=50000000
RCC.RNGFreq_Value=48000000
RCC.SAI1Freq_Value=96000000
RCC.SAI2Freq_Value=96000000
RCC.SDMMCClockSelection=RCC_SDMMC1CLKSOURCE_CLK48
RCC.SDMMCFreq_Value=48000000
RCC.SPDIFRXFreq_Value=96000000
RCC.SYSCLKFreq_VALUE=216000000
RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
RCC.UART4Freq_Value=12500000
RCC.UART5Freq_Value=12500000
RCC.UART7Freq_Value=12500000
RCC.UART8Freq_Value=12500000
RCC.USART1Freq_Value=25000000
RCC.USART2Freq_Value=12500000
RCC.USART3Freq_Value=12500000
RCC.USART6Freq_Value=25000000
RCC.USBFreq_Value=100000000
RCC.VCOI2SOutputFreq_Value=400000000
RCC.VCOInputFreq_Value=2083333.3333333333
RCC.VCOOutputFreq_Value=200000000
RCC.VCOSAIOutputFreq_Value=400000000
RCC.UART4Freq_Value=54000000
RCC.UART5Freq_Value=54000000
RCC.UART7Freq_Value=54000000
RCC.UART8Freq_Value=54000000
RCC.USART1Freq_Value=108000000
RCC.USART2Freq_Value=54000000
RCC.USART3Freq_Value=54000000
RCC.USART6Freq_Value=108000000
RCC.USBFreq_Value=48000000
RCC.VCOI2SOutputFreq_Value=192000000
RCC.VCOInputFreq_Value=1000000
RCC.VCOOutputFreq_Value=432000000
RCC.VCOSAIOutputFreq_Value=192000000
SH.FMC_A0.0=FMC_A0,11b-sda1
SH.FMC_A0.ConfNb=1
SH.FMC_A1.0=FMC_A1,11b-sda1
@ -372,10 +485,10 @@ SH.FMC_SDNRAS.0=FMC_SDNRAS,11b-sda1
SH.FMC_SDNRAS.ConfNb=1
SH.FMC_SDNWE.0=FMC_SDNWE,11b-sda1
SH.FMC_SDNWE.ConfNb=1
SH.GPXTI8.0=GPIO_EXTI8
SH.GPXTI8.ConfNb=1
USART1.IPParameters=VirtualMode-Asynchronous
USART1.VirtualMode-Asynchronous=VM_ASYNC
VP_IWDG_VS_IWDG.Mode=IWDG_Activate
VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
board=custom

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@ -65,9 +65,9 @@
#define HAL_SDRAM_MODULE_ENABLED
/* #define HAL_HASH_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
/* #define HAL_LPTIM_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */
#define HAL_LTDC_MODULE_ENABLED
#define HAL_QSPI_MODULE_ENABLED
/* #define HAL_RNG_MODULE_ENABLED */
/* #define HAL_RTC_MODULE_ENABLED */

View File

@ -65,6 +65,10 @@
ETH_HandleTypeDef heth;
IWDG_HandleTypeDef hiwdg;
LTDC_HandleTypeDef hltdc;
QSPI_HandleTypeDef hqspi;
SD_HandleTypeDef hsd1;
@ -85,6 +89,8 @@ static void MX_QUADSPI_Init(void);
static void MX_ETH_Init(void);
static void MX_FMC_Init(void);
static void MX_SDMMC1_SD_Init(void);
static void MX_LTDC_Init(void);
static void MX_IWDG_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@ -127,6 +133,8 @@ int main(void)
MX_ETH_Init();
MX_FMC_Init();
MX_SDMMC1_SD_Init();
MX_LTDC_Init();
MX_IWDG_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
@ -158,21 +166,28 @@ void SystemClock_Config(void)
/**Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 12;
RCC_OscInitStruct.PLL.PLLN = 96;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
RCC_OscInitStruct.PLL.PLLQ = 2;
RCC_OscInitStruct.PLL.PLLM = 25;
RCC_OscInitStruct.PLL.PLLN = 432;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 9;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/**Activate the Over-Drive mode
*/
if (HAL_PWREx_EnableOverDrive() != HAL_OK)
{
Error_Handler();
}
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
@ -182,13 +197,21 @@ void SystemClock_Config(void)
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK)
{
Error_Handler();
}
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_SDMMC1;
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC|RCC_PERIPHCLK_USART1
|RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_CLK48;
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
PeriphClkInitStruct.PLLSAI.PLLSAIR = 5;
PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2;
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV2;
PeriphClkInitStruct.PLLSAIDivQ = 1;
PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_4;
PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_SYSCLK;
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
@ -240,6 +263,117 @@ static void MX_ETH_Init(void)
}
/**
* @brief IWDG Initialization Function
* @param None
* @retval None
*/
static void MX_IWDG_Init(void)
{
/* USER CODE BEGIN IWDG_Init 0 */
/* USER CODE END IWDG_Init 0 */
/* USER CODE BEGIN IWDG_Init 1 */
/* USER CODE END IWDG_Init 1 */
hiwdg.Instance = IWDG;
hiwdg.Init.Prescaler = IWDG_PRESCALER_4;
hiwdg.Init.Window = 4095;
hiwdg.Init.Reload = 4095;
if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN IWDG_Init 2 */
/* USER CODE END IWDG_Init 2 */
}
/**
* @brief LTDC Initialization Function
* @param None
* @retval None
*/
static void MX_LTDC_Init(void)
{
/* USER CODE BEGIN LTDC_Init 0 */
/* USER CODE END LTDC_Init 0 */
LTDC_LayerCfgTypeDef pLayerCfg = {0};
LTDC_LayerCfgTypeDef pLayerCfg1 = {0};
/* USER CODE BEGIN LTDC_Init 1 */
/* USER CODE END LTDC_Init 1 */
hltdc.Instance = LTDC;
hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
hltdc.Init.HorizontalSync = 7;
hltdc.Init.VerticalSync = 3;
hltdc.Init.AccumulatedHBP = 14;
hltdc.Init.AccumulatedVBP = 5;
hltdc.Init.AccumulatedActiveW = 654;
hltdc.Init.AccumulatedActiveH = 485;
hltdc.Init.TotalWidth = 660;
hltdc.Init.TotalHeigh = 487;
hltdc.Init.Backcolor.Blue = 0;
hltdc.Init.Backcolor.Green = 0;
hltdc.Init.Backcolor.Red = 0;
if (HAL_LTDC_Init(&hltdc) != HAL_OK)
{
Error_Handler();
}
pLayerCfg.WindowX0 = 0;
pLayerCfg.WindowX1 = 0;
pLayerCfg.WindowY0 = 0;
pLayerCfg.WindowY1 = 0;
pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
pLayerCfg.Alpha = 0;
pLayerCfg.Alpha0 = 0;
pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
pLayerCfg.FBStartAdress = 0;
pLayerCfg.ImageWidth = 0;
pLayerCfg.ImageHeight = 0;
pLayerCfg.Backcolor.Blue = 0;
pLayerCfg.Backcolor.Green = 0;
pLayerCfg.Backcolor.Red = 0;
if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
{
Error_Handler();
}
pLayerCfg1.WindowX0 = 0;
pLayerCfg1.WindowX1 = 0;
pLayerCfg1.WindowY0 = 0;
pLayerCfg1.WindowY1 = 0;
pLayerCfg1.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
pLayerCfg1.Alpha = 0;
pLayerCfg1.Alpha0 = 0;
pLayerCfg1.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
pLayerCfg1.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
pLayerCfg1.FBStartAdress = 0;
pLayerCfg1.ImageWidth = 0;
pLayerCfg1.ImageHeight = 0;
pLayerCfg1.Backcolor.Blue = 0;
pLayerCfg1.Backcolor.Green = 0;
pLayerCfg1.Backcolor.Red = 0;
if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg1, 1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN LTDC_Init 2 */
/* USER CODE END LTDC_Init 2 */
}
/**
* @brief QUADSPI Initialization Function
* @param None
@ -396,25 +530,32 @@ static void MX_GPIO_Init(void)
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOK_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOJ_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOK_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOI_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
/*Configure GPIO pin : PK1 */
GPIO_InitStruct.Pin = GPIO_PIN_1;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOK, GPIO_PIN_3, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOI, GPIO_PIN_12, GPIO_PIN_RESET);
/*Configure GPIO pin : PK3 */
GPIO_InitStruct.Pin = GPIO_PIN_3;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF15_EVENTOUT;
HAL_GPIO_Init(GPIOK, &GPIO_InitStruct);
/*Configure GPIO pin : PJ8 */
GPIO_InitStruct.Pin = GPIO_PIN_8;
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
/*Configure GPIO pin : PI12 */
GPIO_InitStruct.Pin = GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOJ, &GPIO_InitStruct);
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
}

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@ -199,6 +199,174 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
}
/**
* @brief LTDC MSP Initialization
* This function configures the hardware resources used in this example
* @param hltdc: LTDC handle pointer
* @retval None
*/
void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hltdc->Instance==LTDC)
{
/* USER CODE BEGIN LTDC_MspInit 0 */
/* USER CODE END LTDC_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_LTDC_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
__HAL_RCC_GPIOJ_CLK_ENABLE();
__HAL_RCC_GPIOK_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
__HAL_RCC_GPIOI_CLK_ENABLE();
/**LTDC GPIO Configuration
PE4 ------> LTDC_B0
PJ13 ------> LTDC_B1
PK7 ------> LTDC_DE
PK6 ------> LTDC_B7
PK5 ------> LTDC_B6
PG12 ------> LTDC_B4
PJ14 ------> LTDC_B2
PI10 ------> LTDC_HSYNC
PK4 ------> LTDC_B5
PJ15 ------> LTDC_B3
PI9 ------> LTDC_VSYNC
PK1 ------> LTDC_G6
PK2 ------> LTDC_G7
PI15 ------> LTDC_R0
PJ11 ------> LTDC_G4
PK0 ------> LTDC_G5
PI14 ------> LTDC_CLK
PJ8 ------> LTDC_G1
PJ10 ------> LTDC_G3
PJ7 ------> LTDC_G0
PJ9 ------> LTDC_G2
PJ6 ------> LTDC_R7
PJ4 ------> LTDC_R5
PJ5 ------> LTDC_R6
PJ3 ------> LTDC_R4
PJ2 ------> LTDC_R3
PJ0 ------> LTDC_R1
PJ1 ------> LTDC_R2
*/
GPIO_InitStruct.Pin = GPIO_PIN_4;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_11
|GPIO_PIN_8|GPIO_PIN_10|GPIO_PIN_7|GPIO_PIN_9
|GPIO_PIN_6|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_3
|GPIO_PIN_2|GPIO_PIN_0|GPIO_PIN_1;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
HAL_GPIO_Init(GPIOJ, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6|GPIO_PIN_5|GPIO_PIN_4
|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_0;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
HAL_GPIO_Init(GPIOK, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_9|GPIO_PIN_15|GPIO_PIN_14;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
/* USER CODE BEGIN LTDC_MspInit 1 */
/* USER CODE END LTDC_MspInit 1 */
}
}
/**
* @brief LTDC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hltdc: LTDC handle pointer
* @retval None
*/
void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
{
if(hltdc->Instance==LTDC)
{
/* USER CODE BEGIN LTDC_MspDeInit 0 */
/* USER CODE END LTDC_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LTDC_CLK_DISABLE();
/**LTDC GPIO Configuration
PE4 ------> LTDC_B0
PJ13 ------> LTDC_B1
PK7 ------> LTDC_DE
PK6 ------> LTDC_B7
PK5 ------> LTDC_B6
PG12 ------> LTDC_B4
PJ14 ------> LTDC_B2
PI10 ------> LTDC_HSYNC
PK4 ------> LTDC_B5
PJ15 ------> LTDC_B3
PI9 ------> LTDC_VSYNC
PK1 ------> LTDC_G6
PK2 ------> LTDC_G7
PI15 ------> LTDC_R0
PJ11 ------> LTDC_G4
PK0 ------> LTDC_G5
PI14 ------> LTDC_CLK
PJ8 ------> LTDC_G1
PJ10 ------> LTDC_G3
PJ7 ------> LTDC_G0
PJ9 ------> LTDC_G2
PJ6 ------> LTDC_R7
PJ4 ------> LTDC_R5
PJ5 ------> LTDC_R6
PJ3 ------> LTDC_R4
PJ2 ------> LTDC_R3
PJ0 ------> LTDC_R1
PJ1 ------> LTDC_R2
*/
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_4);
HAL_GPIO_DeInit(GPIOJ, GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_11
|GPIO_PIN_8|GPIO_PIN_10|GPIO_PIN_7|GPIO_PIN_9
|GPIO_PIN_6|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_3
|GPIO_PIN_2|GPIO_PIN_0|GPIO_PIN_1);
HAL_GPIO_DeInit(GPIOK, GPIO_PIN_7|GPIO_PIN_6|GPIO_PIN_5|GPIO_PIN_4
|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_0);
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_12);
HAL_GPIO_DeInit(GPIOI, GPIO_PIN_10|GPIO_PIN_9|GPIO_PIN_15|GPIO_PIN_14);
/* USER CODE BEGIN LTDC_MspDeInit 1 */
/* USER CODE END LTDC_MspDeInit 1 */
}
}
/**
* @brief QSPI MSP Initialization
* This function configures the hardware resources used in this example

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@ -23,6 +23,12 @@ menu "Onboard Peripheral Drivers"
select RT_SFUD_USING_QSPI
default n
config BSP_USING_LCD
bool "Enable LCD"
select BSP_USING_LTDC
select BSP_USING_SDRAM
default n
config PHY_USING_LAN8720A
bool
@ -70,12 +76,24 @@ menu "On-chip Peripheral Drivers"
select RT_USING_SPI
default n
config BSP_USING_WDT
bool "Enable Watchdog Timer"
select RT_USING_WDT
default n
config BSP_USING_SDIO
bool "Enable SDIO"
select RT_USING_SDIO
select RT_USING_DFS
default n
config BSP_USING_FMC
bool
default n
config BSP_USING_LTDC
bool
default n
endmenu
menu "Board extended module Drivers"

View File

@ -20,20 +20,24 @@ void SystemClock_Config(void)
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
/**Configure LSE Drive Capability
*/
HAL_PWR_EnableBkUpAccess();
/**Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/**Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 25;
RCC_OscInitStruct.PLL.PLLN = 432;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 2;
RCC_OscInitStruct.PLL.PLLQ = 9;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
@ -57,8 +61,17 @@ void SystemClock_Config(void)
{
Error_Handler();
}
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC|RCC_PERIPHCLK_USART1
|RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_CLK48;
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
PeriphClkInitStruct.PLLSAI.PLLSAIR = 5;
PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2;
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV2;
PeriphClkInitStruct.PLLSAIDivQ = 1;
PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_4;
PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();

View File

@ -0,0 +1,32 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2019-02-17 jinsheng first version
*/
#ifndef __LCD_PORT_H__
#define __LCD_PORT_H__
/* 4.3 inch screen, 480 * 272 */
#define LCD_WIDTH 480
#define LCD_HEIGHT 272
#define LCD_BITS_PER_PIXEL 16
#define LCD_BUF_SIZE (LCD_WIDTH * LCD_HEIGHT * LCD_BITS_PER_PIXEL / 8)
#define LCD_PIXEL_FORMAT RTGRAPHIC_PIXEL_FORMAT_RGB565
#define LCD_HSYNC_WIDTH 41
#define LCD_VSYNC_HEIGHT 10
#define LCD_HBP 13
#define LCD_VBP 2
#define LCD_HFP 32
#define LCD_VFP 2
#define LCD_BACKLIGHT_USING_GPIO
#define LCD_BL_GPIO_NUM GET_PIN(K, 3)
#define LCD_DISP_GPIO_NUM GET_PIN(I, 12)
#endif /* __LCD_PORT_H__ */

View File

@ -147,6 +147,8 @@
/* peripheral libraries and drivers */
/* sensors drivers */
/* miscellaneous packages */