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fix pendsv priority set by phoenix

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git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1126 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
wuyangyong 2010-11-28 07:07:41 +00:00
parent f438f02b0f
commit c7f84202bc
3 changed files with 9 additions and 3 deletions
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4
libcpu/arm/stm32/context_gcc.S
View File

@ -146,7 +146,9 @@ rt_hw_context_switch_to:
/* set the PendSV exception priority */
LDR r0, =NVIC_SYSPRI2
LDR r1, =NVIC_PENDSV_PRI
STR r1, [r0]
LDR.W r2, [r0,#0x00] ; read
ORR r1,r1,r2 ; modify
STR r1, [r0] ; write-back
LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
LDR r1, =NVIC_PENDSVSET

4
libcpu/arm/stm32/context_iar.S
View File

@ -143,7 +143,9 @@ rt_hw_context_switch_to:
; set the PendSV exception priority
LDR r0, =NVIC_SYSPRI2
LDR r1, =NVIC_PENDSV_PRI
STR r1, [r0]
LDR.W r2, [r0,#0x00] ; read
ORR r1,r1,r2 ; modify
STR r1, [r0] ; write-back
LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
LDR r1, =NVIC_PENDSVSET

4
libcpu/arm/stm32/context_rvds.S
View File

@ -149,7 +149,9 @@ rt_hw_context_switch_to PROC
; set the PendSV exception priority
LDR r0, =NVIC_SYSPRI2
LDR r1, =NVIC_PENDSV_PRI
STR r1, [r0]
LDR.W r2, [r0,#0x00] ; read
ORR r1,r1,r2 ; modify
STR r1, [r0] ; write-back
; trigger the PendSV exception (causes context switch)
LDR r0, =NVIC_INT_CTRL