[bsp]add cv1800b (#7753)
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commit
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cv1800b_milkv_duo_sd.dtb
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Image
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Image.lzma
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multi.its
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boot.sd
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mainmenu "RT-Thread Project Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config RTT_DIR
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string
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option env="RTT_ROOT"
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default "../.."
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config PKGS_DIR
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string
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option env="PKGS_ROOT"
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default "packages"
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source "$RTT_DIR/Kconfig"
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source "$PKGS_DIR/Kconfig"
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source "drivers/Kconfig"
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config BSP_USING_CV1800B
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bool
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select ARCH_RISCV64
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select RT_USING_COMPONENTS_INIT
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select RT_USING_USER_MAIN
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select RT_USING_CACHE
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select ARCH_MM_MMU
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default y
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config C906_PLIC_PHY_ADDR
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hex
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default 0x70000000
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config IRQ_MAX_NR
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int
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default 64
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config TIMER_CLK_FREQ
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int
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default 25000000
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config __STACKSIZE__
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int "stack size for interrupt"
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default 4096
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@ -0,0 +1,131 @@
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**中文** | [English](README_en.md)
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## 概述
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CV180ZB/CV1800B/CV1801B 是面向民用消费监控 IP 摄像机、居家智能等多项产品领域而推出的高性能、低功耗芯片，集成了 H.264/H.265 视频压缩编码器和 ISP；支持数字寛动态、 3D 降噪、除雾、镜头畸变校正等多种图像增强和矫正算法，为客户提供专业级的视频图像质量。
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1. 处理器内核
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- 主处理器 RISCV C906 @ 1.0Ghz
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- 32KB I-cache, 64KB D-Cache
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- 集成矢量(Vector)及浮点运算单元 (FPU) .
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- 协处理器 RISCV C906 @ 700Mhz
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- 集成浮点运算单元 (FPU)
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2. 存储器接口
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- 内建 DRAM : DDR2 16bitx1, 最高速率达 1333Mbps , 容量512Mbit (64MB)
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- 支持SPI NOR flash 接口 (1.8V / 3.0V)
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- 支持 1, 2, 4 线模式
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- 最大支持 256MByte
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- 支持 SPI Nand flash 接口 (1.8V / 3.0V)
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- 支持 1KB/2KB/4KB page (对应的最大容量 16GB/32GB/64GB)
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- 使用器件本身内建的 ECC 模块
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3. 外设
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- Up to 26 GPIO pins on the MilkV-Duo 40-pin header provide access to internal peripherals such as SDIO, I2C, PWM, SPI, J-TAG, and UART
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- Up to 3x I2C
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- Up to 5x UART
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- Up to 1x SDIO1
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- Up to 1x SPI
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- Up to 2x ADC
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- Up to 7x PWM
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- Up to 1x RUN
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- Up to 1x JTAG
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- 集成 MAC PHY 支持 10/100Mbps 全双工或半双工模式
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- 一个 USB Host / device 接口
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## Toolchain 下载
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下载 `riscv64-unknown-linux-musl-gcc` 的工具链: [https://github.com/RT-Thread/toolchains-ci/releases/download/v1.7/riscv64-linux-musleabi_for_x86_64-pc-linux-gnu_latest.tar.bz2](https://github.com/RT-Thread/toolchains-ci/releases/download/v1.7/riscv64-linux-musleabi_for_x86_64-pc-linux-gnu_latest.tar.bz2)
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> 注：
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当前 bsp 只支持 Linux 编译
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正确解压后，在`rtconfig.py`中将 `riscv64-unknown-linux-musl-gcc` 工具链的本地路径加入 `EXEC_PATH` 或通过 `RTT_EXEC_PATH` 环境变量指定路径。
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```shell
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$ export RTT_EXEC_PATH=/opt/riscv64-linux-musleabi_for_x86_64-pc-linux-gnu/bin
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```
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## 编译
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1. 依赖安装
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```shell
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$ sudo apt install -y device-tree-compiler
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```
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2. Linux平台下，可以先执行：
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```shell
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$ scons --menuconfig
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```
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它会自动下载env相关脚本到~/.env目录，然后执行
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```shell
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$ source ~/.env/env.sh
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$ pkgs --update
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```
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更新完软件包后，执行 `scons -j10` 或 `scons -j10 --verbose` 来编译这个板级支持包。或者通过 `scons --exec-path="GCC工具链路径"` 命令，在指定工具链位置的同时直接编译。编译正确无误，会产生rtthread.elf文件。
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编译完成后脚本自动调用 `./mksdimg.sh` 脚本进行打包，并生成 `boot.sd`, 该文件即为 SD 卡启动的 kernel 文件。
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## 运行
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1. 将 SD 卡分为 2 个分区，第 1 个分区用于存放 bin 文件，第 2 个分区用于作为数据存储分区，分区格式为 `FAT32`。
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2. 将根目录下的 `fip.bin` 和 `boot.sd` 复制 SD 卡第一个分区中。后续更新固件只需要复制 `boot.sd` 文件即可。
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其中：
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- fip.bin：fsbl、 opensbi 和 uboot 打包后的 bin 文件
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- boot.sd：kernel 打包后的 bin 文件
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更新完 `boot.sd` 后， 重新上电可以看到串口的输出信息：
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```shell
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U-Boot 2021.10 (Jun 26 2023 - 14:09:06 +0800)cvitek_cv180x
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DRAM: 63.3 MiB
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gd->relocaddr=0x82435000. offset=0x2235000
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MMC: cv-sd@4310000: 0
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Loading Environment from <NULL>... OK
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In: serial
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Out: serial
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Err: serial
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Net:
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Warning: ethernet@4070000 (eth0) using random MAC address - 62:80:19:6c:d4:64
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eth0: ethernet@4070000
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Hit any key to stop autoboot: 0
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Boot from SD ...
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switch to partitions #0, OK
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mmc0 is current device
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132692 bytes read in 12 ms (10.5 MiB/s)
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## Loading kernel from FIT Image at 81400000 ...
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Using 'config-cv1800b_milkv_duo_sd' configuration
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Trying 'kernel-1' kernel subimage
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Verifying Hash Integrity ... crc32+ OK
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## Loading fdt from FIT Image at 81400000 ...
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Using 'config-cv1800b_milkv_duo_sd' configuration
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Trying 'fdt-cv1800b_milkv_duo_sd' fdt subimage
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Verifying Hash Integrity ... sha256+ OK
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Booting using the fdt blob at 0x8141b590
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Uncompressing Kernel Image
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Decompressing 296768 bytes used 42ms
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Loading Device Tree to 0000000081be5000, end 0000000081becb60 ... OK
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Starting kernel ...
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heap: [0x802766b0 - 0x812766b0]
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\ | /
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- RT - Thread Smart Operating System
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/ | \ 5.0.1 build Jun 28 2023 23:44:36
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2006 - 2022 Copyright by RT-Thread team
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Hello RT-Smart!
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msh />
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```
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## 驱动支持列表
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| 驱动 | 支持情况 | 备注 |
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| :--- | :------- | :---------------- |
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| UART | 支持 | 默认波特率115200 |
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## 支持开发板
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- milk-v duo: [https://milkv.io/duo](https://milkv.io/duo)
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## 联系人信息
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维护人：[flyingcys](https://github.com/flyingcys)
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[中文](README.md) | **English**
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## Overview
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CV180ZB/CV1800B/CV1801B are high-performance, low-power chips designed for consumer surveillance IP cameras, smart home devices, and other product areas. They integrate H.264/H.265 video compression encoders and ISPs, and support various image enhancement and correction algorithms such as digital wide dynamic range, 3D noise reduction, defogging, and lens distortion correction, providing professional-grade video image quality to customers.
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1. Processor Core
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- Main processor: RISCV C906 @ 1.0Ghz
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- 32KB I-cache, 64KB D-Cache
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- Integrated vector and floating-point units (FPU).
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- Coprocessor: RISCV C906 @ 700Mhz
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- Integrated floating-point unit (FPU).
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2. Memory Interface
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- Built-in DRAM: DDR2 16bitx1, with a maximum speed of 1333Mbps, capacity of 512Mbit (64MB).
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- Support for SPI NOR flash interface (1.8V / 3.0V)
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- Support for 1, 2, 4-wire modes
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- Maximum support of 256MBytes
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- Support for SPI Nand flash interface (1.8V / 3.0V)
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- Support for 1KB/2KB/4KB page (corresponding to a maximum capacity of 16GB/32GB/64GB)
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- Use the built-in ECC module of the device itself
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3. Peripherals
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- Up to 26 GPIO pins on the MilkV-Duo 40-pin header provide access to internal peripherals such as SDIO, I2C, PWM, SPI, J-TAG, and UART.
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- Up to 3x I2C
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- Up to 5x UART
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- Up to 1x SDIO1
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- Up to 1x SPI
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- Up to 2x ADC
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- Up to 7x PWM
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- Up to 1x RUN
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- Up to 1x JTAG
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- Integrated MAC PHY supporting 10/100Mbps full-duplex or half-duplex mode
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- One USB Host / device interface
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## Toolchain Download
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Download the `riscv64-unknown-linux-musl-gcc` toolchain from: [https://github.com/RT-Thread/toolchains-ci/releases/download/v1.7/riscv64-linux-musleabi_for_x86_64-pc-linux-gnu_latest.tar.bz2](https://github.com/RT-Thread/toolchains-ci/releases/download/v1.7/riscv64-linux-musleabi_for_x86_64-pc-linux-gnu_latest.tar.bz2)
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> Note:
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The current BSP only supports Linux compilation.
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After correct extraction, add the local path of the `riscv64-unknown-linux-musl-gcc` toolchain to `EXEC_PATH` in `rtconfig.py`, or specify the path through the `RTT_EXEC_PATH` environment variable.
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```shell
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$ export RTT_EXEC_PATH=/opt/riscv64-linux-musleabi_for_x86_64-pc-linux-gnu/bin
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```
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## Compilation
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1. Installing Dependencies
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```shell
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$ sudo apt install -y device-tree-compiler
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```
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On the Linux platform, you can execute:
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```shell
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$ scons --menuconfig
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```
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It will automatically download environment-related scripts to the ~/.env directory, and then execute
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```shell
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$ source ~/.env/env.sh
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$ pkgs --update
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```
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After updating the software packages, use `scons -j10` or `scons -j10 --verbose` to compile this board support package. Alternatively, you can use the command `scons --exec-path="GCC_toolchain_path"` to specify the toolchain location for compilation. If the compilation is successful, an rtthread.elf file will be generated.
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After the compilation is completed, the script automatically calls the `./mksdimg.sh` script to package and generate the `boot.sd` file, which is the kernel file for SD card boot.
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## Running
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1. Divide the SD card into 2 partitions, with the first partition used to store bin files and the second partition used as a data storage partition. The partition format is FAT32.
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2. Copy the `fip.bin` and `boot.sd` files from the root directory to the first partition of the SD card. For subsequent firmware updates, you only need to copy the `boot.sd` file.
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Where:
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- fip.bin: the bin file after fsbl、opensbi and U-Boot are packaged
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- boot.sd: the bin file after the kernel is packaged
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After updating `boot.sd`, power on again and you will see the serial output information:
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```shell
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U-Boot 2021.10 (Jun 26 2023 - 14:09:06 +0800)cvitek_cv180x
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DRAM: 63.3 MiB
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gd->relocaddr=0x82435000. offset=0x2235000
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MMC: cv-sd@4310000: 0
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Loading Environment from <NULL>... OK
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In: serial
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Out: serial
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Err: serial
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Net:
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Warning: ethernet@4070000 (eth0) using random MAC address - 62:80:19:6c:d4:64
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eth0: ethernet@4070000
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Hit any key to stop autoboot: 0
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Boot from SD ...
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switch to partitions #0, OK
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mmc0 is current device
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132692 bytes read in 12 ms (10.5 MiB/s)
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## Loading kernel from FIT Image at 81400000 ...
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Using 'config-cv1800b_milkv_duo_sd' configuration
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Trying 'kernel-1' kernel subimage
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Verifying Hash Integrity ... crc32+ OK
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## Loading fdt from FIT Image at 81400000 ...
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Using 'config-cv1800b_milkv_duo_sd' configuration
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Trying 'fdt-cv1800b_milkv_duo_sd' fdt subimage
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Verifying Hash Integrity ... sha256+ OK
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Booting using the fdt blob at 0x8141b590
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Uncompressing Kernel Image
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Decompressing 296768 bytes used 42ms
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Loading Device Tree to 0000000081be5000, end 0000000081becb60 ... OK
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Starting kernel ...
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heap: [0x802766b0 - 0x812766b0]
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\ | /
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- RT - Thread Smart Operating System
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/ | \ 5.0.1 build Jun 28 2023 23:44:36
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2006 - 2022 Copyright by RT-Thread team
|
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Hello RT-Smart!
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msh />
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```
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## Driver Support List
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| Driver | Support Status | Remarks |
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| :----- | :------------- | :--------------------- |
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| UART | Supported | Default baud rate 115200 |
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## Supported Development Boards
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- milk-v duo: [https://milkv.io/duo](https://milkv.io/duo)
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## Contact information
|
||||
|
||||
Maintenance person：[flyingcys](https://github.com/flyingcys)
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# for module compiling
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import os
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from building import *
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cwd = GetCurrentDir()
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objs = []
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list = os.listdir(cwd)
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for d in list:
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path = os.path.join(cwd, d)
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if os.path.isfile(os.path.join(path, 'SConscript')):
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objs = objs + SConscript(os.path.join(d, 'SConscript'))
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Return('objs')
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import os
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import sys
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import rtconfig
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from rtconfig import RTT_ROOT
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sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
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from building import *
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TARGET = 'rtthread.' + rtconfig.TARGET_EXT
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DefaultEnvironment(tools=[])
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env = Environment(tools = ['mingw'],
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AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
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CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
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CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
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AR = rtconfig.AR, ARFLAGS = '-rc',
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LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
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env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
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env['ASCOM'] = env['ASPPCOM']
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Export('RTT_ROOT')
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Export('rtconfig')
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rtconfig.CPU='virt64'
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rtconfig.ARCH='risc-v'
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# prepare building environment
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objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False)
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stack_size = 4096
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stack_lds = open('link_stacksize.lds', 'w')
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if GetDepend('__STACKSIZE__'): stack_size = GetDepend('__STACKSIZE__')
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stack_lds.write('__STACKSIZE__ = %d;\n' % stack_size)
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stack_lds.close()
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# make a building
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DoBuilding(TARGET, objs)
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from building import *
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cwd = GetCurrentDir()
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src = Glob('*.c') + Glob('*.cpp')
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CPPPATH = [cwd]
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group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
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Return('group')
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/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
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* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023/06/25 flyingcys first version
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||||
*/
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||||
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||||
#include <rtthread.h>
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||||
#include <stdio.h>
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||||
|
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int main(void)
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{
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rt_kprintf("Hello RT-Smart!\n");
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return 0;
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}
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Binary file not shown.
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@ -0,0 +1,31 @@
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menu "General Drivers Configuration"
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|
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menuconfig BSP_USING_UART
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bool "Using UART"
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select RT_USING_SERIAL
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default y
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if BSP_USING_UART
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config RT_USING_UART0
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bool "Enable UART 0"
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default y
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config RT_USING_UART1
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bool "Enable UART 1"
|
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default n
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||||
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||||
config RT_USING_UART2
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bool "Enable UART 2"
|
||||
default n
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config RT_USING_UART3
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bool "Enable UART 3"
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default n
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||||
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config RT_USING_UART4
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||||
bool "Enable UART 4"
|
||||
default n
|
||||
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
from building import *
|
||||
|
||||
cwd = GetCurrentDir()
|
||||
src = Glob('*.c') + Glob('*.cpp') + Glob('*.S')
|
||||
CPPPATH = [cwd]
|
||||
|
||||
group = DefineGroup('Driver', src, depend = [''], CPPPATH = CPPPATH)
|
||||
|
||||
Return('group')
|
||||
|
|
@ -0,0 +1,122 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023/06/25 flyingcys first version
|
||||
*/
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
|
||||
#include "board.h"
|
||||
|
||||
#include "sbi.h"
|
||||
|
||||
#ifdef RT_USING_SMART
|
||||
#include "riscv_mmu.h"
|
||||
#include "mmu.h"
|
||||
#include "page.h"
|
||||
#include "lwp_arch.h"
|
||||
|
||||
rt_region_t init_page_region = {(rt_size_t)RT_HW_PAGE_START, (rt_size_t)RT_HW_PAGE_END};
|
||||
|
||||
extern size_t MMUTable[];
|
||||
|
||||
struct mem_desc platform_mem_desc[] = {
|
||||
{KERNEL_VADDR_START, (rt_size_t)RT_HW_PAGE_END - 1, (rt_size_t)ARCH_MAP_FAILED, NORMAL_MEM},
|
||||
{0x1000, ((KERNEL_VADDR_START - 1) & 0xfffff000) - 1, (rt_size_t)ARCH_MAP_FAILED, DEVICE_MEM},
|
||||
};
|
||||
|
||||
#define NUM_MEM_DESC (sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]))
|
||||
|
||||
#endif /* RT_USING_SMART */
|
||||
|
||||
void init_bss(void)
|
||||
{
|
||||
unsigned int *dst;
|
||||
|
||||
dst = &__bss_start;
|
||||
while (dst < &__bss_end)
|
||||
{
|
||||
*dst++ = 0;
|
||||
}
|
||||
}
|
||||
|
||||
static void __rt_assert_handler(const char *ex_string, const char *func, rt_size_t line)
|
||||
{
|
||||
rt_kprintf("(%s) assertion failed at function:%s, line number:%d \n", ex_string, func, line);
|
||||
asm volatile("ebreak" ::
|
||||
: "memory");
|
||||
}
|
||||
|
||||
void primary_cpu_entry(void)
|
||||
{
|
||||
extern void entry(void);
|
||||
|
||||
/* disable global interrupt */
|
||||
rt_hw_interrupt_disable();
|
||||
rt_assert_set_hook(__rt_assert_handler);
|
||||
|
||||
entry();
|
||||
}
|
||||
|
||||
#define IOREMAP_SIZE (1ul << 30)
|
||||
|
||||
#ifndef ARCH_KERNEL_IN_HIGH_VA
|
||||
#define IOREMAP_VEND USER_VADDR_START
|
||||
#else
|
||||
#define IOREMAP_VEND 0ul
|
||||
#endif
|
||||
|
||||
void rt_hw_board_init(void)
|
||||
{
|
||||
#ifdef RT_USING_SMART
|
||||
/* init data structure */
|
||||
rt_hw_mmu_map_init(&rt_kernel_space, (void *)(IOREMAP_VEND - IOREMAP_SIZE), IOREMAP_SIZE, (rt_size_t *)MMUTable, PV_OFFSET);
|
||||
|
||||
/* init page allocator */
|
||||
rt_page_init(init_page_region);
|
||||
|
||||
/* setup region, and enable MMU */
|
||||
rt_hw_mmu_setup(&rt_kernel_space, platform_mem_desc, NUM_MEM_DESC);
|
||||
#endif
|
||||
|
||||
/* initialize memory system */
|
||||
#ifdef RT_USING_HEAP
|
||||
rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
|
||||
#endif
|
||||
|
||||
/* initalize interrupt */
|
||||
rt_hw_interrupt_init();
|
||||
|
||||
/* init rtthread hardware */
|
||||
rt_hw_tick_init();
|
||||
|
||||
#ifdef RT_USING_SERIAL
|
||||
rt_hw_uart_init();
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_CONSOLE
|
||||
/* set console device */
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif /* RT_USING_CONSOLE */
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_HEAP
|
||||
rt_kprintf("heap: [0x%08x - 0x%08x]\n", (rt_ubase_t)RT_HW_HEAP_BEGIN, (rt_ubase_t)RT_HW_HEAP_END);
|
||||
#endif /* RT_USING_HEAP */
|
||||
}
|
||||
|
||||
void rt_hw_cpu_reset(void)
|
||||
{
|
||||
sbi_shutdown();
|
||||
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset machine);
|
||||
|
|
@ -0,0 +1,32 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023/06/25 flyingcys first version
|
||||
*/
|
||||
|
||||
#ifndef BOARD_H__
|
||||
#define BOARD_H__
|
||||
|
||||
#include <rtconfig.h>
|
||||
#include "drv_uart.h"
|
||||
#include "tick.h"
|
||||
|
||||
extern unsigned int __bss_start;
|
||||
extern unsigned int __bss_end;
|
||||
|
||||
#ifndef RT_USING_SMART
|
||||
#define KERNEL_VADDR_START 0x0
|
||||
#endif
|
||||
|
||||
#define RT_HW_HEAP_BEGIN ((void *)&__bss_end)
|
||||
#define RT_HW_HEAP_END ((void *)(RT_HW_HEAP_BEGIN + 16 * 1024 * 1024))
|
||||
#define RT_HW_PAGE_START RT_HW_HEAP_END
|
||||
#define RT_HW_PAGE_END ((void *)(KERNEL_VADDR_START + 32 * 1024 * 1024))
|
||||
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,296 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023/06/25 flyingcys first version
|
||||
*/
|
||||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
#include "board.h"
|
||||
#include "drv_uart.h"
|
||||
|
||||
#define DBG_TAG "DRV.UART"
|
||||
#define DBG_LVL DBG_WARNING
|
||||
#include <rtdbg.h>
|
||||
|
||||
/*
|
||||
* The Synopsys DesignWare 8250 has an extra feature whereby it detects if the
|
||||
* LCR is written whilst busy. If it is, then a busy detect interrupt is
|
||||
* raised, the LCR needs to be rewritten and the uart status register read.
|
||||
*/
|
||||
|
||||
#define UART_RX 0 /* In: Receive buffer */
|
||||
#define UART_TX 0 /* Out: Transmit buffer */
|
||||
|
||||
#define UART_DLL 0 /* Out: Divisor Latch Low */
|
||||
#define UART_DLM 1 /* Out: Divisor Latch High */
|
||||
|
||||
#define UART_IER 1 /* Out: Interrupt Enable Register */
|
||||
#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */
|
||||
|
||||
#define UART_SSR 0x22 /* In: Software Reset Register */
|
||||
#define UART_USR 0x1f /* UART Status Register */
|
||||
|
||||
#define UART_LCR 3 /* Out: Line Control Register */
|
||||
#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
|
||||
#define UART_LCR_SPAR 0x20 /* Stick parity (?) */
|
||||
#define UART_LCR_PARITY 0x8 /* Parity Enable */
|
||||
#define UART_LCR_STOP 0x4 /* Stop bits: 0=1 bit, 1=2 bits */
|
||||
#define UART_LCR_WLEN8 0x3 /* Wordlength: 8 bits */
|
||||
|
||||
#define UART_MCR 4 /* Out: Modem Control Register */
|
||||
#define UART_MCR_RTS 0x02 /* RTS complement */
|
||||
|
||||
#define UART_LSR 5 /* In: Line Status Register */
|
||||
#define UART_LSR_BI 0x10 /* Break interrupt indicator */
|
||||
#define UART_LSR_DR 0x01 /* Receiver data ready */
|
||||
|
||||
#define UART_IIR 2 /* In: Interrupt ID Register */
|
||||
#define UART_IIR_NO_INT 0x01 /* No interrupts pending */
|
||||
#define UART_IIR_BUSY 0x07 /* DesignWare APB Busy Detect */
|
||||
#define UART_IIR_RX_TIMEOUT 0x0c /* OMAP RX Timeout interrupt */
|
||||
|
||||
#define UART_FCR 2 /* Out: FIFO Control Register */
|
||||
#define UART_FCR_EN_FIFO 0x01 /* Enable the FIFO */
|
||||
#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
|
||||
#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
|
||||
|
||||
struct hw_uart_device
|
||||
{
|
||||
rt_ubase_t hw_base;
|
||||
rt_uint32_t irqno;
|
||||
};
|
||||
|
||||
#define BSP_DEFINE_UART_DEVICE(no) \
|
||||
static struct hw_uart_device _uart##no##_device = \
|
||||
{ \
|
||||
UART##no##_BASE, \
|
||||
UART##no##_IRQ \
|
||||
}; \
|
||||
static struct rt_serial_device _serial##no;
|
||||
|
||||
#ifdef RT_USING_UART0
|
||||
BSP_DEFINE_UART_DEVICE(0);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_UART1
|
||||
BSP_DEFINE_UART_DEVICE(1);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_UART2
|
||||
BSP_DEFINE_UART_DEVICE(2);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_UART3
|
||||
BSP_DEFINE_UART_DEVICE(3);
|
||||
#endif
|
||||
|
||||
rt_inline rt_uint32_t dw8250_read32(rt_ubase_t addr, rt_ubase_t offset)
|
||||
{
|
||||
return *((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT)));
|
||||
}
|
||||
|
||||
rt_inline void dw8250_write32(rt_ubase_t addr, rt_ubase_t offset, rt_uint32_t value)
|
||||
{
|
||||
*((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT))) = value;
|
||||
|
||||
if (offset == UART_LCR)
|
||||
{
|
||||
int tries = 1000;
|
||||
|
||||
/* Make sure LCR write wasn't ignored */
|
||||
while (tries--)
|
||||
{
|
||||
unsigned int lcr = dw8250_read32(addr, UART_LCR);
|
||||
|
||||
if ((value & ~UART_LCR_SPAR) == (lcr & ~UART_LCR_SPAR))
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
dw8250_write32(addr, UART_FCR, UART_FCR_EN_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
|
||||
dw8250_read32(addr, UART_RX);
|
||||
|
||||
*((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT))) = value;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static rt_err_t dw8250_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
|
||||
{
|
||||
rt_base_t base, rate;
|
||||
struct hw_uart_device *uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct hw_uart_device *)serial->parent.user_data;
|
||||
base = uart->hw_base;
|
||||
|
||||
/* Resset UART */
|
||||
dw8250_write32(base, UART_SSR, 1);
|
||||
dw8250_write32(base, UART_SSR, 0);
|
||||
|
||||
dw8250_write32(base, UART_IER, !UART_IER_RDI);
|
||||
dw8250_write32(base, UART_FCR, UART_FCR_EN_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
|
||||
|
||||
/* Disable flow ctrl */
|
||||
dw8250_write32(base, UART_MCR, 0);
|
||||
/* Clear RTS */
|
||||
dw8250_write32(base, UART_MCR, dw8250_read32(base, UART_MCR) | UART_MCR_RTS);
|
||||
|
||||
rate = UART_INPUT_CLK / 16 / serial->config.baud_rate;
|
||||
|
||||
/* Enable access DLL & DLH */
|
||||
dw8250_write32(base, UART_LCR, dw8250_read32(base, UART_LCR) | UART_LCR_DLAB);
|
||||
dw8250_write32(base, UART_DLL, (rate & 0xff));
|
||||
dw8250_write32(base, UART_DLM, (rate & 0xff00) >> 8);
|
||||
/* Clear DLAB bit */
|
||||
dw8250_write32(base, UART_LCR, dw8250_read32(base, UART_LCR) & (~UART_LCR_DLAB));
|
||||
|
||||
dw8250_write32(base, UART_LCR, (dw8250_read32(base, UART_LCR) & (~UART_LCR_WLEN8)) | UART_LCR_WLEN8);
|
||||
dw8250_write32(base, UART_LCR, dw8250_read32(base, UART_LCR) & (~UART_LCR_STOP));
|
||||
dw8250_write32(base, UART_LCR, dw8250_read32(base, UART_LCR) & (~UART_LCR_PARITY));
|
||||
|
||||
dw8250_write32(base, UART_IER, UART_IER_RDI);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t dw8250_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
|
||||
{
|
||||
struct hw_uart_device *uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct hw_uart_device *)serial->parent.user_data;
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_CLR_INT:
|
||||
/* Disable rx irq */
|
||||
dw8250_write32(uart->hw_base, UART_IER, !UART_IER_RDI);
|
||||
rt_hw_interrupt_mask(uart->irqno);
|
||||
break;
|
||||
|
||||
case RT_DEVICE_CTRL_SET_INT:
|
||||
/* Enable rx irq */
|
||||
dw8250_write32(uart->hw_base, UART_IER, UART_IER_RDI);
|
||||
rt_hw_interrupt_umask(uart->irqno);
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static int dw8250_uart_putc(struct rt_serial_device *serial, char c)
|
||||
{
|
||||
rt_base_t base;
|
||||
struct hw_uart_device *uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct hw_uart_device *)serial->parent.user_data;
|
||||
base = uart->hw_base;
|
||||
|
||||
while ((dw8250_read32(base, UART_USR) & 0x2) == 0)
|
||||
{
|
||||
}
|
||||
|
||||
dw8250_write32(base, UART_TX, c);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int dw8250_uart_getc(struct rt_serial_device *serial)
|
||||
{
|
||||
int ch = -1;
|
||||
rt_base_t base;
|
||||
struct hw_uart_device *uart;
|
||||
|
||||
RT_ASSERT(serial != RT_NULL);
|
||||
uart = (struct hw_uart_device *)serial->parent.user_data;
|
||||
base = uart->hw_base;
|
||||
|
||||
if ((dw8250_read32(base, UART_LSR) & 0x1))
|
||||
{
|
||||
ch = dw8250_read32(base, UART_RX) & 0xff;
|
||||
}
|
||||
|
||||
return ch;
|
||||
}
|
||||
|
||||
static const struct rt_uart_ops _uart_ops =
|
||||
{
|
||||
dw8250_uart_configure,
|
||||
dw8250_uart_control,
|
||||
dw8250_uart_putc,
|
||||
dw8250_uart_getc,
|
||||
};
|
||||
|
||||
static void rt_hw_uart_isr(int irqno, void *param)
|
||||
{
|
||||
unsigned int iir, status;
|
||||
struct rt_serial_device *serial = (struct rt_serial_device *)param;
|
||||
struct hw_uart_device *uart = (struct hw_uart_device *)serial->parent.user_data;
|
||||
|
||||
iir = dw8250_read32(uart->hw_base, UART_IIR);
|
||||
|
||||
/* If don't do this in non-DMA mode then the "RX TIMEOUT" interrupt will fire forever. */
|
||||
if ((iir & 0x3f) == UART_IIR_RX_TIMEOUT)
|
||||
{
|
||||
status = dw8250_read32(uart->hw_base, UART_LSR);
|
||||
|
||||
if (!(status & (UART_LSR_DR | UART_LSR_BI)))
|
||||
{
|
||||
dw8250_read32(uart->hw_base, UART_RX);
|
||||
}
|
||||
}
|
||||
|
||||
if (!(iir & UART_IIR_NO_INT))
|
||||
{
|
||||
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
|
||||
}
|
||||
|
||||
if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY)
|
||||
{
|
||||
/* Clear the USR */
|
||||
dw8250_read32(uart->hw_base, UART_USR);
|
||||
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
int rt_hw_uart_init(void)
|
||||
{
|
||||
struct hw_uart_device* uart;
|
||||
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
||||
|
||||
config.baud_rate = 115200;
|
||||
|
||||
#define BSP_INSTALL_UART_DEVICE(no) \
|
||||
uart = &_uart##no##_device; \
|
||||
_serial##no.ops = &_uart_ops; \
|
||||
_serial##no.config = config; \
|
||||
rt_hw_serial_register(&_serial##no, "uart" #no, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart); \
|
||||
rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial##no, "uart" #no);
|
||||
|
||||
#ifdef RT_USING_UART0
|
||||
BSP_INSTALL_UART_DEVICE(0);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_UART1
|
||||
BSP_INSTALL_UART_DEVICE(1);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_UART2
|
||||
BSP_INSTALL_UART_DEVICE(2);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_UART3
|
||||
BSP_INSTALL_UART_DEVICE(3);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,35 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2023/06/25 flyingcys first version
|
||||
*/
|
||||
#ifndef __DRV_USART_H__
|
||||
#define __DRV_USART_H__
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "rtdevice.h"
|
||||
#include <rthw.h>
|
||||
|
||||
#define UART_REG_SHIFT 0x2 /* Register Shift*/
|
||||
#define UART_INPUT_CLK 25000000
|
||||
|
||||
#define UART0_BASE 0x04140000
|
||||
#define UART1_BASE 0x04150000
|
||||
#define UART2_BASE 0x04160000
|
||||
#define UART3_BASE 0x04170000
|
||||
#define UART4_BASE 0x041C0000
|
||||
|
||||
#define UART_IRQ_BASE (44)
|
||||
#define UART0_IRQ (UART_IRQ_BASE + 0)
|
||||
#define UART1_IRQ (UART_IRQ_BASE + 1)
|
||||
#define UART2_IRQ (UART_IRQ_BASE + 2)
|
||||
#define UART3_IRQ (UART_IRQ_BASE + 3)
|
||||
#define UART4_IRQ (UART_IRQ_BASE + 4)
|
||||
|
||||
int rt_hw_uart_init(void);
|
||||
|
||||
#endif /* __DRV_USART_H__ */
|
||||
Binary file not shown.
|
|
@ -0,0 +1,197 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2023, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2020/12/12 bernard The first version
|
||||
*/
|
||||
|
||||
INCLUDE "link_stacksize.lds"
|
||||
|
||||
OUTPUT_ARCH( "riscv" )
|
||||
|
||||
/*
|
||||
* Memory layout:
|
||||
* 0x10200000 - 0x10201000: Bootloader
|
||||
* 0x10201000 - 0x10A00000: Kernel
|
||||
* 0x10A00000 - 0x11200000: Heap
|
||||
*/
|
||||
|
||||
MEMORY
|
||||
{
|
||||
SRAM : ORIGIN = 0x80200000, LENGTH = 32M
|
||||
}
|
||||
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x80200000 ;
|
||||
|
||||
/* __STACKSIZE__ = 4096; */
|
||||
__text_start = .;
|
||||
.start :
|
||||
{
|
||||
*(.start);
|
||||
} > SRAM
|
||||
|
||||
. = ALIGN(8);
|
||||
|
||||
.text :
|
||||
{
|
||||
*(.text) /* remaining code */
|
||||
*(.text.*) /* remaining code */
|
||||
*(.rodata) /* read-only data (constants) */
|
||||
*(.rodata*)
|
||||
*(.glue_7)
|
||||
*(.glue_7t)
|
||||
*(.gnu.linkonce.t*)
|
||||
|
||||
/* section information for finsh shell */
|
||||
. = ALIGN(8);
|
||||
__fsymtab_start = .;
|
||||
KEEP(*(FSymTab))
|
||||
__fsymtab_end = .;
|
||||
. = ALIGN(8);
|
||||
__vsymtab_start = .;
|
||||
KEEP(*(VSymTab))
|
||||
__vsymtab_end = .;
|
||||
. = ALIGN(8);
|
||||
|
||||
/* section information for initial. */
|
||||
. = ALIGN(8);
|
||||
__rt_init_start = .;
|
||||
KEEP(*(SORT(.rti_fn*)))
|
||||
__rt_init_end = .;
|
||||
. = ALIGN(8);
|
||||
|
||||
__rt_utest_tc_tab_start = .;
|
||||
KEEP(*(UtestTcTab))
|
||||
__rt_utest_tc_tab_end = .;
|
||||
|
||||
. = ALIGN(8);
|
||||
_etext = .;
|
||||
} > SRAM
|
||||
|
||||
.eh_frame_hdr :
|
||||
{
|
||||
*(.eh_frame_hdr)
|
||||
*(.eh_frame_entry)
|
||||
} > SRAM
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } > SRAM
|
||||
|
||||
. = ALIGN(8);
|
||||
__text_end = .;
|
||||
__text_size = __text_end - __text_start;
|
||||
|
||||
.data :
|
||||
{
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
|
||||
*(.data1)
|
||||
*(.data1.*)
|
||||
|
||||
. = ALIGN(8);
|
||||
PROVIDE( __global_pointer$ = . + 0x800 );
|
||||
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
} > SRAM
|
||||
|
||||
. = ALIGN(8);
|
||||
.ctors :
|
||||
{
|
||||
PROVIDE(__ctors_start__ = .);
|
||||
KEEP(*(SORT(.init_array.*)))
|
||||
KEEP(*(.init_array))
|
||||
PROVIDE(__ctors_end__ = .);
|
||||
} > SRAM
|
||||
|
||||
.dtors :
|
||||
{
|
||||
PROVIDE(__dtors_start__ = .);
|
||||
KEEP(*(SORT(.fini_array.*)))
|
||||
KEEP(*(.fini_array))
|
||||
PROVIDE(__dtors_end__ = .);
|
||||
} > SRAM
|
||||
|
||||
/* stack for dual core */
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(64);
|
||||
__stack_start__ = .;
|
||||
|
||||
. += __STACKSIZE__;
|
||||
__stack_cpu0 = .;
|
||||
|
||||
. += __STACKSIZE__;
|
||||
__stack_cpu1 = .;
|
||||
} > SRAM
|
||||
|
||||
. = ALIGN(8);
|
||||
|
||||
.osdebug :
|
||||
{
|
||||
_osdebug_start = .;
|
||||
. += 87K;
|
||||
_osdebug_end = .;
|
||||
} > SRAM
|
||||
|
||||
. = ALIGN(8);
|
||||
|
||||
.sbss :
|
||||
{
|
||||
__bss_start = .;
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
*(.dynsbss)
|
||||
*(.scommon)
|
||||
} > SRAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(.dynbss)
|
||||
*(COMMON)
|
||||
__bss_end = .;
|
||||
} > SRAM
|
||||
|
||||
_end = .;
|
||||
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||
* of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
}
|
||||
|
|
@ -0,0 +1 @@
|
|||
__STACKSIZE__ = 4096;
|
||||
Binary file not shown.
|
|
@ -0,0 +1,7 @@
|
|||
#/bin/sh
|
||||
set -e
|
||||
echo "start compress kernel..."
|
||||
|
||||
lzma -c -9 -f -k Image > Image.lzma
|
||||
|
||||
./mkimage -f multi.its -r boot.sd
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
/*
|
||||
* U-Boot uImage source file with multiple kernels, ramdisks and FDT blobs
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
description = "Various kernels, ramdisks and FDT blobs";
|
||||
#address-cells = <2>;
|
||||
|
||||
images {
|
||||
kernel-1 {
|
||||
description = "cvitek kernel";
|
||||
data = /incbin/("./Image.lzma");
|
||||
type = "kernel";
|
||||
arch = "riscv";
|
||||
os = "linux";
|
||||
compression = "lzma";
|
||||
load = <0x0 0x80200000>;
|
||||
entry = <0x0 0x80200000>;
|
||||
hash-2 {
|
||||
algo = "crc32";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
/*FDT*/
|
||||
|
||||
fdt-cv1800b_milkv_duo_sd {
|
||||
description = "cvitek device tree - cv1800b_milkv_duo_sd";
|
||||
data = /incbin/("./cv1800b_milkv_duo_sd.dtb");
|
||||
type = "flat_dt";
|
||||
arch = "riscv";
|
||||
compression = "none";
|
||||
hash-1 {
|
||||
algo = "sha256";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
|
||||
};
|
||||
|
||||
/*CFG*/
|
||||
configurations {
|
||||
|
||||
config-cv1800b_milkv_duo_sd {
|
||||
description = "boot cvitek system with board cv1800b_milkv_duo_sd";
|
||||
kernel = "kernel-1";
|
||||
fdt = "fdt-cv1800b_milkv_duo_sd";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
|
||||
};
|
||||
|
|
@ -0,0 +1,271 @@
|
|||
#ifndef RT_CONFIG_H__
|
||||
#define RT_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* RT-Thread Project Configuration */
|
||||
|
||||
/* RT-Thread Kernel */
|
||||
|
||||
#define RT_NAME_MAX 8
|
||||
#define RT_USING_SMART
|
||||
#define RT_ALIGN_SIZE 8
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_HOOK_USING_FUNC_PTR
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 1024
|
||||
#define RT_USING_TIMER_SOFT
|
||||
#define RT_TIMER_THREAD_PRIO 4
|
||||
#define RT_TIMER_THREAD_STACK_SIZE 2048
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
#define RT_KSERVICE_USING_STDLIB
|
||||
#define RT_KPRINTF_USING_LONGLONG
|
||||
#define RT_DEBUG
|
||||
|
||||
/* Inter-Thread communication */
|
||||
|
||||
#define RT_USING_SEMAPHORE
|
||||
#define RT_USING_MUTEX
|
||||
#define RT_USING_EVENT
|
||||
#define RT_USING_MAILBOX
|
||||
#define RT_USING_MESSAGEQUEUE
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define RT_PAGE_MAX_ORDER 11
|
||||
#define RT_USING_MEMPOOL
|
||||
#define RT_USING_SMALL_MEM
|
||||
#define RT_USING_SMALL_MEM_AS_HEAP
|
||||
#define RT_USING_HEAP
|
||||
|
||||
/* Kernel Device Object */
|
||||
|
||||
#define RT_USING_DEVICE
|
||||
#define RT_USING_CONSOLE
|
||||
#define RT_CONSOLEBUF_SIZE 256
|
||||
#define RT_CONSOLE_DEVICE_NAME "uart0"
|
||||
#define RT_VER_NUM 0x50001
|
||||
#define ARCH_CPU_64BIT
|
||||
#define RT_USING_CACHE
|
||||
#define ARCH_MM_MMU
|
||||
#define KERNEL_VADDR_START 0x80000000
|
||||
#define ARCH_RISCV
|
||||
#define ARCH_RISCV64
|
||||
|
||||
/* RT-Thread Components */
|
||||
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
#define RT_USING_USER_MAIN
|
||||
#define RT_MAIN_THREAD_STACK_SIZE 6144
|
||||
#define RT_MAIN_THREAD_PRIORITY 10
|
||||
#define RT_USING_MSH
|
||||
#define RT_USING_FINSH
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 4096
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define MSH_USING_BUILT_IN_COMMANDS
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* DFS: device virtual file system */
|
||||
|
||||
#define RT_USING_DFS
|
||||
#define DFS_USING_POSIX
|
||||
#define DFS_USING_WORKDIR
|
||||
#define DFS_FD_MAX 16
|
||||
#define RT_USING_DFS_V1
|
||||
#define DFS_FILESYSTEMS_MAX 4
|
||||
#define DFS_FILESYSTEM_TYPES_MAX 4
|
||||
#define RT_USING_DFS_DEVFS
|
||||
#define RT_USING_LWP
|
||||
#define RT_LWP_MAX_NR 30
|
||||
#define LWP_TASK_STACK_SIZE 16384
|
||||
#define RT_CH_MSG_MAX_NR 1024
|
||||
#define LWP_CONSOLE_INPUT_BUFFER_SIZE 1024
|
||||
#define LWP_TID_MAX_NR 64
|
||||
#define RT_LWP_SHM_MAX_NR 64
|
||||
|
||||
/* Device Drivers */
|
||||
|
||||
#define RT_USING_DEVICE_IPC
|
||||
#define RT_UNAMED_PIPE_NUMBER 64
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_TTY
|
||||
#define RT_USING_PIN
|
||||
#define RT_USING_NULL
|
||||
#define RT_USING_ZERO
|
||||
#define RT_USING_RANDOM
|
||||
#define RT_USING_RTC
|
||||
|
||||
/* Using USB */
|
||||
|
||||
|
||||
/* C/C++ and POSIX layer */
|
||||
|
||||
#define RT_LIBC_DEFAULT_TIMEZONE 8
|
||||
|
||||
/* POSIX (Portable Operating System Interface) layer */
|
||||
|
||||
#define RT_USING_POSIX_FS
|
||||
#define RT_USING_POSIX_DEVIO
|
||||
#define RT_USING_POSIX_STDIO
|
||||
#define RT_USING_POSIX_TERMIOS
|
||||
#define RT_USING_POSIX_DELAY
|
||||
#define RT_USING_POSIX_CLOCK
|
||||
#define RT_USING_POSIX_TIMER
|
||||
|
||||
/* Interprocess Communication (IPC) */
|
||||
|
||||
|
||||
/* Socket is in the 'Network' category */
|
||||
|
||||
|
||||
/* Network */
|
||||
|
||||
|
||||
/* Utilities */
|
||||
|
||||
#define RT_USING_ADT
|
||||
#define RT_USING_RESOURCE_ID
|
||||
|
||||
/* RT-Thread Utestcases */
|
||||
|
||||
|
||||
/* RT-Thread online packages */
|
||||
|
||||
/* IoT - internet of things */
|
||||
|
||||
|
||||
/* Wi-Fi */
|
||||
|
||||
/* Marvell WiFi */
|
||||
|
||||
|
||||
/* Wiced WiFi */
|
||||
|
||||
|
||||
/* IoT Cloud */
|
||||
|
||||
|
||||
/* security packages */
|
||||
|
||||
|
||||
/* language packages */
|
||||
|
||||
/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
|
||||
|
||||
|
||||
/* XML: Extensible Markup Language */
|
||||
|
||||
|
||||
/* multimedia packages */
|
||||
|
||||
/* LVGL: powerful and easy-to-use embedded GUI library */
|
||||
|
||||
|
||||
/* u8g2: a monochrome graphic library */
|
||||
|
||||
|
||||
/* tools packages */
|
||||
|
||||
|
||||
/* system packages */
|
||||
|
||||
/* enhanced kernel services */
|
||||
|
||||
|
||||
/* acceleration: Assembly language or algorithmic acceleration packages */
|
||||
|
||||
|
||||
/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
|
||||
|
||||
|
||||
/* Micrium: Micrium software products porting for RT-Thread */
|
||||
|
||||
|
||||
/* peripheral libraries and drivers */
|
||||
|
||||
/* sensors drivers */
|
||||
|
||||
|
||||
/* touch drivers */
|
||||
|
||||
|
||||
/* Kendryte SDK */
|
||||
|
||||
|
||||
/* AI packages */
|
||||
|
||||
|
||||
/* Signal Processing and Control Algorithm Packages */
|
||||
|
||||
|
||||
/* miscellaneous packages */
|
||||
|
||||
/* project laboratory */
|
||||
|
||||
/* samples: kernel and components samples */
|
||||
|
||||
|
||||
/* entertainment: terminal games and other interesting software packages */
|
||||
|
||||
|
||||
/* Arduino libraries */
|
||||
|
||||
|
||||
/* Projects */
|
||||
|
||||
|
||||
/* Sensors */
|
||||
|
||||
|
||||
/* Display */
|
||||
|
||||
|
||||
/* Timing */
|
||||
|
||||
|
||||
/* Data Processing */
|
||||
|
||||
|
||||
/* Data Storage */
|
||||
|
||||
/* Communication */
|
||||
|
||||
|
||||
/* Device Control */
|
||||
|
||||
|
||||
/* Other */
|
||||
|
||||
|
||||
/* Signal IO */
|
||||
|
||||
|
||||
/* Uncategorized */
|
||||
|
||||
/* General Drivers Configuration */
|
||||
|
||||
#define BSP_USING_UART
|
||||
#define RT_USING_UART0
|
||||
#define BSP_USING_CV1800B
|
||||
#define C906_PLIC_PHY_ADDR 0x70000000
|
||||
#define IRQ_MAX_NR 64
|
||||
#define TIMER_CLK_FREQ 25000000
|
||||
#define __STACKSIZE__ 4096
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
import os
|
||||
|
||||
# toolchains options
|
||||
ARCH ='risc-v'
|
||||
VENDOR ='t-head'
|
||||
CPU ='c906'
|
||||
CROSS_TOOL ='gcc'
|
||||
|
||||
if os.getenv('RTT_ROOT'):
|
||||
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||
else:
|
||||
RTT_ROOT = r'../..'
|
||||
|
||||
if os.getenv('RTT_CC'):
|
||||
CROSS_TOOL = os.getenv('RTT_CC')
|
||||
|
||||
if CROSS_TOOL == 'gcc':
|
||||
PLATFORM = 'gcc'
|
||||
EXEC_PATH = r'/opt/riscv64-linux-musleabi_for_x86_64-pc-linux-gnu/bin'
|
||||
else:
|
||||
print('Please make sure your toolchains is GNU GCC!')
|
||||
exit(0)
|
||||
|
||||
if os.getenv('RTT_EXEC_PATH'):
|
||||
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||
|
||||
BUILD = 'debug'
|
||||
|
||||
if PLATFORM == 'gcc':
|
||||
# toolchains
|
||||
#PREFIX = 'riscv64-unknown-elf-'
|
||||
PREFIX = os.getenv('RTT_CC_PREFIX') or 'riscv64-unknown-linux-musl-'
|
||||
CC = PREFIX + 'gcc'
|
||||
CXX = PREFIX + 'g++'
|
||||
AS = PREFIX + 'gcc'
|
||||
AR = PREFIX + 'ar'
|
||||
LINK = PREFIX + 'gcc'
|
||||
TARGET_EXT = 'elf'
|
||||
SIZE = PREFIX + 'size'
|
||||
OBJDUMP = PREFIX + 'objdump'
|
||||
OBJCPY = PREFIX + 'objcopy'
|
||||
|
||||
DEVICE = ' -mcmodel=medany -march=rv64imafdc -mabi=lp64'
|
||||
CFLAGS = DEVICE + ' -Wno-cpp -fvar-tracking -ffreestanding -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -D_POSIX_SOURCE '
|
||||
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__'
|
||||
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds' + ' -lsupc++ -lgcc -static'
|
||||
CPATH = ''
|
||||
LPATH = ''
|
||||
|
||||
if BUILD == 'debug':
|
||||
CFLAGS += ' -O0 -ggdb'
|
||||
AFLAGS += ' -ggdb'
|
||||
else:
|
||||
CFLAGS += ' -O2 -Os'
|
||||
|
||||
CXXFLAGS = CFLAGS
|
||||
|
||||
DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtthread.asm\n'
|
||||
POST_ACTION = OBJCPY + ' -O binary $TARGET Image\n' + SIZE + ' $TARGET \n' + './mksdimg.sh\n'
|
||||
|
|
@ -18,6 +18,7 @@
|
|||
#include "rt_interrupt.h"
|
||||
#include "io.h"
|
||||
#include "encoding.h"
|
||||
#include "ioremap.h"
|
||||
|
||||
static void *c906_plic_regs = RT_NULL;
|
||||
extern struct rt_irq_desc isr_table[];
|
||||
|
|
@ -43,7 +44,7 @@ rt_inline void plic_irq_toggle(int hwirq, int enable)
|
|||
#ifdef RT_USING_SMART
|
||||
if (c906_irq_priority[hwirq] == RT_NULL)
|
||||
{
|
||||
c906_irq_priority[hwirq] = rt_ioremap(priority_addr, 0x1000);
|
||||
c906_irq_priority[hwirq] = (void *)rt_ioremap(priority_addr, 0x1000);
|
||||
}
|
||||
priority_addr = c906_irq_priority[hwirq];
|
||||
#endif
|
||||
|
|
@ -202,8 +203,8 @@ void plic_init(void)
|
|||
handler->hart_base = (void *)((rt_size_t)c906_plic_regs + CONTEXT_BASE + i * CONTEXT_PER_HART);
|
||||
handler->enable_base = (void *)((rt_size_t)c906_plic_regs + ENABLE_BASE + i * ENABLE_PER_HART);
|
||||
#ifdef RT_USING_SMART
|
||||
handler->hart_base = rt_ioremap(handler->hart_base, 0x1000);
|
||||
handler->enable_base = rt_ioremap(handler->enable_base, 0x1000);
|
||||
handler->hart_base = (void *)rt_ioremap(handler->hart_base, 0x1000);
|
||||
handler->enable_base = (void *)rt_ioremap(handler->enable_base, 0x1000);
|
||||
#endif
|
||||
done:
|
||||
/* priority must be > threshold to trigger an interrupt */
|
||||
|
|
|
|||
Loading…
Reference in New Issue