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Merge pull request #4645 from yangjie11/delete-bsp 

[bsp]delete simulator files and realview-a8 bsp
This commit is contained in:
Bernard Xiong 2021-04-27 10:01:14 +08:00 committed by GitHub
parent 428946c6ae 5ea61fca5a
commit c75ea0ae7d
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GPG Key ID: 4AEE18F83AFDEB23
28 changed files with 1 additions and 2594 deletions
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26
bsp/realview-a8/.gitignore vendored
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# Object files
*.o
*.bin
*.pyc
*.map
*.elf
# Libraries
*.lib
*.a
# Shared objects (inc. Windows DLLs)
*.dll
*.so
*.so.*
*.dylib
# Executables
*.exe
*.out
*.app
.scons*
# directory
build/*

11
bsp/realview-a8/README.md
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VMM BSP on realview-pb-a8
This is a demo program that run RT-Thread VMM(Virtual Machine Module) on
the single core RealView-PB-A8.
To compile it, you need buildroot and a linux 3.8.x source tree. You should
build the patched Linux kernel and builroot before building the VMM. This
directory has a "mk.sh" helper script to build both the RT-Thread, Linux kernel
module and the ramdisk.
Linux console is serial0 and RT-Thread console is serial1.

14
bsp/realview-a8/SConscript
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# for module compiling
import os
Import('RTT_ROOT')
cwd = str(Dir('#'))
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')

44
bsp/realview-a8/SConstruct
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import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread-realview.' + rtconfig.TARGET_EXT
DefaultEnvironment(tools=[])
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
env['ASCOM'] = env['ASPPCOM']
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT)
if GetDepend('RT_USING_VMM'):
if os.system('{cppcmd} -P -C -E -I. -D__ASSEMBLY__ {ldfile}.S -o {ldfile}'.format(
cppcmd = os.path.join(rtconfig.EXEC_PATH, 'arm-none-eabi-gcc'),
ldfile = rtconfig.LINK_SCRIPT)) != 0:
print('failed to generate linker script %s' % rtconfig.LINK_SCRIPT)
sys.exit(255)
# if the linker script changed, relink the target
Depends(TARGET, rtconfig.LINK_SCRIPT)
else:
# we should use none-vmm link script
link_flags = str(env['LINKFLAGS'])
env['LINKFLAGS'] = link_flags.replace('_vmm.lds', '.lds')
# make a building
DoBuilding(TARGET, objs)

11
bsp/realview-a8/applications/SConscript
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Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = os.path.join(str(Dir('#')), 'applications')
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

28
bsp/realview-a8/applications/application.c
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2012-11-20 Bernard the first version
*/
#include <rtthread.h>
void init_thread(void* parameter)
{
rt_components_init();
}
int rt_application_init()
{
rt_thread_t tid;
tid = rt_thread_create("init", init_thread, RT_NULL,
1024, RT_THREAD_PRIORITY_MAX/3, 10);
if (tid != RT_NULL) rt_thread_startup(tid);
return 0;
}

68
bsp/realview-a8/applications/startup.c
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2012-12-05 Bernard the first version
*/
#include <rthw.h>
#include <rtthread.h>
#include <board.h>
extern int rt_application_init(void);
extern void rt_hw_board_init(void);
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* initialzie hardware interrupt */
rt_hw_interrupt_init();
/* initialize board */
rt_hw_board_init();
/* show RT-Thread version */
rt_show_version();
/* initialize memory system */
#ifdef RT_USING_HEAP
rt_system_heap_init(HEAP_BEGIN, HEAP_END);
#endif
/* initialize scheduler system */
rt_system_scheduler_init();
/* initialize timer and soft timer thread */
rt_system_timer_init();
rt_system_timer_thread_init();
/* initialize application */
rt_application_init();
/* initialize idle thread */
rt_thread_idle_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return ;
}
int main(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* invoke rtthread_startup */
rtthread_startup();
return 0;
}

3
bsp/realview-a8/boot.sh
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#!/bin/sh -e
scons -j12
qemu-system-arm -M realview-pb-a8 -kernel rtthread-realview.elf -serial vc -serial stdio

13
bsp/realview-a8/drivers/SConscript
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import copy
Import('RTT_ROOT')
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
Return('group')

99
bsp/realview-a8/drivers/board.c
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2012-11-20 Bernard the first version
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
#define TIMER_LOAD(hw_base) __REG32(hw_base + 0x00)
#define TIMER_VALUE(hw_base) __REG32(hw_base + 0x04)
#define TIMER_CTRL(hw_base) __REG32(hw_base + 0x08)
#define TIMER_CTRL_ONESHOT (1 << 0)
#define TIMER_CTRL_32BIT (1 << 1)
#define TIMER_CTRL_DIV1 (0 << 2)
#define TIMER_CTRL_DIV16 (1 << 2)
#define TIMER_CTRL_DIV256 (2 << 2)
#define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable (versatile only) */
#define TIMER_CTRL_PERIODIC (1 << 6)
#define TIMER_CTRL_ENABLE (1 << 7)
#define TIMER_INTCLR(hw_base) __REG32(hw_base + 0x0c)
#define TIMER_RIS(hw_base) __REG32(hw_base + 0x10)
#define TIMER_MIS(hw_base) __REG32(hw_base + 0x14)
#define TIMER_BGLOAD(hw_base) __REG32(hw_base + 0x18)
#define SYS_CTRL __REG32(REALVIEW_SCTL_BASE)
#ifdef RT_USING_VMM
#include <vmm.h>
static rt_uint32_t timer_hw_base = 0;
#define TIMER_HW_BASE (timer_hw_base)
#else
#define TIMER_HW_BASE REALVIEW_TIMER2_3_BASE
#endif
void rt_hw_timer_ack(void)
{
/* clear interrupt */
TIMER_INTCLR(TIMER_HW_BASE) = 0x01;
}
static void rt_hw_timer_isr(int vector, void *param)
{
rt_tick_increase();
rt_hw_timer_ack();
}
int rt_hw_timer_init(void)
{
rt_uint32_t val;
#ifdef RT_USING_VMM
{
rt_uint32_t sys_ctrl;
sys_ctrl = vmm_find_iomap("SYS_CTRL");
__REG32(sys_ctrl) |= REALVIEW_REFCLK;
}
timer_hw_base = vmm_find_iomap("TIMER");
#else
SYS_CTRL |= REALVIEW_REFCLK;
#endif
/* Setup Timer0 for generating irq */
val = TIMER_CTRL(TIMER_HW_BASE);
val &= ~TIMER_CTRL_ENABLE;
val |= (TIMER_CTRL_32BIT | TIMER_CTRL_PERIODIC | TIMER_CTRL_IE);
TIMER_CTRL(TIMER_HW_BASE) = val;
TIMER_LOAD(TIMER_HW_BASE) = 1000;
/* enable timer */
TIMER_CTRL(TIMER_HW_BASE) |= TIMER_CTRL_ENABLE;
rt_hw_interrupt_install(IRQ_PBA8_TIMER2_3, rt_hw_timer_isr, RT_NULL, "tick");
rt_hw_interrupt_umask(IRQ_PBA8_TIMER2_3);
return 0;
}
INIT_BOARD_EXPORT(rt_hw_timer_init);
/**
* This function will initialize beaglebone board
*/
void rt_hw_board_init(void)
{
rt_components_board_init();
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
}
/*@}*/

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bsp/realview-a8/drivers/board.h
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/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2013-07-06 Bernard the first version
*/
#ifndef __BOARD_H__
#define __BOARD_H__
#include <realview.h>
#if defined(__CC_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void*)&Image$$RW_IRAM1$$ZI$$Limit)
#elif defined(__GNUC__)
extern int __bss_end;
#define HEAP_BEGIN ((void*)&__bss_end)
#endif
#define HEAP_END (void*)(0x70000000 + 8 * 1024 * 1024)
void rt_hw_board_init(void);
#endif

324
bsp/realview-a8/drivers/realview.h
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#ifndef __AM33XX_H__
#define __AM33XX_H__
#define __REG32(x) (*((volatile unsigned int *)(x)))
#define __REG16(x) (*((volatile unsigned short *)(x)))
/*
* Peripheral addresses
*/
#define REALVIEW_UART0_BASE 0x10009000 /* UART 0 */
#define REALVIEW_UART1_BASE 0x1000A000 /* UART 1 */
#define REALVIEW_UART2_BASE 0x1000B000 /* UART 2 */
#define REALVIEW_UART3_BASE 0x1000C000 /* UART 3 */
#define REALVIEW_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
#define REALVIEW_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */
#define REALVIEW_WATCHDOG_BASE 0x10010000 /* watchdog interface */
#define REALVIEW_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
#define REALVIEW_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
#define REALVIEW_GPIO0_BASE 0x10013000 /* GPIO port 0 */
#define REALVIEW_RTC_BASE 0x10017000 /* Real Time Clock */
#define REALVIEW_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */
#define REALVIEW_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */
#define REALVIEW_SCTL_BASE 0x1001A000 /* System Controller */
#define REALVIEW_CLCD_BASE 0x10020000 /* CLCD */
#define REALVIEW_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */
#define REALVIEW_DMC_BASE 0x100E0000 /* DMC configuration */
#define REALVIEW_SMC_BASE 0x100E1000 /* SMC configuration */
#define REALVIEW_CAN_BASE 0x100E2000 /* CAN bus */
#define REALVIEW_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */
#define REALVIEW_FLASH0_BASE 0x40000000
#define REALVIEW_FLASH0_SIZE SZ_64M
#define REALVIEW_FLASH1_BASE 0x44000000
#define REALVIEW_FLASH1_SIZE SZ_64M
#define REALVIEW_ETH_BASE 0x4E000000 /* Ethernet */
#define REALVIEW_USB_BASE 0x4F000000 /* USB */
#define REALVIEW_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */
#define REALVIEW_LT_BASE 0xC0000000 /* Logic Tile expansion */
#define REALVIEW_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */
#define REALVIEW_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */
#define REALVIEW_SYS_PLD_CTRL1 0x74
/*
* PCI regions
*/
#define REALVIEW_PCI_BASE 0x90040000 /* PCI-X Unit base */
#define REALVIEW_PCI_IO_BASE 0x90050000 /* IO Region on AHB */
#define REALVIEW_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */
#define REALVIEW_PCI_BASE_SIZE 0x10000 /* 16 Kb */
#define REALVIEW_PCI_IO_SIZE 0x1000 /* 4 Kb */
#define REALVIEW_PCI_MEM_SIZE 0x20000000 /* 512 MB */
/*
* Memory definitions
*/
#define REALVIEW_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)... */
#define REALVIEW_BOOT_ROM_HI 0x30000000
#define REALVIEW_BOOT_ROM_BASE REALVIEW_BOOT_ROM_HI /* Normal position */
#define REALVIEW_BOOT_ROM_SIZE SZ_64M
#define REALVIEW_SSRAM_BASE /* REALVIEW_SSMC_BASE ? */
#define REALVIEW_SSRAM_SIZE SZ_2M
/*
* SDRAM
*/
#define REALVIEW_SDRAM_BASE 0x00000000
/*
* Logic expansion modules
*
*/
#define IRQ_PBA8_GIC_START 32
/*
* PB-A8 on-board gic irq sources
*/
#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
/* 9 reserved */
#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
#define IRQ_PBA8_PMU (IRQ_PBA8_GIC_START + 47) /* Cortex-A8 PMU */
/* ... */
#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
#define IRQ_PBA8_SMC -1
#define IRQ_PBA8_SCTL -1
#define NR_GIC_PBA8 1
/*
* Only define NR_IRQS if less than NR_IRQS_PBA8
*/
#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
/* ------------------------------------------------------------------------
* RealView Registers
* ------------------------------------------------------------------------
*
*/
#define REALVIEW_SYS_ID_OFFSET 0x00
#define REALVIEW_SYS_SW_OFFSET 0x04
#define REALVIEW_SYS_LED_OFFSET 0x08
#define REALVIEW_SYS_OSC0_OFFSET 0x0C
#define REALVIEW_SYS_OSC1_OFFSET 0x10
#define REALVIEW_SYS_OSC2_OFFSET 0x14
#define REALVIEW_SYS_OSC3_OFFSET 0x18
#define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */
#define REALVIEW_SYS_LOCK_OFFSET 0x20
#define REALVIEW_SYS_100HZ_OFFSET 0x24
#define REALVIEW_SYS_CFGDATA1_OFFSET 0x28
#define REALVIEW_SYS_CFGDATA2_OFFSET 0x2C
#define REALVIEW_SYS_FLAGS_OFFSET 0x30
#define REALVIEW_SYS_FLAGSSET_OFFSET 0x30
#define REALVIEW_SYS_FLAGSCLR_OFFSET 0x34
#define REALVIEW_SYS_NVFLAGS_OFFSET 0x38
#define REALVIEW_SYS_NVFLAGSSET_OFFSET 0x38
#define REALVIEW_SYS_NVFLAGSCLR_OFFSET 0x3C
#define REALVIEW_SYS_RESETCTL_OFFSET 0x40
#define REALVIEW_SYS_PCICTL_OFFSET 0x44
#define REALVIEW_SYS_MCI_OFFSET 0x48
#define REALVIEW_SYS_FLASH_OFFSET 0x4C
#define REALVIEW_SYS_CLCD_OFFSET 0x50
#define REALVIEW_SYS_CLCDSER_OFFSET 0x54
#define REALVIEW_SYS_BOOTCS_OFFSET 0x58
#define REALVIEW_SYS_24MHz_OFFSET 0x5C
#define REALVIEW_SYS_MISC_OFFSET 0x60
#define REALVIEW_SYS_IOSEL_OFFSET 0x70
#define REALVIEW_SYS_PROCID_OFFSET 0x84
#define REALVIEW_SYS_TEST_OSC0_OFFSET 0xC0
#define REALVIEW_SYS_TEST_OSC1_OFFSET 0xC4
#define REALVIEW_SYS_TEST_OSC2_OFFSET 0xC8
#define REALVIEW_SYS_TEST_OSC3_OFFSET 0xCC
#define REALVIEW_SYS_TEST_OSC4_OFFSET 0xD0
#define REALVIEW_SYS_BASE 0x10000000
#define REALVIEW_SYS_ID (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET)
#define REALVIEW_SYS_SW (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET)
#define REALVIEW_SYS_LED (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET)
#define REALVIEW_SYS_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET)
#define REALVIEW_SYS_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET)
#define REALVIEW_SYS_LOCK (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET)
#define REALVIEW_SYS_100HZ (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET)
#define REALVIEW_SYS_CFGDATA1 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET)
#define REALVIEW_SYS_CFGDATA2 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET)
#define REALVIEW_SYS_FLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET)
#define REALVIEW_SYS_FLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET)
#define REALVIEW_SYS_FLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET)
#define REALVIEW_SYS_NVFLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET)
#define REALVIEW_SYS_NVFLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET)
#define REALVIEW_SYS_NVFLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET)
#define REALVIEW_SYS_RESETCTL (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET)
#define REALVIEW_SYS_PCICTL (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET)
#define REALVIEW_SYS_MCI (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET)
#define REALVIEW_SYS_FLASH (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET)
#define REALVIEW_SYS_CLCD (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET)
#define REALVIEW_SYS_CLCDSER (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET)
#define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET)
#define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET)
#define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET)
#define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET)
#define REALVIEW_SYS_PROCID (REALVIEW_SYS_BASE + REALVIEW_SYS_PROCID_OFFSET)
#define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET)
#define REALVIEW_SYS_TEST_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET)
#define REALVIEW_SYS_TEST_OSC2 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET)
#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
#define REALVIEW_SYS_CTRL_LED (1 << 0)
/* ------------------------------------------------------------------------
* RealView control registers
* ------------------------------------------------------------------------
*/
/*
* REALVIEW_IDFIELD
*
* 31:24 = manufacturer (0x41 = ARM)
* 23:16 = architecture (0x08 = AHB system bus, ASB processor bus)
* 15:12 = FPGA (0x3 = XVC600 or XVC600E)
* 11:4 = build value
* 3:0 = revision number (0x1 = rev B (AHB))
*/
/*
* REALVIEW_SYS_LOCK
* control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL,
* SYS_CLD, SYS_BOOTCS
*/
#define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
#define REALVIEW_SYS_LOCKVAL 0xA05F
#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */
/*
* REALVIEW_SYS_FLASH
*/
#define REALVIEW_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
/*
* REALVIEW_INTREG
* - used to acknowledge and control MMCI and UART interrupts
*/
#define REALVIEW_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */
#define REALVIEW_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */
#define REALVIEW_INTREG_CARDIN 0x08 /* MMCI card in detect */
/* write 1 to acknowledge and clear */
#define REALVIEW_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */
#define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */
/*
* LED settings, bits [7:0]
*/
#define REALVIEW_SYS_LED0 (1 << 0)
#define REALVIEW_SYS_LED1 (1 << 1)
#define REALVIEW_SYS_LED2 (1 << 2)
#define REALVIEW_SYS_LED3 (1 << 3)
#define REALVIEW_SYS_LED4 (1 << 4)
#define REALVIEW_SYS_LED5 (1 << 5)
#define REALVIEW_SYS_LED6 (1 << 6)
#define REALVIEW_SYS_LED7 (1 << 7)
#define ALL_LEDS 0xFF
#define LED_BANK REALVIEW_SYS_LED
/*
* Control registers
*/
#define REALVIEW_IDFIELD_OFFSET 0x0 /* RealView build information */
#define REALVIEW_FLASHPROG_OFFSET 0x4 /* Flash devices */
#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */
#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
/*
* Clean base - dummy
*
*/
#define CLEAN_BASE REALVIEW_BOOT_ROM_HI
/*
* System controller bit assignment
*/
#define REALVIEW_REFCLK 0
#define REALVIEW_TIMCLK 1
#define REALVIEW_TIMER1_EnSel 15
#define REALVIEW_TIMER2_EnSel 17
#define REALVIEW_TIMER3_EnSel 19
#define REALVIEW_TIMER4_EnSel 21
/*
*struct rt_hw_register
*{
* unsigned long r0;
* unsigned long r1;
* unsigned long r2;
* unsigned long r3;
* unsigned long r4;
* unsigned long r5;
* unsigned long r6;
* unsigned long r7;
* unsigned long r8;
* unsigned long r9;
* unsigned long r10;
* unsigned long fp;
* unsigned long ip;
* unsigned long sp;
* unsigned long lr;
* unsigned long pc;
* unsigned long cpsr;
* unsigned long ORIG_r0;
*};
*/
#include <armv7.h>
/* Interrupt Control Interface */
#define ARM_GIC_CPU_BASE 0x1E000000
/* number of interrupts on board */
#define ARM_GIC_NR_IRQS 96
/* only one GIC available */
#define ARM_GIC_MAX_NR 1
#endif

185
bsp/realview-a8/drivers/serial.c
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@ -1,185 +0,0 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2013-03-30 Bernard the first verion
*/
#include <rthw.h>
#include <rtdevice.h>
#include "serial.h"
#ifdef RT_USING_VMM
#include <vmm.h>
#endif
struct hw_uart_device
{
rt_uint32_t hw_base;
rt_uint32_t irqno;
};
#define UART_DR(base) __REG32(base + 0x00)
#define UART_FR(base) __REG32(base + 0x18)
#define UART_CR(base) __REG32(base + 0x30)
#define UART_IMSC(base) __REG32(base + 0x38)
#define UART_ICR(base) __REG32(base + 0x44)
#define UARTFR_RXFE 0x10
#define UARTFR_TXFF 0x20
#define UARTIMSC_RXIM 0x10
#define UARTIMSC_TXIM 0x20
#define UARTICR_RXIC 0x10
#define UARTICR_TXIC 0x20
static void rt_hw_uart_isr(int irqno, void *param)
{
struct rt_serial_device *serial = (struct rt_serial_device *)param;
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
}
static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
return RT_EOK;
}
static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
/* disable rx irq */
UART_IMSC(uart->hw_base) &= ~UARTIMSC_RXIM;
break;
case RT_DEVICE_CTRL_SET_INT:
/* enable rx irq */
UART_IMSC(uart->hw_base) |= UARTIMSC_RXIM;
rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, serial, "uart");
rt_hw_interrupt_umask(uart->irqno);
break;
}
return RT_EOK;
}
static int uart_putc(struct rt_serial_device *serial, char c)
{
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
while (UART_FR(uart->hw_base) & UARTFR_TXFF);
UART_DR(uart->hw_base) = c;
return 1;
}
static int uart_getc(struct rt_serial_device *serial)
{
int ch;
struct hw_uart_device *uart;
RT_ASSERT(serial != RT_NULL);
uart = (struct hw_uart_device *)serial->parent.user_data;
ch = -1;
if (!(UART_FR(uart->hw_base) & UARTFR_RXFE))
{
ch = UART_DR(uart->hw_base) & 0xff;
}
return ch;
}
static const struct rt_uart_ops _uart_ops =
{
uart_configure,
uart_control,
uart_putc,
uart_getc,
};
#ifdef RT_USING_UART0
/* UART device driver structure */
static struct hw_uart_device _uart0_device =
{
REALVIEW_UART0_BASE,
IRQ_PBA8_UART0,
};
static struct rt_serial_device _serial0;
#endif
#ifdef RT_USING_UART1
/* UART1 device driver structure */
static struct hw_uart_device _uart1_device =
{
REALVIEW_UART1_BASE,
IRQ_PBA8_UART1,
};
static struct rt_serial_device _serial1;
#endif
int uart_isr_test(void)
{
return uart_getc(&_serial1);
}
int rt_hw_uart_init(void)
{
struct hw_uart_device *uart;
struct serial_configure config;
config.baud_rate = BAUD_RATE_115200;
config.bit_order = BIT_ORDER_LSB;
config.data_bits = DATA_BITS_8;
config.parity = PARITY_NONE;
config.stop_bits = STOP_BITS_1;
config.invert = NRZ_NORMAL;
config.bufsz = RT_SERIAL_RB_BUFSZ;
#ifdef RT_USING_UART0
uart = &_uart0_device;
#ifdef RT_USING_VMM
uart->hw_base = vmm_find_iomap("UART0");
#endif
_serial0.ops = &_uart_ops;
_serial0.config = config;
/* register UART1 device */
rt_hw_serial_register(&_serial0, "uart0",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
/* enable Rx and Tx of UART */
UART_CR(uart->hw_base) = (1 << 0) | (1 << 8) | (1 << 9);
#endif
#ifdef RT_USING_UART1
uart = &_uart1_device;
#ifdef RT_USING_VMM
uart->hw_base = vmm_find_iomap("UART1");
#endif
_serial1.ops = &_uart_ops;
_serial1.config = config;
/* register UART1 device */
rt_hw_serial_register(&_serial1, "uart1",
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart);
/* enable Rx and Tx of UART */
UART_CR(uart->hw_base) = (1 << 0) | (1 << 8) | (1 << 9);
#endif
return 0;
}
INIT_BOARD_EXPORT(rt_hw_uart_init);

20
bsp/realview-a8/drivers/serial.h
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@ -1,20 +0,0 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2013-03-30 Bernard the first verion
*/
#ifndef __UART_H__
#define __UART_H__
#include <board.h>
int rt_hw_uart_init(void);
#endif

10
bsp/realview-a8/linux_vmm/.gitignore vendored
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@ -1,10 +0,0 @@
*.o
*.o.cmd
*.ko
*.ko.cmd
*.mod.c
Module.symvers
modules.order
.tmp_versions/

6
bsp/realview-a8/linux_vmm/Makefile
View File

@ -1,6 +0,0 @@
ccflags-y := -I$(VMM_HDR_DIR)
obj-m += rtvmm.o
rtvmm-objs := vmm_linux.o

22
bsp/realview-a8/linux_vmm/build.sh
View File

@ -1,22 +0,0 @@
#!/bin/sh
set -e
# local variable
TISDK_DIR=/home/grissiom/ti-sdk-am335x-evm-06.00.00.00/
# external variable {{{
ROOTFS_DIR=${ROOTFS_DIR:-~/remotedir/buildroot-rootfs/}
KDIR=${KDIR:-$PWD/../../bfm-kernel/}
TOOLCHAIN_DIR=${TOOLCHAIN_DIR:-${TISDK_DIR}/linux-devkit/sysroots/i686-arago-linux/usr/bin}
TOOLCHAIN_PREFIX=${TOOLCHAIN_PREFIX:-"arm-linux-gnueabihf-"}
# }}}
export PATH="${TOOLCHAIN_DIR}:$PATH"
make -C $KDIR M=$PWD ARCH=arm CROSS_COMPILE="${TOOLCHAIN_PREFIX}" V=0
#sudo PATH="${TOOLCHAIN_DIR}:$PATH" \
#make -C $KDIR M=$PWD ARCH=arm CROSS_COMPILE=${TOOLCHAIN_PREFIX} \
#INSTALL_MOD_PATH=${ROOTFS_DIR} modules_install

257
bsp/realview-a8/linux_vmm/vmm_linux.c
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@ -1,257 +0,0 @@
#include <linux/module.h>
#include <linux/fs.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/uaccess.h>
#include <linux/io.h>
#include <linux/memblock.h>
#include <asm/cacheflush.h>
#include <mach/hardware.h>
#include "vmm_linux.h"
#define IOMAP_NUM 3
#define BUFF_SZ (4 * 1024)
struct vmm_iomap *_linux_iomap = NULL;
const char *uart_name = "uart";
/* some exported Linux Kernel patch */
extern void vmm_set_status(int status);
extern void vmm_context_init(void *context_addr);
extern unsigned long vmm_save_irq(void);
extern void vmm_restore_irq(unsigned long flags);
static struct vmm_domain domain =
{
.kernel = DOMAIN_KERNEL,
.user = DOMAIN_USER,
.io = DOMAIN_IO,
.vmm = DOMAIN_RTVMM,
.vmm_share = DOMAIN_RTVMM_SHR,
};
static struct vmm_iomap iomap[RT_VMM_IOMAP_MAXNR] =
{
{.name = "UART1", .pa = 0x1000A000, .size = 4096},
{.name = "TIMER", .pa = 0x10012000, .size = 4096},
{.name = "GIC_CPU", .pa = 0x1E000000, .size = 4096},
{.name = "GIC_DIST", .pa = 0x1E001000, .size = 4096},
{.name = "SYS_CTRL", .pa = 0x1001A000, .size = 4096},
{.pa = 0},
};
void vmm_iomap_init(void)
{
int index;
_linux_iomap = &iomap[0];
BUILD_BUG_ON(ARRAY_SIZE(iomap) > RT_VMM_IOMAP_MAXNR);
for (index = 0; index < ARRAY_SIZE(iomap); index++) {
if (_linux_iomap[index].pa == 0)
break;
if (_linux_iomap[index].size != 0)
_linux_iomap[index].va =
ioremap_nocache(_linux_iomap[index].pa,
_linux_iomap[index].size);
printk("%s: 0x%08lx --> 0x%p, size %u\n",
_linux_iomap[index].name,
_linux_iomap[index].pa,
_linux_iomap[index].va,
_linux_iomap[index].size);
}
printk("vmm: init iomap done!\n");
}
#if 0
void trap_set_vector(unsigned long start, unsigned int length)
{
int sctrl;
/* C12-C0 is only active when SCTLR.V = 0 */
asm volatile ("mrc p15, #0, %0, c1, c0, #0"
:"=r" (sctrl));
sctrl &= ~(1 << 13);
asm volatile ("mcr p15, #0, %0, c1, c0, #0"
:
:"r" (sctrl));
asm volatile ("mcr p15, #0, %0, c12, c0, #0"
:
:"r" (start));
rmb();
}
#else
extern void trap_set_vector(unsigned long start, unsigned int length);
#endif
static void vmm_open_domain(void)
{
unsigned long dval;
asm volatile ("mrc p15, 0, %0, c3, c0\n"
: "=r" (dval));
dval |= (0x1 << (DOMAIN_RTVMM * 2)) |
(0x1 << (DOMAIN_RTVMM_SHR * 2));
asm volatile ("mcr p15, 0, %0, c3, c0\n"
: : "r" (dval));
}
static void vmm_close_domain(void)
{
unsigned long dval;
asm volatile ("mrc p15, 0, %0, c3, c0\n"
: "=r" (dval));
/* we still need access tp DOMAIN_RTVMM_SHR because the IRQ stack is
* there. */
dval &= ~(0x3 << (DOMAIN_RTVMM * 2));
asm volatile ("mcr p15, 0, %0, c3, c0\n"
: : "r" (dval));
}
static DEFINE_SPINLOCK(init_lock);
void vmm_entry(void)
{
vmm_entry_t entry;
unsigned long flags;
struct vmm_entry_param eparam = {
.iomap = &iomap[0],
.domain = &domain,
};
printk("Entry VMM:0x%08x with iomap 0x%p\n", VMM_BEGIN, _linux_iomap);
spin_lock_irqsave(&init_lock, flags);
memcpy((void*)(LINUX_VECTOR_POS), (void*)0xFFFF0000,
LINUX_VECTOR_PGSZ);
flush_icache_range(LINUX_VECTOR_POS,
LINUX_VECTOR_POS + LINUX_VECTOR_PGSZ);
/*dump_vector(0xFFFF0000);*/
/* set the interrupt vector to RTT */
trap_set_vector(VMM_BEGIN, 16 * 4);
/*dump_vector(VMM_END-LINUX_VECTOR_PGSZ);*/
entry = (vmm_entry_t)VMM_BEGIN;
vmm_context_init(&RT_VMM_SHARE->ctx);
vmm_set_status(0x01);
pr_info("Linux domain: kernel: %d, user: %d, io: %d\n",
DOMAIN_KERNEL, DOMAIN_USER, DOMAIN_IO);
/* switch to RTT and Good Luck */
entry(&eparam);
spin_unlock_irqrestore(&init_lock, flags);
/* we now switched to virtual IRQ but the hardware IRQ is disabled
* before entering RT-Thread. So we have to enabled it by hand. */
{
asm volatile ("cpsie i":::"memory", "cc");
}
printk("come back to Linux.\n");
}
int vmm_load_fw(const char* filename)
{
mm_segment_t oldfs = {0};
unsigned long len;
unsigned long file_sz;
loff_t pos = 0;
struct file *flp = NULL;
char *buf_ptr = (char*)VMM_BEGIN;
printk("loading RT-Thread:%s ....", filename);
/* FIXME: we should not need this actually. But currently Linux would
* hang without this. Let's just proceed and I will go back to handle
* this in the future. */
memset((void*)VMM_BEGIN, 0, VMM_SIZE);
flp = filp_open(filename, O_RDONLY, S_IRWXU);
if (IS_ERR(flp))
{
printk("vmm loader: open file failed. "
"Return 0x%p\n", flp);
return -1;
}
/* get file size */
file_sz = vfs_llseek(flp, 0, SEEK_END);
vfs_llseek(flp, 0, SEEK_SET);
oldfs = get_fs();
set_fs(get_ds());
while (file_sz > 0)
{
// len = vfs_read(flp, (void __user __force *)buff, BUFF_SZ, &pos);
len = vfs_read(flp, (void __user __force*)buf_ptr, BUFF_SZ, &pos);
file_sz -= len;
buf_ptr += len;
}
set_fs(oldfs);
filp_close(flp, NULL);
printk("done!\n");
/* flush RT-Thread memory */
flush_cache_vmap(VMM_BEGIN, VMM_END);
return 0;
}
static int __init vmm_init(void)
{
printk("VMM started.\n");
vmm_iomap_init();
/* Open the domain permission so we could write firmware to it */
vmm_open_domain();
if (vmm_load_fw("/vmm/rtthread.bin") == 0)
vmm_entry();
return 0;
}
static void __exit vmm_exit(void)
{
int i;
unsigned long flags;
spin_lock_irqsave(&init_lock, flags);
vmm_set_status(0x00);
trap_set_vector(LINUX_VECTOR_POS, 16 * 4);
spin_unlock_irqrestore(&init_lock, flags);
for (i = 0; i < ARRAY_SIZE(iomap); i++)
{
if (iomap[i].pa == 0)
break;
printk("iounmap %s(0x%p)\n",
iomap[i].name,
iomap[i].va);
iounmap(iomap[i].va);
}
vmm_close_domain();
printk("vmm exit\n");
}
module_init(vmm_init);
module_exit(vmm_exit);
MODULE_AUTHOR("bernard.xiong <bernard.xiong@gmail.com>");
MODULE_DESCRIPTION("RT-VMM");
MODULE_LICENSE("GPL");

8
bsp/realview-a8/linux_vmm/vmm_linux.h
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@ -1,8 +0,0 @@
#ifndef __VMM_H__
#define __VMM_H__
#include <rtt_api.h>
#define RT_VMM_ON_AM335X
#endif

19
bsp/realview-a8/mk.sh
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@ -1,19 +0,0 @@
#!/bin/sh
set -e
KDIR=~/linux-git
BUILD_ROOT_DIR=/temp-build/buildroot-2014.02/
scons -j20
mkdir -p $BUILD_ROOT_DIR/output/target/vmm
cp rtthread.bin $BUILD_ROOT_DIR/output/target/vmm
(
cd ./linux_vmm/
export PATH=/opt/gcc-linaro-arm-linux-gnueabihf-4.8-2013.10_linux/bin/:"$PATH"
make -C $KDIR M=$PWD VMM_HDR_DIR=$PWD/../ ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf-
cp rtvmm.ko $BUILD_ROOT_DIR/output/target/root/
)
make -C $BUILD_ROOT_DIR

1
bsp/realview-a8/qemu.sh
View File

@ -1 +0,0 @@
qemu-system-arm -M realview-pb-a8 -kernel rtthread-realview.elf -serial vc -serial vc

91
bsp/realview-a8/realview.lds
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@ -1,91 +0,0 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SECTIONS
{
. = 0x70000000;
__text_start = .;
.text :
{
*(.vectors)
*(.text)
*(.text.*)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
/* section information for modules */
. = ALIGN(4);
__rtmsymtab_start = .;
KEEP(*(RTMSymTab))
__rtmsymtab_end = .;
/* section information for initialization */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
} =0
__text_end = .;
__rodata_start = .;
.rodata : { *(.rodata) *(.rodata.*) }
__rodata_end = .;
. = ALIGN(4);
.ctors :
{
PROVIDE(__ctors_start__ = .);
KEEP(*(SORT(.ctors.*)))
KEEP(*(.ctors))
PROVIDE(__ctors_end__ = .);
}
.dtors :
{
PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .);
}
. = ALIGN(8);
__data_start = .;
.data :
{
*(.data)
*(.data.*)
}
__data_end = .;
. = ALIGN(8);
__bss_start = .;
.bss :
{
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
}
. = ALIGN(4);
__bss_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
_end = .;
}

140
bsp/realview-a8/realview_vmm.lds.S
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@ -1,140 +0,0 @@
#include <rtt_api.h>
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
SECTIONS
{
. = VMM_BEGIN;
__text_start = .;
.text.share :
{
KEEP(*(.vectors))
*(.text.isr)
*(.vmm_glue)
}
ASSERT(SIZEOF(.text.share) <= VMM_SHARE_TEXT_PGSZ, ".text.share too big")
. = VMM_BEGIN + VMM_SHARE_TEXT_PGSZ;
/* the vectore page is saved here
* {
* }
*/
. = VMM_SHARE_DATA_POS;
.data.share :
{
__data_share_start = .;
*(.data.share*)
__data_share_end = .;
}
ASSERT(SIZEOF(.data.share) <= (VMM_SHARE_DATA_PGSZ), ".data.share is too big")
. = VMM_SHARE_BSS_POS;
.bss.share :
{
__bss_share_start = .;
*(.bss.share*)
__bss_share_end = .;
}
ASSERT(SIZEOF(.bss.share) <= (VMM_SHARE_BSS_PGSZ), ".bss.share is too big")
. = VMM_SHARE_CTX_POS;
.vmm.share :
{
/* the vmm context goes here */
__vmm_share_start = .;
*(.vmm.share*)
__vmm_share_end = .;
}
ASSERT(SIZEOF(.vmm.share) <= (VMM_SHARE_CTX_PGSZ), "vmm share context is too big")
. = VMM_BEGIN + VMM_SHARE_PGSZ;
.text :
{
*(.vmm_init)
*(.text)
*(.text.*)
/* section information for finsh shell */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
. = ALIGN(4);
/* section information for modules */
. = ALIGN(4);
__rtmsymtab_start = .;
KEEP(*(RTMSymTab))
__rtmsymtab_end = .;
/* section information for initialization */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
}
__text_end = .;
__rodata_start = .;
.rodata : { *(.rodata) *(.rodata.*) }
__rodata_end = .;
. = ALIGN(4);
.ctors :
{
PROVIDE(__ctors_start__ = .);
KEEP(*(SORT(.ctors.*)))
KEEP(*(.ctors))
PROVIDE(__ctors_end__ = .);
}
.dtors :
{
PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .);
}
__data_start = .;
. = ALIGN(8);
.data :
{
*(.data)
*(.data.*)
}
__data_end = .;
. = ALIGN(8);
__bss_start = __data_end;
.bss :
{
vmm_stack_start = .;
. = vmm_stack_start + RT_VMM_STACK_SIZE;
vmm_stack_end = .;
*(.bss)
*(.bss.*)
*(COMMON)
. = ALIGN(4);
}
. = ALIGN(4);
__bss_end = .;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
_end = .;
}

153
bsp/realview-a8/rtconfig.h
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@ -1,153 +0,0 @@
/* RT-Thread config file */
#ifndef __RTTHREAD_CFG_H__
#define __RTTHREAD_CFG_H__
// <RDTConfigurator URL="http://www.rt-thread.com/eclipse">
// <integer name="RT_NAME_MAX" description="Maximal size of kernel object name length" default="6" />
#define RT_NAME_MAX 6
// <integer name="RT_ALIGN_SIZE" description="Alignment size for CPU architecture data access" default="4" />
#define RT_ALIGN_SIZE 4
// <integer name="RT_THREAD_PRIORITY_MAX" description="Maximal level of thread priority" default="32">
// <item description="8">8</item>
// <item description="32">32</item>
// <item description="256">256</item>
// </integer>
#define RT_THREAD_PRIORITY_MAX 32
// <integer name="RT_TICK_PER_SECOND" description="OS tick per second" default="1000" />
#define RT_TICK_PER_SECOND 1000
// <integer name="IDLE_THREAD_STACK_SIZE" description="The stack size of idle thread" default="512" />
#define IDLE_THREAD_STACK_SIZE 512
// <section name="RT_DEBUG" description="Kernel Debug Configuration" default="true" >
#define RT_DEBUG
#define RT_DEBUG_COLOR
// <bool name="RT_THREAD_DEBUG" description="Thread debug enable" default="false" />
// #define RT_THREAD_DEBUG
// <bool name="RT_USING_OVERFLOW_CHECK" description="Thread stack over flow detect" default="true" />
// #define RT_USING_OVERFLOW_CHECK
// </section>
// <bool name="RT_USING_HOOK" description="Using hook functions" default="true" />
#define RT_USING_HOOK
// <section name="RT_USING_TIMER_SOFT" description="Using software timer which will start a thread to handle soft-timer" default="true" >
// #define RT_USING_TIMER_SOFT
// <integer name="RT_TIMER_THREAD_PRIO" description="The priority level of timer thread" default="4" />
#define RT_TIMER_THREAD_PRIO 4
// <integer name="RT_TIMER_THREAD_STACK_SIZE" description="The stack size of timer thread" default="512" />
#define RT_TIMER_THREAD_STACK_SIZE 512
// <integer name="RT_TIMER_TICK_PER_SECOND" description="The soft-timer tick per second" default="10" />
#define RT_TIMER_TICK_PER_SECOND 10
// </section>
// <section name="IPC" description="Inter-Thread communication" default="always" >
// <bool name="RT_USING_SEMAPHORE" description="Using semaphore in the system" default="true" />
#define RT_USING_SEMAPHORE
// <bool name="RT_USING_MUTEX" description="Using mutex in the system" default="true" />
#define RT_USING_MUTEX
// <bool name="RT_USING_EVENT" description="Using event group in the system" default="true" />
#define RT_USING_EVENT
// <bool name="RT_USING_MAILBOX" description="Using mailbox in the system" default="true" />
#define RT_USING_MAILBOX
// <bool name="RT_USING_MESSAGEQUEUE" description="Using message queue in the system" default="true" />
#define RT_USING_MESSAGEQUEUE
// </section>
// <section name="MM" description="Memory Management" default="always" >
// <bool name="RT_USING_MEMPOOL" description="Using Memory Pool Management in the system" default="true" />
#define RT_USING_MEMPOOL
// <bool name="RT_USING_MEMHEAP" description="Using Memory Heap Object in the system" default="true" />
// #define RT_USING_MEMHEAP
// <bool name="RT_USING_HEAP" description="Using Dynamic Heap Management in the system" default="true" />
#define RT_USING_HEAP
// <bool name="RT_USING_MEMHEAP_AS_HEAP" description="Using Memory Heap Object as system heap" default="true" />
// #define RT_USING_MEMHEAP_AS_HEAP
// <bool name="RT_USING_SMALL_MEM" description="Optimizing for small memory" default="false" />
#define RT_USING_SMALL_MEM
// <bool name="RT_USING_SLAB" description="Using SLAB memory management for large memory" default="false" />
// #define RT_USING_SLAB
// </section>
// <section name="RT_USING_DEVICE" description="Using Device Driver Framework" default="true" >
#define RT_USING_DEVICE
// <bool name="RT_USING_DEVICE_IPC" description="Using IPC in Device Driver Framework" default="true" />
#define RT_USING_DEVICE_IPC
// <bool name="RT_USING_SERIAL" description="Using Serial Device Driver Framework" default="true" />
#define RT_USING_SERIAL
#define RT_SERIAL_USING_DMA
// <integer name="RT_UART_RX_BUFFER_SIZE" description="The buffer size for UART reception" default="64" />
#define RT_UART_RX_BUFFER_SIZE 64
// <bool name="RT_USING_INTERRUPT_INFO" description="Using interrupt information description" default="true" />
#define RT_USING_INTERRUPT_INFO
// <bool name="RT_USING_UART0" description="Enable UART0" default="false" />
// #define RT_USING_UART0
// <bool name="RT_USING_UART1" description="Enable UART1" default="true" />
#define RT_USING_UART1
// </section>
// <section name="RT_USING_CONSOLE" description="Using console" default="true" >
#define RT_USING_CONSOLE
// <integer name="RT_CONSOLEBUF_SIZE" description="The buffer size for console output" default="128" />
#define RT_CONSOLEBUF_SIZE 128
// <string name="RT_CONSOLE_DEVICE_NAME" description="The device name for console" default="uart" />
#define RT_CONSOLE_DEVICE_NAME "uart1"
// </section>
// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />
#define RT_USING_COMPONENTS_INIT
// <section name="RT_USING_FINSH" description="Using finsh as shell, which is a C-Express shell" default="true" >
#define RT_USING_FINSH
// <bool name="FINSH_USING_MSH" description="Using module shell" default="true" />
#define FINSH_USING_MSH
// <bool name="FINSH_USING_MSH_DEFAULT" description="The default shell is msh" default="true" />
#define FINSH_USING_MSH_DEFAULT
// <bool name="FINSH_USING_SYMTAB" description="Using symbol table in finsh shell" default="true" />
#define FINSH_USING_SYMTAB
// <bool name="FINSH_USING_DESCRIPTION" description="Keeping description in symbol table" default="true" />
#define FINSH_USING_DESCRIPTION
// <integer name="FINSH_THREAD_STACK_SIZE" description="The stack size for finsh thread" default="4096" />
#define FINSH_THREAD_STACK_SIZE 4096
// </section>
// <section name="LIBC" description="C Runtime library setting" default="always" >
// <bool name="RT_USING_LIBC" description="Using libc library" default="true" />
#define RT_USING_LIBC
// <bool name="RT_USING_PTHREADS" description="Using POSIX threads library" default="true" />
#define RT_USING_PTHREADS
// </section>
// <section name="RT_USING_DFS" description="Device file system" default="true" >
// #define RT_USING_DFS
// <bool name="DFS_USING_WORKDIR" description="Using working directory" default="true" />
// #define DFS_USING_WORKDIR
// <integer name="DFS_FILESYSTEMS_MAX" description="The maximal number of mounted file system" default="4" />
#define DFS_FILESYSTEMS_MAX 2
// <integer name="DFS_FD_MAX" description="The maximal number of opened files" default="4" />
#define DFS_FD_MAX 4
// <bool name="RT_USING_DFS_ELMFAT" description="Using ELM FatFs" default="true" />
#define RT_USING_DFS_ELMFAT
// <integer name="RT_DFS_ELM_USE_LFN" description="Support long file name" default="0">
// <item description="LFN1">1</item>
// <item description="LFN1">2</item>
// </integer>
#define RT_DFS_ELM_USE_LFN 1
// <integer name="RT_DFS_ELM_MAX_LFN" description="Maximal size of file name length" default="255" />
#define RT_DFS_ELM_MAX_LFN 64
// <bool name="RT_USING_DFS_YAFFS2" description="Using YAFFS2" default="false" />
// #define RT_USING_DFS_YAFFS2
// <bool name="RT_USING_DFS_UFFS" description="Using UFFS" default="false" />
// #define RT_USING_DFS_UFFS
// <bool name="RT_USING_DFS_DEVFS" description="Using devfs for device objects" default="true" />
// #define RT_USING_DFS_DEVFS
// <bool name="RT_USING_DFS_NFS" description="Using NFS v3 client file system" default="false" />
// #define RT_USING_DFS_NFS
// <string name="RT_NFS_HOST_EXPORT" description="NFSv3 host export" default="192.168.1.5:/" />
#define RT_NFS_HOST_EXPORT "192.168.1.5:/"
// </section>
// </RDTConfigurator>
// <section name="RT_USING_VMM" description="Enable RT-Thread hypervisor" default="true" >
// #define RT_USING_VMM
// </section>
#endif

55
bsp/realview-a8/rtconfig.py
View File

@ -1,55 +0,0 @@
import os
# toolchains options
ARCH='arm'
CPU='realview-a8-vmm'
CROSS_TOOL='gcc'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
PLATFORM = 'gcc'
# EXEC_PATH = r'/opt/arm-2012.09/bin'
EXEC_PATH = r'C:\Program Files (x86)\CodeSourcery\Sourcery_CodeBench_Lite_for_ARM_EABI\bin'
EXEC_PATH = '/opt/gcc-arm-none-eabi-4_8-2014q1_gri/bin'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug'
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
DEVICE = ' -march=armv7-a -mtune=cortex-a8 -mfpu=vfpv3-d16 -ftree-vectorize -ffast-math -mfloat-abi=softfp'
CFLAGS = DEVICE + ' -Wall'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__'
LINK_SCRIPT = 'realview_vmm.lds'
LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=realview.map,-cref,-u,system_vectors'+\
' -T %s' % LINK_SCRIPT
CPATH = ''
LPATH = ''
# generate debug info in all cases
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -g -gdwarf-2'
if BUILD == 'debug':
CFLAGS += ' -O0'
else:
CFLAGS += ' -O2'
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' +\
SIZE + ' $TARGET \n' +\
OBJDUMP + ' -S $TARGET > rtt.S\n'

164
bsp/realview-a8/rtt_api.h
View File

@ -1,164 +0,0 @@
/*
* Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2014-04-07 Grissiom first version
*/
#ifndef __RTT_API_H__
#define __RTT_API_H__
/* 4MB in size */
#define VMM_SIZE 0x400000
#define VMM_END 0xc8000000
#define VMM_BEGIN (VMM_END - VMM_SIZE)
/* VMM Memory Map:
*
* --- VMM_BEGIN --- +------+
* .vectors | 4KB |
* .text.share | |
* ----------------- + |
* guest vector page | 4KB |
* ----------------- + |
* .data.share | 4KB |
* ----------------- + |
* .bss.share | 4KB |
* -- SHARE_BASE -- + | 1MB
* shared context | shared region
* ----------------- |
* blabla... |
* ----------------- +------+
* vmm text |
* rodata |
* blabla... |
* ----------------- | private region
* vmm data |
* ----------------- |
* vmm bss |
* ---- VMM_END ---- +------+
*
*/
/* 1MB is one level one page table entry, if we want to page table to be
* simple(avoid TLB miss), we could allocate 1MB for shared memory. */
#define VMM_SHARE_PGSZ (1024*1024)
/* the size and position of shared code text */
#define VMM_SHARE_TEXT_PGSZ 4096
/* the size and position of vector's page size in Linux */
#define LINUX_VECTOR_PGSZ 4096
#define LINUX_VECTOR_POS (VMM_BEGIN + VMM_SHARE_TEXT_PGSZ)
/* the size and position of shared code data */
#define VMM_SHARE_DATA_PGSZ 4096
#define VMM_SHARE_DATA_POS (LINUX_VECTOR_POS + LINUX_VECTOR_PGSZ)
/* the size and position of shared code bss */
#define VMM_SHARE_BSS_PGSZ 4096
#define VMM_SHARE_BSS_POS (VMM_SHARE_DATA_POS + VMM_SHARE_DATA_PGSZ)
/* the size and position of shared code bss */
#define VMM_SHARE_CTX_PGSZ (VMM_SHARE_PGSZ - \
LINUX_VECTOR_PGSZ - \
VMM_SHARE_TEXT_PGSZ - \
VMM_SHARE_DATA_PGSZ - \
VMM_SHARE_BSS_PGSZ)
#if VMM_SHARE_CTX_PGSZ <= 0
#error
#endif
#define VMM_SHARE_CTX_POS (VMM_SHARE_BSS_POS + VMM_SHARE_BSS_PGSZ)
/* the size of FIQ stack page size in RT-Thread */
#define RT_FIQ_STACK_PGSZ 0
/* the size of IRQ stack page size in RT-Thread */
#define RT_IRQ_STACK_PGSZ 4096
#ifdef HEAP_END
#undef HEAP_END
#endif
#define HEAP_END (VMM_END)
#define RT_VMM_VIRQ_TRIGGER 10
#define RT_VMM_STACK_SIZE 1024
/* the max number of iomap entries */
#define RT_VMM_IOMAP_MAXNR 16
#ifndef __iomem
#define __iomem
#endif
#define IRQS_NR_32 ((96 + 31)/32)
/*#define RT_VMM_USING_DOMAIN*/
#ifndef __ASSEMBLY__
/* keep consistent with linux/arch/arm/include/vmm/vmm.h */
struct vmm_context
{
/* the status of vGuest irq, read only for RT-Thread */
volatile unsigned long virq_status;
/* has interrupt pended on vGuest OS IRQ */
volatile unsigned long virq_pended;
/* pending interrupt for vGuest OS */
volatile unsigned long virq_pending[IRQS_NR_32];
};
struct vmm_domain
{
/* the number of kernel domain */
char kernel;
/* the number of user domain */
char user;
/* the number of io domain */
char io;
/* the number of vmm domain */
char vmm;
/* the number of vmm_share domain */
char vmm_share;
};
struct vmm_iomap
{
const char name[16]; /* iomap name */
unsigned long pa; /* physical address */
volatile void __iomem * va; /* virtual address */
size_t size; /* memory size */
};
struct vmm_entry_param
{
struct vmm_iomap *iomap;
struct vmm_domain *domain;
};
typedef void (*vmm_entry_t)(struct vmm_entry_param* param);
struct rt_vmm_share_layout
{
struct vmm_context ctx;
};
#ifndef __KERNEL__
/* not in Linux, use better type check */
extern struct rt_vmm_share_layout rt_vmm_share;
#define RT_VMM_SHARE (&rt_vmm_share)
#else
#define RT_VMM_SHARE ((struct rt_vmm_share_layout*)VMM_SHARE_CTX_POS)
#endif
#endif
#endif /* end of include guard: __RTT_API_H__ */

4
bsp/simulator/drivers/SConscript
View File

@ -26,10 +26,8 @@ if GetDepend('RT_USING_DFS') == False or GetDepend('RT_USING_DFS_WINSHAREDIR') =
SrcRemove(src, 'dfs_win32.c')
if GetDepend('RT_USING_DFS') == False or GetDepend('RT_USING_MODULE') == False:
SrcRemove(src, ['module_win32.c'])
if GetDepend('RT_USING_TAPNETIF') == False:
SrcRemove(src, ['tap_netif.c'])
if sys.platform[0:5]=="linux": #check whether under linux
SrcRemove(src, ['module_win32.c', 'dfs_win32.c', 'tap_netif.c'])
SrcRemove(src, ['module_win32.c', 'dfs_win32.c'])
group = DefineGroup('Drivers', src, depend = [''],
CPPPATH = CPPPATH, LIBS=LIBS, LIBPATH=LIBPATH)

791
bsp/simulator/drivers/tap_netif.c
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@ -1,791 +0,0 @@
/*
* TAP-Win32 -- A kernel driver to provide virtual tap device functionality
* on Windows. Originally derived from the CIPE-Win32
* project by Damion K. Wilson, with extensive modifications by
* James Yonan.
*
* All source code which derives from the CIPE-Win32 project is
* Copyright (C) Damion K. Wilson, 2003, and is released under the
* GPL version 2 (see below).
*
* All other source code is Copyright (C) James Yonan, 2003-2004,
* and is released under the GPL version 2 (see below).
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program (see the file COPYING included with this
* distribution); if not, see <http://www.gnu.org/licenses/>.
*/
#include <stdio.h>
#include <windows.h>
#include <winioctl.h>
#include <rtthread.h>
#include <netif/ethernetif.h>
#define MAX_ADDR_LEN 6
#define TAP_IFNAME "RT-net"
//=============
// TAP IOCTLs
//=============
#define TAP_CONTROL_CODE(request,method) \
CTL_CODE (FILE_DEVICE_UNKNOWN, request, method, FILE_ANY_ACCESS)
#define TAP_IOCTL_GET_MAC TAP_CONTROL_CODE (1, METHOD_BUFFERED)
#define TAP_IOCTL_GET_VERSION TAP_CONTROL_CODE (2, METHOD_BUFFERED)
#define TAP_IOCTL_GET_MTU TAP_CONTROL_CODE (3, METHOD_BUFFERED)
#define TAP_IOCTL_GET_INFO TAP_CONTROL_CODE (4, METHOD_BUFFERED)
#define TAP_IOCTL_CONFIG_POINT_TO_POINT TAP_CONTROL_CODE (5, METHOD_BUFFERED)
#define TAP_IOCTL_SET_MEDIA_STATUS TAP_CONTROL_CODE (6, METHOD_BUFFERED)
#define TAP_IOCTL_CONFIG_DHCP_MASQ TAP_CONTROL_CODE (7, METHOD_BUFFERED)
#define TAP_IOCTL_GET_LOG_LINE TAP_CONTROL_CODE (8, METHOD_BUFFERED)
#define TAP_IOCTL_CONFIG_DHCP_SET_OPT TAP_CONTROL_CODE (9, METHOD_BUFFERED)
//=================
// Registry keys
//=================
#define ADAPTER_KEY "SYSTEM\\CurrentControlSet\\Control\\Class\\{4D36E972-E325-11CE-BFC1-08002BE10318}"
#define NETWORK_CONNECTIONS_KEY "SYSTEM\\CurrentControlSet\\Control\\Network\\{4D36E972-E325-11CE-BFC1-08002BE10318}"
//======================
// Filesystem prefixes
//======================
#define USERMODEDEVICEDIR "\\\\.\\Global\\"
#define TAPSUFFIX ".tap"
//======================
// Compile time configuration
//======================
//#define DEBUG_TAP_WIN32
#define TUN_ASYNCHRONOUS_WRITES 1
#define TUN_BUFFER_SIZE 1560
#define TUN_MAX_BUFFER_COUNT 32
/*
* The data member "buffer" must be the first element in the tun_buffer
* structure. See the function, tap_win32_free_buffer.
*/
typedef struct tun_buffer_s {
unsigned char buffer [TUN_BUFFER_SIZE];
unsigned long read_size;
struct tun_buffer_s* next;
} tun_buffer_t;
typedef struct tap_win32_overlapped {
HANDLE handle;
HANDLE read_event;
HANDLE write_event;
HANDLE output_queue_semaphore;
HANDLE free_list_semaphore;
HANDLE tap_semaphore;
CRITICAL_SECTION output_queue_cs;
CRITICAL_SECTION free_list_cs;
OVERLAPPED read_overlapped;
OVERLAPPED write_overlapped;
tun_buffer_t buffers[TUN_MAX_BUFFER_COUNT];
tun_buffer_t* free_list;
tun_buffer_t* output_queue_front;
tun_buffer_t* output_queue_back;
} tap_win32_overlapped_t;
static tap_win32_overlapped_t tap_overlapped;
/************************************************************************/
/* RT-Thread Network Interface */
/************************************************************************/
struct tap_netif
{
/* inherit from ethernet device */
struct eth_device parent;
tap_win32_overlapped_t *handle;
/* interface address info. */
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
};
#define NETIF_DEVICE(netif) ((struct tap_netif*)(netif))
#define NETIF_TAP(netif) (NETIF_DEVICE(netif)->handle)
static struct tap_netif tap_netif_device;
static struct rt_semaphore sem_lock;
static tun_buffer_t* get_buffer_from_free_list(tap_win32_overlapped_t* const overlapped)
{
tun_buffer_t* buffer = NULL;
WaitForSingleObject(overlapped->free_list_semaphore, INFINITE);
EnterCriticalSection(&overlapped->free_list_cs);
buffer = overlapped->free_list;
overlapped->free_list = buffer->next;
LeaveCriticalSection(&overlapped->free_list_cs);
buffer->next = NULL;
return buffer;
}
static void put_buffer_on_free_list(tap_win32_overlapped_t* const overlapped, tun_buffer_t* const buffer)
{
EnterCriticalSection(&overlapped->free_list_cs);
buffer->next = overlapped->free_list;
overlapped->free_list = buffer;
LeaveCriticalSection(&overlapped->free_list_cs);
ReleaseSemaphore(overlapped->free_list_semaphore, 1, NULL);
}
static tun_buffer_t* get_buffer_from_output_queue(tap_win32_overlapped_t* const overlapped, const int block)
{
tun_buffer_t* buffer = NULL;
DWORD result, timeout = block ? INFINITE : 0L;
// Non-blocking call
result = WaitForSingleObject(overlapped->output_queue_semaphore, timeout);
switch (result)
{
// The semaphore object was signaled.
case WAIT_OBJECT_0:
EnterCriticalSection(&overlapped->output_queue_cs);
buffer = overlapped->output_queue_front;
overlapped->output_queue_front = buffer->next;
if(overlapped->output_queue_front == NULL) {
overlapped->output_queue_back = NULL;
}
LeaveCriticalSection(&overlapped->output_queue_cs);
break;
// Semaphore was nonsignaled, so a time-out occurred.
case WAIT_TIMEOUT:
// Cannot open another window.
break;
}
return buffer;
}
static tun_buffer_t* get_buffer_from_output_queue_immediate (tap_win32_overlapped_t* const overlapped)
{
return get_buffer_from_output_queue(overlapped, 0);
}
static void put_buffer_on_output_queue(tap_win32_overlapped_t* const overlapped, tun_buffer_t* const buffer)
{
EnterCriticalSection(&overlapped->output_queue_cs);
if(overlapped->output_queue_front == NULL && overlapped->output_queue_back == NULL) {
overlapped->output_queue_front = overlapped->output_queue_back = buffer;
} else {
buffer->next = NULL;
overlapped->output_queue_back->next = buffer;
overlapped->output_queue_back = buffer;
}
LeaveCriticalSection(&overlapped->output_queue_cs);
ReleaseSemaphore(overlapped->output_queue_semaphore, 1, NULL);
}
static int is_tap_win32_dev(const char *guid)
{
HKEY netcard_key;
LONG status;
DWORD len;
int i = 0;
status = RegOpenKeyEx(
HKEY_LOCAL_MACHINE,
ADAPTER_KEY,
0,
KEY_READ,
&netcard_key);
if (status != ERROR_SUCCESS) {
return FALSE;
}
for (;;) {
char enum_name[256];
char unit_string[256];
HKEY unit_key;
char component_id_string[] = "ComponentId";
char component_id[256];
char net_cfg_instance_id_string[] = "NetCfgInstanceId";
char net_cfg_instance_id[256];
DWORD data_type;
len = sizeof (enum_name);
status = RegEnumKeyEx(
netcard_key,
i,
enum_name,
&len,
NULL,
NULL,
NULL,
NULL);
if (status == ERROR_NO_MORE_ITEMS)
break;
else if (status != ERROR_SUCCESS) {
return FALSE;
}
rt_snprintf (unit_string, sizeof(unit_string), "%s\\%s",
ADAPTER_KEY, enum_name);
status = RegOpenKeyEx(
HKEY_LOCAL_MACHINE,
unit_string,
0,
KEY_READ,
&unit_key);
if (status != ERROR_SUCCESS) {
return FALSE;
} else {
len = sizeof (component_id);
status = RegQueryValueEx(
unit_key,
component_id_string,
NULL,
&data_type,
(LPBYTE)component_id,
&len);
if (!(status != ERROR_SUCCESS || data_type != REG_SZ)) {
len = sizeof (net_cfg_instance_id);
status = RegQueryValueEx(
unit_key,
net_cfg_instance_id_string,
NULL,
&data_type,
(LPBYTE)net_cfg_instance_id,
&len);
if (status == ERROR_SUCCESS && data_type == REG_SZ) {
if (/* !strcmp (component_id, TAP_COMPONENT_ID) &&*/
!strcmp (net_cfg_instance_id, guid)) {
RegCloseKey (unit_key);
RegCloseKey (netcard_key);
return TRUE;
}
}
}
RegCloseKey (unit_key);
}
++i;
}
RegCloseKey (netcard_key);
return FALSE;
}
static int get_device_guid(
char *name,
int name_size,
char *actual_name,
int actual_name_size)
{
LONG status;
HKEY control_net_key;
DWORD len;
int i = 0;
int stop = 0;
status = RegOpenKeyEx(
HKEY_LOCAL_MACHINE,
NETWORK_CONNECTIONS_KEY,
0,
KEY_READ,
&control_net_key);
if (status != ERROR_SUCCESS) {
return -1;
}
while (!stop)
{
char enum_name[256];
char connection_string[256];
HKEY connection_key;
char name_data[256];
DWORD name_type;
const char name_string[] = "Name";
len = sizeof (enum_name);
status = RegEnumKeyEx(
control_net_key,
i,
enum_name,
&len,
NULL,
NULL,
NULL,
NULL);
if (status == ERROR_NO_MORE_ITEMS)
break;
else if (status != ERROR_SUCCESS) {
return -1;
}
rt_snprintf(connection_string,
sizeof(connection_string),
"%s\\%s\\Connection",
NETWORK_CONNECTIONS_KEY, enum_name);
status = RegOpenKeyEx(
HKEY_LOCAL_MACHINE,
connection_string,
0,
KEY_READ,
&connection_key);
if (status == ERROR_SUCCESS) {
len = sizeof (name_data);
status = RegQueryValueEx(
connection_key,
name_string,
NULL,
&name_type,
(LPBYTE)name_data,
&len);
if (status != ERROR_SUCCESS || name_type != REG_SZ) {
return -1;
}
else {
if (is_tap_win32_dev(enum_name)) {
rt_snprintf(name, name_size, "%s", enum_name);
if (actual_name) {
if (strcmp(actual_name, "") != 0) {
if (strcmp(name_data, actual_name) != 0) {
RegCloseKey (connection_key);
++i;
continue;
}
}
else {
rt_snprintf(actual_name, actual_name_size, "%s", name_data);
}
}
stop = 1;
}
}
RegCloseKey (connection_key);
}
++i;
}
RegCloseKey (control_net_key);
if (stop == 0)
return -1;
return 0;
}
static int tap_win32_set_status(HANDLE handle, int status)
{
unsigned long len = 0;
return DeviceIoControl(handle, TAP_IOCTL_SET_MEDIA_STATUS,
&status, sizeof (status),
&status, sizeof (status), &len, NULL);
}
static void tap_win32_overlapped_init(tap_win32_overlapped_t* const overlapped, const HANDLE handle)
{
overlapped->handle = handle;
overlapped->read_event = CreateEvent(NULL, FALSE, FALSE, NULL);
overlapped->write_event = CreateEvent(NULL, FALSE, FALSE, NULL);
overlapped->read_overlapped.Offset = 0;
overlapped->read_overlapped.OffsetHigh = 0;
overlapped->read_overlapped.hEvent = overlapped->read_event;
overlapped->write_overlapped.Offset = 0;
overlapped->write_overlapped.OffsetHigh = 0;
overlapped->write_overlapped.hEvent = overlapped->write_event;
InitializeCriticalSection(&overlapped->output_queue_cs);
InitializeCriticalSection(&overlapped->free_list_cs);
overlapped->output_queue_semaphore = CreateSemaphore(
NULL, // default security attributes
0, // initial count
TUN_MAX_BUFFER_COUNT, // maximum count
NULL); // unnamed semaphore
if(!overlapped->output_queue_semaphore) {
fprintf(stderr, "error creating output queue semaphore!\n");
}
overlapped->free_list_semaphore = CreateSemaphore(
NULL, // default security attributes
TUN_MAX_BUFFER_COUNT, // initial count
TUN_MAX_BUFFER_COUNT, // maximum count
NULL); // unnamed semaphore
if(!overlapped->free_list_semaphore) {
fprintf(stderr, "error creating free list semaphore!\n");
}
overlapped->free_list = overlapped->output_queue_front = overlapped->output_queue_back = NULL;
{
unsigned index;
for(index = 0; index < TUN_MAX_BUFFER_COUNT; index++) {
tun_buffer_t* element = &overlapped->buffers[index];
element->next = overlapped->free_list;
overlapped->free_list = element;
}
}
/* To count buffers, initially no-signal. */
overlapped->tap_semaphore = CreateSemaphore(NULL, 0, TUN_MAX_BUFFER_COUNT, NULL);
if(!overlapped->tap_semaphore)
fprintf(stderr, "error creating tap_semaphore.\n");
}
static int tap_win32_write(tap_win32_overlapped_t *overlapped,
const void *buffer, unsigned long size)
{
unsigned long write_size;
BOOL result;
DWORD error;
result = GetOverlappedResult( overlapped->handle, &overlapped->write_overlapped,
&write_size, FALSE);
if (!result && GetLastError() == ERROR_IO_INCOMPLETE)
WaitForSingleObject(overlapped->write_event, INFINITE);
result = WriteFile(overlapped->handle, buffer, size,
&write_size, &overlapped->write_overlapped);
if (!result) {
switch (error = GetLastError())
{
case ERROR_IO_PENDING:
#ifndef TUN_ASYNCHRONOUS_WRITES
WaitForSingleObject(overlapped->write_event, INFINITE);
#endif
break;
default:
return -1;
}
}
return write_size;
}
static void tap_win32_thread_entry(void* param)
{
tap_win32_overlapped_t *overlapped;
unsigned long read_size;
BOOL result;
DWORD dwError;
tun_buffer_t* buffer;
struct eth_device* eth;
eth = (struct eth_device*) &tap_netif_device;
overlapped = NETIF_TAP(&tap_netif_device);
buffer = get_buffer_from_free_list(overlapped);
for (;;) {
result = ReadFile(overlapped->handle,
buffer->buffer,
sizeof(buffer->buffer),
&read_size,
&overlapped->read_overlapped);
if (!result) {
dwError = GetLastError();
if (dwError == ERROR_IO_PENDING) {
WaitForSingleObject(overlapped->read_event, INFINITE);
result = GetOverlappedResult( overlapped->handle, &overlapped->read_overlapped,
&read_size, FALSE);
if (!result) {
#ifdef DEBUG_TAP_WIN32
LPVOID lpBuffer;
dwError = GetLastError();
FormatMessage( FORMAT_MESSAGE_ALLOCATE_BUFFER | FORMAT_MESSAGE_FROM_SYSTEM,
NULL, dwError, MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT),
(LPTSTR) & lpBuffer, 0, NULL );
fprintf(stderr, "Tap-Win32: Error GetOverlappedResult %d - %s\n", dwError, lpBuffer);
LocalFree( lpBuffer );
#endif
}
} else {
#ifdef DEBUG_TAP_WIN32
LPVOID lpBuffer;
FormatMessage( FORMAT_MESSAGE_ALLOCATE_BUFFER | FORMAT_MESSAGE_FROM_SYSTEM,
NULL, dwError, MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT),
(LPTSTR) & lpBuffer, 0, NULL );
fprintf(stderr, "Tap-Win32: Error ReadFile %d - %s\n", dwError, lpBuffer);
LocalFree( lpBuffer );
#endif
}
}
if(read_size > 0) {
// rt_kprintf("rx packet, length=%d\n", read_size);
buffer->read_size = read_size;
put_buffer_on_output_queue(overlapped, buffer);
/* notify eth rx thread to receive packet */
eth_device_ready(eth);
buffer = get_buffer_from_free_list(overlapped);
}
}
}
static int tap_win32_read(tap_win32_overlapped_t *overlapped,
rt_uint8_t **pbuf, int max_size)
{
int size = 0;
tun_buffer_t* buffer = get_buffer_from_output_queue_immediate(overlapped);
if(buffer != NULL) {
*pbuf = buffer->buffer;
size = (int)buffer->read_size;
if(size > max_size) {
size = max_size;
}
}
return size;
}
static void tap_win32_free_buffer(tap_win32_overlapped_t *overlapped,
rt_uint8_t *pbuf)
{
tun_buffer_t* buffer = (tun_buffer_t*)pbuf;
put_buffer_on_free_list(overlapped, buffer);
}
static int tap_win32_open(tap_win32_overlapped_t **phandle,
const char *preferred_name)
{
char device_path[256];
char device_guid[0x100];
int rc;
HANDLE handle;
BOOL bret;
char name_buffer[0x100] = {0, };
struct {
unsigned long major;
unsigned long minor;
unsigned long debug;
} version;
DWORD version_len;
if (preferred_name != NULL) {
rt_snprintf(name_buffer, sizeof(name_buffer), "%s", preferred_name);
}
rc = get_device_guid(device_guid, sizeof(device_guid), name_buffer, sizeof(name_buffer));
if (rc)
return -1;
rt_snprintf (device_path, sizeof(device_path), "%s%s%s",
USERMODEDEVICEDIR,
device_guid,
TAPSUFFIX);
handle = CreateFile (
device_path,
GENERIC_READ | GENERIC_WRITE,
0,
0,
OPEN_EXISTING,
FILE_ATTRIBUTE_SYSTEM | FILE_FLAG_OVERLAPPED,
0 );
if (handle == INVALID_HANDLE_VALUE) {
return -1;
}
bret = DeviceIoControl(handle, TAP_IOCTL_GET_VERSION,
&version, sizeof (version),
&version, sizeof (version), &version_len, NULL);
if (bret == FALSE) {
CloseHandle(handle);
return -1;
}
if (!tap_win32_set_status(handle, TRUE)) {
return -1;
}
tap_win32_overlapped_init(&tap_overlapped, handle);
*phandle = &tap_overlapped;
return 0;
}
static rt_err_t tap_netif_init(rt_device_t dev)
{
rt_thread_t tid;
tap_win32_overlapped_t *handle;
if (tap_win32_open(&handle, TAP_IFNAME) < 0) {
printf("tap: Could not open '%s'\n", TAP_IFNAME);
return -RT_ERROR;
}
tap_netif_device.handle = handle;
/* create recv thread */
tid = rt_thread_create("tap", tap_win32_thread_entry, RT_NULL,
2048, RT_THREAD_PRIORITY_MAX - 1, 10);
if (tid != RT_NULL)
{
rt_thread_startup(tid);
}
rt_thread_sleep(RT_TICK_PER_SECOND);
return RT_EOK;
}
static rt_err_t tap_netif_open(rt_device_t dev, rt_uint16_t oflag)
{
return RT_EOK;
}
static rt_err_t tap_netif_close(rt_device_t dev)
{
return RT_EOK;
}
static rt_size_t tap_netif_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_size_t tap_netif_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
static rt_err_t tap_netif_control(rt_device_t dev, int cmd, void *args)
{
switch (cmd)
{
case NIOCTL_GADDR:
/* get mac address */
if (args) rt_memcpy(args, tap_netif_device.dev_addr, 6);
else return -RT_ERROR;
break;
default :
break;
}
return RT_EOK;
}
rt_err_t tap_netif_tx( rt_device_t dev, struct pbuf* p)
{
struct pbuf *q;
char buffer[2048];
int length;
tap_win32_overlapped_t *handle;
unsigned char* ptr;
handle = NETIF_TAP(dev);
/* lock EMAC device */
rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
/* copy data to tx buffer */
q = p;
ptr = (rt_uint8_t*)buffer;
while (q)
{
memcpy(ptr, q->payload, q->len);
ptr += q->len;
q = q->next;
}
length = p->tot_len;
tap_win32_write(handle, buffer, length);
/* unlock EMAC device */
rt_sem_release(&sem_lock);
return RT_EOK;
}
struct pbuf *tap_netif_rx(rt_device_t dev)
{
struct pbuf* p = RT_NULL;
tap_win32_overlapped_t *handle;
rt_uint8_t *buf;
int max_size = 4096;
int size;
handle = NETIF_TAP(dev);
size = tap_win32_read(handle, &buf, max_size);
if (size > 0) {
p = pbuf_alloc(PBUF_LINK, size, PBUF_RAM);
pbuf_take(p, buf, size);
tap_win32_free_buffer(handle, buf);
}
return p;
}
void tap_netif_hw_init(void)
{
rt_sem_init(&sem_lock, "eth_lock", 1, RT_IPC_FLAG_FIFO);
tap_netif_device.dev_addr[0] = 0x00;
tap_netif_device.dev_addr[1] = 0x60;
tap_netif_device.dev_addr[2] = 0x37;
/* set mac address: (only for test) */
tap_netif_device.dev_addr[3] = 0x12;
tap_netif_device.dev_addr[4] = 0x34;
tap_netif_device.dev_addr[5] = 0x56;
tap_netif_device.parent.parent.init = tap_netif_init;
tap_netif_device.parent.parent.open = tap_netif_open;
tap_netif_device.parent.parent.close = tap_netif_close;
tap_netif_device.parent.parent.read = tap_netif_read;
tap_netif_device.parent.parent.write = tap_netif_write;
tap_netif_device.parent.parent.control = tap_netif_control;
tap_netif_device.parent.parent.user_data= RT_NULL;
tap_netif_device.parent.eth_rx = tap_netif_rx;
tap_netif_device.parent.eth_tx = tap_netif_tx;
eth_device_init(&(tap_netif_device.parent), "e0");
}