Merge pull request #3132 from whj4674672/master

[BSP][stm32h743-atk-apollo] add QSPI FLASH
This commit is contained in:
Bernard Xiong 2019-10-14 09:10:02 +08:00 committed by GitHub
commit c6d1474f2b
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GPG Key ID: 4AEE18F83AFDEB23
10 changed files with 344 additions and 77 deletions

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@ -25,7 +25,7 @@
- MCUSTM32H743主频 400MHz2MB FLASH 1MB RAM
- 外部 SDRAMW9825G6KH32MB
- 外部 NAND FLASHH27U4G8F2512MB
- 外部 FLASHW25Q25632MB
- 外部 QSPI FLASHW25Q25632MB
- 常用外设
- LED2个DS0红色PB1DS1绿色PB0
- 按键4个KEY_UP兼具唤醒功能PA0K0PH3K1PH2K2PC13
@ -41,7 +41,7 @@
| **板载外设** | **支持情况** | **备注** |
| :----------------- | :----------: | :------------------------------------- |
| USB 转串口 | 支持 | |
| QSPI Flash | 暂不支持 | |
| QSPI Flash | 支持 | |
| 以太网 | 暂不支持 | |
| SD卡 | 暂不支持 | |
| CAN | 暂不支持 | |

File diff suppressed because one or more lines are too long

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@ -23,91 +23,98 @@ KeepUserPlacement=false
Mcu.Family=STM32H7
Mcu.IP0=CORTEX_M7
Mcu.IP1=DEBUG
Mcu.IP10=USART1
Mcu.IP10=SYS
Mcu.IP11=USART1
Mcu.IP2=DMA2D
Mcu.IP3=FMC
Mcu.IP4=IWDG1
Mcu.IP5=LTDC
Mcu.IP6=NVIC
Mcu.IP7=RCC
Mcu.IP8=RTC
Mcu.IP9=SYS
Mcu.IPNb=11
Mcu.IP7=QUADSPI
Mcu.IP8=RCC
Mcu.IP9=RTC
Mcu.IPNb=12
Mcu.Name=STM32H743IITx
Mcu.Package=LQFP176
Mcu.Pin0=PC13
Mcu.Pin1=PC14-OSC32_IN (OSC32_IN)
Mcu.Pin10=PF5
Mcu.Pin11=PF10
Mcu.Pin12=PH0-OSC_IN (PH0)
Mcu.Pin13=PH1-OSC_OUT (PH1)
Mcu.Pin14=PC0
Mcu.Pin15=PC2_C
Mcu.Pin16=PC3_C
Mcu.Pin17=PF11
Mcu.Pin18=PF12
Mcu.Pin19=PF13
Mcu.Pin11=PF6
Mcu.Pin12=PF7
Mcu.Pin13=PF8
Mcu.Pin14=PF9
Mcu.Pin15=PF10
Mcu.Pin16=PH0-OSC_IN (PH0)
Mcu.Pin17=PH1-OSC_OUT (PH1)
Mcu.Pin18=PC0
Mcu.Pin19=PC2_C
Mcu.Pin2=PC15-OSC32_OUT (OSC32_OUT)
Mcu.Pin20=PF14
Mcu.Pin21=PF15
Mcu.Pin22=PG0
Mcu.Pin23=PG1
Mcu.Pin24=PE7
Mcu.Pin25=PE8
Mcu.Pin26=PE9
Mcu.Pin27=PE10
Mcu.Pin28=PE11
Mcu.Pin29=PE12
Mcu.Pin20=PC3_C
Mcu.Pin21=PB2
Mcu.Pin22=PF11
Mcu.Pin23=PF12
Mcu.Pin24=PF13
Mcu.Pin25=PF14
Mcu.Pin26=PF15
Mcu.Pin27=PG0
Mcu.Pin28=PG1
Mcu.Pin29=PE7
Mcu.Pin3=PI9
Mcu.Pin30=PE13
Mcu.Pin31=PE14
Mcu.Pin32=PE15
Mcu.Pin33=PH9
Mcu.Pin34=PH10
Mcu.Pin35=PH11
Mcu.Pin36=PH12
Mcu.Pin37=PD8
Mcu.Pin38=PD9
Mcu.Pin39=PD10
Mcu.Pin30=PE8
Mcu.Pin31=PE9
Mcu.Pin32=PE10
Mcu.Pin33=PE11
Mcu.Pin34=PE12
Mcu.Pin35=PE13
Mcu.Pin36=PE14
Mcu.Pin37=PE15
Mcu.Pin38=PH9
Mcu.Pin39=PH10
Mcu.Pin4=PI10
Mcu.Pin40=PD14
Mcu.Pin41=PD15
Mcu.Pin42=PG2
Mcu.Pin43=PG4
Mcu.Pin44=PG5
Mcu.Pin45=PG6
Mcu.Pin46=PG7
Mcu.Pin47=PG8
Mcu.Pin48=PA9
Mcu.Pin49=PA10
Mcu.Pin40=PH11
Mcu.Pin41=PH12
Mcu.Pin42=PD8
Mcu.Pin43=PD9
Mcu.Pin44=PD10
Mcu.Pin45=PD14
Mcu.Pin46=PD15
Mcu.Pin47=PG2
Mcu.Pin48=PG4
Mcu.Pin49=PG5
Mcu.Pin5=PF0
Mcu.Pin50=PA13 (JTMS/SWDIO)
Mcu.Pin51=PH13
Mcu.Pin52=PH14
Mcu.Pin53=PH15
Mcu.Pin54=PI0
Mcu.Pin55=PI1
Mcu.Pin56=PI2
Mcu.Pin57=PA14 (JTCK/SWCLK)
Mcu.Pin58=PD0
Mcu.Pin59=PD1
Mcu.Pin50=PG6
Mcu.Pin51=PG7
Mcu.Pin52=PG8
Mcu.Pin53=PA9
Mcu.Pin54=PA10
Mcu.Pin55=PA13 (JTMS/SWDIO)
Mcu.Pin56=PH13
Mcu.Pin57=PH14
Mcu.Pin58=PH15
Mcu.Pin59=PI0
Mcu.Pin6=PF1
Mcu.Pin60=PG11
Mcu.Pin61=PG15
Mcu.Pin62=PE0
Mcu.Pin63=PE1
Mcu.Pin64=PI4
Mcu.Pin65=PI5
Mcu.Pin66=PI6
Mcu.Pin67=PI7
Mcu.Pin68=VP_DMA2D_VS_DMA2D
Mcu.Pin69=VP_IWDG1_VS_IWDG
Mcu.Pin60=PI1
Mcu.Pin61=PI2
Mcu.Pin62=PA14 (JTCK/SWCLK)
Mcu.Pin63=PD0
Mcu.Pin64=PD1
Mcu.Pin65=PG11
Mcu.Pin66=PG15
Mcu.Pin67=PB6
Mcu.Pin68=PE0
Mcu.Pin69=PE1
Mcu.Pin7=PF2
Mcu.Pin70=VP_RTC_VS_RTC_Activate
Mcu.Pin71=VP_SYS_VS_Systick
Mcu.Pin70=PI4
Mcu.Pin71=PI5
Mcu.Pin72=PI6
Mcu.Pin73=PI7
Mcu.Pin74=VP_DMA2D_VS_DMA2D
Mcu.Pin75=VP_IWDG1_VS_IWDG
Mcu.Pin76=VP_RTC_VS_RTC_Activate
Mcu.Pin77=VP_SYS_VS_Systick
Mcu.Pin8=PF3
Mcu.Pin9=PF4
Mcu.PinsNb=72
Mcu.PinsNb=78
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32H743IITx
@ -134,6 +141,15 @@ PA14\ (JTCK/SWCLK).Signal=DEBUG_JTCK-SWCLK
PA9.Locked=true
PA9.Mode=Asynchronous
PA9.Signal=USART1_TX
PB2.GPIOParameters=GPIO_Speed
PB2.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PB2.Mode=Single Bank 1
PB2.Signal=QUADSPI_CLK
PB6.GPIOParameters=GPIO_Speed
PB6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PB6.Locked=true
PB6.Mode=Single Bank 1
PB6.Signal=QUADSPI_BK1_NCS
PC0.Signal=FMC_SDNWE
PC13.Mode=Calibration_1Hz
PC13.Signal=RTC_OUT_CALIB
@ -186,6 +202,23 @@ PF2.Signal=FMC_A2
PF3.Signal=FMC_A3
PF4.Signal=FMC_A4
PF5.Signal=FMC_A5
PF6.GPIOParameters=GPIO_Speed
PF6.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PF6.Mode=Single Bank 1
PF6.Signal=QUADSPI_BK1_IO3
PF7.GPIOParameters=GPIO_Speed
PF7.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PF7.Locked=true
PF7.Mode=Single Bank 1
PF7.Signal=QUADSPI_BK1_IO2
PF8.GPIOParameters=GPIO_Speed
PF8.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PF8.Mode=Single Bank 1
PF8.Signal=QUADSPI_BK1_IO0
PF9.GPIOParameters=GPIO_Speed
PF9.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
PF9.Mode=Single Bank 1
PF9.Signal=QUADSPI_BK1_IO1
PG0.Signal=FMC_A10
PG1.Signal=FMC_A11
PG11.Locked=true
@ -275,7 +308,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=MDK-ARM V5
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_FMC_Init-FMC-false-HAL-true,6-MX_DMA2D_Init-DMA2D-false-HAL-true,7-MX_LTDC_Init-LTDC-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_IWDG1_Init-IWDG1-false-HAL-true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_FMC_Init-FMC-false-HAL-true,6-MX_DMA2D_Init-DMA2D-false-HAL-true,7-MX_LTDC_Init-LTDC-false-HAL-true,8-MX_RTC_Init-RTC-false-HAL-true,9-MX_IWDG1_Init-IWDG1-false-HAL-true,10-MX_QUADSPI_Init-QUADSPI-false-HAL-true
RCC.ADCFreq_Value=50390625
RCC.AHB12Freq_Value=200000000
RCC.AHB4Freq_Value=200000000

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@ -57,7 +57,7 @@
#define HAL_IWDG_MODULE_ENABLED
/* #define HAL_LPTIM_MODULE_ENABLED */
#define HAL_LTDC_MODULE_ENABLED
/* #define HAL_QSPI_MODULE_ENABLED */
#define HAL_QSPI_MODULE_ENABLED
/* #define HAL_RNG_MODULE_ENABLED */
#define HAL_RTC_MODULE_ENABLED
/* #define HAL_SAI_MODULE_ENABLED */

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@ -69,6 +69,8 @@ IWDG_HandleTypeDef hiwdg1;
LTDC_HandleTypeDef hltdc;
QSPI_HandleTypeDef hqspi;
RTC_HandleTypeDef hrtc;
UART_HandleTypeDef huart1;
@ -88,6 +90,7 @@ static void MX_DMA2D_Init(void);
static void MX_LTDC_Init(void);
static void MX_RTC_Init(void);
static void MX_IWDG1_Init(void);
static void MX_QUADSPI_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
@ -138,6 +141,7 @@ int main(void)
MX_LTDC_Init();
MX_RTC_Init();
MX_IWDG1_Init();
MX_QUADSPI_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
@ -217,7 +221,8 @@ void SystemClock_Config(void)
Error_Handler();
}
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_LTDC
|RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_FMC;
|RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_QSPI
|RCC_PERIPHCLK_FMC;
PeriphClkInitStruct.PLL3.PLL3M = 5;
PeriphClkInitStruct.PLL3.PLL3N = 160;
PeriphClkInitStruct.PLL3.PLL3P = 2;
@ -227,6 +232,7 @@ void SystemClock_Config(void)
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOWIDE;
PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_D1HCLK;
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK;
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
@ -375,6 +381,41 @@ static void MX_LTDC_Init(void)
}
/**
* @brief QUADSPI Initialization Function
* @param None
* @retval None
*/
static void MX_QUADSPI_Init(void)
{
/* USER CODE BEGIN QUADSPI_Init 0 */
/* USER CODE END QUADSPI_Init 0 */
/* USER CODE BEGIN QUADSPI_Init 1 */
/* USER CODE END QUADSPI_Init 1 */
/* QUADSPI parameter configuration*/
hqspi.Instance = QUADSPI;
hqspi.Init.ClockPrescaler = 255;
hqspi.Init.FifoThreshold = 1;
hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_NONE;
hqspi.Init.FlashSize = 1;
hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_1_CYCLE;
hqspi.Init.ClockMode = QSPI_CLOCK_MODE_0;
hqspi.Init.FlashID = QSPI_FLASH_ID_1;
hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
if (HAL_QSPI_Init(&hqspi) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN QUADSPI_Init 2 */
/* USER CODE END QUADSPI_Init 2 */
}
/**
* @brief RTC Initialization Function
* @param None
@ -524,6 +565,7 @@ static void MX_GPIO_Init(void)
__HAL_RCC_GPIOI_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();

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@ -277,6 +277,103 @@ void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
}
/**
* @brief QSPI MSP Initialization
* This function configures the hardware resources used in this example
* @param hqspi: QSPI handle pointer
* @retval None
*/
void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hqspi->Instance==QUADSPI)
{
/* USER CODE BEGIN QUADSPI_MspInit 0 */
/* USER CODE END QUADSPI_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_QSPI_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/**QUADSPI GPIO Configuration
PF6 ------> QUADSPI_BK1_IO3
PF7 ------> QUADSPI_BK1_IO2
PF8 ------> QUADSPI_BK1_IO0
PF9 ------> QUADSPI_BK1_IO1
PB2 ------> QUADSPI_CLK
PB6 ------> QUADSPI_BK1_NCS
*/
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_2;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USER CODE BEGIN QUADSPI_MspInit 1 */
/* USER CODE END QUADSPI_MspInit 1 */
}
}
/**
* @brief QSPI MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hqspi: QSPI handle pointer
* @retval None
*/
void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi)
{
if(hqspi->Instance==QUADSPI)
{
/* USER CODE BEGIN QUADSPI_MspDeInit 0 */
/* USER CODE END QUADSPI_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_QSPI_CLK_DISABLE();
/**QUADSPI GPIO Configuration
PF6 ------> QUADSPI_BK1_IO3
PF7 ------> QUADSPI_BK1_IO2
PF8 ------> QUADSPI_BK1_IO0
PF9 ------> QUADSPI_BK1_IO1
PB2 ------> QUADSPI_CLK
PB6 ------> QUADSPI_BK1_NCS
*/
HAL_GPIO_DeInit(GPIOF, GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_2|GPIO_PIN_6);
/* USER CODE BEGIN QUADSPI_MspDeInit 1 */
/* USER CODE END QUADSPI_MspDeInit 1 */
}
}
/**
* @brief RTC MSP Initialization
* This function configures the hardware resources used in this example

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@ -20,6 +20,13 @@ menu "Onboard Peripheral Drivers"
select BSP_USING_SDRAM
default n
config BSP_USING_QSPI_FLASH
bool "Enable QSPI FLASH (W25Q256 qspi)"
select BSP_USING_QSPI
select RT_USING_SFUD
select RT_SFUD_USING_QSPI
default n
endmenu
menu "On-chip Peripheral Drivers"
@ -47,6 +54,12 @@ menu "On-chip Peripheral Drivers"
bool
default n
config BSP_USING_QSPI
bool "Enable QSPI BUS"
select RT_USING_QSPI
select RT_USING_SPI
default n
menuconfig BSP_USING_ONCHIP_RTC
bool "Enable RTC"
select RT_USING_RTC

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@ -13,6 +13,9 @@ drv_mpu.c
CubeMX_Config/Src/stm32h7xx_hal_msp.c
''')
if GetDepend(['BSP_USING_QSPI_FLASH']):
src += Glob('ports/drv_qspi_flash.c')
path = [cwd]
path += [cwd + '/CubeMX_Config/Inc']
path += [cwd + '/ports']

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@ -70,7 +70,8 @@ void SystemClock_Config(void)
Error_Handler();
}
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_LTDC
|RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_FMC;
|RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_QSPI
|RCC_PERIPHCLK_FMC;
PeriphClkInitStruct.PLL3.PLL3M = 5;
PeriphClkInitStruct.PLL3.PLL3N = 160;
PeriphClkInitStruct.PLL3.PLL3P = 2;
@ -80,6 +81,7 @@ void SystemClock_Config(void)
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOWIDE;
PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
PeriphClkInitStruct.FmcClockSelection = RCC_FMCCLKSOURCE_D1HCLK;
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK;
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)

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@ -0,0 +1,77 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-27 zylx first version
*/
#include <board.h>
#include <drv_qspi.h>
#include <rtdevice.h>
#include <rthw.h>
#include <finsh.h>
#ifdef BSP_USING_QSPI_FLASH
#include "spi_flash.h"
#include "spi_flash_sfud.h"
char w25qxx_read_status_register2(struct rt_qspi_device *device)
{
/* 0x35 read status register2 */
char instruction = 0x35, status;
rt_qspi_send_then_recv(device, &instruction, 1, &status, 1);
return status;
}
void w25qxx_write_enable(struct rt_qspi_device *device)
{
/* 0x06 write enable */
char instruction = 0x06;
rt_qspi_send(device, &instruction, 1);
}
void w25qxx_enter_qspi_mode(struct rt_qspi_device *device)
{
char status = 0;
/* 0x38 enter qspi mode */
char instruction = 0x38;
char write_status2_buf[2] = {0};
/* 0x31 write status register2 */
write_status2_buf[0] = 0x31;
status = w25qxx_read_status_register2(device);
if (!(status & 0x02))
{
status |= 1 << 1;
w25qxx_write_enable(device);
write_status2_buf[1] = status;
rt_qspi_send(device, &write_status2_buf, 2);
rt_qspi_send(device, &instruction, 1);
rt_kprintf("flash already enter qspi mode\n");
rt_thread_mdelay(10);
}
}
static int rt_hw_qspi_flash_with_sfud_init(void)
{
stm32_qspi_bus_attach_device("qspi1", "qspi10", RT_NULL, 4, w25qxx_enter_qspi_mode, RT_NULL);
/* init W25Q256 */
if (RT_NULL == rt_sfud_flash_probe("W25Q256", "qspi10"))
{
return -RT_ERROR;
}
return RT_EOK;
}
INIT_DEVICE_EXPORT(rt_hw_qspi_flash_with_sfud_init);
#endif/* BSP_USING_QSPI_FLASH */