support auto initial.
This commit is contained in:
parent
8890e83aa9
commit
c44b02f08c
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@ -1,4 +1,3 @@
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/*
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* File : application.c
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* This file is part of RT-Thread RTOS
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@ -11,6 +10,7 @@
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard the first version
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* 2013-07-12 aozima update for auto initial.
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*/
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/**
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@ -21,21 +21,17 @@
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#include <board.h>
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#include <rtthread.h>
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#ifdef RT_USING_COMPONENTS_INIT
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#include <components.h>
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#endif /* RT_USING_COMPONENTS_INIT */
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#ifdef RT_USING_DFS
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/* dfs init */
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#include <dfs_init.h>
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/* dfs filesystem:ELM filesystem init */
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#include <dfs_elm.h>
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/* dfs Filesystem APIs */
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#include <dfs_fs.h>
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#endif
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#ifdef RT_USING_LWIP
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#include <lwip/sys.h>
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#include <lwip/api.h>
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#include <netif/ethernetif.h>
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#endif
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#ifdef RT_USING_RTGUI
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#include <rtgui/rtgui.h>
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#include <rtgui/rtgui_server.h>
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@ -84,127 +80,102 @@ rt_bool_t cali_setup(void)
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void cali_store(struct calibration_data *data)
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{
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rt_kprintf("cali finished (%d, %d), (%d, %d)\n",
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data->min_x,
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data->max_x,
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data->min_y,
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data->max_y);
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data->min_x,
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data->max_x,
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data->min_y,
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data->max_y);
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}
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#endif
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#endif /* RT_USING_RTGUI */
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void rt_init_thread_entry(void* parameter)
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{
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/* Filesystem Initialization */
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#ifdef RT_USING_DFS
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{
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/* init the device filesystem */
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dfs_init();
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#ifdef RT_USING_DFS_ELMFAT
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/* init the elm chan FatFs filesystam*/
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elm_init();
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/* mount sd card fat partition 1 as root directory */
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if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
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{
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rt_kprintf("File System initialized!\n");
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}
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else
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rt_kprintf("File System initialzation failed!\n");
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#endif
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}
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#ifdef RT_USING_COMPONENTS_INIT
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/* initialization RT-Thread Components */
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rt_components_init();
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#endif
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/* LwIP Initialization */
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#ifdef RT_USING_LWIP
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{
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extern void lwip_sys_init(void);
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#ifdef RT_USING_FINSH
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finsh_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif /* RT_USING_FINSH */
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/* register ethernetif device */
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eth_system_device_init();
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#ifdef STM32F10X_CL
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rt_hw_stm32_eth_init();
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#else
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/* STM32F103 */
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#if STM32_ETH_IF == 0
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rt_hw_enc28j60_init();
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#elif STM32_ETH_IF == 1
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rt_hw_dm9000_init();
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#endif
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#endif
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/* re-init device driver */
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rt_device_init_all();
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/* init lwip system */
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lwip_sys_init();
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rt_kprintf("TCP/IP initialized!\n");
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}
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#endif
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/* Filesystem Initialization */
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#if defined(RT_USING_DFS) && defined(RT_USING_DFS_ELMFAT)
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/* mount sd card fat partition 1 as root directory */
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if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
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{
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rt_kprintf("File System initialized!\n");
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}
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else
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rt_kprintf("File System initialzation failed!\n");
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#endif /* RT_USING_DFS */
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#ifdef RT_USING_RTGUI
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{
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extern void rtgui_system_server_init(void);
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extern void rt_hw_lcd_init();
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extern void rtgui_touch_hw_init(void);
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{
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extern void rtgui_system_server_init(void);
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extern void rt_hw_lcd_init();
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extern void rtgui_touch_hw_init(void);
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rt_device_t lcd;
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rt_device_t lcd;
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/* init lcd */
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rt_hw_lcd_init();
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/* init lcd */
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rt_hw_lcd_init();
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/* init touch panel */
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rtgui_touch_hw_init();
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/* init touch panel */
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rtgui_touch_hw_init();
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/* re-init device driver */
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rt_device_init_all();
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/* re-init device driver */
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rt_device_init_all();
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/* find lcd device */
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lcd = rt_device_find("lcd");
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/* find lcd device */
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lcd = rt_device_find("lcd");
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/* set lcd device as rtgui graphic driver */
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rtgui_graphic_set_device(lcd);
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/* set lcd device as rtgui graphic driver */
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rtgui_graphic_set_device(lcd);
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/* init rtgui system server */
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rtgui_system_server_init();
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/* init rtgui system server */
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rtgui_system_server_init();
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calibration_set_restore(cali_setup);
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calibration_set_after(cali_store);
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calibration_init();
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}
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}
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#endif /* #ifdef RT_USING_RTGUI */
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}
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int rt_application_init()
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int rt_application_init(void)
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{
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rt_thread_t init_thread;
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rt_thread_t init_thread;
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rt_err_t result;
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rt_err_t result;
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/* init led thread */
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result = rt_thread_init(&led_thread,
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"led",
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led_thread_entry, RT_NULL,
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(rt_uint8_t*)&led_stack[0], sizeof(led_stack), 20, 5);
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if (result == RT_EOK)
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{
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result = rt_thread_init(&led_thread,
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"led",
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led_thread_entry,
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RT_NULL,
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(rt_uint8_t*)&led_stack[0],
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sizeof(led_stack),
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20,
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5);
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if (result == RT_EOK)
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{
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rt_thread_startup(&led_thread);
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}
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}
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#if (RT_THREAD_PRIORITY_MAX == 32)
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init_thread = rt_thread_create("init",
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rt_init_thread_entry, RT_NULL,
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2048, 8, 20);
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init_thread = rt_thread_create("init",
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rt_init_thread_entry, RT_NULL,
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2048, 8, 20);
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#else
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init_thread = rt_thread_create("init",
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rt_init_thread_entry, RT_NULL,
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2048, 80, 20);
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init_thread = rt_thread_create("init",
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rt_init_thread_entry, RT_NULL,
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2048, 80, 20);
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#endif
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if (init_thread != RT_NULL)
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rt_thread_startup(init_thread);
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if (init_thread != RT_NULL)
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rt_thread_startup(init_thread);
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return 0;
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return 0;
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}
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/*@}*/
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/*@{*/
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extern int rt_application_init(void);
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#ifdef RT_USING_FINSH
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extern void finsh_system_init(void);
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extern void finsh_set_device(const char* device);
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#endif
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#ifdef __CC_ARM
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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*******************************************************************************/
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void assert_failed(u8* file, u32 line)
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{
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rt_kprintf("\n\r Wrong parameter value detected on\r\n");
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rt_kprintf(" file %s\r\n", file);
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rt_kprintf(" line %d\r\n", line);
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rt_kprintf("\n\r Wrong parameter value detected on\r\n");
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rt_kprintf(" file %s\r\n", file);
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rt_kprintf(" line %d\r\n", line);
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while (1) ;
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while (1) ;
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}
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/**
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*/
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void rtthread_startup(void)
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{
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/* init board */
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rt_hw_board_init();
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/* init board */
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rt_hw_board_init();
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/* show version */
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rt_show_version();
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/* show version */
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rt_show_version();
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/* init kernel object */
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rt_system_object_init();
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/* init kernel object */
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rt_system_object_init();
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/* init timer system */
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rt_system_timer_init();
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/* init timer system */
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rt_system_timer_init();
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#ifdef RT_USING_HEAP
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#if STM32_EXT_SRAM
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rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
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rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
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#else
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#ifdef __CC_ARM
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rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
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#elif __ICCARM__
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rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
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#else
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/* init memory system */
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rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
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#endif
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#ifdef __CC_ARM
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rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
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#elif __ICCARM__
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rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
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#else
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/* init memory system */
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rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
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#endif
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#endif /* STM32_EXT_SRAM */
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#endif /* RT_USING_HEAP */
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/* init scheduler system */
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rt_system_scheduler_init();
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/* init scheduler system */
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rt_system_scheduler_init();
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/* init timer thread */
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rt_system_timer_thread_init();
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/* init application */
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rt_application_init();
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/* init application */
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rt_application_init();
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#ifdef RT_USING_FINSH
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/* init finsh */
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finsh_system_init();
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finsh_set_device(RT_CONSOLE_DEVICE_NAME);
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#endif
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/* init idle thread */
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rt_thread_idle_init();
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/* init idle thread */
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rt_thread_idle_init();
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/* start scheduler */
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rt_system_scheduler_start();
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/* start scheduler */
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rt_system_scheduler_start();
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/* never reach here */
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return ;
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/* never reach here */
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return ;
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}
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int main(void)
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{
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/* disable interrupt first */
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rt_hw_interrupt_disable();
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/* disable interrupt first */
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rt_hw_interrupt_disable();
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/* startup RT-Thread RTOS */
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rtthread_startup();
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/* startup RT-Thread RTOS */
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rtthread_startup();
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return 0;
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return 0;
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}
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/*@}*/
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@ -10,6 +10,7 @@
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard first implementation
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* 2013-07-12 aozima update for auto initial.
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*/
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#include <rthw.h>
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#include "stm32f10x_fsmc.h"
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#include "board.h"
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#ifdef RT_USING_COMPONENTS_INIT
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#include <components.h>
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#endif /* RT_USING_COMPONENTS_INIT */
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/**
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* @addtogroup STM32
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*/
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void NVIC_Configuration(void)
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{
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#ifdef VECT_TAB_RAM
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/* Set the Vector Table base location at 0x20000000 */
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NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
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/* Set the Vector Table base location at 0x20000000 */
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NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
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#else /* VECT_TAB_FLASH */
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/* Set the Vector Table base location at 0x08000000 */
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NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
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/* Set the Vector Table base location at 0x08000000 */
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NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
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#endif
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}
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#if STM32_EXT_SRAM
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void EXT_SRAM_Configuration(void)
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{
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FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
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FSMC_NORSRAMTimingInitTypeDef p;
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FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
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FSMC_NORSRAMTimingInitTypeDef p;
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/* FSMC GPIO configure */
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{
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}
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/* FSMC GPIO configure */
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/*-- FSMC Configuration ------------------------------------------------------*/
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p.FSMC_AddressSetupTime = 0;
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p.FSMC_AddressHoldTime = 0;
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p.FSMC_DataSetupTime = 2;
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p.FSMC_BusTurnAroundDuration = 0;
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p.FSMC_CLKDivision = 0;
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p.FSMC_DataLatency = 0;
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p.FSMC_AccessMode = FSMC_AccessMode_A;
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/*-- FSMC Configuration ------------------------------------------------------*/
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p.FSMC_AddressSetupTime = 0;
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p.FSMC_AddressHoldTime = 0;
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p.FSMC_DataSetupTime = 2;
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p.FSMC_BusTurnAroundDuration = 0;
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p.FSMC_CLKDivision = 0;
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p.FSMC_DataLatency = 0;
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p.FSMC_AccessMode = FSMC_AccessMode_A;
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FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
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FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
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FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
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FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
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FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
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FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
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FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
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FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
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FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
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FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
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FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3;
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FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
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FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
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FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
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FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
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FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
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FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
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FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
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FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
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FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
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FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
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FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
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FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
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FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);
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/* Enable FSMC Bank1_SRAM Bank */
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FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
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/* Enable FSMC Bank1_SRAM Bank */
|
||||
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -155,13 +160,13 @@ void EXT_SRAM_Configuration(void)
|
|||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
/* enter interrupt */
|
||||
rt_interrupt_enter();
|
||||
|
||||
rt_tick_increase();
|
||||
rt_tick_increase();
|
||||
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
/* leave interrupt */
|
||||
rt_interrupt_leave();
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -169,18 +174,22 @@ void SysTick_Handler(void)
|
|||
*/
|
||||
void rt_hw_board_init(void)
|
||||
{
|
||||
/* NVIC Configuration */
|
||||
NVIC_Configuration();
|
||||
/* NVIC Configuration */
|
||||
NVIC_Configuration();
|
||||
|
||||
/* Configure the SysTick */
|
||||
SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
|
||||
|
||||
#if STM32_EXT_SRAM
|
||||
EXT_SRAM_Configuration();
|
||||
EXT_SRAM_Configuration();
|
||||
#endif
|
||||
|
||||
rt_hw_usart_init();
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
rt_hw_usart_init();
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
/*@}*/
|
||||
|
|
|
@ -56,6 +56,9 @@
|
|||
/* Using Small MM */
|
||||
#define RT_USING_SMALL_MEM
|
||||
|
||||
// <bool name="RT_USING_COMPONENTS_INIT" description="Using RT-Thread components initialization" default="true" />
|
||||
#define RT_USING_COMPONENTS_INIT
|
||||
|
||||
/* SECTION: Device System */
|
||||
/* Using Device System */
|
||||
#define RT_USING_DEVICE
|
||||
|
@ -78,12 +81,12 @@
|
|||
/* #define RT_USING_DFS */
|
||||
|
||||
#define RT_USING_DFS_ELMFAT
|
||||
#define RT_DFS_ELM_WORD_ACCESS
|
||||
/* Reentrancy (thread safe) of the FatFs module. */
|
||||
#define RT_DFS_ELM_REENTRANT
|
||||
/* Number of volumes (logical drives) to be used. */
|
||||
#define RT_DFS_ELM_DRIVES 2
|
||||
/* #define RT_DFS_ELM_USE_LFN 1 */
|
||||
/* #define RT_DFS_ELM_CODE_PAGE 936 */
|
||||
#define RT_DFS_ELM_MAX_LFN 255
|
||||
/* Maximum sector size to be handled. */
|
||||
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
|
||||
|
|
Loading…
Reference in New Issue