add the AT45DB Drivers
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@328 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
wuyangyong
parent
63dff2e94e
commit
c28ecae7ed
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@ -26,6 +26,7 @@ uint32_t Mass_Block_Count[3];
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uint32_t Max_Lun = 2;
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uint32_t Max_Lun = 2;
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rt_device_t dev_sdio = RT_NULL;
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rt_device_t dev_sdio = RT_NULL;
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rt_device_t dev_spi_flash = RT_NULL;
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uint16_t MAL_Init(uint8_t lun)
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uint16_t MAL_Init(uint8_t lun)
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{
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{
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@ -37,7 +38,7 @@ uint16_t MAL_Init(uint8_t lun)
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status = MAL_OK;
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status = MAL_OK;
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break;
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break;
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case 1:
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case 1:
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status = MAL_FAIL;
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status = MAL_OK;
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break;
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break;
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case 2:
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case 2:
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status = MAL_FAIL;
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status = MAL_FAIL;
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@ -54,6 +55,11 @@ uint16_t MAL_Write(uint8_t lun, uint32_t Memory_Offset, uint32_t *Writebuff, uin
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switch (lun)
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switch (lun)
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{
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{
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case 0:
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case 0:
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{
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dev_spi_flash->write(dev_spi_flash,Memory_Offset,Writebuff,Transfer_Length);
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}
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break;
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case 1:
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{
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{
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dev_sdio->write(dev_sdio,Memory_Offset,Writebuff,Transfer_Length);
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dev_sdio->write(dev_sdio,Memory_Offset,Writebuff,Transfer_Length);
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}
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}
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@ -70,6 +76,11 @@ uint16_t MAL_Read(uint8_t lun, uint32_t Memory_Offset, uint32_t *Readbuff, uint1
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switch (lun)
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switch (lun)
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{
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{
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case 0:
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case 0:
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{
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dev_spi_flash->read(dev_spi_flash,Memory_Offset,Readbuff,Transfer_Length);
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}
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break;
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case 1:
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{
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{
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dev_sdio->read(dev_sdio,Memory_Offset,Readbuff,Transfer_Length);
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dev_sdio->read(dev_sdio,Memory_Offset,Readbuff,Transfer_Length);
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}
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}
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@ -87,7 +98,7 @@ uint16_t MAL_GetStatus (uint8_t lun)
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case 0:
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case 0:
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return MAL_OK;
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return MAL_OK;
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case 1:
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case 1:
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return MAL_FAIL;
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return MAL_OK;
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case 2:
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case 2:
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return MAL_FAIL;
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return MAL_FAIL;
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default:
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default:
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@ -10,6 +10,7 @@ extern uint32_t Mass_Memory_Size[2];
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extern uint32_t Mass_Block_Size[2];
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extern uint32_t Mass_Block_Size[2];
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extern uint32_t Mass_Block_Count[2];
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extern uint32_t Mass_Block_Count[2];
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extern rt_device_t dev_sdio;
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extern rt_device_t dev_sdio;
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extern rt_device_t dev_spi_flash;
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#include <finsh.h>
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#include <finsh.h>
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#include "sdcard.h"
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#include "sdcard.h"
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@ -18,22 +19,33 @@ void USB_cable(void)
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rt_device_t dev = RT_NULL;
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rt_device_t dev = RT_NULL;
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SD_CardInfo * sdio_info = RT_NULL;
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SD_CardInfo * sdio_info = RT_NULL;
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dev = rt_device_find("sd0");
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dev = rt_device_find("sd0");
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/* SPI_FLASH */
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dev_spi_flash = rt_device_find("spi0");
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Mass_Block_Size[0] = 512;
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Mass_Block_Count[0] = 4096;
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Mass_Memory_Size[0] = 4096*512;
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if(dev != RT_NULL)
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if(dev != RT_NULL)
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{
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{
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dev_sdio = dev;
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dev_sdio = dev;
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sdio_info = (SD_CardInfo *)dev->private;
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sdio_info = (SD_CardInfo *)dev->private;
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Mass_Memory_Size[0] = sdio_info->CardCapacity;
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Mass_Memory_Size[1] = sdio_info->CardCapacity;
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Mass_Block_Size[0] = sdio_info->CardBlockSize;
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Mass_Block_Size[1] = sdio_info->CardBlockSize;
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Mass_Block_Count[0] = Mass_Memory_Size[0] / Mass_Block_Size[0];
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Mass_Block_Count[1] = Mass_Memory_Size[0] / Mass_Block_Size[0];
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Set_System();
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Set_USBClock();
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USB_Interrupts_Config();
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USB_Init();
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}
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}
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else
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else
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{
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{
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rt_kprintf("\r\nNo find the device sd0 !!!!");
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rt_kprintf("\r\nNo find the device sd0 !!!!");
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}
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}
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/* 3:NAND */
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/* usb msc up*/
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Set_System();
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Set_USBClock();
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USB_Interrupts_Config();
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USB_Init();
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}
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}
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FINSH_FUNCTION_EXPORT(USB_cable, cable_the_usb);
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FINSH_FUNCTION_EXPORT(USB_cable, cable_the_usb);
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@ -95,12 +95,12 @@ void NVIC_Configuration(void)
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NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
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NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
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#endif
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#endif
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/*
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/*
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* set priority group:
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* set priority group:
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* 2 bits for pre-emption priority
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* 2 bits for pre-emption priority
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* 2 bits for subpriority
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* 2 bits for subpriority
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*/
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*/
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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}
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}
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/*******************************************************************************
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/*******************************************************************************
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@ -180,12 +180,35 @@ void rt_hw_board_init()
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/* NAND read ID command */
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/* NAND read ID command */
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FSMC_NAND_ReadID(&NAND_ID);
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FSMC_NAND_ReadID(&NAND_ID);
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rt_kprintf("Read the NAND ID:%02X%02X%02X%02X\n",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);
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rt_kprintf("\r\n\r\nRead the NAND ID:%02X%02X%02X%02X",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);
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/* SRAM init */
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/* SRAM init */
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
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FSMC_SRAM_Init();
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FSMC_SRAM_Init();
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/* memtest */
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{
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unsigned char * p_extram = (unsigned char *)0x68000000;
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unsigned int temp;
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rt_kprintf("\r\nmem testing....");
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for(temp=0; temp<0x80000; temp++)
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{
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*p_extram++ = (unsigned char)temp;
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}
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p_extram = (unsigned char *)0x68000000;
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for(temp=0; temp<0x80000; temp++)
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{
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if( *p_extram++ != (unsigned char)temp )
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{
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rt_kprintf("\rmemtest fail @ %08X\r\nsystem halt!!!!!",(unsigned int)p_extram);
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while(1);
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}
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}
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rt_kprintf("\rmem test pass!!\r\n");
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}/* memtest */
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{
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{
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/* PC6 for SDCard Rst */
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/* PC6 for SDCard Rst */
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitTypeDef GPIO_InitStructure;
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@ -196,7 +219,41 @@ void rt_hw_board_init()
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GPIO_Init(GPIOC,&GPIO_InitStructure);
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GPIO_Init(GPIOC,&GPIO_InitStructure);
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GPIO_SetBits(GPIOC,GPIO_Pin_6);
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GPIO_SetBits(GPIOC,GPIO_Pin_6);
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}
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}
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}
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/* SPI1 config */
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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SPI_InitTypeDef SPI_InitStructure;
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/* Enable SPI1 Periph clock */
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA
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| RCC_APB2Periph_AFIO | RCC_APB2Periph_SPI1,
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ENABLE);
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/* Configure SPI1 pins: PA5-SCK, PA6-MISO and PA7-MOSI */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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/*------------------------ SPI1 configuration ------------------------*/
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SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx;
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SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
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SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
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SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
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SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
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SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
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SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256;
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SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
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SPI_InitStructure.SPI_CRCPolynomial = 7;
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SPI_Init(SPI1, &SPI_InitStructure);
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/* Enable SPI_MASTER */
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SPI_Cmd(SPI1, ENABLE);
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SPI_CalculateCRC(SPI1, DISABLE);
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}
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}/* rt_hw_board_init */
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#if STM32_CONSOLE_USART == 1
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#if STM32_CONSOLE_USART == 1
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#define CONSOLE_RX_PIN GPIO_Pin_9
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#define CONSOLE_RX_PIN GPIO_Pin_9
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@ -206,13 +263,13 @@ void rt_hw_board_init()
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#elif STM32_CONSOLE_USART == 2
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#elif STM32_CONSOLE_USART == 2
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#if defined(STM32_LD) || defined(STM32_MD)
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#if defined(STM32_LD) || defined(STM32_MD)
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#define CONSOLE_RX_PIN GPIO_Pin_6
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#define CONSOLE_RX_PIN GPIO_Pin_6
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#define CONSOLE_TX_PIN GPIO_Pin_5
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#define CONSOLE_TX_PIN GPIO_Pin_5
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#define CONSOLE_GPIO GPIOD
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#define CONSOLE_GPIO GPIOD
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#elif defined(STM32_HD)
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#elif defined(STM32_HD)
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#define CONSOLE_RX_PIN GPIO_Pin_3
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#define CONSOLE_RX_PIN GPIO_Pin_3
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#define CONSOLE_TX_PIN GPIO_Pin_2
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#define CONSOLE_TX_PIN GPIO_Pin_2
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#define CONSOLE_GPIO GPIOA
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#define CONSOLE_GPIO GPIOA
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#endif
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#endif
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#define CONSOLE_USART USART2
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#define CONSOLE_USART USART2
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@ -300,7 +357,7 @@ static void rt_hw_console_putc(const char c)
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void rt_hw_console_output(const char* str)
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void rt_hw_console_output(const char* str)
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{
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{
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#if STM32_CONSOLE_USART == 0
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#if STM32_CONSOLE_USART == 0
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/* no console */
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/* no console */
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#else
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#else
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while (*str)
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while (*str)
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{
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{
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@ -2,81 +2,12 @@
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#include <rtthread.h>
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#include <rtthread.h>
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#include "stm32f10x.h"
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#include "stm32f10x.h"
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/*
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* WM8753 Driver
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*/
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/* WM8753 register definitions */
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#define WM8753_DAC 0x01
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#define WM8753_ADC 0x02
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#define WM8753_PCM 0x03
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#define WM8753_HIFI 0x04
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#define WM8753_IOCTL 0x05
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#define WM8753_SRATE1 0x06
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#define WM8753_SRATE2 0x07
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#define WM8753_LDAC 0x08
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#define WM8753_RDAC 0x09
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#define WM8753_BASS 0x0a
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#define WM8753_TREBLE 0x0b
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#define WM8753_ALC1 0x0c
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#define WM8753_ALC2 0x0d
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#define WM8753_ALC3 0x0e
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#define WM8753_NGATE 0x0f
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#define WM8753_LADC 0x10
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#define WM8753_RADC 0x11
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#define WM8753_ADCTL1 0x12
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#define WM8753_3D 0x13
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#define WM8753_PWR1 0x14
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#define WM8753_PWR2 0x15
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#define WM8753_PWR3 0x16
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#define WM8753_PWR4 0x17
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#define WM8753_ID 0x18
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#define WM8753_INTPOL 0x19
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#define WM8753_INTEN 0x1a
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#define WM8753_GPIO1 0x1b
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#define WM8753_GPIO2 0x1c
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#define WM8753_RESET 0x1f
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#define WM8753_RECMIX1 0x20
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#define WM8753_RECMIX2 0x21
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#define WM8753_LOUTM1 0x22
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#define WM8753_LOUTM2 0x23
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#define WM8753_ROUTM1 0x24
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#define WM8753_ROUTM2 0x25
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#define WM8753_MOUTM1 0x26
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#define WM8753_MOUTM2 0x27
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#define WM8753_LOUT1V 0x28
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#define WM8753_ROUT1V 0x29
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#define WM8753_LOUT2V 0x2a
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#define WM8753_ROUT2V 0x2b
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#define WM8753_MOUTV 0x2c
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#define WM8753_OUTCTL 0x2d
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#define WM8753_ADCIN 0x2e
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#define WM8753_INCTL1 0x2f
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#define WM8753_INCTL2 0x30
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#define WM8753_LINVOL 0x31
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#define WM8753_RINVOL 0x32
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#define WM8753_MICBIAS 0x33
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#define WM8753_CLOCK 0x34
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#define WM8753_PLL1CTL1 0x35
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#define WM8753_PLL1CTL2 0x36
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#define WM8753_PLL1CTL3 0x37
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#define WM8753_PLL1CTL4 0x38
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#define WM8753_PLL2CTL1 0x39
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#define WM8753_PLL2CTL2 0x3a
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#define WM8753_PLL2CTL3 0x3b
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#define WM8753_PLL2CTL4 0x3c
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#define WM8753_BIASCTL 0x3d
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#define WM8753_ADCTL2 0x3f
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/*
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/*
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SCLK PA5 SPI1_SCK
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SCLK PA5 SPI1_SCK
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SDIN PA6
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SDIN PA7 SPI1_MOSI
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CSB PC5
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CSB PC5
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*/
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*/
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#define wm_sclk_0 GPIO_ResetBits(GPIOA,GPIO_Pin_5)
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#define wm_sclk_1 GPIO_SetBits(GPIOA,GPIO_Pin_5)
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#define wm_sdin_0 GPIO_ResetBits(GPIOA,GPIO_Pin_7)
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#define wm_sdin_1 GPIO_SetBits(GPIOA,GPIO_Pin_7)
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#define wm_csb_0 GPIO_ResetBits(GPIOC,GPIO_Pin_5)
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#define wm_csb_0 GPIO_ResetBits(GPIOC,GPIO_Pin_5)
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#define wm_csb_1 GPIO_SetBits(GPIOC,GPIO_Pin_5)
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#define wm_csb_1 GPIO_SetBits(GPIOC,GPIO_Pin_5)
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@ -124,56 +55,17 @@ static void NVIC_Configuration(void)
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static void GPIO_Configuration(void)
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static void GPIO_Configuration(void)
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{
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitTypeDef GPIO_InitStructure;
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SPI_InitTypeDef SPI_InitStructure;
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#define SPI_MASTER SPI1
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#define SPI_MASTER_CLK RCC_APB2Periph_SPI1
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#define SPI_MASTER_GPIO GPIOA
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#define SPI_MASTER_GPIO_CLK RCC_APB2Periph_GPIOA
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#define SPI_MASTER_PIN_SCK GPIO_Pin_5
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#define SPI_MASTER_PIN_MISO GPIO_Pin_6
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#define SPI_MASTER_PIN_MOSI GPIO_Pin_7
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|
||||||
#define SPI_MASTER_IRQn SPI1_IRQn
|
|
||||||
|
|
||||||
/* Disable the JTAG interface and enable the SWJ interface */
|
/* Disable the JTAG interface and enable the SWJ interface */
|
||||||
GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
|
GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
|
||||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
|
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC, ENABLE);
|
||||||
|
|
||||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA |
|
|
||||||
RCC_APB2Periph_AFIO, ENABLE);
|
|
||||||
|
|
||||||
/* Enable SPI_MASTER Periph clock */
|
|
||||||
RCC_APB2PeriphClockCmd(SPI_MASTER_CLK, ENABLE);
|
|
||||||
|
|
||||||
/* Configure SPI_MASTER pins: SCK, MISO and MOSI */
|
|
||||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
|
|
||||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
|
||||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
|
||||||
GPIO_Init(SPI_MASTER_GPIO, &GPIO_InitStructure);
|
|
||||||
|
|
||||||
|
/* PC5 CODEC CS */
|
||||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
|
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
|
||||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||||
GPIO_Init(GPIOC,&GPIO_InitStructure);
|
GPIO_Init(GPIOC,&GPIO_InitStructure);
|
||||||
|
|
||||||
/* SPI_MASTER configuration ------------------------------------------------*/
|
|
||||||
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx;
|
|
||||||
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
|
|
||||||
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
|
|
||||||
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;/* 常态为低电平 */
|
|
||||||
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; /* SPI_CPHA_1Edge 从第一个沿开始送数据: 上升沿
|
|
||||||
SPI_CPHA_2Edge 从第二个沿开始送数据: 下降沿 */
|
|
||||||
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
|
|
||||||
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256;
|
|
||||||
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
|
|
||||||
SPI_InitStructure.SPI_CRCPolynomial = 7;
|
|
||||||
SPI_Init(SPI1, &SPI_InitStructure);
|
|
||||||
|
|
||||||
/* Enable SPI_MASTER */
|
|
||||||
SPI_Cmd(SPI1, ENABLE);
|
|
||||||
SPI_CalculateCRC(SPI1, DISABLE);
|
|
||||||
|
|
||||||
|
|
||||||
/* Configure SPI2 pins: CK, WS and SD */
|
/* Configure SPI2 pins: CK, WS and SD */
|
||||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_15;
|
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_15;
|
||||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||||
|
|
@ -235,64 +127,35 @@ static void I2S_Configuration(void)
|
||||||
I2S_Init(SPI2, &I2S_InitStructure);
|
I2S_Init(SPI2, &I2S_InitStructure);
|
||||||
}
|
}
|
||||||
|
|
||||||
#if 1
|
unsigned char SPI_WriteByte(unsigned char data)
|
||||||
static void wm_delay(void)
|
|
||||||
{
|
{
|
||||||
volatile unsigned int dl;
|
unsigned char Data = 0;
|
||||||
for(dl=0; dl<5000; dl++);
|
|
||||||
|
//Wait until the transmit buffer is empty
|
||||||
|
while(SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_TXE)==RESET);
|
||||||
|
// Send the byte
|
||||||
|
SPI_I2S_SendData(SPI1,data);
|
||||||
|
|
||||||
|
//Wait until a data is received
|
||||||
|
while(SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_RXNE)==RESET);
|
||||||
|
// Get the received data
|
||||||
|
Data = SPI_I2S_ReceiveData(SPI1);
|
||||||
|
|
||||||
|
// Return the shifted data
|
||||||
|
return Data;
|
||||||
}
|
}
|
||||||
#endif
|
|
||||||
|
|
||||||
void wm8753_send(rt_uint16_t s_data)
|
void wm8753_send(rt_uint16_t s_data)
|
||||||
{
|
{
|
||||||
/* Wait for SPI1 Tx buffer empty */
|
|
||||||
while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET);
|
|
||||||
|
|
||||||
wm_csb_0;
|
wm_csb_0;
|
||||||
/* Send SPI1 data */
|
SPI_WriteByte( (s_data>>8)&0xFF );
|
||||||
SPI_I2S_SendData(SPI1, (s_data>>8)&0xFF );
|
SPI_WriteByte( s_data&0xFF );
|
||||||
/* Wait for SPI1 Tx buffer empty */
|
|
||||||
while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET);
|
|
||||||
/* Send SPI1 data */
|
|
||||||
SPI_I2S_SendData(SPI1, s_data&0xFF);
|
|
||||||
|
|
||||||
wm_delay();
|
|
||||||
wm_csb_1;
|
wm_csb_1;
|
||||||
|
|
||||||
#if 0
|
|
||||||
u8 i;
|
|
||||||
wm_csb_0;
|
|
||||||
//wm_delay();
|
|
||||||
wm_sclk_0;
|
|
||||||
//wm_delay();
|
|
||||||
for (i=0;i<16;i++)
|
|
||||||
{
|
|
||||||
if (s_data & 0x8000)
|
|
||||||
{
|
|
||||||
wm_sdin_1;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
wm_sdin_0;
|
|
||||||
}
|
|
||||||
//wm_delay();
|
|
||||||
wm_sclk_1;
|
|
||||||
s_data <<= 1;
|
|
||||||
//wm_delay();
|
|
||||||
wm_sclk_0;
|
|
||||||
}
|
|
||||||
//wm_delay();
|
|
||||||
wm_csb_1;
|
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static rt_err_t wm8753_init (rt_device_t dev)
|
static rt_err_t wm8753_init (rt_device_t dev)
|
||||||
{
|
{
|
||||||
wm8753_send(0xF00F); // test
|
|
||||||
wm8753_send(0<<9 | 0xFF); // reset
|
wm8753_send(0<<9 | 0xFF); // reset
|
||||||
//wm_delay();
|
|
||||||
//wm_delay();
|
|
||||||
//wm_delay();
|
|
||||||
|
|
||||||
/* POWER manager */
|
/* POWER manager */
|
||||||
wm8753_send(1<<9 | (1<<8) | (0<<7) | (0<<6) | (0<<5) | (1<<4) | (1<<3) | (1<<2) | 2 );//µçÔ´ÉèÖÃ
|
wm8753_send(1<<9 | (1<<8) | (0<<7) | (0<<6) | (0<<5) | (1<<4) | (1<<3) | (1<<2) | 2 );//µçÔ´ÉèÖÃ
|
||||||
|
|
@ -311,6 +174,19 @@ static rt_err_t wm8753_init (rt_device_t dev)
|
||||||
wm8753_send(54<<9 | (1<<8) | (1<<7) | 35 ); // LOUT2 0-57-63
|
wm8753_send(54<<9 | (1<<8) | (1<<7) | 35 ); // LOUT2 0-57-63
|
||||||
wm8753_send(55<<9 | (1<<8) | (1<<7) | 35 ); // ROUT2 0-57-63
|
wm8753_send(55<<9 | (1<<8) | (1<<7) | 35 ); // ROUT2 0-57-63
|
||||||
|
|
||||||
|
#if 1
|
||||||
|
/* LINE IN test */
|
||||||
|
wm8753_send(47<<9 | (1<<8) | (1<<4) ); //L LINE_IN VOL (6:4)输入增益: 0-关 1-12DB 2-9DB 5-0db 7+6DB
|
||||||
|
wm8753_send(48<<9 | (1<<8) | (1<<4) ); //R LINE_IN VOL (6:4)输入增益: 0-关 1-12DB 2-9DB 5-0db 7+6DB
|
||||||
|
wm8753_send(50<<9 | (5<<2) | (1<<1) | (1<<0) );//打开左监听 (4:2)增益 0-关 1-12DB 2-9DB 5-0db 7+6DB
|
||||||
|
wm8753_send(51<<9 | (5<<2) | (1<<1) | (1<<0) );//打开右监听 (4:2)增益 0-关 1-12DB 2-9DB 5-0db 7+6DB
|
||||||
|
|
||||||
|
/* MIC test */
|
||||||
|
wm8753_send(44<<9 | (1<<8) | (1<<5) | (1<<4) | (0<<2) | (1<<1) | (1<<0) );//MIC输入选择
|
||||||
|
wm8753_send(45<<9 | 50);//16-0 63-35
|
||||||
|
wm8753_send(46<<9 | 50);//16-0 63-35
|
||||||
|
#endif
|
||||||
|
|
||||||
return RT_EOK;
|
return RT_EOK;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -432,20 +308,8 @@ rt_err_t wm8753_hw_init(void)
|
||||||
wm8753.read_index = 0;
|
wm8753.read_index = 0;
|
||||||
wm8753.put_index = 0;
|
wm8753.put_index = 0;
|
||||||
|
|
||||||
wm_csb_1;
|
/* unselect */
|
||||||
|
|
||||||
#if 0
|
|
||||||
wm_sclk_0;
|
|
||||||
wm_sclk_1;
|
|
||||||
wm_sclk_0;
|
|
||||||
|
|
||||||
wm_sdin_0;
|
|
||||||
wm_sdin_1;
|
|
||||||
wm_sdin_0;
|
|
||||||
|
|
||||||
wm_csb_0;
|
|
||||||
wm_csb_1;
|
wm_csb_1;
|
||||||
#endif
|
|
||||||
|
|
||||||
/* register the device */
|
/* register the device */
|
||||||
return rt_device_register(&wm8753.parent, "snd",
|
return rt_device_register(&wm8753.parent, "snd",
|
||||||
|
|
|
||||||
|
|
@ -45,6 +45,7 @@ File 1,1,<.\player_bg.c><player_bg.c>
|
||||||
File 1,1,<.\play_list.c><play_list.c>
|
File 1,1,<.\play_list.c><play_list.c>
|
||||||
File 1,1,<.\ili9325\ili9320.c><ili9320.c>
|
File 1,1,<.\ili9325\ili9320.c><ili9320.c>
|
||||||
File 1,1,<.\codec.c><codec.c>
|
File 1,1,<.\codec.c><codec.c>
|
||||||
|
File 1,1,<.\spi_flash.c><spi_flash.c>
|
||||||
File 2,1,<..\..\src\clock.c><clock.c>
|
File 2,1,<..\..\src\clock.c><clock.c>
|
||||||
File 2,1,<..\..\src\idle.c><idle.c>
|
File 2,1,<..\..\src\idle.c><idle.c>
|
||||||
File 2,1,<..\..\src\ipc.c><ipc.c>
|
File 2,1,<..\..\src\ipc.c><ipc.c>
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,199 @@
|
||||||
|
#include <stm32f10x.h>
|
||||||
|
//#include "spi_flash.h"
|
||||||
|
#include <string.h>
|
||||||
|
|
||||||
|
extern unsigned char SPI_WriteByte(unsigned char data);
|
||||||
|
|
||||||
|
/********************** hardware *************************************/
|
||||||
|
/* SPI_FLASH_CS PA4 */
|
||||||
|
/* SPI_FLASH_RST PA3 */
|
||||||
|
#define FLASH_RST_0() GPIO_ResetBits(GPIOA,GPIO_Pin_3)
|
||||||
|
#define FLASH_RST_1() GPIO_SetBits(GPIOA,GPIO_Pin_3)
|
||||||
|
|
||||||
|
#define FLASH_CS_0() GPIO_ResetBits(GPIOA,GPIO_Pin_4)
|
||||||
|
#define FLASH_CS_1() GPIO_SetBits(GPIOA,GPIO_Pin_4)
|
||||||
|
/********************** hardware *************************************/
|
||||||
|
|
||||||
|
static void GPIO_Configuration(void)
|
||||||
|
{
|
||||||
|
GPIO_InitTypeDef GPIO_InitStructure;
|
||||||
|
|
||||||
|
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA,ENABLE);
|
||||||
|
|
||||||
|
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_3;
|
||||||
|
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||||
|
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||||
|
GPIO_Init(GPIOA,&GPIO_InitStructure);
|
||||||
|
|
||||||
|
FLASH_RST_0(); // RESET
|
||||||
|
FLASH_RST_1();
|
||||||
|
}
|
||||||
|
|
||||||
|
static unsigned char SPI_HostReadByte(void)
|
||||||
|
{
|
||||||
|
return SPI_WriteByte(0x00);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void SPI_HostWriteByte(unsigned char wByte)
|
||||||
|
{
|
||||||
|
SPI_WriteByte(wByte);
|
||||||
|
}
|
||||||
|
|
||||||
|
/******************************************************************************/
|
||||||
|
/*Status Register Format: */
|
||||||
|
/* ----------------------------------------------------------------------- */
|
||||||
|
/* | bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 | */
|
||||||
|
/* |--------|--------|--------|--------|--------|--------|--------|--------| */
|
||||||
|
/* |RDY/BUSY| COMP | 0 | 1 | 1 | 1 | X | X | */
|
||||||
|
/* ----------------------------------------------------------------------- */
|
||||||
|
/* bit7 - 忙标记，0为忙1为不忙。 */
|
||||||
|
/* 当Status Register的位0移出之后，接下来的时钟脉冲序列将使SPI器件继续*/
|
||||||
|
/* 将最新的状态字节送出。 */
|
||||||
|
/* bit6 - 标记最近一次Main Memory Page和Buffer的比较结果，0相同，1不同。 */
|
||||||
|
/* bit5 */
|
||||||
|
/* bit4 */
|
||||||
|
/* bit3 */
|
||||||
|
/* bit2 - 这4位用来标记器件密度，对于AT45DB041B，这4位应该是0111，一共能标记 */
|
||||||
|
/* 16种不同密度的器件。 */
|
||||||
|
/* bit1 */
|
||||||
|
/* bit0 - 这2位暂时无效 */
|
||||||
|
/******************************************************************************/
|
||||||
|
static unsigned char AT45DB_StatusRegisterRead(void)
|
||||||
|
{
|
||||||
|
unsigned char i;
|
||||||
|
|
||||||
|
FLASH_CS_0();
|
||||||
|
SPI_HostWriteByte(0xd7);
|
||||||
|
i=SPI_HostReadByte();
|
||||||
|
FLASH_CS_1();
|
||||||
|
|
||||||
|
return i;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void wait_busy(void)
|
||||||
|
{
|
||||||
|
unsigned int i=0;
|
||||||
|
while (i++<255)
|
||||||
|
{
|
||||||
|
if (AT45DB_StatusRegisterRead()&0x80)
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static void read_page(unsigned int page,unsigned char * pHeader)
|
||||||
|
{
|
||||||
|
unsigned int i=0;
|
||||||
|
|
||||||
|
wait_busy();
|
||||||
|
|
||||||
|
FLASH_CS_0();
|
||||||
|
SPI_HostWriteByte(0x53);
|
||||||
|
SPI_HostWriteByte((unsigned char)(page >> 6));
|
||||||
|
SPI_HostWriteByte((unsigned char)(page << 2));
|
||||||
|
SPI_HostWriteByte(0x00);
|
||||||
|
FLASH_CS_1();
|
||||||
|
|
||||||
|
wait_busy();
|
||||||
|
|
||||||
|
FLASH_CS_0();
|
||||||
|
SPI_HostWriteByte(0xD4);
|
||||||
|
SPI_HostWriteByte(0x00);
|
||||||
|
SPI_HostWriteByte(0x00);
|
||||||
|
SPI_HostWriteByte(0x00);
|
||||||
|
SPI_HostWriteByte(0x00);
|
||||||
|
for (i=0; i<512; i++)
|
||||||
|
{
|
||||||
|
*pHeader++ = SPI_HostReadByte();
|
||||||
|
}
|
||||||
|
FLASH_CS_1();
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
static void write_page(unsigned int page,unsigned char * pHeader)
|
||||||
|
{
|
||||||
|
unsigned int i;
|
||||||
|
|
||||||
|
wait_busy();
|
||||||
|
|
||||||
|
FLASH_CS_0();
|
||||||
|
SPI_HostWriteByte(0x87);
|
||||||
|
SPI_HostWriteByte(0);
|
||||||
|
SPI_HostWriteByte(0);
|
||||||
|
SPI_HostWriteByte(0);
|
||||||
|
for(i=0; i<512; i++)
|
||||||
|
{
|
||||||
|
SPI_HostWriteByte(*pHeader++);
|
||||||
|
}
|
||||||
|
FLASH_CS_1();
|
||||||
|
|
||||||
|
wait_busy();
|
||||||
|
|
||||||
|
FLASH_CS_0();
|
||||||
|
SPI_HostWriteByte(0x86);
|
||||||
|
SPI_HostWriteByte((unsigned char)(page>>6));
|
||||||
|
SPI_HostWriteByte((unsigned char)(page<<2));
|
||||||
|
SPI_HostWriteByte(0x00);
|
||||||
|
FLASH_CS_1();
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
/* SPI DEVICE */
|
||||||
|
static struct rt_device spi_flash_device;
|
||||||
|
|
||||||
|
/* RT-Thread Device Driver Interface */
|
||||||
|
static rt_err_t rt_spi_flash_init(rt_device_t dev)
|
||||||
|
{
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_err_t rt_spi_flash_open(rt_device_t dev, rt_uint16_t oflag)
|
||||||
|
{
|
||||||
|
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_err_t rt_spi_flash_close(rt_device_t dev)
|
||||||
|
{
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_err_t rt_spi_flash_control(rt_device_t dev, rt_uint8_t cmd, void *args)
|
||||||
|
{
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_size_t rt_spi_flash_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
|
||||||
|
{
|
||||||
|
/* only supply single block read: block size 512Byte */
|
||||||
|
read_page(pos/512,buffer);
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_size_t rt_spi_flash_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
|
||||||
|
{
|
||||||
|
/* only supply single block write: block size 512Byte */
|
||||||
|
write_page(pos/512,(unsigned char*)buffer);
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
void rt_hw_spi_flash_init(void)
|
||||||
|
{
|
||||||
|
GPIO_Configuration();
|
||||||
|
|
||||||
|
/* register spi_flash device */
|
||||||
|
spi_flash_device.init = rt_spi_flash_init;
|
||||||
|
spi_flash_device.open = rt_spi_flash_open;
|
||||||
|
spi_flash_device.close = rt_spi_flash_close;
|
||||||
|
spi_flash_device.read = rt_spi_flash_read;
|
||||||
|
spi_flash_device.write = rt_spi_flash_write;
|
||||||
|
spi_flash_device.control = rt_spi_flash_control;
|
||||||
|
|
||||||
|
/* no private */
|
||||||
|
spi_flash_device.private = RT_NULL;
|
||||||
|
|
||||||
|
rt_device_register(&spi_flash_device, "spi0",
|
||||||
|
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,6 @@
|
||||||
|
#ifndef SPI_FLASH_H_INCLUDED
|
||||||
|
#define SPI_FLASH_H_INCLUDED
|
||||||
|
|
||||||
|
extern void rt_hw_spi_flash_init(void);
|
||||||
|
|
||||||
|
#endif // SPI_FLASH_H_INCLUDED
|
||||||
|
|
@ -1,152 +1,154 @@
|
||||||
/*
|
/*
|
||||||
* File : startup.c
|
* File : startup.c
|
||||||
* This file is part of RT-Thread RTOS
|
* This file is part of RT-Thread RTOS
|
||||||
* COPYRIGHT (C) 2006, RT-Thread Develop Team
|
* COPYRIGHT (C) 2006, RT-Thread Develop Team
|
||||||
*
|
*
|
||||||
* The license and distribution terms for this file may be
|
* The license and distribution terms for this file may be
|
||||||
* found in the file LICENSE in this distribution or at
|
* found in the file LICENSE in this distribution or at
|
||||||
* http://openlab.rt-thread.com/license/LICENSE
|
* http://openlab.rt-thread.com/license/LICENSE
|
||||||
*
|
*
|
||||||
* Change Logs:
|
* Change Logs:
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2006-08-31 Bernard first implementation
|
* 2006-08-31 Bernard first implementation
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <rthw.h>
|
#include <rthw.h>
|
||||||
#include <rtthread.h>
|
#include <rtthread.h>
|
||||||
|
|
||||||
#include "board.h"
|
#include "board.h"
|
||||||
#include "rtc.h"
|
#include "rtc.h"
|
||||||
|
#include "spi_flash.h"
|
||||||
|
|
||||||
#include <stm32f10x.h>
|
#include <stm32f10x.h>
|
||||||
|
|
||||||
#ifdef RT_USING_LWIP
|
#ifdef RT_USING_LWIP
|
||||||
#include <netif/ethernetif.h>
|
#include <netif/ethernetif.h>
|
||||||
#include "dm9000.h"
|
#include "dm9000.h"
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @addtogroup STM32
|
|
||||||
*/
|
|
||||||
|
|
||||||
/*@{*/
|
|
||||||
#ifdef __CC_ARM
|
|
||||||
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
|
||||||
#elif __ICCARM__
|
|
||||||
#pragma section="HEAP"
|
|
||||||
#else
|
|
||||||
extern int __bss_end;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef RT_USING_FINSH
|
|
||||||
extern void finsh_system_init(void);
|
|
||||||
extern void finsh_set_device(const char* device);
|
|
||||||
#endif
|
|
||||||
extern int rt_application_init(void);
|
|
||||||
extern rt_err_t wm8753_hw_init(void);
|
|
||||||
extern rt_err_t wm8978_hw_init(void);
|
|
||||||
#ifdef DEBUG
|
|
||||||
/*******************************************************************************
|
|
||||||
* Function Name : assert_failed
|
|
||||||
* Description : Reports the name of the source file and the source line number
|
|
||||||
* where the assert error has occurred.
|
|
||||||
* Input : - file: pointer to the source file name
|
|
||||||
* - line: assert error line source number
|
|
||||||
* Output : None
|
|
||||||
* Return : None
|
|
||||||
*******************************************************************************/
|
|
||||||
void assert_failed(u8* file, u32 line)
|
|
||||||
{
|
|
||||||
rt_kprintf("\n\r Wrong parameter value detected on\r\n");
|
|
||||||
rt_kprintf(" file %s\r\n", file);
|
|
||||||
rt_kprintf(" line %d\r\n", line);
|
|
||||||
|
|
||||||
while (1) ;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* This function will startup RT-Thread RTOS.
|
|
||||||
*/
|
|
||||||
void rtthread_startup(void)
|
|
||||||
{
|
|
||||||
/* init board */
|
|
||||||
rt_hw_board_init();
|
|
||||||
|
|
||||||
/* show version */
|
|
||||||
rt_show_version();
|
|
||||||
|
|
||||||
/* init tick */
|
|
||||||
rt_system_tick_init();
|
|
||||||
|
|
||||||
/* init kernel object */
|
|
||||||
rt_system_object_init();
|
|
||||||
|
|
||||||
/* init timer system */
|
|
||||||
rt_system_timer_init();
|
|
||||||
|
|
||||||
#ifdef RT_USING_HEAP
|
|
||||||
#if STM32_EXT_SRAM
|
|
||||||
rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
|
|
||||||
#else
|
|
||||||
#ifdef __CC_ARM
|
|
||||||
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
|
|
||||||
#elif __ICCARM__
|
|
||||||
rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
|
|
||||||
#else
|
|
||||||
/* init memory system */
|
|
||||||
rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* init scheduler system */
|
|
||||||
rt_system_scheduler_init();
|
|
||||||
|
|
||||||
#if CODEC_VERSION == 1
|
|
||||||
wm8753_hw_init();
|
|
||||||
#elif CODEC_VERSION == 2
|
|
||||||
wm8978_hw_init();
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* init hardware serial device */
|
/**
|
||||||
rt_hw_usart_init();
|
* @addtogroup STM32
|
||||||
#ifdef RT_USING_DFS
|
*/
|
||||||
GPIO_ResetBits(GPIOC,GPIO_Pin_6);
|
|
||||||
rt_hw_sdcard_init();
|
/*@{*/
|
||||||
#endif
|
#ifdef __CC_ARM
|
||||||
|
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
||||||
/* init all device */
|
#elif __ICCARM__
|
||||||
rt_device_init_all();
|
#pragma section="HEAP"
|
||||||
|
#else
|
||||||
/* init application */
|
extern int __bss_end;
|
||||||
rt_application_init();
|
#endif
|
||||||
|
|
||||||
#ifdef RT_USING_FINSH
|
#ifdef RT_USING_FINSH
|
||||||
/* init finsh */
|
extern void finsh_system_init(void);
|
||||||
finsh_system_init();
|
extern void finsh_set_device(const char* device);
|
||||||
finsh_set_device("uart1");
|
#endif
|
||||||
#endif
|
extern int rt_application_init(void);
|
||||||
|
extern rt_err_t wm8753_hw_init(void);
|
||||||
/* init idle thread */
|
extern rt_err_t wm8978_hw_init(void);
|
||||||
rt_thread_idle_init();
|
#ifdef DEBUG
|
||||||
|
/*******************************************************************************
|
||||||
/* start scheduler */
|
* Function Name : assert_failed
|
||||||
rt_system_scheduler_start();
|
* Description : Reports the name of the source file and the source line number
|
||||||
|
* where the assert error has occurred.
|
||||||
/* never reach here */
|
* Input : - file: pointer to the source file name
|
||||||
return ;
|
* - line: assert error line source number
|
||||||
}
|
* Output : None
|
||||||
|
* Return : None
|
||||||
int main(void)
|
*******************************************************************************/
|
||||||
{
|
void assert_failed(u8* file, u32 line)
|
||||||
rt_uint32_t UNUSED level;
|
{
|
||||||
|
rt_kprintf("\n\r Wrong parameter value detected on\r\n");
|
||||||
/* disable interrupt first */
|
rt_kprintf(" file %s\r\n", file);
|
||||||
level = rt_hw_interrupt_disable();
|
rt_kprintf(" line %d\r\n", line);
|
||||||
rtthread_startup();
|
|
||||||
|
while (1) ;
|
||||||
return 0;
|
}
|
||||||
}
|
#endif
|
||||||
|
|
||||||
/*@}*/
|
/**
|
||||||
|
* This function will startup RT-Thread RTOS.
|
||||||
|
*/
|
||||||
|
void rtthread_startup(void)
|
||||||
|
{
|
||||||
|
/* init board */
|
||||||
|
rt_hw_board_init();
|
||||||
|
|
||||||
|
/* show version */
|
||||||
|
rt_show_version();
|
||||||
|
|
||||||
|
/* init tick */
|
||||||
|
rt_system_tick_init();
|
||||||
|
|
||||||
|
/* init kernel object */
|
||||||
|
rt_system_object_init();
|
||||||
|
|
||||||
|
/* init timer system */
|
||||||
|
rt_system_timer_init();
|
||||||
|
|
||||||
|
#ifdef RT_USING_HEAP
|
||||||
|
#if STM32_EXT_SRAM
|
||||||
|
rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
|
||||||
|
#else
|
||||||
|
#ifdef __CC_ARM
|
||||||
|
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
|
||||||
|
#elif __ICCARM__
|
||||||
|
rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
|
||||||
|
#else
|
||||||
|
/* init memory system */
|
||||||
|
rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* init scheduler system */
|
||||||
|
rt_system_scheduler_init();
|
||||||
|
|
||||||
|
#if CODEC_VERSION == 1
|
||||||
|
wm8753_hw_init();
|
||||||
|
#elif CODEC_VERSION == 2
|
||||||
|
wm8978_hw_init();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* init hardware serial device */
|
||||||
|
rt_hw_usart_init();
|
||||||
|
#ifdef RT_USING_DFS
|
||||||
|
GPIO_ResetBits(GPIOC,GPIO_Pin_6);
|
||||||
|
rt_hw_sdcard_init();
|
||||||
|
rt_hw_spi_flash_init();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* init all device */
|
||||||
|
rt_device_init_all();
|
||||||
|
|
||||||
|
/* init application */
|
||||||
|
rt_application_init();
|
||||||
|
|
||||||
|
#ifdef RT_USING_FINSH
|
||||||
|
/* init finsh */
|
||||||
|
finsh_system_init();
|
||||||
|
finsh_set_device("uart1");
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* init idle thread */
|
||||||
|
rt_thread_idle_init();
|
||||||
|
|
||||||
|
/* start scheduler */
|
||||||
|
rt_system_scheduler_start();
|
||||||
|
|
||||||
|
/* never reach here */
|
||||||
|
return ;
|
||||||
|
}
|
||||||
|
|
||||||
|
int main(void)
|
||||||
|
{
|
||||||
|
rt_uint32_t UNUSED level;
|
||||||
|
|
||||||
|
/* disable interrupt first */
|
||||||
|
level = rt_hw_interrupt_disable();
|
||||||
|
rtthread_startup();
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/*@}*/
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue