Convert Libraries format
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@ -4,7 +4,7 @@
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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;//============== 版本 EK V1.0 20190801 ==============//
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;//============== 版本 EK V1.0 20190801 ==============//
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Stack_Size EQU 0x00002000
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@ -153,7 +153,7 @@ __Vectors_Size EQU __Vectors_End - __Vectors
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT __main
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LDR R0, =0xE000ED88 ; 使能浮点运算 CP10,CP11
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LDR R0, =0xE000ED88 ; 使能浮点运算 CP10,CP11
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LDR R1,[R0]
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ORR R1,R1,#(0xF << 20)
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STR R1,[R0]
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@ -1,14 +1,14 @@
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#include "sys.h"
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#include "sys.h"
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#include "HAL_misc.h"
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void RemapVtorTable(void)
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{
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{
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int i;
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RCC->AHB1ENR |= 1<<13;//bkp clk,enable sram
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//关ROM区中断
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//关ROM区中断
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for(i = 0;i<90;i++)
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{
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NVIC_DisableIRQ((IRQn_Type)i);
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{
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NVIC_DisableIRQ((IRQn_Type)i);
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}
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SCB->VTOR = 0;
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SCB->VTOR |= 0x1<<29;
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@ -32,110 +32,110 @@ void AI_Responder_disable(void)
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}
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//外部中断配置函数
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//只针对GPIOA~E
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//参数:
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//GPIOx:0~4,代表GPIOA~E
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//BITx:需要使能的位,例如PB12,就填 12;
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//TRIM:触发模式,1,下降沿;2,上升沿;3,任意电平触发
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//该函数一次只能配置1个IO口,多个IO口,需多次调用
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//该函数会自动开启对应中断,以及屏蔽线
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void Ex_NVIC_Config(u8 GPIOx,u8 BITx,u8 TRIM)
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{
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u8 EXTOFFSET=(BITx%4)*4;
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RCC->APB2ENR|=1<<14; //使能SYSCFG时钟
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SYSCFG->EXTICR[BITx/4]&=~(0x000F<<EXTOFFSET);//清除原来设置!!!
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SYSCFG->EXTICR[BITx/4]|=GPIOx<<EXTOFFSET; //EXTI.BITx映射到GPIOx.BITx
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//自动设置
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EXTI->IMR|=1<<BITx; //开启line BITx上的中断(如果要禁止中断,则反操作即可)
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if(TRIM&0x01)EXTI->FTSR|=1<<BITx; //line BITx事件下降沿触发
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if(TRIM&0x02)EXTI->RTSR|=1<<BITx; //line BITx事件上升沿触发
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}
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//外部中断配置函数
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//只针对GPIOA~E
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//参数:
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//GPIOx:0~4,代表GPIOA~E
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//BITx:需要使能的位,例如PB12,就填 12;
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//TRIM:触发模式,1,下降沿;2,上升沿;3,任意电平触发
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//该函数一次只能配置1个IO口,多个IO口,需多次调用
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//该函数会自动开启对应中断,以及屏蔽线
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void Ex_NVIC_Config(u8 GPIOx,u8 BITx,u8 TRIM)
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{
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u8 EXTOFFSET=(BITx%4)*4;
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RCC->APB2ENR|=1<<14; //使能SYSCFG时钟
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SYSCFG->EXTICR[BITx/4]&=~(0x000F<<EXTOFFSET);//清除原来设置!!!
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SYSCFG->EXTICR[BITx/4]|=GPIOx<<EXTOFFSET; //EXTI.BITx映射到GPIOx.BITx
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//自动设置
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EXTI->IMR|=1<<BITx; //开启line BITx上的中断(如果要禁止中断,则反操作即可)
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if(TRIM&0x01)EXTI->FTSR|=1<<BITx; //line BITx事件下降沿触发
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if(TRIM&0x02)EXTI->RTSR|=1<<BITx; //line BITx事件上升沿触发
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}
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//THUMB指令不支持汇编内联
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//采用如下方法实现执行汇编指令WFI
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//THUMB指令不支持汇编内联
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//采用如下方法实现执行汇编指令WFI
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void WFI_SET(void)
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{
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__ASM volatile("wfi");
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__ASM volatile("wfi");
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}
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//关闭所有中断(但是不包括fault和NMI中断)
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//关闭所有中断(但是不包括fault和NMI中断)
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void INTX_DISABLE(void)
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{
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__ASM volatile("cpsid i");
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}
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//开启所有中断
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//开启所有中断
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void INTX_ENABLE(void)
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{
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__ASM volatile("cpsie i");
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__ASM volatile("cpsie i");
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}
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//设置栈顶地址 __set_MSP(0x70002000);
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//设置栈顶地址 __set_MSP(0x70002000);
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//进入待机模式
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//进入待机模式
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void Sys_Standby(void)
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{
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SCB->SCR|=1<<2; //使能SLEEPDEEP位 (SYS->CTRL)
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RCC->APB1ENR|=1<<28;//使能电源时钟
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PWR->CSR|=1<<8; //设置WKUP用于唤醒
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PWR->CR|=1<<2; //清除Wake-up 标志
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PWR->CR|=1<<1; //PDDS置位
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WFI_SET(); //执行WFI指令,进入待机模式
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}
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//系统软复位
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void Sys_Soft_Reset(void)
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{
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SCB->AIRCR =0X05FA0000|(u32)0x04;
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}
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// TK499_NVIC_Init(2,2,TK80_IRQn,2);
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//设置NVIC
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//NVIC_PreemptionPriority:抢占优先级
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//NVIC_SubPriority :响应优先级
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//NVIC_Channel :中断编号
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//NVIC_Group :中断分组 0~4
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//注意优先级不能超过设定的组的范围!否则会有意想不到的错误
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//组划分:
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//组0:0位抢占优先级,4位响应优先级
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//组1:1位抢占优先级,3位响应优先级
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//组2:2位抢占优先级,2位响应优先级
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//组3:3位抢占优先级,1位响应优先级
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//组4:4位抢占优先级,0位响应优先级
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//NVIC_SubPriority和NVIC_PreemptionPriority的原则是,数值越小,越优先
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void TK499_NVIC_Init(u8 NVIC_PreemptionPriority,u8 NVIC_SubPriority,u8 NVIC_Channel,u8 NVIC_Group)
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{
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u32 temp;
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NVIC_SetPriorityGrouping(NVIC_Group);//设置分组
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temp=NVIC_PreemptionPriority<<(4-NVIC_Group);
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SCB->SCR|=1<<2; //使能SLEEPDEEP位 (SYS->CTRL)
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RCC->APB1ENR|=1<<28;//使能电源时钟
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PWR->CSR|=1<<8; //设置WKUP用于唤醒
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PWR->CR|=1<<2; //清除Wake-up 标志
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PWR->CR|=1<<1; //PDDS置位
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WFI_SET(); //执行WFI指令,进入待机模式
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}
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//系统软复位
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void Sys_Soft_Reset(void)
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{
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SCB->AIRCR =0X05FA0000|(u32)0x04;
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}
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// TK499_NVIC_Init(2,2,TK80_IRQn,2);
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//设置NVIC
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//NVIC_PreemptionPriority:抢占优先级
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//NVIC_SubPriority :响应优先级
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//NVIC_Channel :中断编号
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//NVIC_Group :中断分组 0~4
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//注意优先级不能超过设定的组的范围!否则会有意想不到的错误
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//组划分:
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//组0:0位抢占优先级,4位响应优先级
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//组1:1位抢占优先级,3位响应优先级
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//组2:2位抢占优先级,2位响应优先级
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//组3:3位抢占优先级,1位响应优先级
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//组4:4位抢占优先级,0位响应优先级
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//NVIC_SubPriority和NVIC_PreemptionPriority的原则是,数值越小,越优先
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void TK499_NVIC_Init(u8 NVIC_PreemptionPriority,u8 NVIC_SubPriority,u8 NVIC_Channel,u8 NVIC_Group)
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{
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u32 temp;
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NVIC_SetPriorityGrouping(NVIC_Group);//设置分组
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temp=NVIC_PreemptionPriority<<(4-NVIC_Group);
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temp|=NVIC_SubPriority&(0x0f>>NVIC_Group);
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temp&=0xf; //取低四位
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NVIC->ISER[NVIC_Channel/32]|=1<<NVIC_Channel%32;//使能中断位(要清除的话,设置ICER对应位为1即可)
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NVIC->IP[NVIC_Channel]|=temp<<4; //设置响应优先级和抢断优先级
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temp&=0xf; //取低四位
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NVIC->ISER[NVIC_Channel/32]|=1<<NVIC_Channel%32;//使能中断位(要清除的话,设置ICER对应位为1即可)
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NVIC->IP[NVIC_Channel]|=temp<<4; //设置响应优先级和抢断优先级
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}
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void TK80_IRQHandler(void)
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{
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if(TK80->SR & 0x1)
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{
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}
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if(TK80->SR & 0x2)
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{
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}
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if(TK80->SR & 0x4)
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{
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}
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if(TK80->SR & 0x8)
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{
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}
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TK80->SR |= 0;
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}
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//备用函数
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//备用函数
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//#define T_SRAM_FUN1 0x20000400
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//copyAtoB((u32)LCD_PutPixel&0xFFFFFFFE,T_SRAM_FUN1,800);//加载函数到SRAM
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//copyAtoB((u32)LCD_PutPixel&0xFFFFFFFE,T_SRAM_FUN1,800);//加载函数到SRAM
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//void copyAtoB(u32 srcAdd,u32 dstAdd,u16 len)
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//{
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// len = (len + 3)/4;
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#ifndef __SYS_H
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#define __SYS_H
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#include "tk499.h"
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#define __SYS_H
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#include "tk499.h"
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#include "HAL_conf.h"
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//位带操作,实现51类似的GPIO控制功能
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//具体实现思想,参考<<CM3权威指南>>第五章(87页~92页).M4同M3类似,只是寄存器地址变了.
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//IO口操作宏定义
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//#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2))
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//#define MEM_ADDR(addr) *((volatile unsigned long *)(addr))
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//#define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum))
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//位带操作,实现51类似的GPIO控制功能
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//具体实现思想,参考<<CM3权威指南>>第五章(87页~92页).M4同M3类似,只是寄存器地址变了.
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//IO口操作宏定义
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//#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2))
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//#define MEM_ADDR(addr) *((volatile unsigned long *)(addr))
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//#define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum))
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void RemapVtorTable(void);
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void AI_Responder_enable(void);
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void AI_Responder_disable(void);
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void Sys_Soft_Reset(void); //系统软复位
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void Sys_Standby(void); //待机模式
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void Sys_Soft_Reset(void); //系统软复位
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void Sys_Standby(void); //待机模式
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void TK499_NVIC_Init(u8 NVIC_PreemptionPriority,u8 NVIC_SubPriority,u8 NVIC_Channel,u8 NVIC_Group);
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void Ex_NVIC_Config(u8 GPIOx,u8 BITx,u8 TRIM); //外部中断配置函数(只对GPIOA~I)
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void TK499_NVIC_Init(u8 NVIC_PreemptionPriority,u8 NVIC_SubPriority,u8 NVIC_Channel,u8 NVIC_Group);
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void Ex_NVIC_Config(u8 GPIOx,u8 BITx,u8 TRIM); //外部中断配置函数(只对GPIOA~I)
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//以下为汇编函数
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void WFI_SET(void); //执行WFI指令
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void INTX_DISABLE(void);//关闭所有中断
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void INTX_ENABLE(void); //开启所有中断
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//以下为汇编函数
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void WFI_SET(void); //执行WFI指令
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void INTX_DISABLE(void);//关闭所有中断
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void INTX_ENABLE(void); //开启所有中断
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void TIM3_Config(u16 arr,u16 psc);
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#endif
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File diff suppressed because it is too large
Load Diff
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@ -4,7 +4,7 @@
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* @author IC Applications Department
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* @version V0.8
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* @date 2019_08_02
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* @brief This file contains all the functions prototypes for the ADC firmware
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* @brief This file contains all the functions prototypes for the ADC firmware
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* library.
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******************************************************************************
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* @copy
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2016 HOLOCENE</center></h2>
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*/
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __HAL_ADC_H
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* @{
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*/
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/**
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* @brief ADC Init structure definition
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/**
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* @brief ADC Init structure definition
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*/
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/*
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typedef struct
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{
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uint32_t ADC_Mode;
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FunctionalState ADC_ScanConvMode;
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FunctionalState ADC_ScanConvMode;
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FunctionalState ADC_ContinuousConvMode;
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uint32_t ADC_ExternalTrigConv;
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uint32_t ADC_DataAlign;
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*/
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typedef struct
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{
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uint32_t ADC_Resolution;
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uint32_t ADC_Resolution;
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uint32_t ADC_PRESCARE;
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uint32_t ADC_Mode;
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FunctionalState ADC_ContinuousConvMode;
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uint32_t ADC_TRGEN;
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uint32_t ADC_ExternalTrigConv;
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uint32_t ADC_ExternalTrigConv;
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uint32_t ADC_DataAlign;
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}ADC_InitTypeDef;
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/**
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/** @defgroup ADC_Resolution
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* @{
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*/
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*/
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#define ADC_Resolution_12b ((uint32_t)0x00000000)
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#define ADC_Resolution_11b ((uint32_t)0x00000080)
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#define ADC_Resolution_10b ((uint32_t)0x00000100)
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((RESOLUTION) == ADC_Resolution_8b) || \
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((RESOLUTION) == ADC_Resolution_6b))
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/**
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/**
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* @brief for ADC1, ADC2
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*/
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/** @defgroup ADC_dual_mode
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/** @defgroup ADC_dual_mode
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* @{
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*/
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#define ADC_TRG_Disable ((uint32_t)0xfffffffB)
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#define ADC_TRG_Enable ((uint32_t)0x00000004)
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/** @defgroup ADC_extrenal_trigger_sources_for_regular_channels_conversion
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/** @defgroup ADC_extrenal_trigger_sources_for_regular_channels_conversion
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* @{
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*/
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/**
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* @brief for ADC1
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/**
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* @brief for ADC1
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*/
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#define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000)
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#define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000060)
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#define ADC_ExternalTrigConv_EXTI_11 ((uint32_t)0x00000070)
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/**
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/**
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* @brief for ADC2
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*/
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* @}
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*/
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/** @defgroup ADC_data_align
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/** @defgroup ADC_data_align
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* @{
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*/
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* @}
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*/
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/** @defgroup ADC_channels
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/** @defgroup ADC_channels
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* @{
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*/
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/**
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* @}
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*/
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*/
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#define ADC_SMPR_SMP ((uint32_t)0x00000007) /*!< SMP[2:0] bits (Sampling time selection) */
|
||||
#define ADC_SMPR_SMP_0 ((uint32_t)0x00000001) /*!< Bit 0 */
|
||||
#define ADC_SMPR_SMP_1 ((uint32_t)0x00000002) /*!< Bit 1 */
|
||||
#define ADC_SMPR_SMP_2 ((uint32_t)0x00000004) /*!< Bit 2 */
|
||||
|
||||
/** @defgroup ADC_sampling_times
|
||||
/** @defgroup ADC_sampling_times
|
||||
* @{
|
||||
*/
|
||||
*/
|
||||
|
||||
#define ADC_SampleTime_1_5Cycles ((uint32_t)0x00000000)
|
||||
#define ADC_SampleTime_7_5Cycles ((uint32_t)0x00000001)
|
||||
|
@ -247,7 +247,7 @@ typedef struct
|
|||
|
||||
|
||||
|
||||
/** @defgroup ADC_injected_channel_selection
|
||||
/** @defgroup ADC_injected_channel_selection
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -272,7 +272,7 @@ typedef struct
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_analog_watchdog_selection
|
||||
/** @defgroup ADC_analog_watchdog_selection
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -285,7 +285,7 @@ typedef struct
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_interrupts_definition
|
||||
/** @defgroup ADC_interrupts_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -294,18 +294,18 @@ typedef struct
|
|||
|
||||
#define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xFFFC) == 0x00) && ((IT) != 0x00))
|
||||
|
||||
#define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD))
|
||||
#define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD))
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_flags_definition
|
||||
/** @defgroup ADC_flags_definition
|
||||
* @{
|
||||
*/
|
||||
|
||||
#define ADC_FLAG_AWD ((uint8_t)0x02) //ADWIF ±È½Ï±ê־λ
|
||||
#define ADC_FLAG_EOC ((uint8_t)0x01) //ADIF ת»»½áÊø±ê־λ
|
||||
#define ADC_FLAG_AWD ((uint8_t)0x02) //ADWIF 比较标志位
|
||||
#define ADC_FLAG_EOC ((uint8_t)0x01) //ADIF 转换结束标志位
|
||||
#define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xF0) == 0x00) && ((FLAG) != 0x00))
|
||||
#define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC))
|
||||
|
||||
|
@ -313,7 +313,7 @@ typedef struct
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_thresholds
|
||||
/** @defgroup ADC_thresholds
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -323,7 +323,7 @@ typedef struct
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_injected_offset
|
||||
/** @defgroup ADC_injected_offset
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -333,7 +333,7 @@ typedef struct
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_injected_length
|
||||
/** @defgroup ADC_injected_length
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -343,7 +343,7 @@ typedef struct
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_injected_rank
|
||||
/** @defgroup ADC_injected_rank
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -351,10 +351,10 @@ typedef struct
|
|||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
*/
|
||||
|
||||
|
||||
/** @defgroup ADC_regular_length
|
||||
/** @defgroup ADC_regular_length
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -363,7 +363,7 @@ typedef struct
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_regular_rank
|
||||
/** @defgroup ADC_regular_rank
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -373,7 +373,7 @@ typedef struct
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup ADC_regular_discontinuous_mode_number
|
||||
/** @defgroup ADC_regular_discontinuous_mode_number
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
|
|
@ -16,11 +16,11 @@
|
|||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2016 HOLOCENE</center></h2>
|
||||
*/
|
||||
*/
|
||||
#ifndef __HAL_CONF_H__
|
||||
#define __HAL_CONF_H__
|
||||
|
||||
/*此处可添加或删除外设*/
|
||||
/*此处可添加或删除外设*/
|
||||
#include "HAL_device.h"
|
||||
#include "HAL_adc.h"
|
||||
#include "HAL_dma.h"
|
||||
|
|
|
@ -4,7 +4,7 @@
|
|||
* @author IC Applications Department
|
||||
* @version V0.8
|
||||
* @date 2019_08_02
|
||||
* @brief This file contains all the functions prototypes for the GPIO
|
||||
* @brief This file contains all the functions prototypes for the GPIO
|
||||
* firmware library.
|
||||
******************************************************************************
|
||||
* @copy
|
||||
|
@ -17,7 +17,7 @@
|
|||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2016 HOLOCENE</center></h2>
|
||||
*/
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __HAL_GPIO_H
|
||||
|
@ -46,33 +46,33 @@
|
|||
((*(uint32_t*)&(PERIPH)) == GPIOF_BASE) || \
|
||||
((*(uint32_t*)&(PERIPH)) == GPIOG_BASE))
|
||||
|
||||
/**
|
||||
* @brief Output Maximum frequency selection
|
||||
/**
|
||||
* @brief Output Maximum frequency selection
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
{
|
||||
GPIO_Speed_10MHz = 1,
|
||||
GPIO_Speed_2MHz,
|
||||
GPIO_Speed_2MHz,
|
||||
GPIO_Speed_50MHz
|
||||
}GPIOSpeed_TypeDef;
|
||||
#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \
|
||||
((SPEED) == GPIO_Speed_50MHz))
|
||||
|
||||
/**
|
||||
* @brief Configuration Mode enumeration
|
||||
/**
|
||||
* @brief Configuration Mode enumeration
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
GPIO_Mode_AIN = 0x0, //模拟输入
|
||||
GPIO_Mode_IN_FLOATING = 0x04, //浮空输入
|
||||
GPIO_Mode_IPD = 0x28, //下拉输入
|
||||
GPIO_Mode_IPU = 0x48, //上拉输入
|
||||
GPIO_Mode_Out_OD = 0x14,//通用开漏输出
|
||||
GPIO_Mode_Out_PP = 0x10,//通用推免输出
|
||||
GPIO_Mode_AF_OD = 0x1C, // 复用开漏输出
|
||||
GPIO_Mode_AF_PP = 0x18 //复用推免输出
|
||||
{
|
||||
GPIO_Mode_AIN = 0x0, //模拟输入
|
||||
GPIO_Mode_IN_FLOATING = 0x04, //浮空输入
|
||||
GPIO_Mode_IPD = 0x28, //下拉输入
|
||||
GPIO_Mode_IPU = 0x48, //上拉输入
|
||||
GPIO_Mode_Out_OD = 0x14,//通用开漏输出
|
||||
GPIO_Mode_Out_PP = 0x10,//通用推免输出
|
||||
GPIO_Mode_AF_OD = 0x1C, // 复用开漏输出
|
||||
GPIO_Mode_AF_PP = 0x18 //复用推免输出
|
||||
}GPIOMode_TypeDef;
|
||||
|
||||
#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \
|
||||
|
@ -80,8 +80,8 @@ GPIO_Mode_AF_PP = 0x18 //
|
|||
((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \
|
||||
((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP))
|
||||
|
||||
/**
|
||||
* @brief GPIO Init structure definition
|
||||
/**
|
||||
* @brief GPIO Init structure definition
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
|
@ -91,8 +91,8 @@ typedef struct
|
|||
GPIOMode_TypeDef GPIO_Mode;
|
||||
}GPIO_InitTypeDef;
|
||||
|
||||
/**
|
||||
* @brief Bit_SET and Bit_RESET enumeration
|
||||
/**
|
||||
* @brief Bit_SET and Bit_RESET enumeration
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
|
@ -110,7 +110,7 @@ typedef enum
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_pins_define
|
||||
/** @defgroup GPIO_pins_define
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -164,7 +164,7 @@ typedef enum
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Remap_define
|
||||
/** @defgroup GPIO_Remap_define
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
@ -209,7 +209,7 @@ typedef enum
|
|||
* @}
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Alternate_function_selection_define
|
||||
/** @defgroup GPIO_Alternate_function_selection_define
|
||||
* @{
|
||||
*/
|
||||
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2016 HOLOCENE</center></h2>
|
||||
*/
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "HAL_can.h"
|
||||
|
@ -518,7 +518,7 @@ void CAN_Peli_Init(CAN_TypeDef* CANx, CAN_Peli_InitTypeDef* CAN_Peli_InitStruct)
|
|||
assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->SAM));
|
||||
assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->TESG2));
|
||||
assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->TESG1));
|
||||
|
||||
|
||||
switch (*(uint32_t*)&CANx)
|
||||
{
|
||||
case CAN1_BASE:
|
||||
|
@ -559,7 +559,7 @@ void CAN_Peli_Init(CAN_TypeDef* CANx, CAN_Peli_InitTypeDef* CAN_Peli_InitStruct)
|
|||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
@ -610,7 +610,7 @@ void CAN_Peli_FilterInit(CAN_TypeDef* CANx, CAN_Peli_FilterInitTypeDef* CAN_Peli
|
|||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -850,7 +850,7 @@ void CAN_Peli_TransmitRepeat(CAN_TypeDef* CANx, CanPeliTxMsg* PeliTxMessage)
|
|||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
/** @defgroup CAN_Group3 CAN Frames Reception functions
|
||||
|
@ -957,7 +957,7 @@ void CAN_Peli_Receive(CAN_TypeDef* CANx, CanPeliRxMsg* PeliRxMessage)
|
|||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
@ -977,8 +977,8 @@ uint32_t CAN_Peli_GetRxFIFOInfo(CAN_TypeDef* CANx)
|
|||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
@ -1009,7 +1009,7 @@ uint32_t CAN_Peli_GetRxFIFOInfo(CAN_TypeDef* CANx)
|
|||
uint8_t CAN_Peli_GetLastErrorCode(CAN_TypeDef* CANx)
|
||||
{
|
||||
uint8_t errorcode = 0;
|
||||
|
||||
|
||||
switch (*(uint32_t*)&CANx)
|
||||
{
|
||||
case CAN1_BASE:
|
||||
|
@ -1022,7 +1022,7 @@ uint8_t CAN_Peli_GetLastErrorCode(CAN_TypeDef* CANx)
|
|||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
/* Return the error code*/
|
||||
return errorcode;
|
||||
}
|
||||
|
@ -1056,7 +1056,7 @@ uint8_t CAN_Peli_GetReceiveErrorCounter(CAN_TypeDef* CANx)
|
|||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
/* Return the Receive Error Counter*/
|
||||
return counter;
|
||||
}
|
||||
|
@ -1072,7 +1072,7 @@ uint8_t CAN_Peli_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx)
|
|||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_CAN_ALL_PERIPH(CANx));
|
||||
|
||||
|
||||
switch (*(uint32_t*)&CANx)
|
||||
{
|
||||
case CAN1_BASE:
|
||||
|
@ -1126,7 +1126,7 @@ void CAN_Peli_ITConfig(CAN_TypeDef* CANx,uint32_t CAN_IT, FunctionalState NewSta
|
|||
/* Check the parameters */
|
||||
assert_param(IS_CAN_IT(CAN_IT));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
|
||||
switch (*(uint32_t*)&CANx)
|
||||
{
|
||||
case CAN1_BASE:
|
||||
|
@ -1156,7 +1156,7 @@ void CAN_Peli_ITConfig(CAN_TypeDef* CANx,uint32_t CAN_IT, FunctionalState NewSta
|
|||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
@ -1180,7 +1180,7 @@ ITStatus CAN_Peli_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT)
|
|||
ITStatus itstatus = RESET;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_CAN_IT(CAN_IT));
|
||||
|
||||
|
||||
switch (*(uint32_t*)&CANx)
|
||||
{
|
||||
case CAN1_BASE:
|
||||
|
@ -1223,13 +1223,13 @@ void CAN_AutoCfg_BaudParam(CAN_Peli_InitTypeDef *CAN_Peli_InitStruct, unsigned
|
|||
{
|
||||
unsigned int i, value = baud, record = 1;
|
||||
unsigned int remain = 0, sumPrescaler = 0;
|
||||
while(( baud == 0 ) || ( SrcClk == 0 )); //防止波特率及时钟为0
|
||||
sumPrescaler = SrcClk / baud; //总分频
|
||||
while(( baud == 0 ) || ( SrcClk == 0 )); //防止波特率及时钟为0
|
||||
sumPrescaler = SrcClk / baud; //总分频
|
||||
sumPrescaler = sumPrescaler / 2; //
|
||||
for( i = 25; i > 3; i -- )
|
||||
{
|
||||
remain = sumPrescaler - ((sumPrescaler / i) * i);
|
||||
if( remain == 0 ) //整除
|
||||
if( remain == 0 ) //整除
|
||||
{
|
||||
record = i;
|
||||
break;
|
||||
|
|
|
@ -480,7 +480,7 @@ ITStatus DMA_GetITStatus(uint32_t DMA_IT)
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the DMAy Channelx’s interrupt pending bits.
|
||||
* @brief Clears the DMAy Channelx’s interrupt pending bits.
|
||||
* @param DMA_IT: specifies the DMA interrupt pending bit to clear.
|
||||
* This parameter can be any combination (for the same DMA) of
|
||||
* the following values:
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2016 HOLOCENE</center></h2>
|
||||
*/
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "HAL_exti.h"
|
||||
|
@ -25,7 +25,7 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup EXTI
|
||||
/** @defgroup EXTI
|
||||
* @brief EXTI driver modules
|
||||
* @{
|
||||
*/
|
||||
|
@ -77,7 +77,7 @@
|
|||
*/
|
||||
|
||||
/**
|
||||
* @brief Deinitializes the EXTI peripheral registers to their default
|
||||
* @brief Deinitializes the EXTI peripheral registers to their default
|
||||
* reset values.
|
||||
* @param None
|
||||
* @retval : None
|
||||
|
@ -86,8 +86,8 @@ void EXTI_DeInit(void)
|
|||
{
|
||||
EXTI->IMR = 0x00000000;
|
||||
EXTI->EMR = 0x00000000;
|
||||
EXTI->RTSR = 0x00000000;
|
||||
EXTI->FTSR = 0x00000000;
|
||||
EXTI->RTSR = 0x00000000;
|
||||
EXTI->FTSR = 0x00000000;
|
||||
EXTI->PR = 0x001FFFFF;
|
||||
}
|
||||
|
||||
|
@ -105,24 +105,24 @@ void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct)
|
|||
/* Check the parameters */
|
||||
assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode));
|
||||
assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger));
|
||||
assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line));
|
||||
assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line));
|
||||
assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd));
|
||||
|
||||
tmp = (uint32_t)EXTI_BASE;
|
||||
|
||||
|
||||
tmp = (uint32_t)EXTI_BASE;
|
||||
|
||||
if (EXTI_InitStruct->EXTI_LineCmd != DISABLE)
|
||||
{
|
||||
/* Clear EXTI line configuration */
|
||||
EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line;
|
||||
EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line;
|
||||
|
||||
|
||||
tmp += EXTI_InitStruct->EXTI_Mode;
|
||||
*(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
|
||||
|
||||
|
||||
/* Clear Rising Falling edge configuration */
|
||||
EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line;
|
||||
EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line;
|
||||
|
||||
|
||||
/* Select the trigger for the selected external interrupts */
|
||||
if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling)
|
||||
{
|
||||
|
@ -134,7 +134,7 @@ void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct)
|
|||
{
|
||||
tmp = (uint32_t)EXTI_BASE;
|
||||
tmp += EXTI_InitStruct->EXTI_Trigger;
|
||||
|
||||
|
||||
*(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line;
|
||||
}
|
||||
}
|
||||
|
@ -165,7 +165,7 @@ void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct)
|
|||
* @brief Generates a Software interrupt.
|
||||
* @param EXTI_Line: specifies the EXTI lines to be enabled or
|
||||
* disabled.
|
||||
* This parameter can be any combination of EXTI_Linex where
|
||||
* This parameter can be any combination of EXTI_Linex where
|
||||
* x can be (0..18).
|
||||
* @retval : None
|
||||
*/
|
||||
|
@ -173,7 +173,7 @@ void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_EXTI_LINE(EXTI_Line));
|
||||
|
||||
|
||||
EXTI->SWIER |= EXTI_Line;
|
||||
}
|
||||
|
||||
|
@ -189,7 +189,7 @@ FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line)
|
|||
FlagStatus bitstatus = RESET;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GET_EXTI_LINE(EXTI_Line));
|
||||
|
||||
|
||||
if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET)
|
||||
{
|
||||
bitstatus = SET;
|
||||
|
@ -202,9 +202,9 @@ FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line)
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the EXTI’s line pending flags.
|
||||
* @brief Clears the EXTI’s line pending flags.
|
||||
* @param EXTI_Line: specifies the EXTI lines flags to clear.
|
||||
* This parameter can be any combination of EXTI_Linex where
|
||||
* This parameter can be any combination of EXTI_Linex where
|
||||
* x can be (0..18).
|
||||
* @retval : None
|
||||
*/
|
||||
|
@ -212,7 +212,7 @@ void EXTI_ClearFlag(uint32_t EXTI_Line)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_EXTI_LINE(EXTI_Line));
|
||||
|
||||
|
||||
EXTI->PR = EXTI_Line;
|
||||
}
|
||||
|
||||
|
@ -229,7 +229,7 @@ ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
|
|||
uint32_t enablestatus = 0;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GET_EXTI_LINE(EXTI_Line));
|
||||
|
||||
|
||||
enablestatus = EXTI->IMR & EXTI_Line;
|
||||
if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET))
|
||||
{
|
||||
|
@ -243,9 +243,9 @@ ITStatus EXTI_GetITStatus(uint32_t EXTI_Line)
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the EXTI’s line pending bits.
|
||||
* @brief Clears the EXTI’s line pending bits.
|
||||
* @param EXTI_Line: specifies the EXTI lines to clear.
|
||||
* This parameter can be any combination of EXTI_Linex where
|
||||
* This parameter can be any combination of EXTI_Linex where
|
||||
* x can be (0..18).
|
||||
* @retval : None
|
||||
*/
|
||||
|
@ -253,7 +253,7 @@ void EXTI_ClearITPendingBit(uint32_t EXTI_Line)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_EXTI_LINE(EXTI_Line));
|
||||
|
||||
|
||||
EXTI->PR = EXTI_Line;
|
||||
}
|
||||
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2016 HOLOCENE</center></h2>
|
||||
*/
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "HAL_gpio.h"
|
||||
|
@ -26,10 +26,10 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO
|
||||
/** @defgroup GPIO
|
||||
* @brief GPIO driver modules
|
||||
* @{
|
||||
*/
|
||||
*/
|
||||
|
||||
/** @defgroup GPIO_Private_TypesDefinitions
|
||||
* @{
|
||||
|
@ -101,7 +101,7 @@ void GPIO_DeInit(GPIO_TypeDef* GPIOx)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
|
||||
switch (*(uint32_t*)&GPIOx)
|
||||
{
|
||||
case GPIOA_BASE:
|
||||
|
@ -142,12 +142,12 @@ void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
|
|||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
|
||||
assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
|
||||
|
||||
assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
|
||||
|
||||
/*---------------------------- GPIO Mode Configuration -----------------------*/
|
||||
currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
|
||||
if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
|
||||
{
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
|
||||
/* Output mode */
|
||||
|
@ -221,7 +221,7 @@ void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
|
|||
GPIOx->CRH = tmpreg;
|
||||
}
|
||||
/*---------------------------- GPIOE_CRH_EXT Configuration ------------------------*/
|
||||
if(GPIO_InitStruct->GPIO_Pin>>16) //说明是GPIOE的16~23位
|
||||
if(GPIO_InitStruct->GPIO_Pin>>16) //说明是GPIOE的16~23位
|
||||
{
|
||||
GPIO_InitStruct->GPIO_Pin = GPIO_InitStruct->GPIO_Pin>>16;
|
||||
tmpreg = GPIOE->CRH_EXT;
|
||||
|
@ -281,11 +281,11 @@ void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
|
|||
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint8_t bitstatus = 0x00;
|
||||
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_SET;
|
||||
|
@ -306,7 +306,7 @@ uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
|
||||
return ((uint16_t)GPIOx->IDR);
|
||||
}
|
||||
|
||||
|
@ -322,8 +322,8 @@ uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
|||
uint8_t bitstatus = 0x00;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
|
||||
{
|
||||
bitstatus = (uint8_t)Bit_SET;
|
||||
|
@ -344,7 +344,7 @@ uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
|
||||
return ((uint16_t)GPIOx->ODR);
|
||||
}
|
||||
|
||||
|
@ -352,7 +352,7 @@ uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
|
|||
* @brief Sets the selected data port bits.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bits to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where
|
||||
* This parameter can be any combination of GPIO_Pin_x where
|
||||
* x can be (0..15).
|
||||
* @retval : None
|
||||
*/
|
||||
|
@ -364,14 +364,14 @@ void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint32_t GPIO_Pin)
|
|||
if(GPIO_Pin>GPIO_Pin_15)GPIOE->BSRR_EXT=GPIO_Pin>>16;
|
||||
else
|
||||
GPIOx->BSRR = GPIO_Pin;
|
||||
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the selected data port bits.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bits to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where
|
||||
* This parameter can be any combination of GPIO_Pin_x where
|
||||
* x can be (0..15).
|
||||
* @retval : None
|
||||
*/
|
||||
|
@ -399,8 +399,8 @@ void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
|
|||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
||||
assert_param(IS_GPIO_BIT_ACTION(BitVal));
|
||||
|
||||
assert_param(IS_GPIO_BIT_ACTION(BitVal));
|
||||
|
||||
if (BitVal != Bit_RESET)
|
||||
{
|
||||
GPIOx->BSRR = GPIO_Pin;
|
||||
|
@ -422,7 +422,7 @@ void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
|
||||
|
||||
GPIOx->ODR = PortVal;
|
||||
}
|
||||
|
||||
|
@ -430,18 +430,18 @@ void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
|
|||
* @brief Locks GPIO Pins configuration registers.
|
||||
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
||||
* @param GPIO_Pin: specifies the port bit to be written.
|
||||
* This parameter can be any combination of GPIO_Pin_x where
|
||||
* This parameter can be any combination of GPIO_Pin_x where
|
||||
* x can be (0..15).
|
||||
* @retval : None
|
||||
*/
|
||||
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||||
{
|
||||
uint32_t tmp = 0x00010000;
|
||||
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
||||
|
||||
|
||||
tmp |= GPIO_Pin;
|
||||
/* Set LCKK bit */
|
||||
GPIOx->LCKR = tmp;
|
||||
|
@ -461,25 +461,25 @@ void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
|||
* @param GPIOx: where x can be (A, B, C, D ) to select the GPIO peripheral.
|
||||
* @param GPIO_PinSource: specifies the pin for the Alternate function.
|
||||
* This parameter can be GPIO_PinSourcex where x can be (0..15) for GPIOA, GPIOB, GPIOD
|
||||
* and (0..12) for GPIOC .
|
||||
* and (0..12) for GPIOC .
|
||||
* @param GPIO_AF: selects the pin to used as Alternate function.
|
||||
* This parameter can be one of the following value:
|
||||
* @arg GPIO_AF_0: SPI1, MC0, TIM17_BKIN, SWDIO,SWCLK,
|
||||
UART1
|
||||
* @arg GPIO_AF_1: UART1, TIM3_CH1, TIM3_CH2, TIM3_CH3,
|
||||
TIM3_CH4, I2C1
|
||||
* @arg GPIO_AF_2: TIM2_CH1_ETR, TIM2_CH2, TIM2_CH3,
|
||||
TIM3_CH4, I2C1
|
||||
* @arg GPIO_AF_2: TIM2_CH1_ETR, TIM2_CH2, TIM2_CH3,
|
||||
TIM2_CH3, TIM2_CH4, TIM1_BKIN,
|
||||
TIM1_CH1N, TIM1_CH1, TIM1_CH2,
|
||||
TIM1_CH3, TIM1_CH4, TIM1_ETR,
|
||||
TIM1_CH2N, TIM1_CH3N, TIM2_CH2,
|
||||
TIM1 6_BKIN, TIM16_CH1N, TIM17_CH1N,
|
||||
TIM1 6_CH1, TIM17_CH1
|
||||
TIM1 6_CH1, TIM17_CH1
|
||||
* @arg GPIO_AF_4: TIM14_CH1, I2C1
|
||||
* @note The pin should already been configured in Alternate Function mode(AF)
|
||||
* using GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
|
||||
* @note Refer to the Alternate function mapping table in the device datasheet
|
||||
* for the detailed mapping of the system and peripherals'alternate
|
||||
* @note Refer to the Alternate function mapping table in the device datasheet
|
||||
* for the detailed mapping of the system and peripherals'alternate
|
||||
* function I/O pins.
|
||||
* @retval None
|
||||
*/
|
||||
|
@ -487,45 +487,45 @@ void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint32_t GPIO_Pin, uint8_t GPIO_AF)
|
|||
{
|
||||
uint32_t temp;
|
||||
unsigned char i;
|
||||
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
||||
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
|
||||
assert_param(IS_GPIO_AF(GPIO_AF));
|
||||
|
||||
if(GPIO_Pin>>16) //说明是GPIOE的16~23位
|
||||
|
||||
if(GPIO_Pin>>16) //说明是GPIOE的16~23位
|
||||
{
|
||||
temp = GPIO_Pin>>16;
|
||||
for(i=0;i<8;i++)
|
||||
{
|
||||
if(temp&0x01)
|
||||
{
|
||||
GPIOE->AFRH_EXT &= ~((uint32_t)0xF << ((uint32_t)(i<<2))); //AF配置占半字节,要x4,即<<2
|
||||
GPIOE->AFRH_EXT &= ~((uint32_t)0xF << ((uint32_t)(i<<2))); //AF配置占半字节,要x4,即<<2
|
||||
GPIOE->AFRH_EXT |= ((uint32_t)GPIO_AF << ((uint32_t)(i<<2)));
|
||||
}
|
||||
temp = temp>>1;
|
||||
}
|
||||
}
|
||||
if(GPIO_Pin&0XFF00) //说明是GPIOE的8~15位
|
||||
if(GPIO_Pin&0XFF00) //说明是GPIOE的8~15位
|
||||
{
|
||||
temp = GPIO_Pin>>8;
|
||||
for(i=0;i<8;i++)
|
||||
{
|
||||
if(temp&0x01)
|
||||
{
|
||||
GPIOx->AFRH &= ~((uint32_t)0xF << ((uint32_t)(i<<2))); //AF配置占半字节,要x4,即<<2
|
||||
GPIOx->AFRH &= ~((uint32_t)0xF << ((uint32_t)(i<<2))); //AF配置占半字节,要x4,即<<2
|
||||
GPIOx->AFRH |= ((uint32_t)GPIO_AF << ((uint32_t)(i<<2)));
|
||||
}
|
||||
temp = temp>>1;
|
||||
}
|
||||
}
|
||||
if(GPIO_Pin&0XFF) //说明是GPIOE的0~7位
|
||||
if(GPIO_Pin&0XFF) //说明是GPIOE的0~7位
|
||||
{
|
||||
for(i=0;i<8;i++)
|
||||
{
|
||||
if(temp&0x01)
|
||||
{
|
||||
GPIOx->AFRL &= ~((uint32_t)0xF << ((uint32_t)(i<<2))); //AF配置占半字节,要x4,即<<2
|
||||
GPIOx->AFRL &= ~((uint32_t)0xF << ((uint32_t)(i<<2))); //AF配置占半字节,要x4,即<<2
|
||||
GPIOx->AFRL |= ((uint32_t)GPIO_AF << ((uint32_t)(i<<2)));
|
||||
}
|
||||
temp = temp>>1;
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2016 HOLOCENE</center></h2>
|
||||
*/
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "HAL_i2c.h"
|
||||
|
@ -27,10 +27,10 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup I2C
|
||||
/** @defgroup I2C
|
||||
* @brief I2C driver modules
|
||||
* @{
|
||||
*/
|
||||
*/
|
||||
|
||||
/** @defgroup I2C_Private_TypesDefinitions
|
||||
* @{
|
||||
|
@ -44,7 +44,7 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
/*I2c Enable disable*/
|
||||
/*I2c Enable disable*/
|
||||
#define IC_ENABLE_Reset ((uint16_t)0xFFFE)
|
||||
#define IC_ENABLE_Set ((uint16_t)0x0001)
|
||||
#define IC_CON_RESET ((uint16_t)0xFE8A)
|
||||
|
@ -68,7 +68,7 @@
|
|||
#define IC_TAR_ENDUAL_Set ((uint16_t)0x1000)
|
||||
#define IC_TAR_ENDUAL_Reset ((uint16_t)0xEFFF)
|
||||
|
||||
/* I2C SPECIAL、GC_OR_START bits mask */
|
||||
/* I2C SPECIAL、GC_OR_START bits mask */
|
||||
#define IC_TAR_GC_Set ((uint16_t)0x0800)
|
||||
#define IC_TAR_GC_Reset ((uint16_t)0xF7FF)
|
||||
|
||||
|
@ -78,10 +78,10 @@
|
|||
//static
|
||||
uint8_t I2C_CMD_DIR = 0;
|
||||
|
||||
/*新增加的用户变量,外部调用时需要更新该变量值*/
|
||||
uint16_t I2C_DMA_DIR = 0;
|
||||
/*新增加的用户变量,外部调用时需要更新该变量值*/
|
||||
uint16_t I2C_DMA_DIR = 0;
|
||||
|
||||
/**
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
@ -131,14 +131,14 @@ void I2C_DeInit(I2C_TypeDef* I2Cx)
|
|||
/* Release I2C1 from reset state */
|
||||
RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
|
||||
break;
|
||||
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Initializes the I2Cx peripheral according to the specified
|
||||
* @brief Initializes the I2Cx peripheral according to the specified
|
||||
* parameters in the I2C_InitStruct.
|
||||
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
||||
* @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that
|
||||
|
@ -148,7 +148,7 @@ void I2C_DeInit(I2C_TypeDef* I2Cx)
|
|||
*/
|
||||
void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
|
||||
{
|
||||
|
||||
|
||||
uint16_t tmpreg = 0;
|
||||
uint32_t pclk1 = 8000000;
|
||||
uint32_t minSclLowTime = 0;
|
||||
|
@ -162,25 +162,25 @@ void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
|
|||
/*---------------------------- I2Cx IC_ENABLE Configuration ------------------------*/
|
||||
/* Disable the selected I2C peripheral */
|
||||
I2Cx->IC_ENABLE &= IC_ENABLE_Reset;
|
||||
|
||||
|
||||
/* Get pclk1 frequency value */
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
pclk1 = rcc_clocks.PCLK1_Frequency;
|
||||
|
||||
/* Set pclk1 period value */
|
||||
pclk1Period = 1000000000/pclk1;
|
||||
|
||||
|
||||
i2cPeriod = 1000000000/I2C_InitStruct->I2C_ClockSpeed; //ns unit
|
||||
tmpreg = 0;
|
||||
|
||||
|
||||
/*Get the I2Cx IC_CON value */
|
||||
tmpreg = I2Cx->IC_CON;
|
||||
/*Clear TX_EMPTY_CTRL,IC_SLAVE_DISABLE,IC_RESTART_EN,IC_10BITADDR_SLAVE,SPEED,MASTER_MODE bits*/
|
||||
tmpreg &= IC_CON_RESET;
|
||||
|
||||
|
||||
/* Configure speed in standard mode */
|
||||
if (I2C_InitStruct->I2C_ClockSpeed <= 100000)
|
||||
{
|
||||
{
|
||||
minSclLowTime = i2cPeriod/pclk1Period;
|
||||
I2Cx->IC_SS_SCL_LCNT = minSclLowTime/2;
|
||||
I2Cx->IC_SS_SCL_HCNT = minSclLowTime - I2Cx->IC_SS_SCL_LCNT;
|
||||
|
@ -193,13 +193,13 @@ void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
|
|||
I2Cx->IC_FS_SCL_HCNT = minSclLowTime - I2Cx->IC_FS_SCL_LCNT;
|
||||
I2C_InitStruct->I2C_Speed = I2C_Speed_FAST;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*Set TX_EMPTY_CTRL,IC_SLAVE_DISABLE,IC_RESTART_EN,IC_10BITADDR_SLAVE,SPEED,MASTER_MODE bits*/
|
||||
tmpreg = TX_EMPTY_CTRL | IC_SLAVE_DISABLE | IC_RESTART_EN |IC_7BITADDR_MASTER | I2C_InitStruct->I2C_Speed | I2C_InitStruct->I2C_Mode;
|
||||
/* Write to I2Cx IC_CON */
|
||||
I2Cx->IC_CON = tmpreg;
|
||||
|
||||
|
||||
/*---------------------------- I2Cx IC_INTR_MASK Configuration ------------------------*/
|
||||
/* Get the I2Cx IC_INTR_MASK value */
|
||||
tmpreg = I2Cx->IC_INTR_MASK;
|
||||
|
@ -207,12 +207,12 @@ void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
|
|||
tmpreg &= INTR_MASK;
|
||||
/* Write to IC_INTR_MASK */
|
||||
I2Cx->IC_INTR_MASK = tmpreg;
|
||||
|
||||
|
||||
/* Write to IC_RX_TL */
|
||||
I2Cx->IC_RX_TL = 0x0; //rxfifo depth is 1
|
||||
/* Write to IC_TX_TL */
|
||||
I2Cx->IC_TX_TL = 0x1; //tcfifo depth is 1
|
||||
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -418,20 +418,20 @@ void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
|||
* @brief Enables or disables the specified I2C interrupts.
|
||||
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
||||
* @param I2C_IT: specifies the I2C interrupts sources to be enabled
|
||||
* or disabled.
|
||||
* or disabled.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt mask
|
||||
* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt mask
|
||||
* @arg I2C_IT_RX_FULL : Rx buffer full interrupt mask
|
||||
* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt mask
|
||||
* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt mask
|
||||
* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt mask
|
||||
* @arg I2C_IT_TX_ABRT : TX error interrupt mask(Master mode)
|
||||
* @arg I2C_IT_RX_DONE : Master not ack interrupt mask(slave mode)
|
||||
* @arg I2C_IT_ACTIVITY : I2C activity interrupt mask
|
||||
* @arg I2C_IT_STOP_DET : stop condition interrupt mask
|
||||
* @arg I2C_IT_START_DET : start condition interrupt mask
|
||||
* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt mask
|
||||
* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt mask
|
||||
* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt mask
|
||||
* @arg I2C_IT_RX_FULL : Rx buffer full interrupt mask
|
||||
* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt mask
|
||||
* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt mask
|
||||
* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt mask
|
||||
* @arg I2C_IT_TX_ABRT : TX error interrupt mask(Master mode)
|
||||
* @arg I2C_IT_RX_DONE : Master not ack interrupt mask(slave mode)
|
||||
* @arg I2C_IT_ACTIVITY : I2C activity interrupt mask
|
||||
* @arg I2C_IT_STOP_DET : stop condition interrupt mask
|
||||
* @arg I2C_IT_START_DET : start condition interrupt mask
|
||||
* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt mask
|
||||
* @param NewState: new state of the specified I2C interrupts.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @retval : None
|
||||
|
@ -442,12 +442,12 @@ void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState)
|
|||
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
assert_param(IS_I2C_CONFIG_IT(I2C_IT));
|
||||
|
||||
|
||||
if(I2C_IT == I2C_IT_RX_FULL)
|
||||
{
|
||||
I2C1->IC_DATA_CMD = CMD_READ;
|
||||
}
|
||||
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected I2C interrupts */
|
||||
|
@ -484,7 +484,7 @@ void I2C_ReadCmd(I2C_TypeDef* I2Cx)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
|
||||
|
||||
|
||||
I2Cx->IC_DATA_CMD = CMD_READ;
|
||||
}
|
||||
|
||||
|
@ -507,7 +507,7 @@ uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx)
|
|||
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
||||
* @param Address: specifies the slave address which will be transmitted
|
||||
* @param I2C_Direction: specifies whether the I2C device will be a
|
||||
* Transmitter or a Receiver.
|
||||
* Transmitter or a Receiver.
|
||||
* This parameter can be one of the following values
|
||||
* @arg I2C_Direction_Transmitter: Transmitter mode
|
||||
* @arg I2C_Direction_Receiver: Receiver mode
|
||||
|
@ -547,7 +547,7 @@ uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx)
|
|||
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
|
||||
/* Read the I2Cx status register */
|
||||
flag1 = I2Cx->IC_RAW_INTR_STAT;
|
||||
|
||||
|
||||
/* Get the last event value from I2C status register */
|
||||
lastevent = (flag1 ) & FLAG_Mask;
|
||||
/* Return status */
|
||||
|
@ -560,20 +560,20 @@ uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx)
|
|||
* @brief Checks whether the last I2Cx Event is equal to the one passed
|
||||
* as parameter.
|
||||
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
||||
* @param I2C_EVENT: specifies the event to be checked.
|
||||
* @param I2C_EVENT: specifies the event to be checked.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2C_EVENT_RX_UNDER: Rx Buffer is empty event
|
||||
* @arg I2C_EVENT_RX_OVER : RX Buffer Overrun event
|
||||
* @arg I2C_EVENTT_RX_FULL : Rx buffer full event
|
||||
* @arg I2C_EVENT_TX_OVER : TX Buffer Overrun event
|
||||
* @arg I2C_EVENT_TX_EMPTY : TX_FIFO empty event
|
||||
* @arg I2C_EVENT_RD_REQ : I2C work as slave or master event
|
||||
* @arg I2C_EVENT_TX_ABRT : TX error event(Master mode)
|
||||
* @arg I2C_EVENT_RX_DONE : Master not ack event(slave mode)
|
||||
* @arg I2C_EVENT_ACTIVITY : I2C activity event
|
||||
* @arg I2C_EVENT_STOP_DET : stop condition event
|
||||
* @arg I2C_EVENT_START_DET : start condition event
|
||||
* @arg I2C_EVENT_GEN_CALL : a general call address and ack event
|
||||
* @arg I2C_EVENT_RX_UNDER: Rx Buffer is empty event
|
||||
* @arg I2C_EVENT_RX_OVER : RX Buffer Overrun event
|
||||
* @arg I2C_EVENTT_RX_FULL : Rx buffer full event
|
||||
* @arg I2C_EVENT_TX_OVER : TX Buffer Overrun event
|
||||
* @arg I2C_EVENT_TX_EMPTY : TX_FIFO empty event
|
||||
* @arg I2C_EVENT_RD_REQ : I2C work as slave or master event
|
||||
* @arg I2C_EVENT_TX_ABRT : TX error event(Master mode)
|
||||
* @arg I2C_EVENT_RX_DONE : Master not ack event(slave mode)
|
||||
* @arg I2C_EVENT_ACTIVITY : I2C activity event
|
||||
* @arg I2C_EVENT_STOP_DET : stop condition event
|
||||
* @arg I2C_EVENT_START_DET : start condition event
|
||||
* @arg I2C_EVENT_GEN_CALL : a general call address and ack event
|
||||
* - SUCCESS: Last event is equal to the I2C_EVENT
|
||||
* - ERROR: Last event is different from the I2C_EVENT
|
||||
*/
|
||||
|
@ -585,7 +585,7 @@ ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT)
|
|||
/* Check the parameters */
|
||||
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
|
||||
assert_param(IS_I2C_EVENT(I2C_EVENT));
|
||||
|
||||
|
||||
if((I2C_EVENT == I2C_EVENT_RX_FULL)&&(I2C_CMD_DIR==0))
|
||||
{
|
||||
I2C1->IC_DATA_CMD = CMD_READ;
|
||||
|
@ -596,7 +596,7 @@ ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT)
|
|||
//flag1 = I2Cx->IC_INTR_STAT;
|
||||
/* Get the last event value from I2C status register */
|
||||
lastevent = (flag1 ) & I2C_EVENT;
|
||||
|
||||
|
||||
/* Check whether the last event is equal to I2C_EVENT */
|
||||
if (lastevent == I2C_EVENT )
|
||||
//if((I2Cx->IC_RAW_INTR_STAT & I2C_EVENT) != (uint32_t)RESET)
|
||||
|
@ -611,26 +611,26 @@ ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT)
|
|||
}
|
||||
/* Return status */
|
||||
return status;
|
||||
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified I2C flag is set or not.
|
||||
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
||||
* @param I2C_FLAG: specifies the flag to check.
|
||||
* @param I2C_FLAG: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2C_FLAG_RX_UNDER: Rx Buffer is empty flag
|
||||
* @arg I2C_FLAG_RX_OVER : RX Buffer Overrun flag
|
||||
* @arg I2C_FLAG_RX_FULL : Rx buffer full flag
|
||||
* @arg I2C_FLAG_TX_OVER : TX Buffer Overrun flag
|
||||
* @arg I2C_FLAG_TX_EMPTY: TX_FIFO empty flag
|
||||
* @arg I2C_FLAG_RD_REQ : I2C work as slave or master flag
|
||||
* @arg I2C_FLAG_TX_ABRT : TX error flag(Master mode)
|
||||
* @arg I2C_FLAG_RX_DONE : Master not ack flag(slave mode)
|
||||
* @arg I2C_FLAG_ACTIVITY: I2C activity flag
|
||||
* @arg I2C_FLAG_STOP_DET: stop condition flag
|
||||
* @arg I2C_FLAG_START_DET: start condition flag
|
||||
* @arg I2C_FLAG_GEN_CALL : a general call address and ack flag
|
||||
* @arg I2C_FLAG_RX_UNDER: Rx Buffer is empty flag
|
||||
* @arg I2C_FLAG_RX_OVER : RX Buffer Overrun flag
|
||||
* @arg I2C_FLAG_RX_FULL : Rx buffer full flag
|
||||
* @arg I2C_FLAG_TX_OVER : TX Buffer Overrun flag
|
||||
* @arg I2C_FLAG_TX_EMPTY: TX_FIFO empty flag
|
||||
* @arg I2C_FLAG_RD_REQ : I2C work as slave or master flag
|
||||
* @arg I2C_FLAG_TX_ABRT : TX error flag(Master mode)
|
||||
* @arg I2C_FLAG_RX_DONE : Master not ack flag(slave mode)
|
||||
* @arg I2C_FLAG_ACTIVITY: I2C activity flag
|
||||
* @arg I2C_FLAG_STOP_DET: stop condition flag
|
||||
* @arg I2C_FLAG_START_DET: start condition flag
|
||||
* @arg I2C_FLAG_GEN_CALL : a general call address and ack flag
|
||||
* @retval : The new state of I2C_FLAG (SET or RESET).
|
||||
*/
|
||||
FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
|
||||
|
@ -646,7 +646,7 @@ FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
|
|||
I2Cx->IC_DATA_CMD = CMD_READ;
|
||||
I2C_CMD_DIR = 1;
|
||||
}
|
||||
|
||||
|
||||
/* Check the status of the specified I2C flag */
|
||||
if((I2Cx->IC_RAW_INTR_STAT & I2C_FLAG) != (uint32_t)RESET)
|
||||
{
|
||||
|
@ -658,7 +658,7 @@ FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
|
|||
/* I2C_FLAG is reset */
|
||||
bitstatus = RESET;
|
||||
}
|
||||
|
||||
|
||||
/* Return the I2C_FLAG status */
|
||||
return bitstatus;
|
||||
}
|
||||
|
@ -666,20 +666,20 @@ FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
|
|||
/**
|
||||
* @brief Clears the I2Cx's pending flags.
|
||||
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
||||
* @param I2C_FLAG: specifies the flag to clear.
|
||||
* @param I2C_FLAG: specifies the flag to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg I2C_FLAG_RX_UNDER: Rx Buffer is empty flag
|
||||
* @arg I2C_FLAG_RX_OVER : RX Buffer Overrun flag
|
||||
* @arg I2C_FLAG_RX_FULL : Rx buffer full flag
|
||||
* @arg I2C_FLAG_TX_OVER : TX Buffer Overrun flag
|
||||
* @arg I2C_FLAG_TX_EMPTY: TX_FIFO empty flag
|
||||
* @arg I2C_FLAG_RD_REQ : I2C work as slave or master flag
|
||||
* @arg I2C_FLAG_TX_ABRT : TX error flag(Master mode)
|
||||
* @arg I2C_FLAG_RX_DONE : Master not ack flag(slave mode)
|
||||
* @arg I2C_FLAG_ACTIVITY: I2C activity flag
|
||||
* @arg I2C_FLAG_STOP_DET: stop condition flag
|
||||
* @arg I2C_FLAG_START_DET: start condition flag
|
||||
* @arg I2C_FLAG_GEN_CALL : a general call address and ack flag
|
||||
* @arg I2C_FLAG_RX_UNDER: Rx Buffer is empty flag
|
||||
* @arg I2C_FLAG_RX_OVER : RX Buffer Overrun flag
|
||||
* @arg I2C_FLAG_RX_FULL : Rx buffer full flag
|
||||
* @arg I2C_FLAG_TX_OVER : TX Buffer Overrun flag
|
||||
* @arg I2C_FLAG_TX_EMPTY: TX_FIFO empty flag
|
||||
* @arg I2C_FLAG_RD_REQ : I2C work as slave or master flag
|
||||
* @arg I2C_FLAG_TX_ABRT : TX error flag(Master mode)
|
||||
* @arg I2C_FLAG_RX_DONE : Master not ack flag(slave mode)
|
||||
* @arg I2C_FLAG_ACTIVITY: I2C activity flag
|
||||
* @arg I2C_FLAG_STOP_DET: stop condition flag
|
||||
* @arg I2C_FLAG_START_DET: start condition flag
|
||||
* @arg I2C_FLAG_GEN_CALL : a general call address and ack flag
|
||||
* @retval : None
|
||||
*/
|
||||
void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
|
||||
|
@ -690,7 +690,7 @@ void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
|
|||
assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG));
|
||||
/* Get the I2Cx peripheral base address */
|
||||
i2cxbase = (*(uint32_t*)&(I2Cx));
|
||||
|
||||
|
||||
if(I2C_FLAG==I2C_FLAG_RX_UNDER)
|
||||
{
|
||||
/* Get the I2Cx SR1 register address */
|
||||
|
@ -766,20 +766,20 @@ void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
|
|||
/**
|
||||
* @brief Checks whether the specified I2C interrupt has occurred or not.
|
||||
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
||||
* @param I2C_IT: specifies the interrupt source to check.
|
||||
* @param I2C_IT: specifies the interrupt source to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt
|
||||
* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt
|
||||
* @arg I2C_IT_RX_FULL : Rx buffer full interrupt
|
||||
* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt
|
||||
* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt
|
||||
* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt
|
||||
* @arg I2C_IT_TX_ABRT : TX error interrupt (Master mode)
|
||||
* @arg I2C_IT_RX_DONE : Master not ack interrupt (slave mode)
|
||||
* @arg I2C_IT_ACTIVITY : I2C activity interrupt
|
||||
* @arg I2C_IT_STOP_DET : stop condition interrupt
|
||||
* @arg I2C_IT_START_DET : start condition interrupt
|
||||
* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt
|
||||
* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt
|
||||
* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt
|
||||
* @arg I2C_IT_RX_FULL : Rx buffer full interrupt
|
||||
* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt
|
||||
* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt
|
||||
* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt
|
||||
* @arg I2C_IT_TX_ABRT : TX error interrupt (Master mode)
|
||||
* @arg I2C_IT_RX_DONE : Master not ack interrupt (slave mode)
|
||||
* @arg I2C_IT_ACTIVITY : I2C activity interrupt
|
||||
* @arg I2C_IT_STOP_DET : stop condition interrupt
|
||||
* @arg I2C_IT_START_DET : start condition interrupt
|
||||
* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt
|
||||
* @retval : The new state of I2C_IT (SET or RESET).
|
||||
*/
|
||||
ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
|
||||
|
@ -788,7 +788,7 @@ ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
|
|||
/* Check the parameters */
|
||||
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
|
||||
assert_param(IS_I2C_GET_IT(I2C_IT));
|
||||
|
||||
|
||||
/* Check the status of the specified I2C flag */
|
||||
if((I2Cx->IC_RAW_INTR_STAT & I2C_IT) != (uint32_t)RESET)
|
||||
{
|
||||
|
@ -800,7 +800,7 @@ ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
|
|||
/* I2C_IT is reset */
|
||||
bitstatus = RESET;
|
||||
}
|
||||
|
||||
|
||||
/* Return the I2C_IT status */
|
||||
return bitstatus;
|
||||
}
|
||||
|
@ -808,20 +808,20 @@ ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
|
|||
/**
|
||||
* @brief Clears the I2Cx interrupt pending bits.
|
||||
* @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
||||
* @param I2C_IT: specifies the interrupt pending bit to clear.
|
||||
* @param I2C_IT: specifies the interrupt pending bit to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt
|
||||
* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt
|
||||
* @arg I2C_IT_RX_FULL : Rx buffer full interrupt
|
||||
* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt
|
||||
* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt
|
||||
* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt
|
||||
* @arg I2C_IT_TX_ABRT : TX error interrupt (Master mode)
|
||||
* @arg I2C_IT_RX_DONE : Master not ack interrupt (slave mode)
|
||||
* @arg I2C_IT_ACTIVITY : I2C activity interrupt
|
||||
* @arg I2C_IT_STOP_DET : stop condition interrupt
|
||||
* @arg I2C_IT_START_DET : start condition interrupt
|
||||
* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt
|
||||
* @arg I2C_IT_RX_UNDER: Rx Buffer is empty interrupt
|
||||
* @arg I2C_IT_RX_OVER : RX Buffer Overrun interrupt
|
||||
* @arg I2C_IT_RX_FULL : Rx buffer full interrupt
|
||||
* @arg I2C_IT_TX_OVER : TX Buffer Overrun interrupt
|
||||
* @arg I2C_IT_TX_EMPTY : TX_FIFO empty interrupt
|
||||
* @arg I2C_IT_RD_REQ : I2C work as slave or master interrupt
|
||||
* @arg I2C_IT_TX_ABRT : TX error interrupt (Master mode)
|
||||
* @arg I2C_IT_RX_DONE : Master not ack interrupt (slave mode)
|
||||
* @arg I2C_IT_ACTIVITY : I2C activity interrupt
|
||||
* @arg I2C_IT_STOP_DET : stop condition interrupt
|
||||
* @arg I2C_IT_START_DET : start condition interrupt
|
||||
* @arg I2C_IT_GEN_CALL : a general call address and ack interrupt
|
||||
* @retval : None
|
||||
*/
|
||||
void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
|
||||
|
@ -829,20 +829,20 @@ void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
|
|||
/* Check the parameters */
|
||||
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
|
||||
assert_param(IS_I2C_CLEAR_IT(I2C_IT));
|
||||
|
||||
|
||||
/* Clear the selected I2C flag */
|
||||
I2Cx->IC_INTR_MASK &= (uint16_t)~I2C_IT;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
*/
|
||||
/*-------------------------(C) COPYRIGHT 2016 HOLOCENE ----------------------*/
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2016 HOLOCENE</center></h2>
|
||||
*/
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "HAL_rcc.h"
|
||||
|
@ -27,10 +27,10 @@ u32 TK499_PLL_FACTOR = 0x00004;
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup RCC
|
||||
/** @defgroup RCC
|
||||
* @brief RCC driver modules
|
||||
* @{
|
||||
*/
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Private_TypesDefinitions
|
||||
* @{
|
||||
|
@ -140,19 +140,19 @@ u32 TK499_PLL_FACTOR = 0x00004;
|
|||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
*/
|
||||
|
||||
/** @defgroup RCC_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
*/
|
||||
|
||||
static __I uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
static __I uint8_t ADCPrescTable[4] = {2, 4, 6, 8};
|
||||
|
@ -173,12 +173,12 @@ static __I uint8_t ADCPrescTable[4] = {2, 4, 6, 8};
|
|||
* @{
|
||||
*/
|
||||
void SystemClk_HSEInit(uint32_t PLL_DN)
|
||||
{
|
||||
{
|
||||
RCC_DeInit();
|
||||
//HSE on
|
||||
//CR寄存器BIT16位(HSEON位)置1,作用是连接外部时钟HSE作为系统时钟
|
||||
//CR寄存器BIT16位(HSEON位)置1,作用是连接外部时钟HSE作为系统时钟
|
||||
RCC_HSEConfig(RCC_HSE_ON);
|
||||
|
||||
|
||||
while(1)
|
||||
{
|
||||
if(RCC_WaitForHSEStartUp()!=0)
|
||||
|
@ -189,7 +189,7 @@ void SystemClk_HSEInit(uint32_t PLL_DN)
|
|||
RCC_PLLCmd(DISABLE);
|
||||
RCC_PLLConfig(RCC_PLLSource_HSE_Div1,PLL_DN);
|
||||
RCC_PLLCmd(ENABLE);
|
||||
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);//选择外部时钟作为系统时钟
|
||||
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);//选择外部时钟作为系统时钟
|
||||
}
|
||||
/**
|
||||
* @brief Resets the RCC clock configuration to the default reset state.
|
||||
|
@ -202,7 +202,7 @@ void RCC_DeInit(void)
|
|||
RCC->CR |= (uint32_t)0x00000001;
|
||||
/* Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], ADCPRE[1:0] and MCO[2:0] bits */
|
||||
RCC->CFGR &= (uint32_t)0xF8FF0000;
|
||||
|
||||
|
||||
/* Reset HSEON, CSSON and PLLON bits */
|
||||
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
||||
/* Reset HSEBYP bit */
|
||||
|
@ -215,7 +215,7 @@ void RCC_DeInit(void)
|
|||
|
||||
/**
|
||||
* @brief Configures the External High Speed oscillator (HSE).
|
||||
* HSE can not be stopped if it is used directly or through the
|
||||
* HSE can not be stopped if it is used directly or through the
|
||||
* PLL as system clock.
|
||||
* @param RCC_HSE: specifies the new state of the HSE.
|
||||
* This parameter can be one of the following values:
|
||||
|
@ -241,12 +241,12 @@ void RCC_HSEConfig(uint32_t RCC_HSE)
|
|||
/* Set HSEON bit */
|
||||
RCC->CR |= CR_HSEON_Set;
|
||||
break;
|
||||
|
||||
|
||||
case RCC_HSE_Bypass:
|
||||
/* Set HSEBYP and HSEON bits */
|
||||
RCC->CR |= CR_HSEBYP_Set | CR_HSEON_Set;
|
||||
break;
|
||||
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
@ -264,12 +264,12 @@ ErrorStatus RCC_WaitForHSEStartUp(void)
|
|||
__IO uint32_t StartUpCounter = 0;
|
||||
ErrorStatus status = ERROR;
|
||||
FlagStatus HSEStatus = RESET;
|
||||
|
||||
|
||||
/* Wait till HSE is ready and if Time out is reached exit */
|
||||
do
|
||||
{
|
||||
HSEStatus = RCC_GetFlagStatus(RCC_FLAG_HSERDY);
|
||||
StartUpCounter++;
|
||||
StartUpCounter++;
|
||||
} while((HSEStatus == RESET) && (StartUpCounter != HSEStartUp_TimeOut));
|
||||
if (RCC_GetFlagStatus(RCC_FLAG_HSERDY) != RESET)
|
||||
{
|
||||
|
@ -278,7 +278,7 @@ ErrorStatus RCC_WaitForHSEStartUp(void)
|
|||
else
|
||||
{
|
||||
status = ERROR;
|
||||
}
|
||||
}
|
||||
return (status);
|
||||
}
|
||||
|
||||
|
@ -305,7 +305,7 @@ void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue)
|
|||
|
||||
/**
|
||||
* @brief Enables or disables the Internal High Speed oscillator (HSI).
|
||||
* HSI can not be stopped if it is used directly or through the
|
||||
* HSI can not be stopped if it is used directly or through the
|
||||
* PLL as system clock.
|
||||
* @param NewState: new state of the HSI.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
|
@ -315,7 +315,7 @@ void RCC_HSICmd(FunctionalState NewState)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
|
||||
if(NewState==ENABLE)
|
||||
{
|
||||
RCC->CR |= 0x01;
|
||||
|
@ -345,11 +345,11 @@ void RCC_HSICmd(FunctionalState NewState)
|
|||
void RCC_PLLDMDNConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLDN,uint32_t RCC_PLLDP, uint32_t RCC_PLLDM)
|
||||
{
|
||||
uint32_t tmpreg0 = 0;
|
||||
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_RCC_PLL_SOURCE(RCC_PLLSource));
|
||||
assert_param(IS_RCC_PLL_MUL(RCC_PLLMul));
|
||||
|
||||
|
||||
if(RCC_PLLSource == 0)
|
||||
{
|
||||
tmpreg0 &= ~(1<<22);
|
||||
|
@ -359,13 +359,13 @@ void RCC_PLLDMDNConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLDN,uint32_t RCC_P
|
|||
TK499_PLL_FACTOR |= 0x10000;
|
||||
tmpreg0 |= (1<<22);
|
||||
}
|
||||
|
||||
|
||||
RCC_PLLDN &= 0x7f;
|
||||
RCC_PLLDP &= 0x3;
|
||||
RCC_PLLDM &= 0xf;
|
||||
/* Set the PLL configuration bits */
|
||||
tmpreg0 |= (u32)((u32)(RCC_PLLDN<<6))|((u32)(RCC_PLLDP<<4))|((u32)RCC_PLLDM);
|
||||
|
||||
|
||||
RCC->PLLCFGR = tmpreg0;
|
||||
// RCC->PLLCFGR = 0x4004d1;
|
||||
}
|
||||
|
@ -399,7 +399,7 @@ void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul)
|
|||
tmpreg |= RCC_PLLSource;
|
||||
/* Store the new value */
|
||||
RCC->CFGR = tmpreg;
|
||||
|
||||
|
||||
if(RCC_PLLMul==RCC_PLLMul_2)
|
||||
{
|
||||
TK499_PLL_FACTOR = 2;
|
||||
|
@ -504,7 +504,7 @@ void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul)
|
|||
{
|
||||
TK499_PLL_FACTOR = 22;
|
||||
RCC_PLLDMDNConfig(RCC_PLLSource, 0x00000015, 0x00000000,0x00000000);//Frclk*32/2
|
||||
}
|
||||
}
|
||||
if(RCC_PLLMul==RCC_PLLMul_23)
|
||||
{
|
||||
TK499_PLL_FACTOR = 23;
|
||||
|
@ -549,7 +549,7 @@ void RCC_PLLCmd(FunctionalState NewState)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
RCC->CR |= 0x01000000;
|
||||
|
@ -618,7 +618,7 @@ uint8_t RCC_GetSYSCLKSource(void)
|
|||
|
||||
/**
|
||||
* @brief Configures the AHB clock (HCLK).
|
||||
* @param RCC_SYSCLK: defines the AHB clock divider. This clock is derived from
|
||||
* @param RCC_SYSCLK: defines the AHB clock divider. This clock is derived from
|
||||
* the system clock (SYSCLK).
|
||||
* This parameter can be one of the following values:
|
||||
* @arg RCC_SYSCLK_Div1: AHB clock = SYSCLK
|
||||
|
@ -648,7 +648,7 @@ void RCC_HCLKConfig(uint32_t RCC_SYSCLK)
|
|||
|
||||
/**
|
||||
* @brief Configures the Low Speed APB clock (PCLK1).
|
||||
* @param RCC_HCLK: defines the APB1 clock divider. This clock is derived from
|
||||
* @param RCC_HCLK: defines the APB1 clock divider. This clock is derived from
|
||||
* the AHB clock (HCLK).
|
||||
* This parameter can be one of the following values:
|
||||
* @arg RCC_HCLK_Div1: APB1 clock = HCLK
|
||||
|
@ -674,7 +674,7 @@ void RCC_PCLK1Config(uint32_t RCC_HCLK)
|
|||
|
||||
/**
|
||||
* @brief Configures the High Speed APB clock (PCLK2).
|
||||
* @param RCC_HCLK: defines the APB2 clock divider. This clock is derived from
|
||||
* @param RCC_HCLK: defines the APB2 clock divider. This clock is derived from
|
||||
* the AHB clock (HCLK).
|
||||
* This parameter can be one of the following values:
|
||||
* @arg RCC_HCLK_Div1: APB2 clock = HCLK
|
||||
|
@ -719,23 +719,23 @@ void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState)
|
|||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Perform Byte access to RCC_CIR[12:8] bits to enable the selected interrupts */
|
||||
|
||||
|
||||
RCC->CIR |= ((uint32_t)RCC_IT)<<8;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Perform Byte access to RCC_CIR[12:8] bits to disable the selected interrupts */
|
||||
|
||||
|
||||
RCC->CIR &= ~((uint32_t)RCC_IT<<8);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configures the USB clock (USBCLK).
|
||||
* @param RCC_USBCLKSource: specifies the USB clock source. This clock is
|
||||
* @param RCC_USBCLKSource: specifies the USB clock source. This clock is
|
||||
* derived from the PLL output.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg RCC_USBCLKSource_PLLCLK_1Div5: PLL clock divided by 1,5 selected as USB
|
||||
* @arg RCC_USBCLKSource_PLLCLK_1Div5: PLL clock divided by 1,5 selected as USB
|
||||
* clock source
|
||||
* @arg RCC_USBCLKSource_PLLCLK_Div1: PLL clock selected as USB clock source
|
||||
* @retval : None
|
||||
|
@ -749,7 +749,7 @@ void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource)
|
|||
|
||||
/**
|
||||
* @brief Configures the ADC clock (ADCCLK).
|
||||
* @param RCC_PCLK2: defines the ADC clock divider. This clock is derived from
|
||||
* @param RCC_PCLK2: defines the ADC clock divider. This clock is derived from
|
||||
* the APB2 clock (PCLK2).
|
||||
* This parameter can be one of the following values:
|
||||
* @arg RCC_PCLK2_Div2: ADC clock = PCLK2/2
|
||||
|
@ -798,14 +798,14 @@ void RCC_LSEConfig(uint8_t RCC_LSE)
|
|||
/* Set LSEON bit */
|
||||
RCC->BDCR |= RCC_LSE_ON;
|
||||
break;
|
||||
|
||||
|
||||
case RCC_LSE_Bypass:
|
||||
/* Set LSEBYP and LSEON bits */
|
||||
RCC->BDCR |= RCC_LSE_Bypass | RCC_LSE_ON;
|
||||
break;
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -820,7 +820,7 @@ void RCC_LSICmd(FunctionalState NewState)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
RCC->CSR |= 0x00000001;
|
||||
|
@ -833,7 +833,7 @@ void RCC_LSICmd(FunctionalState NewState)
|
|||
|
||||
/**
|
||||
* @brief Configures the RTC clock (RTCCLK).
|
||||
* Once the RTC clock is selected it can抰 be changed unless the
|
||||
* Once the RTC clock is selected it can抰 be changed unless the
|
||||
* Backup domain is reset.
|
||||
* @param RCC_RTCCLKSource: specifies the RTC clock source.
|
||||
* This parameter can be one of the following values:
|
||||
|
@ -863,7 +863,7 @@ void RCC_RTCCLKCmd(FunctionalState NewState)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
RCC->BDCR |= 0x00008000;
|
||||
|
@ -875,7 +875,7 @@ void RCC_RTCCLKCmd(FunctionalState NewState)
|
|||
}
|
||||
void getSystemClock(u32 *sysclk)
|
||||
{
|
||||
u32 tempreg0 = RCC->CFGR;
|
||||
u32 tempreg0 = RCC->CFGR;
|
||||
u32 tempreg1;
|
||||
u8 dn,dp,dm;
|
||||
if((tempreg0 & 0xC) == 0x00)
|
||||
|
@ -1011,7 +1011,7 @@ void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState)
|
|||
* @arg RCC_APB2Periph_SYSCFG, RCC_AHBPeriph_GPIOA, RCC_AHBPeriph_GPIOB,
|
||||
* RCC_AHBPeriph_GPIOC, RCC_AHBPeriph_GPIOD, RCC_APB2Periph_ADC1,
|
||||
* RCC_APB2Periph_ADC2, RCC_APB2Periph_TIM1, RCC_APB2Periph_SPI1,
|
||||
* RCC_APB2Periph_TIM8, RCC_APB2Periph_UART1,
|
||||
* RCC_APB2Periph_TIM8, RCC_APB2Periph_UART1,
|
||||
* RCC_APB2Periph_ALL
|
||||
* @param NewState: new state of the specified peripheral clock.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
|
@ -1048,7 +1048,7 @@ void RCC_BackupResetCmd(FunctionalState NewState)
|
|||
* @arg RCC_APB1Periph_TIM2, RCC_APB1Periph_TIM3, RCC_APB1Periph_TIM4,
|
||||
* RCC_APB1Periph_TIM5, RCC_APB1Periph_TIM6, RCC_APB1Periph_TIM7,
|
||||
* RCC_APB1Periph_WWDG, RCC_APB1Periph_SPI2, RCC_APB1Periph_SPI3,
|
||||
* RCC_APB1Periph_UART2, RCC_APB1Periph_UART3, RCC_APB1Periph_UART4,
|
||||
* RCC_APB1Periph_UART2, RCC_APB1Periph_UART3, RCC_APB1Periph_UART4,
|
||||
* RCC_APB1Periph_UART5, RCC_APB1Periph_I2C1, RCC_APB1Periph_I2C2,
|
||||
* RCC_APB1Periph_USB, RCC_APB1Periph_CAN1, RCC_APB1Periph_BKP,
|
||||
* RCC_APB1Periph_PWR, RCC_APB1Periph_DAC, RCC_APB1Periph_ALL
|
||||
|
@ -1106,7 +1106,7 @@ void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
|
|||
* @arg RCC_APB1Periph_TIM2, RCC_APB1Periph_TIM3, RCC_APB1Periph_TIM4,
|
||||
* RCC_APB1Periph_TIM5, RCC_APB1Periph_TIM6, RCC_APB1Periph_TIM7,
|
||||
* RCC_APB1Periph_WWDG, RCC_APB1Periph_SPI2, RCC_APB1Periph_SPI3,
|
||||
* RCC_APB1Periph_UART2, RCC_APB1Periph_UART3, RCC_APB1Periph_UART4,
|
||||
* RCC_APB1Periph_UART2, RCC_APB1Periph_UART3, RCC_APB1Periph_UART4,
|
||||
* RCC_APB1Periph_UART5, RCC_APB1Periph_I2C1, RCC_APB1Periph_I2C2,
|
||||
* RCC_APB1Periph_USB, RCC_APB1Periph_CAN1, RCC_APB1Periph_BKP,
|
||||
* RCC_APB1Periph_PWR, RCC_APB1Periph_DAC, RCC_APB1Periph_ALL
|
||||
|
@ -1168,7 +1168,7 @@ void RCC_MCOConfig(uint8_t RCC_MCO)
|
|||
/* Check the parameters */
|
||||
assert_param(IS_RCC_MCO(RCC_MCO));
|
||||
/* Perform Byte access to MCO[2:0] bits to select the MCO source */
|
||||
|
||||
|
||||
RCC->CFGR |= (RCC_MCO<<24);
|
||||
}
|
||||
|
||||
|
@ -1269,7 +1269,7 @@ ITStatus RCC_GetITStatus(uint8_t RCC_IT)
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the RCC抯 interrupt pending bits.
|
||||
* @brief Clears the RCC抯 interrupt pending bits.
|
||||
* @param RCC_IT: specifies the interrupt pending bit to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg RCC_IT_LSIRDY: LSI ready interrupt
|
||||
|
@ -1286,7 +1286,7 @@ void RCC_ClearITPendingBit(uint8_t RCC_IT)
|
|||
assert_param(IS_RCC_CLEAR_IT(RCC_IT));
|
||||
/* Perform Byte access to RCC_CIR[23:16] bits to clear the selected interrupt
|
||||
pending bits */
|
||||
|
||||
|
||||
RCC->CIR |= (uint32_t)RCC_IT<<16;
|
||||
}
|
||||
|
||||
|
|
|
@ -16,7 +16,7 @@
|
|||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2016 HOLOCENE</center></h2>
|
||||
*/
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "HAL_uart.h"
|
||||
|
@ -26,7 +26,7 @@
|
|||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup UART
|
||||
/** @defgroup UART
|
||||
* @brief UART driver modules
|
||||
* @{
|
||||
*/
|
||||
|
@ -86,7 +86,7 @@
|
|||
/**
|
||||
* @brief Deinitializes the UARTx peripheral registers to their
|
||||
* default reset values.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* This parameter can be one of the following values:
|
||||
* UART1, UART2, UART3.
|
||||
* @retval : None
|
||||
|
@ -109,7 +109,7 @@ void UART_DeInit(UART_TypeDef* UARTx)
|
|||
/**
|
||||
* @brief Initializes the UARTx peripheral according to the specified
|
||||
* parameters in the UART_InitStruct .
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* This parameter can be one of the following values:
|
||||
* UART1, UART2, UART3.
|
||||
* @param UART_InitStruct: pointer to a UART_InitTypeDef structure
|
||||
|
@ -123,7 +123,7 @@ void UART_Init(UART_TypeDef* UARTx, UART_InitTypeDef* UART_InitStruct)
|
|||
RCC_ClocksTypeDef RCC_ClocksStatus;
|
||||
/* Check the parameters */
|
||||
assert_param(IS_UART_ALL_PERIPH(UARTx));
|
||||
assert_param(IS_UART_BAUDRATE(UART_InitStruct->UART_BaudRate));
|
||||
assert_param(IS_UART_BAUDRATE(UART_InitStruct->UART_BaudRate));
|
||||
assert_param(IS_UART_WORD_LENGTH(UART_InitStruct->UART_WordLength));
|
||||
assert_param(IS_UART_STOPBITS(UART_InitStruct->UART_StopBits));
|
||||
assert_param(IS_UART_PARITY(UART_InitStruct->UART_Parity));
|
||||
|
@ -139,12 +139,12 @@ void UART_Init(UART_TypeDef* UARTx, UART_InitTypeDef* UART_InitStruct)
|
|||
/* Set spb bit according to UART_StopBits value */
|
||||
/* Set PEN bit according to UART_Parity value */
|
||||
tmpreg |= (uint32_t)UART_InitStruct->UART_WordLength |(uint32_t)UART_InitStruct->UART_StopBits |UART_InitStruct->UART_Parity;
|
||||
|
||||
|
||||
/* Write to UART CCR */
|
||||
UARTx->CCR = tmpreg;
|
||||
|
||||
|
||||
/*---------------------------- UART GCR Configuration -----------------------*/
|
||||
/* get UART GCR values */
|
||||
/* get UART GCR values */
|
||||
tmpreg = UARTx->GCR;
|
||||
/* Clear TXEN and RXEN ,autoflowen, mode ,uarten bits */
|
||||
tmpreg &= GCR_CLEAR_Mask;
|
||||
|
@ -160,7 +160,7 @@ void UART_Init(UART_TypeDef* UARTx, UART_InitTypeDef* UART_InitStruct)
|
|||
/* Determine the UART_baud*/
|
||||
tmpreg = ((RCC_ClocksStatus.PCLK1_Frequency)/(UART_InitStruct->UART_BaudRate)/16) ;
|
||||
/* Write to UART BRR */
|
||||
UARTx->BRR = tmpreg;
|
||||
UARTx->BRR = tmpreg;
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -177,13 +177,13 @@ void UART_StructInit(UART_InitTypeDef* UART_InitStruct)
|
|||
UART_InitStruct->UART_StopBits = UART_StopBits_1;
|
||||
UART_InitStruct->UART_Parity = UART_Parity_No ;
|
||||
UART_InitStruct->UART_Mode = UART_Mode_Rx | UART_Mode_Tx;
|
||||
UART_InitStruct->UART_HardwareFlowControl = UART_HardwareFlowControl_None;
|
||||
UART_InitStruct->UART_HardwareFlowControl = UART_HardwareFlowControl_None;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the specified UART peripheral.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* This parameter can be one of the following values:
|
||||
* UART1, UART2, UART3.
|
||||
* @param NewState: new state of the UARTx peripheral.
|
||||
|
@ -195,7 +195,7 @@ void UART_Cmd(UART_TypeDef* UARTx, FunctionalState NewState)
|
|||
/* Check the parameters */
|
||||
assert_param(IS_UART_ALL_PERIPH(UARTx));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the selected UART by setting the uarten bit in the GCR register */
|
||||
|
@ -210,18 +210,18 @@ void UART_Cmd(UART_TypeDef* UARTx, FunctionalState NewState)
|
|||
|
||||
/**
|
||||
* @brief Enables or disables the specified UART interrupts.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* This parameter can be one of the following values:
|
||||
* UART1, UART2, UART3.
|
||||
* @param UART_IT: specifies the UART interrupt sources to be
|
||||
* enabled or disabled.
|
||||
* This parameter can be one of the following values:
|
||||
*
|
||||
*
|
||||
* @arg UART_IT_ERR: Error interrupt(Frame error,)
|
||||
* @arg UART_IT_PE: Parity Error interrupt
|
||||
* @arg UART_OVER_ERR: overrun Error interrupt
|
||||
* @arg UART_TIMEOUT_ERR: timeout Error interrupt
|
||||
* @arg UART_IT_RXIEN: Receive Data register interrupt
|
||||
* @arg UART_IT_RXIEN: Receive Data register interrupt
|
||||
* @arg UART_IT_TXIEN: Tansmit Data Register empty interrupt
|
||||
* @param NewState: new state of the specified UARTx interrupts.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
|
@ -233,7 +233,7 @@ void UART_ITConfig(UART_TypeDef* UARTx, uint16_t UART_IT, FunctionalState NewSta
|
|||
assert_param(IS_UART_ALL_PERIPH(UARTx));
|
||||
assert_param(IS_UART_CONFIG_IT(UART_IT));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
|
||||
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the UART_IT interrupt */
|
||||
|
@ -247,25 +247,25 @@ void UART_ITConfig(UART_TypeDef* UARTx, uint16_t UART_IT, FunctionalState NewSta
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Enables or disables the UART’s DMA interface.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* @brief Enables or disables the UART’s DMA interface.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* This parameter can be one of the following values:
|
||||
* UART1, UART2, UART3 .
|
||||
* UART1, UART2, UART3 .
|
||||
* @param UART_DMAReq: specifies the DMA request.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg UART_DMAReq_EN: UART DMA transmit request
|
||||
*
|
||||
*
|
||||
* @param NewState: new state of the DMA Request sources.
|
||||
* This parameter can be: ENABLE or DISABLE.
|
||||
* @note The DMA mode is not available for UART5.
|
||||
* @note The DMA mode is not available for UART5.
|
||||
* @retval : None
|
||||
*/
|
||||
void UART_DMACmd(UART_TypeDef* UARTx, uint16_t UART_DMAReq, FunctionalState NewState)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_UART_1234_PERIPH(UARTx));
|
||||
assert_param(IS_UART_DMAREQ(UART_DMAReq));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
assert_param(IS_UART_DMAREQ(UART_DMAReq));
|
||||
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
||||
if (NewState != DISABLE)
|
||||
{
|
||||
/* Enable the DMA transfer */
|
||||
|
@ -281,7 +281,7 @@ void UART_DMACmd(UART_TypeDef* UARTx, uint16_t UART_DMAReq, FunctionalState NewS
|
|||
|
||||
/**
|
||||
* @brief Transmits single data through the UARTx peripheral.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* This parameter can be one of the following values:
|
||||
* UART1, UART2, UART3.
|
||||
* @param Data: the data to transmit.
|
||||
|
@ -291,15 +291,15 @@ void UART_SendData(UART_TypeDef* UARTx, uint16_t Data)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_UART_ALL_PERIPH(UARTx));
|
||||
assert_param(IS_UART_DATA(Data));
|
||||
|
||||
assert_param(IS_UART_DATA(Data));
|
||||
|
||||
/* Transmit Data */
|
||||
UARTx->TDR = (Data & (uint16_t)0x00FF);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Returns the most recent received data by the UARTx peripheral.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* This parameter can be one of the following values:
|
||||
* UART1, UART2, UART3.
|
||||
* @retval : The received data.
|
||||
|
@ -308,7 +308,7 @@ uint16_t UART_ReceiveData(UART_TypeDef* UARTx)
|
|||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_UART_ALL_PERIPH(UARTx));
|
||||
|
||||
|
||||
/* Receive Data */
|
||||
return (uint16_t)(UARTx->RDR & (uint16_t)0x00FF);
|
||||
}
|
||||
|
@ -316,15 +316,15 @@ uint16_t UART_ReceiveData(UART_TypeDef* UARTx)
|
|||
|
||||
/**
|
||||
* @brief Checks whether the specified UART flag is set or not.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* This parameter can be one of the following values:
|
||||
* UART1, UART2, UART3.
|
||||
* @param UART_FLAG: specifies the flag to check.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg UART_FLAG_TXEMPTY:Transmit data register empty flag
|
||||
* @arg UART_FLAG_TXFULL:Transmit data buffer full
|
||||
* @arg UART_FLAG_TXEMPTY:Transmit data register empty flag
|
||||
* @arg UART_FLAG_TXFULL:Transmit data buffer full
|
||||
* @arg UART_FLAG_RXAVL:RX Buffer has a byte flag
|
||||
* @arg UART_FLAG_OVER:OverRun Error flag
|
||||
* @arg UART_FLAG_OVER:OverRun Error flag
|
||||
* @arg UART_FLAG_TXEPT: tx and shifter are emptys flag
|
||||
* @retval : The new state of UART_FLAG (SET or RESET).
|
||||
*/
|
||||
|
@ -347,26 +347,26 @@ FlagStatus UART_GetFlagStatus(UART_TypeDef* UARTx, uint16_t UART_FLAG)
|
|||
|
||||
/**
|
||||
* @brief Clears the UARTx's pending flags.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* This parameter can be one of the following values:
|
||||
* UART1, UART2, UART3, UART4 or UART5.
|
||||
* @param UART_FLAG: specifies the flag to clear.
|
||||
* This parameter can be any combination of the following values:
|
||||
* @arg UART_FLAG_TXEMPTY:Transmit data register empty flag
|
||||
* @arg UART_FLAG_TXFULL:Transmit data buffer full
|
||||
* @arg UART_FLAG_TXEMPTY:Transmit data register empty flag
|
||||
* @arg UART_FLAG_TXFULL:Transmit data buffer full
|
||||
* @arg UART_FLAG_RXAVL:RX Buffer has a byte flag
|
||||
* @arg UART_FLAG_OVER:OverRun Error flag
|
||||
* @arg UART_FLAG_OVER:OverRun Error flag
|
||||
* @arg UART_FLAG_TXEPT: tx and shifter are emptys flag
|
||||
* @retval : None
|
||||
*/
|
||||
void UART_ClearFlag(UART_TypeDef* UARTx, uint16_t UART_FLAG)
|
||||
{
|
||||
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Checks whether the specified UART interrupt has occurred or not.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* This parameter can be one of the following values:
|
||||
* UART1, UART2, UART3.
|
||||
* @param UART_IT: specifies the UART interrupt source to check.
|
||||
|
@ -375,7 +375,7 @@ void UART_ClearFlag(UART_TypeDef* UARTx, uint16_t UART_FLAG)
|
|||
* @arg UART_IT_PE: Parity Error interrupt
|
||||
* @arg UART_OVER_ERR: overrun Error interrupt
|
||||
* @arg UART_TIMEOUT_ERR: timeout Error interrupt
|
||||
* @arg UART_IT_RXIEN: Receive Data register interrupt
|
||||
* @arg UART_IT_RXIEN: Receive Data register interrupt
|
||||
* @arg UART_IT_TXIEN: Tansmit Data Register empty interrupt
|
||||
* @retval : The new state of UART_IT (SET or RESET).
|
||||
*/
|
||||
|
@ -385,7 +385,7 @@ ITStatus UART_GetITStatus(UART_TypeDef* UARTx, uint16_t UART_IT)
|
|||
/* Check the parameters */
|
||||
assert_param(IS_UART_ALL_PERIPH(UARTx));
|
||||
assert_param(IS_UART_FLAG(UART_FLAG));
|
||||
assert_param(IS_UART_PERIPH_FLAG(UARTx, UART_FLAG)); /* The CTS flag is not available for UART4 and UART5 */
|
||||
assert_param(IS_UART_PERIPH_FLAG(UARTx, UART_FLAG)); /* The CTS flag is not available for UART4 and UART5 */
|
||||
if ((UARTx->ISR & UART_IT) != (uint16_t)RESET)
|
||||
{
|
||||
bitstatus = SET;
|
||||
|
@ -398,8 +398,8 @@ ITStatus UART_GetITStatus(UART_TypeDef* UARTx, uint16_t UART_IT)
|
|||
}
|
||||
|
||||
/**
|
||||
* @brief Clears the UARTx’s interrupt pending bits.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* @brief Clears the UARTx’s interrupt pending bits.
|
||||
* @param UARTx: Select the UART or the UART peripheral.
|
||||
* This parameter can be one of the following values:
|
||||
* UART1, UART2, UART3, UART4 or UART5.
|
||||
* @param UART_IT: specifies the interrupt pending bit to clear.
|
||||
|
@ -408,14 +408,14 @@ ITStatus UART_GetITStatus(UART_TypeDef* UARTx, uint16_t UART_IT)
|
|||
* @arg UART_IT_PE: Parity Error interrupt
|
||||
* @arg UART_OVER_ERR: overrun Error interrupt
|
||||
* @arg UART_TIMEOUT_ERR: timeout Error interrupt
|
||||
* @arg UART_IT_RXIEN: Receive Data register interrupt
|
||||
* @arg UART_IT_RXIEN: Receive Data register interrupt
|
||||
* @arg UART_IT_TXIEN: Tansmit Data Register empty interrupt
|
||||
|
||||
* @retval : None
|
||||
*/
|
||||
void UART_ClearITPendingBit(UART_TypeDef* UARTx, uint16_t UART_IT)
|
||||
{
|
||||
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_UART_ALL_PERIPH(UARTx));
|
||||
assert_param(IS_UART_CLEAR_IT(UART_IT));
|
||||
|
|
Loading…
Reference in New Issue