From be4e2395ff7ac58ed188fc31a93353d74ed6deb6 Mon Sep 17 00:00:00 2001 From: Karl Zhang Date: Thu, 2 Jan 2020 14:42:30 +0800 Subject: [PATCH] LPC55S69: Update the flash layout to fit RTT in NS RTT fits in NS flash when enabled TF-M for secure. Change-Id: Icfd796b7fbe8fba76f713f9d5a14bbdcb5dcd9d5 Signed-off-by: Karl Zhang --- .../LPC55S69_cm33_core0_flash_ns_mdk.scf | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/bsp/lpc55sxx/lpc55s69_nxp_evk/board/linker_scripts/LPC55S69_cm33_core0_flash_ns_mdk.scf b/bsp/lpc55sxx/lpc55s69_nxp_evk/board/linker_scripts/LPC55S69_cm33_core0_flash_ns_mdk.scf index bb14890505..e0ee619399 100644 --- a/bsp/lpc55sxx/lpc55s69_nxp_evk/board/linker_scripts/LPC55S69_cm33_core0_flash_ns_mdk.scf +++ b/bsp/lpc55sxx/lpc55s69_nxp_evk/board/linker_scripts/LPC55S69_cm33_core0_flash_ns_mdk.scf @@ -14,6 +14,7 @@ ** ** Copyright 2016 Freescale Semiconductor, Inc. ** Copyright 2016-2018 NXP +** Copyright 2019-2020 Arm Limited. All rights reserved. ** All rights reserved. ** ** SPDX-License-Identifier: BSD-3-Clause @@ -46,23 +47,23 @@ #define Heap_Size 0x1000 #endif -#define m_interrupts_start 0x00000000 +#define m_interrupts_start 0x00020000 #define m_interrupts_size 0x00000200 -#define m_text_start 0x00000200 -#define m_text_size 0x00071E00 +#define m_text_start 0x00020200 +#define m_text_size 0x00031000 #define m_core1_image_start 0x00072000 #define m_core1_image_size 0x00026000 #if (defined(__use_shmem__)) - #define m_data_start 0x20000000 - #define m_data_size 0x00031800 - #define m_rpmsg_sh_mem_start 0x20031800 - #define m_rpmsg_sh_mem_size 0x00001800 + #define m_data_start 0x20033000 + #define m_data_size 0x00010800 + #define m_rpmsg_sh_mem_start 0x20043800 + #define m_rpmsg_sh_mem_size 0x00000800 #else - #define m_data_start 0x20000000 - #define m_data_size 0x00033000 + #define m_data_start 0x20033000 + #define m_data_size 0x0000cc00 #endif #define m_usb_sram_start 0x40100000