[BSP] fix the compiling issue for qemu-riscv64
This commit is contained in:
parent
557821fd3d
commit
be2dec978d
|
@ -67,10 +67,3 @@ void rt_hw_cpu_reset(void)
|
||||||
while(1);
|
while(1);
|
||||||
}
|
}
|
||||||
MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset machine);
|
MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset machine);
|
||||||
|
|
||||||
int rt_sbi_init(void)
|
|
||||||
{
|
|
||||||
sbi_init();
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
INIT_PREV_EXPORT(rt_sbi_init);
|
|
||||||
|
|
|
@ -36,7 +36,7 @@ int tick_isr(void)
|
||||||
#ifdef RISCV_S_MODE
|
#ifdef RISCV_S_MODE
|
||||||
sbi_set_timer(get_ticks() + tick_cycles);
|
sbi_set_timer(get_ticks() + tick_cycles);
|
||||||
#else
|
#else
|
||||||
*(uint64_t*)CLINT_MTIMECMP(r_mhartid()) = *(uint64_t*)CLINT_MTIME + tick_cycles;
|
*(uint64_t*)CLINT_MTIMECMP(__raw_hartid()) = *(uint64_t*)CLINT_MTIME + tick_cycles;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -62,7 +62,7 @@ int rt_hw_tick_init(void)
|
||||||
#else
|
#else
|
||||||
clear_csr(mie, MIP_MTIP);
|
clear_csr(mie, MIP_MTIP);
|
||||||
clear_csr(mip, MIP_MTIP);
|
clear_csr(mip, MIP_MTIP);
|
||||||
*(uint64_t*)CLINT_MTIMECMP(r_mhartid()) = *(uint64_t*)CLINT_MTIME + interval;
|
*(uint64_t*)CLINT_MTIMECMP(__raw_hartid()) = *(uint64_t*)CLINT_MTIME + interval;
|
||||||
set_csr(mie, MIP_MTIP);
|
set_csr(mie, MIP_MTIP);
|
||||||
#endif
|
#endif
|
||||||
return 0;
|
return 0;
|
||||||
|
|
Loading…
Reference in New Issue