Merge pull request #1839 from jg1uaa/master
uint8_t/uint16_t -> rt_uint8_t/rt_uint16_t
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commit
bc42d5baaa
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@ -296,7 +296,7 @@ void SPI_DMA(SPI_T *spi, bool txEn, bool rxEn)
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* @brief
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*/
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__SPI_STATIC_INLINE__
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void SPI_SetTxFifoThreshold(SPI_T *spi, uint8_t threshold)
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void SPI_SetTxFifoThreshold(SPI_T *spi, rt_uint8_t threshold)
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{
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HAL_MODIFY_REG(spi->FCTL, SPI_FCTL_TX_TRIG_LEVEL_MASK, threshold << SPI_FCTL_TX_TRIG_LEVEL_SHIFT);
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}
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@ -305,7 +305,7 @@ void SPI_SetTxFifoThreshold(SPI_T *spi, uint8_t threshold)
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* @brief
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*/
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__SPI_STATIC_INLINE__
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void SPI_SetRxFifoThreshold(SPI_T *spi, uint8_t threshold)
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void SPI_SetRxFifoThreshold(SPI_T *spi, rt_uint8_t threshold)
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{
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HAL_MODIFY_REG(spi->FCTL, SPI_FCTL_RX_TRIG_LEVEL_MASK, threshold << SPI_FCTL_RX_TRIG_LEVEL_SHIFT);
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}
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@ -314,18 +314,18 @@ void SPI_SetRxFifoThreshold(SPI_T *spi, uint8_t threshold)
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* @brief
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*/
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__SPI_STATIC_INLINE__
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uint8_t SPI_GetTxFifoCounter(SPI_T *spi)
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rt_uint8_t SPI_GetTxFifoCounter(SPI_T *spi)
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{
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return (uint8_t)((spi->FST & SPI_FST_TF_CNT_MASK) >> SPI_FST_TF_CNT_SHIFT);
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return (rt_uint8_t)((spi->FST & SPI_FST_TF_CNT_MASK) >> SPI_FST_TF_CNT_SHIFT);
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}
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/*
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* @brief
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*/
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__SPI_STATIC_INLINE__
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uint8_t SPI_GetRxFifoCounter(SPI_T *spi)
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rt_uint8_t SPI_GetRxFifoCounter(SPI_T *spi)
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{
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return (uint8_t)((spi->FST & SPI_FST_RF_CNT_MASK) >> SPI_FST_RF_CNT_SHIFT);
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return (rt_uint8_t)((spi->FST & SPI_FST_RF_CNT_MASK) >> SPI_FST_RF_CNT_SHIFT);
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}
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/*
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@ -350,7 +350,7 @@ void SPI_DisableDualMode(SPI_T *spi)
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* @brief
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*/
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__SPI_STATIC_INLINE__
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void SPI_SetInterval(SPI_T *spi, uint16_t nSCLK)
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void SPI_SetInterval(SPI_T *spi, rt_uint16_t nSCLK)
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{
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HAL_MODIFY_REG(spi->WAIT, SPI_WAIT_WCC_MASK, nSCLK << SPI_WAIT_WCC_SHIFT);
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}
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@ -358,9 +358,9 @@ void SPI_SetInterval(SPI_T *spi, uint16_t nSCLK)
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/*
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* @brief
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*/
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static void SPI_SetClkDiv(SPI_T *spi, uint16_t div)
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static void SPI_SetClkDiv(SPI_T *spi, rt_uint16_t div)
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{
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uint8_t n = 0;
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rt_uint8_t n = 0;
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if (div < 1)
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{
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return;
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@ -401,7 +401,7 @@ void SPI_SetDataSize(SPI_T *spi, rt_uint32_t data_size, rt_uint32_t dummy_size)
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* @brief
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*/
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__SPI_STATIC_INLINE__
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void SPI_Write(SPI_T *spi, uint8_t *data)
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void SPI_Write(SPI_T *spi, rt_uint8_t *data)
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{
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HAL_REG_8BIT(&spi->TXD) = *data;
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}
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@ -410,7 +410,7 @@ void SPI_Write(SPI_T *spi, uint8_t *data)
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* @brief
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*/
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__SPI_STATIC_INLINE__
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void SPI_Read(SPI_T *spi, uint8_t *data)
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void SPI_Read(SPI_T *spi, rt_uint8_t *data)
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{
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*data = HAL_REG_8BIT(&spi->RXD);
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}
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@ -419,18 +419,18 @@ void SPI_Read(SPI_T *spi, uint8_t *data)
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* @brief
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*/
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__SPI_STATIC_INLINE__
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uint8_t *SPI_TxAddress(SPI_T *spi)
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rt_uint8_t *SPI_TxAddress(SPI_T *spi)
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{
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return (uint8_t *)&spi->TXD;
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return (rt_uint8_t *)&spi->TXD;
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}
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/*
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* @brief
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*/
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__SPI_STATIC_INLINE__
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uint8_t *SPI_RxAddress(SPI_T *spi)
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rt_uint8_t *SPI_RxAddress(SPI_T *spi)
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{
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return (uint8_t *)&spi->RXD;
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return (rt_uint8_t *)&spi->RXD;
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}
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/* private rt-thread spi ops function */
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@ -586,8 +586,8 @@ static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message *mes
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while (tx_size > 0 || rx_size > 0)
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{
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uint8_t tx_data = 0xFF;
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uint8_t rx_data = 0xFF;
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rt_uint8_t tx_data = 0xFF;
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rt_uint8_t rx_data = 0xFF;
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while ((SPI_GetTxFifoCounter(spi) < SPI_FIFO_SIZE) && (tx_size > 0))
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{
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