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[BSP] TM4C129X: fix the bug that components_init do not work in IAR project 

1. modify each dirver's INIT_EXPORT micro.
2. modify the lwip parameters' in rtconfig.h
3. insert keep section .rti_fn* in IAR link file
4. change part id from TM4C129XNCZAD to TM4C1294NCPDT
This commit is contained in:
ArdaFu 2014-07-31 14:11:26 +08:00
parent baf608f156
commit bc2a890ab0
10 changed files with 49 additions and 50 deletions
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11
bsp/tm4c129x/applications/application.c
View File

@ -13,23 +13,13 @@
*/
#include <rtthread.h>
#include <board.h>
#include <components.h>
#ifdef RT_USING_LWIP
#include "drv_eth.h"
#endif
/* thread phase init */
void rt_init_thread_entry(void *parameter)
{
/* Initialization RT-Thread Components */
rt_components_init();
#ifdef RT_USING_FINSH
finsh_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef RT_USING_LWIP
rt_hw_tiva_eth_init();
#endif
}
int rt_application_init(void)
@ -42,3 +32,4 @@ int rt_application_init(void)
return 0;
}

28
bsp/tm4c129x/applications/board.c
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@ -15,9 +15,9 @@
#include <rthw.h>
#include <rtthread.h>
#include <components.h>
#include "board.h"
#include "drv_uart.h"
#include "driverlib/interrupt.h"
#include "driverlib/sysctl.h"
@ -60,24 +60,28 @@ extern void HardFault_Handler(void);
* This function will initial LPC40xx board.
*/
void rt_hw_board_init()
{
//init low level drivers. e.g. cpu uart etc.
rt_components_board_init();
//redirect RTT stdio to CONSOLE device
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
}
int rt_hw_cpu_init(void)
{
MAP_IntMasterDisable();
IntRegister(FAULT_HARD, HardFault_Handler);
IntRegister(FAULT_PENDSV, PendSV_Handler);
IntRegister(FAULT_SYSTICK, SysTick_Handler);
//
// Enable lazy stacking for interrupt handlers. This allows floating-point
// instructions to be used within interrupt handlers, but at the expense of
// extra stack usage.
//
MAP_FPULazyStackingEnable();
//
// Set the clocking to run directly from the external crystal/oscillator.
// TODO: The SYSCTL_XTAL_ value must be changed to match the value of the
// crystal on your board.
//
SysClock = MAP_SysCtlClockFreqSet(
(SYSCTL_XTAL_25MHZ | SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | SYSCTL_CFG_VCO_480),
SYS_CLOCK_DEFAULT);
@ -90,12 +94,10 @@ void rt_hw_board_init()
/* set pend exception priority */
//IntPrioritySet(FAULT_PENDSV, (1 << 5) - 1);
/*init uart device*/
rt_hw_uart_init();
//redirect RTT stdio to CONSOLE device
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
//
// Enable interrupts to the processor.
//
/*Enable interrupts to the processor.*/
MAP_IntMasterEnable();
return 0;
}
// rt_hw_cpu_init should be run before any other INIT_BOARD_EXPORT
// We use INIT_EXPORT here and set the sequence index to "0.xxxx"
INIT_EXPORT(rt_hw_cpu_init, "0.post");

9
bsp/tm4c129x/drivers/drv_eth.c
View File

@ -146,6 +146,8 @@ extern void lwIPHostGetTime(u32_t *time_s, u32_t *time_ns);
#include "lwipopts.h"
#include "drv_eth.h"
#include <components.h>
/**
* A structure used to keep track of driver state and error counts.
*/
@ -1378,7 +1380,7 @@ static struct pbuf* eth_dev_rx(rt_device_t dev)
return (result == RT_EOK)? (struct pbuf*)temp : RT_NULL;
}
rt_err_t rt_hw_tiva_eth_init(void)
int rt_hw_tiva_eth_init(void)
{
rt_err_t result;
@ -1406,6 +1408,11 @@ rt_err_t rt_hw_tiva_eth_init(void)
result = eth_device_init(&(eth_dev->parent), "e0");
return result;
}
// eth_device_init using malloc
// We use INIT_COMPONENT_EXPORT insted of INIT_BOARD_EXPORT
INIT_COMPONENT_EXPORT(rt_hw_tiva_eth_init);
#if 0
#ifdef RT_USING_FINSH
#include "finsh.h"

2
bsp/tm4c129x/drivers/drv_eth.h
View File

@ -15,6 +15,6 @@
#ifndef __TIVA_ETH_H__
#define __TIVA_ETH_H__
rt_err_t rt_hw_tiva_eth_init(void);
int rt_hw_tiva_eth_init(void);
#endif

4
bsp/tm4c129x/drivers/drv_uart.c
View File

@ -18,7 +18,7 @@
#include <rtdevice.h>
#include "board.h"
//#include <components.h>
#include <components.h>
#include "inc/hw_memmap.h"
#include "driverlib/sysctl.h"
@ -220,4 +220,4 @@ int rt_hw_uart_init(void)
#endif
return 0;
}
//INIT_BOARD_EXPORT(rt_hw_uart_init);
INIT_BOARD_EXPORT(rt_hw_uart_init);

2
bsp/tm4c129x/libraries/SConscript
View File

@ -14,8 +14,6 @@ elif rtconfig.CROSS_TOOL == 'keil':
src += ['startup/startup_rvmdk.S']
elif rtconfig.CROSS_TOOL == 'iar':
src += ['startup/startup_ewarm.c']
elif rtconfig.CROSS_TOOL == 'ccs':
src += ['startup/startup_ccs.c']
CPPPATH = [cwd, cwd + '/inc', cwd + '/driverlib']

12
bsp/tm4c129x/rtconfig.h
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@ -180,19 +180,19 @@
// <bool name="RT_LWIP_DNS" description="Enable DNS protocol" default="true" />
#define RT_LWIP_DNS
// <integer name="RT_LWIP_PBUF_NUM" description="Maximal number of buffers in the pbuf pool" default="4" />
#define RT_LWIP_PBUF_NUM 4
#define RT_LWIP_PBUF_NUM 8
// <integer name="RT_LWIP_TCP_PCB_NUM" description="Maximal number of simultaneously active TCP connections" default="5" />
#define RT_LWIP_TCP_PCB_NUM 3
#define RT_LWIP_TCP_PCB_NUM 5
// <integer name="RT_LWIP_TCP_SND_BUF" description="TCP sender buffer size" default="8192" />
#define RT_LWIP_TCP_SND_BUF 4086
#define RT_LWIP_TCP_SND_BUF 8192
// <integer name="RT_LWIP_TCP_WND" description="TCP receive window" default="8192" />
#define RT_LWIP_TCP_WND 2048
#define RT_LWIP_TCP_WND 8192
// <bool name="RT_LWIP_SNMP" description="Enable SNMP protocol" default="false" />
// #define RT_LWIP_SNMP
// <bool name="RT_LWIP_DHCP" description="Enable DHCP client to get IP address" default="false" />
// #define RT_LWIP_DHCP
#define RT_LWIP_DHCP
// <integer name="RT_LWIP_TCP_SEG_NUM" description="the number of simultaneously queued TCP" default="4" />
#define RT_LWIP_TCP_SEG_NUM 12
#define RT_LWIP_TCP_SEG_NUM 24
// <integer name="RT_LWIP_TCPTHREAD_PRIORITY" description="the thread priority of TCP thread" default="128" />
#define RT_LWIP_TCPTHREAD_PRIORITY 12
// <integer name="RT_LWIP_TCPTHREAD_MBOX_SIZE" description="the mail box size of TCP thread to wait for" default="32" />

4
bsp/tm4c129x/rtconfig.py
View File

@ -29,8 +29,8 @@ elif CROSS_TOOL == 'iar':
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
BUILD = 'debug'
#BUILD = 'release'
#BUILD = 'debug'
BUILD = 'release'
if PLATFORM == 'gcc':
# tool-chains

18
bsp/tm4c129x/template.uvproj
View File

@ -12,26 +12,26 @@
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<TargetCommonOption>
<Device>TM4C129XNCZAD</Device>
<Device>TM4C1294NCPDT</Device>
<Vendor>Texas Instruments</Vendor>
<PackID>Keil.TM4C_DFP.1.0.0</PackID>
<PackURL>http://www.keil.com/pack/</PackURL>
<Cpu>IROM(0x00000000,0x100000) IRAM(0x20000000,0x040000) CPUTYPE("Cortex-M4") FPU2 CLOCK(120000000) ELITTLE</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0TM4C129_1024 -FS00 -FL0100000 -FP0($$Device:TM4C129XNCZAD$Flash\TM4C129_1024.FLM))</FlashDriverDll>
<DeviceId>7096</DeviceId>
<RegisterFile>$$Device:TM4C129XNCZAD$Device\Include\TM4C129\TM4C129.h</RegisterFile>
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0TM4C129_1024 -FS00 -FL0100000 -FP0($$Device:TM4C1294NCPDT$Flash\TM4C129_1024.FLM))</FlashDriverDll>
<DeviceId>7088</DeviceId>
<RegisterFile>$$Device:TM4C1294NCPDT$Device\Include\TM4C129\TM4C129.h</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc>-DTM4C129XNCZAD</SLE66CMisc>
<SLE66CMisc>-DTM4C1294NCPDT</SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>$$Device:TM4C129XNCZAD$SVD\TM4C129\TM4C129XNCZAD.svd</SFDFile>
<SFDFile>$$Device:TM4C1294NCPDT$SVD\TM4C129\TM4C1294NCPDT.svd</SFDFile>
<bCustSvd>0</bCustSvd>
<UseEnv>0</UseEnv>
<BinPath></BinPath>
@ -52,7 +52,7 @@
<CreateLib>0</CreateLib>
<CreateHexFile>0</CreateHexFile>
<DebugInformation>1</DebugInformation>
<BrowseInformation>0</BrowseInformation>
<BrowseInformation>1</BrowseInformation>
<ListingPath>.\</ListingPath>
<HexFormatSelection>1</HexFormatSelection>
<Merge32K>0</Merge32K>
@ -148,7 +148,7 @@
<UsePdscDebugDescription>1</UsePdscDebugDescription>
</Target>
<RunDebugAfterBuild>0</RunDebugAfterBuild>
<TargetSelection>3</TargetSelection>
<TargetSelection>6</TargetSelection>
<SimDlls>
<CpuDll></CpuDll>
<CpuDllArguments></CpuDllArguments>
@ -162,7 +162,7 @@
<PeripheralDll></PeripheralDll>
<PeripheralDllArguments></PeripheralDllArguments>
<InitializationFile></InitializationFile>
<Driver>BIN\lmidk-agdi.dll</Driver>
<Driver>Segger\JL2CM3.dll</Driver>
</TargetDlls>
</DebugOption>
<Utilities>

1
bsp/tm4c129x/tm4c_rom.icf
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@ -78,3 +78,4 @@ place at start of SRAM { section VTABLE };
place in SRAM { readwrite, block HEAP };
keep { section FSymTab };
keep { section VSymTab };
keep { section .rti_fn* };