完善RTC部分
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@415 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
wuyangyong
parent
6370ac5f79
commit
bb4f74cd12
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@ -18,57 +18,57 @@
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static struct rt_device rtc;
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static rt_err_t rt_rtc_open(rt_device_t dev, rt_uint16_t oflag)
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{
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if (dev->rx_indicate != RT_NULL)
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{
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/* Open Interrupt */
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}
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if (dev->rx_indicate != RT_NULL)
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{
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/* Open Interrupt */
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}
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return RT_EOK;
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return RT_EOK;
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}
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static rt_size_t rt_rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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{
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return 0;
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return 0;
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}
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static rt_err_t rt_rtc_control(rt_device_t dev, rt_uint8_t cmd, void *args)
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{
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rt_time_t *time;
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RT_ASSERT(dev != RT_NULL);
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rt_time_t *time;
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RT_ASSERT(dev != RT_NULL);
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switch (cmd)
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{
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case RT_DEVICE_CTRL_RTC_GET_TIME:
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time = (rt_time_t *)args;
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/* read device */
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*time = RTC_GetCounter();
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break;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_RTC_GET_TIME:
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time = (rt_time_t *)args;
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/* read device */
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*time = RTC_GetCounter();
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break;
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case RT_DEVICE_CTRL_RTC_SET_TIME:
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{
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time = (rt_time_t *)args;
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case RT_DEVICE_CTRL_RTC_SET_TIME:
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{
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time = (rt_time_t *)args;
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/* Enable PWR and BKP clocks */
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
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/* Enable PWR and BKP clocks */
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
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/* Allow access to BKP Domain */
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PWR_BackupAccessCmd(ENABLE);
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/* Allow access to BKP Domain */
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PWR_BackupAccessCmd(ENABLE);
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/* Wait until last write operation on RTC registers has finished */
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RTC_WaitForLastTask();
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/* Wait until last write operation on RTC registers has finished */
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RTC_WaitForLastTask();
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/* Change the current time */
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RTC_SetCounter(*time);
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/* Change the current time */
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RTC_SetCounter(*time);
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/* Wait until last write operation on RTC registers has finished */
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RTC_WaitForLastTask();
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/* Wait until last write operation on RTC registers has finished */
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RTC_WaitForLastTask();
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BKP_WriteBackupRegister(BKP_DR1, 0xA5A5);
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}
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break;
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}
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BKP_WriteBackupRegister(BKP_DR1, 0xA5A5);
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}
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break;
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}
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return RT_EOK;
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return RT_EOK;
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}
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/*******************************************************************************
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@ -76,156 +76,166 @@ static rt_err_t rt_rtc_control(rt_device_t dev, rt_uint8_t cmd, void *args)
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* Description : Configures the RTC.
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* Input : None
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* Output : None
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* Return : None
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* Return : 0 reday,-1 error.
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*******************************************************************************/
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void RTC_Configuration(void)
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int RTC_Configuration(void)
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{
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/* Enable PWR and BKP clocks */
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
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u32 count=0x200000;
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/* Allow access to BKP Domain */
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PWR_BackupAccessCmd(ENABLE);
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/* Enable PWR and BKP clocks */
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
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/* Reset Backup Domain */
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BKP_DeInit();
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/* Allow access to BKP Domain */
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PWR_BackupAccessCmd(ENABLE);
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/* Enable LSE */
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RCC_LSEConfig(RCC_LSE_ON);
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/* Wait till LSE is ready */
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while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
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{
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}
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/* Reset Backup Domain */
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BKP_DeInit();
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/* Select LSE as RTC Clock Source */
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RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
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/* Enable LSE */
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RCC_LSEConfig(RCC_LSE_ON);
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/* Wait till LSE is ready */
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while ( (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) && (--count) );
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if ( count == 0 )
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{
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return -1;
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}
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/* Enable RTC Clock */
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RCC_RTCCLKCmd(ENABLE);
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/* Select LSE as RTC Clock Source */
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RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
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/* Wait for RTC registers synchronization */
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RTC_WaitForSynchro();
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/* Enable RTC Clock */
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RCC_RTCCLKCmd(ENABLE);
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/* Wait until last write operation on RTC registers has finished */
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RTC_WaitForLastTask();
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/* Wait for RTC registers synchronization */
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RTC_WaitForSynchro();
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/* Set RTC prescaler: set RTC period to 1sec */
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RTC_SetPrescaler(32767); /* RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) */
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/* Wait until last write operation on RTC registers has finished */
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RTC_WaitForLastTask();
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/* Wait until last write operation on RTC registers has finished */
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RTC_WaitForLastTask();
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/* Set RTC prescaler: set RTC period to 1sec */
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RTC_SetPrescaler(32767); /* RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) */
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/* Wait until last write operation on RTC registers has finished */
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RTC_WaitForLastTask();
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return 0;
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}
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void rt_hw_rtc_init(void)
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{
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rtc.type = RT_Device_Class_RTC;
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rtc.type = RT_Device_Class_RTC;
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if (BKP_ReadBackupRegister(BKP_DR1) != 0xA5A5)
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{
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rt_kprintf("rtc is not configured\n");
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rt_kprintf("please configure with set_date and set_time\n");
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RTC_Configuration();
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}
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else
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{
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/* Wait for RTC registers synchronization */
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RTC_WaitForSynchro();
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}
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if (BKP_ReadBackupRegister(BKP_DR1) != 0xA5A5)
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{
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rt_kprintf("rtc is not configured\n");
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rt_kprintf("please configure with set_date and set_time\n");
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if ( RTC_Configuration() != 0)
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{
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rt_kprintf("rtc configure fail...\r\n");
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return ;
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}
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}
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else
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{
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/* Wait for RTC registers synchronization */
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RTC_WaitForSynchro();
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}
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/* register rtc device */
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rtc.init = RT_NULL;
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rtc.open = rt_rtc_open;
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rtc.close = RT_NULL;
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rtc.read = rt_rtc_read;
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rtc.write = RT_NULL;
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rtc.control = rt_rtc_control;
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/* register rtc device */
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rtc.init = RT_NULL;
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rtc.open = rt_rtc_open;
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rtc.close = RT_NULL;
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rtc.read = rt_rtc_read;
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rtc.write = RT_NULL;
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rtc.control = rt_rtc_control;
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/* no private */
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rtc.private = RT_NULL;
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/* no private */
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rtc.private = RT_NULL;
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rt_device_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
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rt_device_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
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return;
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}
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#include <time.h>
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time_t time(time_t* t)
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{
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rt_device_t device;
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time_t time;
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device = rt_device_find("rtc");
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if (device != RT_NULL)
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{
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rt_device_control(device, RT_DEVICE_CTRL_RTC_GET_TIME, &time);
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if (t != RT_NULL) *t = time;
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}
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return time;
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return;
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}
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#ifdef RT_USING_FINSH
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#include <finsh.h>
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#include <time.h>
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time_t time(time_t* t)
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{
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rt_device_t device;
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time_t time;
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device = rt_device_find("rtc");
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if (device != RT_NULL)
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{
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rt_device_control(device, RT_DEVICE_CTRL_RTC_GET_TIME, &time);
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if (t != RT_NULL) *t = time;
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}
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return time;
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}
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void set_date(rt_uint32_t year, rt_uint32_t month, rt_uint32_t day)
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{
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time_t now;
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struct tm* ti;
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rt_device_t device;
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time_t now;
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struct tm* ti;
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rt_device_t device;
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ti = RT_NULL;
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/* get current time */
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time(&now);
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ti = RT_NULL;
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/* get current time */
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time(&now);
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ti = localtime(&now);
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if (ti != RT_NULL)
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{
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ti->tm_year = year - 1900;
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ti->tm_mon = month - 1; /* ti->tm_mon = month; */
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ti->tm_mday = day;
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}
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ti = localtime(&now);
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if (ti != RT_NULL)
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{
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ti->tm_year = year - 1900;
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ti->tm_mon = month - 1; /* ti->tm_mon = month; */
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ti->tm_mday = day;
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}
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now = mktime(ti);
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now = mktime(ti);
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device = rt_device_find("rtc");
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if (device != RT_NULL)
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{
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rt_rtc_control(device, RT_DEVICE_CTRL_RTC_SET_TIME, &now);
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}
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device = rt_device_find("rtc");
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if (device != RT_NULL)
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{
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rt_rtc_control(device, RT_DEVICE_CTRL_RTC_SET_TIME, &now);
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}
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}
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FINSH_FUNCTION_EXPORT(set_date, set date)
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FINSH_FUNCTION_EXPORT(set_date, set date. e.g: set_date(2010,2,28))
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void set_time(rt_uint32_t hour, rt_uint32_t minute, rt_uint32_t second)
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{
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time_t now;
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struct tm* ti;
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rt_device_t device;
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time_t now;
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struct tm* ti;
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rt_device_t device;
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ti = RT_NULL;
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/* get current time */
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time(&now);
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ti = RT_NULL;
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/* get current time */
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time(&now);
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ti = localtime(&now);
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if (ti != RT_NULL)
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{
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ti->tm_hour = hour;
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ti->tm_min = minute;
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ti->tm_sec = second;
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}
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ti = localtime(&now);
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if (ti != RT_NULL)
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{
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ti->tm_hour = hour;
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ti->tm_min = minute;
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ti->tm_sec = second;
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}
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now = mktime(ti);
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device = rt_device_find("rtc");
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if (device != RT_NULL)
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{
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rt_rtc_control(device, RT_DEVICE_CTRL_RTC_SET_TIME, &now);
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}
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now = mktime(ti);
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device = rt_device_find("rtc");
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if (device != RT_NULL)
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{
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rt_rtc_control(device, RT_DEVICE_CTRL_RTC_SET_TIME, &now);
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}
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}
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FINSH_FUNCTION_EXPORT(set_time, set time)
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FINSH_FUNCTION_EXPORT(set_time, set time. e.g: set_time(23,59,59))
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void list_date()
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{
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time_t now;
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time_t now;
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time(&now);
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rt_kprintf("%s\n", ctime(&now));
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time(&now);
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rt_kprintf("%s\n", ctime(&now));
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}
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FINSH_FUNCTION_EXPORT(list_date, list date)
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FINSH_FUNCTION_EXPORT(list_date, show date and time.)
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#endif
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@ -24,6 +24,7 @@
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#include "board.h"
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#include "netbuffer.h"
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#include "lcd.h"
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#include "rtc.h"
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#ifdef RT_USING_DFS
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/* dfs init */
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@ -78,28 +79,28 @@ void rt_init_thread_entry(void *parameter)
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}
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#endif
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/* RTGUI Initialization */
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/* RTGUI Initialization */
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#ifdef RT_USING_RTGUI
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{
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extern void rt_hw_key_init(void);
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{
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extern void rt_hw_key_init(void);
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radio_rtgui_init();
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rt_hw_key_init();
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}
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radio_rtgui_init();
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rt_hw_key_init();
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}
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#endif
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/* LwIP Initialization */
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#ifdef RT_USING_LWIP
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{
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extern void lwip_sys_init(void);
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extern void rt_hw_dm9000_init(void);
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extern void rt_hw_dm9000_init(void);
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eth_system_device_init();
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eth_system_device_init();
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/* register ethernetif device */
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rt_hw_dm9000_init();
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/* init all device */
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rt_device_init_all();
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/* register ethernetif device */
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rt_hw_dm9000_init();
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/* init all device */
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rt_device_init_all();
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/* init lwip system */
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lwip_sys_init();
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@ -108,16 +109,19 @@ void rt_init_thread_entry(void *parameter)
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#endif
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#if STM32_EXT_SRAM
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/* init netbuf worker */
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net_buf_init(320 * 1024);
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/* init netbuf worker */
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net_buf_init(320 * 1024);
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#endif
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/* start RTC */
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rt_hw_rtc_init();
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}
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int rt_application_init()
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{
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rt_thread_t init_thread;
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rt_hw_lcd_init();
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rt_hw_lcd_init();
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#if (RT_THREAD_PRIORITY_MAX == 32)
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init_thread = rt_thread_create("init",
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@ -26,58 +26,6 @@ static void rt_hw_console_init(void);
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/*@{*/
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/*******************************************************************************
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* Function Name : RCC_Configuration
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* Description : Configures the different system clocks.
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* Input : None
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* Output : None
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* Return : None
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*******************************************************************************/
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void RCC_Configuration(void)
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{
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ErrorStatus HSEStartUpStatus;
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/* RCC system reset(for debug purpose) */
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RCC_DeInit();
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/* Enable HSE */
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RCC_HSEConfig(RCC_HSE_ON);
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/* Wait till HSE is ready */
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HSEStartUpStatus = RCC_WaitForHSEStartUp();
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if (HSEStartUpStatus == SUCCESS)
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{
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/* HCLK = SYSCLK */
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RCC_HCLKConfig(RCC_SYSCLK_Div1);
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/* PCLK2 = HCLK */
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RCC_PCLK2Config(RCC_HCLK_Div1);
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/* PCLK1 = HCLK/2 */
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RCC_PCLK1Config(RCC_HCLK_Div2);
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/* Flash 2 wait state */
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FLASH_SetLatency(FLASH_Latency_2);
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/* Enable Prefetch Buffer */
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FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
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/* PLLCLK = 8MHz * 9 = 72 MHz */
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RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
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/* Enable PLL */
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RCC_PLLCmd(ENABLE);
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/* Wait till PLL is ready */
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while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) ;
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/* Select PLL as system clock source */
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RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
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/* Wait till PLL is used as system clock source */
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while (RCC_GetSYSCLKSource() != 0x08) ;
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}
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}
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/*******************************************************************************
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* Function Name : NVIC_Configuration
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* Description : Configures Vector Table base location.
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@ -103,26 +51,6 @@ void NVIC_Configuration(void)
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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}
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/*******************************************************************************
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* Function Name : SysTick_Configuration
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* Description : Configures the SysTick for OS tick.
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* Input : None
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* Output : None
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* Return : None
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*******************************************************************************/
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void SysTick_Configuration(void)
|
||||
{
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
rt_uint32_t cnts;
|
||||
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
|
||||
cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
|
||||
|
||||
SysTick_Config(cnts);
|
||||
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
|
||||
}
|
||||
|
||||
extern void rt_hw_interrupt_thread_switch(void);
|
||||
/**
|
||||
* This is the timer interrupt service routine.
|
||||
|
|
@ -151,7 +79,7 @@ void rt_hw_board_init()
|
|||
NAND_IDTypeDef NAND_ID;
|
||||
|
||||
/* Configure the system clocks */
|
||||
RCC_Configuration();
|
||||
SystemInit();
|
||||
|
||||
/* DM9000A */
|
||||
{
|
||||
|
|
@ -170,17 +98,18 @@ void rt_hw_board_init()
|
|||
NVIC_Configuration();
|
||||
|
||||
/* Configure the SysTick */
|
||||
SysTick_Configuration();
|
||||
SysTick_Config( SystemFrequency_SysClk / RT_TICK_PER_SECOND );
|
||||
|
||||
/* Console Initialization*/
|
||||
rt_hw_console_init();
|
||||
rt_kprintf("\r\n\r\nSystemInit......\r\n");
|
||||
|
||||
/* FSMC Initialization */
|
||||
FSMC_NAND_Init();
|
||||
|
||||
/* NAND read ID command */
|
||||
FSMC_NAND_ReadID(&NAND_ID);
|
||||
rt_kprintf("\r\n\r\nRead the NAND ID:%02X%02X%02X%02X",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);
|
||||
rt_kprintf("Read the NAND ID:%02X%02X%02X%02X",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);
|
||||
|
||||
/* SRAM init */
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
|
||||
|
|
|
|||
|
|
@ -209,8 +209,6 @@ File 11,1,<..\..\rtgui\server\topwin.c><topwin.c>
|
|||
File 11,1,<..\..\rtgui\common\font_hz_file.c><font_hz_file.c>
|
||||
File 11,1,<..\..\rtgui\common\hz16font.c><hz16font.c>
|
||||
File 11,1,<..\..\rtgui\common\hz12font.c><hz12font.c>
|
||||
File 11,1,<..\..\rtgui\common\arial16font.c><arial16font.c>
|
||||
File 11,1,<..\..\rtgui\common\arial12font.c><arial12font.c>
|
||||
File 12,1,<.\Libraries\Mass_Storage\src\hw_config.c><hw_config.c>
|
||||
File 12,1,<.\Libraries\Mass_Storage\src\mass_mal.c><mass_mal.c>
|
||||
File 12,1,<.\Libraries\Mass_Storage\src\memory.c><memory.c>
|
||||
|
|
|
|||
|
|
@ -1,60 +1,60 @@
|
|||
#include <rtthread.h>
|
||||
#include "stm32f10x.h"
|
||||
|
||||
#include <stm32f10x.h>
|
||||
|
||||
static struct rt_device rtc;
|
||||
static rt_err_t rt_rtc_open(rt_device_t dev, rt_uint16_t oflag)
|
||||
{
|
||||
if (dev->rx_indicate != RT_NULL)
|
||||
{
|
||||
/* Open Interrupt */
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
if (dev->rx_indicate != RT_NULL)
|
||||
{
|
||||
/* Open Interrupt */
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_size_t rt_rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
|
||||
{
|
||||
return 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static rt_err_t rt_rtc_control(rt_device_t dev, rt_uint8_t cmd, void *args)
|
||||
{
|
||||
rt_time_t *time;
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
rt_time_t *time;
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_RTC_GET_TIME:
|
||||
time = (rt_time_t *)args;
|
||||
/* read device */
|
||||
*time = RTC_GetCounter();
|
||||
break;
|
||||
|
||||
case RT_DEVICE_CTRL_RTC_SET_TIME:
|
||||
{
|
||||
time = (rt_time_t *)args;
|
||||
|
||||
/* Enable PWR and BKP clocks */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
|
||||
|
||||
/* Allow access to BKP Domain */
|
||||
PWR_BackupAccessCmd(ENABLE);
|
||||
switch (cmd)
|
||||
{
|
||||
case RT_DEVICE_CTRL_RTC_GET_TIME:
|
||||
time = (rt_time_t *)args;
|
||||
/* read device */
|
||||
*time = RTC_GetCounter();
|
||||
break;
|
||||
|
||||
/* Wait until last write operation on RTC registers has finished */
|
||||
RTC_WaitForLastTask();
|
||||
case RT_DEVICE_CTRL_RTC_SET_TIME:
|
||||
{
|
||||
time = (rt_time_t *)args;
|
||||
|
||||
/* Change the current time */
|
||||
RTC_SetCounter(*time);
|
||||
|
||||
/* Wait until last write operation on RTC registers has finished */
|
||||
RTC_WaitForLastTask();
|
||||
/* Enable PWR and BKP clocks */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
|
||||
|
||||
BKP_WriteBackupRegister(BKP_DR1, 0xA5A5);
|
||||
}
|
||||
break;
|
||||
}
|
||||
/* Allow access to BKP Domain */
|
||||
PWR_BackupAccessCmd(ENABLE);
|
||||
|
||||
return RT_EOK;
|
||||
/* Wait until last write operation on RTC registers has finished */
|
||||
RTC_WaitForLastTask();
|
||||
|
||||
/* Change the current time */
|
||||
RTC_SetCounter(*time);
|
||||
|
||||
/* Wait until last write operation on RTC registers has finished */
|
||||
RTC_WaitForLastTask();
|
||||
|
||||
BKP_WriteBackupRegister(BKP_DR1, 0xA5A5);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
/*******************************************************************************
|
||||
|
|
@ -62,75 +62,85 @@ static rt_err_t rt_rtc_control(rt_device_t dev, rt_uint8_t cmd, void *args)
|
|||
* Description : Configures the RTC.
|
||||
* Input : None
|
||||
* Output : None
|
||||
* Return : None
|
||||
* Return : 0 reday,-1 error.
|
||||
*******************************************************************************/
|
||||
void RTC_Configuration(void)
|
||||
int RTC_Configuration(void)
|
||||
{
|
||||
/* Enable PWR and BKP clocks */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
|
||||
u32 count=0x200000;
|
||||
|
||||
/* Allow access to BKP Domain */
|
||||
PWR_BackupAccessCmd(ENABLE);
|
||||
/* Enable PWR and BKP clocks */
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
|
||||
|
||||
/* Reset Backup Domain */
|
||||
BKP_DeInit();
|
||||
/* Allow access to BKP Domain */
|
||||
PWR_BackupAccessCmd(ENABLE);
|
||||
|
||||
/* Enable LSE */
|
||||
RCC_LSEConfig(RCC_LSE_ON);
|
||||
/* Wait till LSE is ready */
|
||||
while (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
|
||||
{
|
||||
}
|
||||
/* Reset Backup Domain */
|
||||
BKP_DeInit();
|
||||
|
||||
/* Select LSE as RTC Clock Source */
|
||||
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
|
||||
/* Enable LSE */
|
||||
RCC_LSEConfig(RCC_LSE_ON);
|
||||
/* Wait till LSE is ready */
|
||||
while ( (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) && (--count) );
|
||||
if ( count == 0 )
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* Enable RTC Clock */
|
||||
RCC_RTCCLKCmd(ENABLE);
|
||||
/* Select LSE as RTC Clock Source */
|
||||
RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
|
||||
|
||||
/* Wait for RTC registers synchronization */
|
||||
RTC_WaitForSynchro();
|
||||
/* Enable RTC Clock */
|
||||
RCC_RTCCLKCmd(ENABLE);
|
||||
|
||||
/* Wait until last write operation on RTC registers has finished */
|
||||
RTC_WaitForLastTask();
|
||||
/* Wait for RTC registers synchronization */
|
||||
RTC_WaitForSynchro();
|
||||
|
||||
/* Set RTC prescaler: set RTC period to 1sec */
|
||||
RTC_SetPrescaler(32767); /* RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) */
|
||||
/* Wait until last write operation on RTC registers has finished */
|
||||
RTC_WaitForLastTask();
|
||||
|
||||
/* Wait until last write operation on RTC registers has finished */
|
||||
RTC_WaitForLastTask();
|
||||
/* Set RTC prescaler: set RTC period to 1sec */
|
||||
RTC_SetPrescaler(32767); /* RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) */
|
||||
|
||||
/* Wait until last write operation on RTC registers has finished */
|
||||
RTC_WaitForLastTask();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void rt_hw_rtc_init(void)
|
||||
{
|
||||
rtc.type = RT_Device_Class_RTC;
|
||||
rtc.type = RT_Device_Class_RTC;
|
||||
|
||||
if (BKP_ReadBackupRegister(BKP_DR1) != 0xA5A5)
|
||||
{
|
||||
rt_kprintf("rtc is not configured\n");
|
||||
rt_kprintf("please configure with set_date and set_time\n");
|
||||
RTC_Configuration();
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Wait for RTC registers synchronization */
|
||||
RTC_WaitForSynchro();
|
||||
}
|
||||
if (BKP_ReadBackupRegister(BKP_DR1) != 0xA5A5)
|
||||
{
|
||||
rt_kprintf("rtc is not configured\n");
|
||||
rt_kprintf("please configure with set_date and set_time\n");
|
||||
if ( RTC_Configuration() != 0)
|
||||
{
|
||||
rt_kprintf("rtc configure fail...\r\n");
|
||||
return ;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Wait for RTC registers synchronization */
|
||||
RTC_WaitForSynchro();
|
||||
}
|
||||
|
||||
/* register rtc device */
|
||||
rtc.init = RT_NULL;
|
||||
rtc.open = rt_rtc_open;
|
||||
rtc.close = RT_NULL;
|
||||
rtc.read = rt_rtc_read;
|
||||
rtc.write = RT_NULL;
|
||||
rtc.control = rt_rtc_control;
|
||||
|
||||
/* no private */
|
||||
rtc.private = RT_NULL;
|
||||
|
||||
rt_device_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
|
||||
/* register rtc device */
|
||||
rtc.init = RT_NULL;
|
||||
rtc.open = rt_rtc_open;
|
||||
rtc.close = RT_NULL;
|
||||
rtc.read = rt_rtc_read;
|
||||
rtc.write = RT_NULL;
|
||||
rtc.control = rt_rtc_control;
|
||||
|
||||
return;
|
||||
/* no private */
|
||||
rtc.private = RT_NULL;
|
||||
|
||||
rt_device_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
#ifdef RT_USING_FINSH
|
||||
|
|
@ -138,80 +148,80 @@ void rt_hw_rtc_init(void)
|
|||
#include <time.h>
|
||||
time_t time(time_t* t)
|
||||
{
|
||||
rt_device_t device;
|
||||
time_t time;
|
||||
|
||||
device = rt_device_find("rtc");
|
||||
if (device != RT_NULL)
|
||||
{
|
||||
rt_device_control(device, RT_DEVICE_CTRL_RTC_GET_TIME, &time);
|
||||
if (t != RT_NULL) *t = time;
|
||||
}
|
||||
|
||||
return time;
|
||||
rt_device_t device;
|
||||
time_t time;
|
||||
|
||||
device = rt_device_find("rtc");
|
||||
if (device != RT_NULL)
|
||||
{
|
||||
rt_device_control(device, RT_DEVICE_CTRL_RTC_GET_TIME, &time);
|
||||
if (t != RT_NULL) *t = time;
|
||||
}
|
||||
|
||||
return time;
|
||||
}
|
||||
|
||||
void set_date(rt_uint32_t year, rt_uint32_t month, rt_uint32_t day)
|
||||
{
|
||||
time_t now;
|
||||
struct tm* ti;
|
||||
rt_device_t device;
|
||||
|
||||
ti = RT_NULL;
|
||||
/* get current time */
|
||||
time(&now);
|
||||
|
||||
ti = localtime(&now);
|
||||
if (ti != RT_NULL)
|
||||
{
|
||||
ti->tm_year = year - 1900;
|
||||
ti->tm_mon = month;
|
||||
ti->tm_mday = day;
|
||||
}
|
||||
|
||||
now = mktime(ti);
|
||||
|
||||
device = rt_device_find("rtc");
|
||||
if (device != RT_NULL)
|
||||
{
|
||||
rt_rtc_control(device, RT_DEVICE_CTRL_RTC_SET_TIME, &now);
|
||||
}
|
||||
time_t now;
|
||||
struct tm* ti;
|
||||
rt_device_t device;
|
||||
|
||||
ti = RT_NULL;
|
||||
/* get current time */
|
||||
time(&now);
|
||||
|
||||
ti = localtime(&now);
|
||||
if (ti != RT_NULL)
|
||||
{
|
||||
ti->tm_year = year - 1900;
|
||||
ti->tm_mon = month - 1; /* ti->tm_mon = month; 0~11 */
|
||||
ti->tm_mday = day;
|
||||
}
|
||||
|
||||
now = mktime(ti);
|
||||
|
||||
device = rt_device_find("rtc");
|
||||
if (device != RT_NULL)
|
||||
{
|
||||
rt_rtc_control(device, RT_DEVICE_CTRL_RTC_SET_TIME, &now);
|
||||
}
|
||||
}
|
||||
FINSH_FUNCTION_EXPORT(set_date, set date)
|
||||
FINSH_FUNCTION_EXPORT(set_date, set date. e.g: set_date(2010,2,28))
|
||||
|
||||
void set_time(rt_uint32_t hour, rt_uint32_t minute, rt_uint32_t second)
|
||||
{
|
||||
time_t now;
|
||||
struct tm* ti;
|
||||
rt_device_t device;
|
||||
time_t now;
|
||||
struct tm* ti;
|
||||
rt_device_t device;
|
||||
|
||||
ti = RT_NULL;
|
||||
/* get current time */
|
||||
time(&now);
|
||||
|
||||
ti = localtime(&now);
|
||||
if (ti != RT_NULL)
|
||||
{
|
||||
ti->tm_hour = hour;
|
||||
ti->tm_min = minute;
|
||||
ti->tm_sec = second;
|
||||
}
|
||||
|
||||
now = mktime(ti);
|
||||
device = rt_device_find("rtc");
|
||||
if (device != RT_NULL)
|
||||
{
|
||||
rt_rtc_control(device, RT_DEVICE_CTRL_RTC_SET_TIME, &now);
|
||||
}
|
||||
ti = RT_NULL;
|
||||
/* get current time */
|
||||
time(&now);
|
||||
|
||||
ti = localtime(&now);
|
||||
if (ti != RT_NULL)
|
||||
{
|
||||
ti->tm_hour = hour;
|
||||
ti->tm_min = minute;
|
||||
ti->tm_sec = second;
|
||||
}
|
||||
|
||||
now = mktime(ti);
|
||||
device = rt_device_find("rtc");
|
||||
if (device != RT_NULL)
|
||||
{
|
||||
rt_rtc_control(device, RT_DEVICE_CTRL_RTC_SET_TIME, &now);
|
||||
}
|
||||
}
|
||||
FINSH_FUNCTION_EXPORT(set_time, set second)
|
||||
FINSH_FUNCTION_EXPORT(set_time, set time. e.g: set_time(23,59,59))
|
||||
|
||||
void list_date()
|
||||
{
|
||||
time_t now;
|
||||
|
||||
time(&now);
|
||||
rt_kprintf("%s\n", ctime(&now));
|
||||
time_t now;
|
||||
|
||||
time(&now);
|
||||
rt_kprintf("%s\n", ctime(&now));
|
||||
}
|
||||
FINSH_FUNCTION_EXPORT(list_date, set date)
|
||||
FINSH_FUNCTION_EXPORT(list_date, show date and time.)
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,473 +0,0 @@
|
|||
#include <rthw.h>
|
||||
#include <rtthread.h>
|
||||
#include "stm32f10x.h"
|
||||
|
||||
/*
|
||||
* WM8753 Driver
|
||||
*/
|
||||
|
||||
/* WM8753 register definitions */
|
||||
#define WM8753_DAC 0x01
|
||||
#define WM8753_ADC 0x02
|
||||
#define WM8753_PCM 0x03
|
||||
#define WM8753_HIFI 0x04
|
||||
#define WM8753_IOCTL 0x05
|
||||
#define WM8753_SRATE1 0x06
|
||||
#define WM8753_SRATE2 0x07
|
||||
#define WM8753_LDAC 0x08
|
||||
#define WM8753_RDAC 0x09
|
||||
#define WM8753_BASS 0x0a
|
||||
#define WM8753_TREBLE 0x0b
|
||||
#define WM8753_ALC1 0x0c
|
||||
#define WM8753_ALC2 0x0d
|
||||
#define WM8753_ALC3 0x0e
|
||||
#define WM8753_NGATE 0x0f
|
||||
#define WM8753_LADC 0x10
|
||||
#define WM8753_RADC 0x11
|
||||
#define WM8753_ADCTL1 0x12
|
||||
#define WM8753_3D 0x13
|
||||
#define WM8753_PWR1 0x14
|
||||
#define WM8753_PWR2 0x15
|
||||
#define WM8753_PWR3 0x16
|
||||
#define WM8753_PWR4 0x17
|
||||
#define WM8753_ID 0x18
|
||||
#define WM8753_INTPOL 0x19
|
||||
#define WM8753_INTEN 0x1a
|
||||
#define WM8753_GPIO1 0x1b
|
||||
#define WM8753_GPIO2 0x1c
|
||||
#define WM8753_RESET 0x1f
|
||||
#define WM8753_RECMIX1 0x20
|
||||
#define WM8753_RECMIX2 0x21
|
||||
#define WM8753_LOUTM1 0x22
|
||||
#define WM8753_LOUTM2 0x23
|
||||
#define WM8753_ROUTM1 0x24
|
||||
#define WM8753_ROUTM2 0x25
|
||||
#define WM8753_MOUTM1 0x26
|
||||
#define WM8753_MOUTM2 0x27
|
||||
#define WM8753_LOUT1V 0x28
|
||||
#define WM8753_ROUT1V 0x29
|
||||
#define WM8753_LOUT2V 0x2a
|
||||
#define WM8753_ROUT2V 0x2b
|
||||
#define WM8753_MOUTV 0x2c
|
||||
#define WM8753_OUTCTL 0x2d
|
||||
#define WM8753_ADCIN 0x2e
|
||||
#define WM8753_INCTL1 0x2f
|
||||
#define WM8753_INCTL2 0x30
|
||||
#define WM8753_LINVOL 0x31
|
||||
#define WM8753_RINVOL 0x32
|
||||
#define WM8753_MICBIAS 0x33
|
||||
#define WM8753_CLOCK 0x34
|
||||
#define WM8753_PLL1CTL1 0x35
|
||||
#define WM8753_PLL1CTL2 0x36
|
||||
#define WM8753_PLL1CTL3 0x37
|
||||
#define WM8753_PLL1CTL4 0x38
|
||||
#define WM8753_PLL2CTL1 0x39
|
||||
#define WM8753_PLL2CTL2 0x3a
|
||||
#define WM8753_PLL2CTL3 0x3b
|
||||
#define WM8753_PLL2CTL4 0x3c
|
||||
#define WM8753_BIASCTL 0x3d
|
||||
#define WM8753_ADCTL2 0x3f
|
||||
|
||||
/*
|
||||
SCLK PA5 SPI1_SCK
|
||||
SDIN PA7 SPI1_MOSI
|
||||
CSB PA4 SPI1_NSS
|
||||
*/
|
||||
#define wm_sclk_0 GPIO_ResetBits(GPIOA,GPIO_Pin_5)
|
||||
#define wm_sclk_1 GPIO_SetBits(GPIOA,GPIO_Pin_5)
|
||||
#define wm_sdin_0 GPIO_ResetBits(GPIOA,GPIO_Pin_7)
|
||||
#define wm_sdin_1 GPIO_SetBits(GPIOA,GPIO_Pin_7)
|
||||
#define wm_csb_0 GPIO_ResetBits(GPIOA,GPIO_Pin_4)
|
||||
#define wm_csb_1 GPIO_SetBits(GPIOA,GPIO_Pin_4)
|
||||
|
||||
#define DATA_NODE_MAX 5
|
||||
/* data node for Tx Mode */
|
||||
struct wm8753_data_node
|
||||
{
|
||||
rt_uint16_t *data_ptr;
|
||||
rt_size_t data_size;
|
||||
};
|
||||
|
||||
struct wm8753_device
|
||||
{
|
||||
/* inherit from rt_device */
|
||||
struct rt_device parent;
|
||||
|
||||
/* pcm data list */
|
||||
struct wm8753_data_node data_list[DATA_NODE_MAX];
|
||||
rt_uint16_t read_index, put_index;
|
||||
|
||||
/* transmitted offset of current data node */
|
||||
rt_size_t offset;
|
||||
};
|
||||
struct wm8753_device wm8753;
|
||||
|
||||
static void NVIC_Configuration(void)
|
||||
{
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
/* SPI2 IRQ Channel configuration */
|
||||
NVIC_InitStructure.NVIC_IRQChannel = SPI2_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
|
||||
/* DMA1 IRQ Channel configuration */
|
||||
NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel5_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
}
|
||||
|
||||
static void GPIO_Configuration(void)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
|
||||
/* Disable the JTAG interface and enable the SWJ interface */
|
||||
GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
|
||||
|
||||
/* Configure GPIOA 2, 3, 7 */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_7;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz;
|
||||
GPIO_Init(GPIOA,&GPIO_InitStructure);
|
||||
|
||||
/* Configure SPI2 pins: CK, WS and SD */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_15;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_Init(GPIOB, &GPIO_InitStructure);
|
||||
|
||||
/* MCO configure */
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOA,&GPIO_InitStructure);
|
||||
|
||||
RCC_MCOConfig(RCC_MCO_HSE);
|
||||
}
|
||||
|
||||
#define SPI2_DR_Address 0x4000380C
|
||||
static void DMA_Configuration(rt_uint32_t addr, rt_size_t size)
|
||||
{
|
||||
DMA_InitTypeDef DMA_InitStructure;
|
||||
|
||||
/* DMA1 Channel2 configuration ----------------------------------------------*/
|
||||
DMA_Cmd(DMA1_Channel5, DISABLE);
|
||||
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)SPI2_DR_Address;
|
||||
DMA_InitStructure.DMA_MemoryBaseAddr = (u32)addr;
|
||||
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
|
||||
DMA_InitStructure.DMA_BufferSize = size;
|
||||
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
|
||||
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
|
||||
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
|
||||
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
|
||||
DMA_InitStructure.DMA_Priority = DMA_Priority_Low;
|
||||
DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
|
||||
DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
|
||||
DMA_Init(DMA1_Channel5, &DMA_InitStructure);
|
||||
|
||||
/* Enable SPI2 DMA Tx request */
|
||||
SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE);
|
||||
|
||||
DMA_ITConfig(DMA1_Channel5, DMA_IT_TC, ENABLE);
|
||||
DMA_Cmd(DMA1_Channel5, ENABLE);
|
||||
}
|
||||
|
||||
static void I2S_Configuration(void)
|
||||
{
|
||||
I2S_InitTypeDef I2S_InitStructure;
|
||||
|
||||
/* I2S peripheral configuration */
|
||||
I2S_InitStructure.I2S_Standard = I2S_Standard_Phillips;
|
||||
I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_16b;
|
||||
I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable;
|
||||
I2S_InitStructure.I2S_AudioFreq = I2S_AudioFreq_44k;
|
||||
I2S_InitStructure.I2S_CPOL = I2S_CPOL_High;// I2S_CPOL_Low
|
||||
|
||||
/* I2S2 Master Transmitter to I2S3 Slave Receiver communication -----------*/
|
||||
/* I2S2 configuration */
|
||||
I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx;//I2S_Mode_MasterTx I2S_Mode_SlaveTx
|
||||
I2S_Init(SPI2, &I2S_InitStructure);
|
||||
}
|
||||
|
||||
void wm8753_send(rt_uint16_t s_data)
|
||||
{
|
||||
u8 i;
|
||||
wm_sclk_0;
|
||||
|
||||
for (i=0;i<16;i++)
|
||||
{
|
||||
if (s_data & 0x8000)
|
||||
{
|
||||
wm_sdin_1;
|
||||
}
|
||||
else
|
||||
{
|
||||
wm_sdin_0;
|
||||
}
|
||||
wm_sclk_1;
|
||||
s_data <<= 1;
|
||||
wm_sclk_0;
|
||||
}
|
||||
|
||||
wm_csb_0;
|
||||
wm_csb_1;
|
||||
}
|
||||
|
||||
static rt_err_t wm8753_init (rt_device_t dev)
|
||||
{
|
||||
wm8753_send(31<<9 | 0); // reset
|
||||
|
||||
wm8753_send(20<<9 | (1<<7) | 1<<6 | 1<<3 | 1<<2 ); // 打开电源 处理部分
|
||||
//wm8753_send(21<<9 | 0x1FF);
|
||||
wm8753_send(22<<9 | 1<<3 | 1<<7 | 1<<8 | 1<<5 | 1<<6 ); // 电源管理 功率输出部分
|
||||
wm8753_send(23<<9 | 1<<1 | 1 ); // 打开左右调音台电源
|
||||
|
||||
/* 设置时钟及PLL */
|
||||
#define MCLK1DIV2 0
|
||||
#define pll1_N 11
|
||||
#define pll1_K 0x1288CE
|
||||
|
||||
#if pll1_K > 0x3FFFFF
|
||||
#warning MAX bit(21:0)
|
||||
#endif
|
||||
|
||||
wm8753_send(53<<9 | 1<<5 | MCLK1DIV2<<3 | 1<<2 | 1<<1 | 1 );
|
||||
wm8753_send(54<<9 | pll1_N<<5 | (pll1_K>>18) );
|
||||
wm8753_send(55<<9 | ( (pll1_K>>9)&0x1FF ) );
|
||||
wm8753_send(56<<9 | ( (pll1_K)&0x1FF ) );
|
||||
|
||||
wm8753_send(52<<9 | 1<<4 | 0<<1 | 0 ); // 打开CLK输出 测试用 可以不设置
|
||||
/* 设置时钟及PLL */
|
||||
|
||||
/* 设置IIS及DAC */
|
||||
// wm8753_send(6<<9 | 0<<1 | 0 ); // 48K
|
||||
wm8753_send(7<<9 | 3<<3 ); // BCLK = MCLK / 8 0:0 1:2 2:4 3:8 4:16
|
||||
wm8753_send(6<<9 | 16<<1 | 0 ); // 44.1K
|
||||
wm8753_send(5<<9 | 0x01<<4 | 0x01<<5 | 0x02<<2 | 0x02<<2 | 0x01<<1 | 1); //
|
||||
wm8753_send(4<<9 | 0<<6 | 2 ); // 6.master IIS
|
||||
wm8753_send(1<<9 | 0 ); // 关闭DAC静音
|
||||
/* 设置IIS及DAC */
|
||||
|
||||
/* 设置模拟通道及功放输出部分 */
|
||||
wm8753_send(34<<9 | 1<<8 | 1<<7 | 4<<4 ); // DAC LINE
|
||||
wm8753_send(36<<9 | 1<<8 | 1<<7 | 4<<4 ); // DAC LINE
|
||||
|
||||
wm8753_send(40<<9 | 0<<8 | 1<<7 | 100); // 耳机音量
|
||||
wm8753_send(41<<9 | 1<<8 | 1<<7 | 100); // 耳机音量
|
||||
|
||||
wm8753_send(45<<9 | 1<<2); // 设置ROUT反向
|
||||
wm8753_send(42<<9 | 1<<8 | 1<<7 | 105 ); //喇叭音量
|
||||
wm8753_send(43<<9 | 1<<8 | 1<<7 | 105 ); //喇叭音量
|
||||
/* 设置IIS及DAC */
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
#include <finsh.h>
|
||||
void vol(int v)
|
||||
{
|
||||
wm8753_send(40<<9 | 0<<8 | 1<<7 | v); // 耳机音量
|
||||
wm8753_send(41<<9 | 1<<8 | 1<<7 | v); // 耳机音量
|
||||
|
||||
wm8753_send(42<<9 | 0<<8 | 1<<7 | v); // 耳机音量
|
||||
wm8753_send(43<<9 | 1<<8 | 1<<7 | v); // 耳机音量
|
||||
}
|
||||
FINSH_FUNCTION_EXPORT(vol, set volume)
|
||||
|
||||
static rt_err_t wm8753_open(rt_device_t dev, rt_uint16_t oflag)
|
||||
{
|
||||
/* enable I2S */
|
||||
I2S_Cmd(SPI2, ENABLE);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t wm8753_close(rt_device_t dev)
|
||||
{
|
||||
/* interrupt mode */
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_TX)
|
||||
{
|
||||
/* Disable the I2S2 */
|
||||
I2S_Cmd(SPI2, DISABLE);
|
||||
}
|
||||
|
||||
/* remove all data node */
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t wm8753_control(rt_device_t dev, rt_uint8_t cmd, void *args)
|
||||
{
|
||||
/* rate control */
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_size_t wm8753_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
|
||||
{
|
||||
struct wm8753_device* device;
|
||||
struct wm8753_data_node* node;
|
||||
rt_uint32_t level;
|
||||
rt_uint16_t next_index;
|
||||
|
||||
device = (struct wm8753_device*)dev;
|
||||
RT_ASSERT(device != RT_NULL);
|
||||
|
||||
next_index = device->put_index + 1;
|
||||
if (next_index >= DATA_NODE_MAX) next_index = 0;
|
||||
|
||||
/* check data_list full */
|
||||
if (next_index == device->read_index)
|
||||
{
|
||||
rt_set_errno(-RT_EFULL);
|
||||
return 0;
|
||||
}
|
||||
|
||||
level = rt_hw_interrupt_disable();
|
||||
node = &device->data_list[device->put_index];
|
||||
device->put_index = next_index;
|
||||
|
||||
// rt_kprintf("+\n");
|
||||
/* set node attribute */
|
||||
node->data_ptr = (rt_uint16_t*)buffer;
|
||||
node->data_size = size >> 1; /* size is byte unit, convert to half word unit */
|
||||
|
||||
next_index = device->read_index + 1;
|
||||
if (next_index >= DATA_NODE_MAX) next_index = 0;
|
||||
|
||||
/* check data list whether is empty */
|
||||
if (next_index == device->put_index)
|
||||
{
|
||||
if (dev->flag & RT_DEVICE_FLAG_INT_TX)
|
||||
{
|
||||
device->offset = 0;
|
||||
/* enable I2S interrupt */
|
||||
SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_TXE, ENABLE);
|
||||
}
|
||||
else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
|
||||
{
|
||||
DMA_Configuration((rt_uint32_t)node->data_ptr, node->data_size);
|
||||
}
|
||||
}
|
||||
rt_hw_interrupt_enable(level);
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
rt_err_t wm8753_hw_init(void)
|
||||
{
|
||||
rt_device_t dev;
|
||||
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
|
||||
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
|
||||
|
||||
NVIC_Configuration();
|
||||
GPIO_Configuration();
|
||||
I2S_Configuration();
|
||||
|
||||
dev = (rt_device_t)&wm8753;
|
||||
dev->type = RT_Device_Class_Unknown;
|
||||
dev->rx_indicate = RT_NULL;
|
||||
dev->tx_complete = RT_NULL;
|
||||
dev->init = wm8753_init;
|
||||
dev->open = wm8753_open;
|
||||
dev->close = wm8753_close;
|
||||
dev->read = RT_NULL;
|
||||
dev->write = wm8753_write;
|
||||
dev->control = wm8753_control;
|
||||
dev->private = RT_NULL;
|
||||
|
||||
/* set read_index and put index to 0 */
|
||||
wm8753.read_index = 0;
|
||||
wm8753.put_index = 0;
|
||||
|
||||
wm_sclk_0;
|
||||
wm_sclk_1;
|
||||
wm_sclk_0;
|
||||
|
||||
wm_sdin_0;
|
||||
wm_sdin_1;
|
||||
wm_sdin_0;
|
||||
|
||||
wm_csb_0;
|
||||
wm_csb_1;
|
||||
|
||||
/* register the device */
|
||||
return rt_device_register(&wm8753.parent, "snd",
|
||||
RT_DEVICE_FLAG_WRONLY | RT_DEVICE_FLAG_DMA_TX);
|
||||
}
|
||||
|
||||
void wm8753_isr()
|
||||
{
|
||||
struct wm8753_data_node* node;
|
||||
node = &wm8753.data_list[wm8753.read_index]; /* get current data node */
|
||||
|
||||
if (SPI_I2S_GetITStatus(SPI2, SPI_I2S_IT_TXE) == SET)
|
||||
{
|
||||
SPI_I2S_SendData(SPI2, node->data_ptr[wm8753.offset++]);
|
||||
}
|
||||
|
||||
if (wm8753.offset == node->data_size)
|
||||
{
|
||||
/* move to next node */
|
||||
rt_uint16_t next_index;
|
||||
|
||||
next_index = wm8753.read_index + 1;
|
||||
if (next_index >= DATA_NODE_MAX) next_index = 0;
|
||||
|
||||
/* notify transmitted complete. */
|
||||
if (wm8753.parent.tx_complete != RT_NULL)
|
||||
{
|
||||
wm8753.parent.tx_complete (&wm8753.parent, wm8753.data_list[wm8753.read_index].data_ptr);
|
||||
rt_kprintf("-\n");
|
||||
}
|
||||
|
||||
wm8753.offset = 0;
|
||||
wm8753.read_index = next_index;
|
||||
if (next_index == wm8753.put_index)
|
||||
{
|
||||
/* no data on the list, disable I2S interrupt */
|
||||
SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_TXE, DISABLE);
|
||||
|
||||
rt_kprintf("*\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void wm8753_dma_isr()
|
||||
{
|
||||
/* switch to next buffer */
|
||||
rt_uint16_t next_index;
|
||||
void* data_ptr;
|
||||
|
||||
next_index = wm8753.read_index + 1;
|
||||
if (next_index >= DATA_NODE_MAX) next_index = 0;
|
||||
|
||||
/* save current data pointer */
|
||||
data_ptr = wm8753.data_list[wm8753.read_index].data_ptr;
|
||||
|
||||
wm8753.read_index = next_index;
|
||||
if (next_index != wm8753.put_index)
|
||||
{
|
||||
/* enable next dma request */
|
||||
DMA_Configuration((rt_uint32_t)wm8753.data_list[wm8753.read_index].data_ptr,
|
||||
wm8753.data_list[wm8753.read_index].data_size);
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_kprintf("*\n");
|
||||
}
|
||||
|
||||
/* notify transmitted complete. */
|
||||
if (wm8753.parent.tx_complete != RT_NULL)
|
||||
{
|
||||
wm8753.parent.tx_complete (&wm8753.parent, data_ptr);
|
||||
// rt_kprintf("<-0x%08x\n", data_ptr);
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue