Bernard Xiong
GitHub
commit
baa3145bfe
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@ -0,0 +1,418 @@
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#
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# Automatically generated file; DO NOT EDIT.
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# RT-Thread Configuration
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#
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#
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# RT-Thread Kernel
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#
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CONFIG_RT_NAME_MAX=8
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# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
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# CONFIG_RT_USING_SMP is not set
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CONFIG_RT_ALIGN_SIZE=4
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# CONFIG_RT_THREAD_PRIORITY_8 is not set
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CONFIG_RT_THREAD_PRIORITY_32=y
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# CONFIG_RT_THREAD_PRIORITY_256 is not set
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CONFIG_RT_THREAD_PRIORITY_MAX=32
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CONFIG_RT_TICK_PER_SECOND=100
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CONFIG_RT_USING_OVERFLOW_CHECK=y
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CONFIG_RT_USING_HOOK=y
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CONFIG_RT_USING_IDLE_HOOK=y
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CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
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CONFIG_IDLE_THREAD_STACK_SIZE=2048
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# CONFIG_RT_USING_TIMER_SOFT is not set
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CONFIG_RT_DEBUG=y
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# CONFIG_RT_DEBUG_COLOR is not set
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# CONFIG_RT_DEBUG_INIT_CONFIG is not set
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# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
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# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
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# CONFIG_RT_DEBUG_IPC_CONFIG is not set
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# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
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# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
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# CONFIG_RT_DEBUG_MEM_CONFIG is not set
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# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
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# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
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# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
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#
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# Inter-Thread communication
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#
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CONFIG_RT_USING_SEMAPHORE=y
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CONFIG_RT_USING_MUTEX=y
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CONFIG_RT_USING_EVENT=y
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CONFIG_RT_USING_MAILBOX=y
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CONFIG_RT_USING_MESSAGEQUEUE=y
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# CONFIG_RT_USING_SIGNALS is not set
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#
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# Memory Management
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#
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CONFIG_RT_USING_MEMPOOL=y
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# CONFIG_RT_USING_MEMHEAP is not set
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# CONFIG_RT_USING_NOHEAP is not set
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CONFIG_RT_USING_SMALL_MEM=y
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# CONFIG_RT_USING_SLAB is not set
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# CONFIG_RT_USING_MEMTRACE is not set
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CONFIG_RT_USING_HEAP=y
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#
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# Kernel Device Object
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#
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CONFIG_RT_USING_DEVICE=y
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# CONFIG_RT_USING_DEVICE_OPS is not set
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# CONFIG_RT_USING_INTERRUPT_INFO is not set
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_CONSOLEBUF_SIZE=256
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CONFIG_RT_CONSOLE_DEVICE_NAME="uart"
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CONFIG_RT_VER_NUM=0x40003
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# CONFIG_RT_USING_CPU_FFS is not set
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CONFIG_ARCH_MIPS64=y
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# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
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#
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# RT-Thread Components
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#
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CONFIG_RT_USING_COMPONENTS_INIT=y
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CONFIG_RT_USING_USER_MAIN=y
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CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
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CONFIG_RT_MAIN_THREAD_PRIORITY=10
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#
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# C++ features
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#
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# CONFIG_RT_USING_CPLUSPLUS is not set
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#
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# Command shell
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#
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CONFIG_RT_USING_FINSH=y
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CONFIG_FINSH_THREAD_NAME="tshell"
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CONFIG_FINSH_USING_HISTORY=y
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CONFIG_FINSH_HISTORY_LINES=5
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CONFIG_FINSH_USING_SYMTAB=y
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CONFIG_FINSH_USING_DESCRIPTION=y
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# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
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CONFIG_FINSH_THREAD_PRIORITY=20
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CONFIG_FINSH_THREAD_STACK_SIZE=4096
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CONFIG_FINSH_CMD_SIZE=80
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# CONFIG_FINSH_USING_AUTH is not set
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CONFIG_FINSH_USING_MSH=y
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CONFIG_FINSH_USING_MSH_DEFAULT=y
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# CONFIG_FINSH_USING_MSH_ONLY is not set
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CONFIG_FINSH_ARG_MAX=10
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#
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# Device virtual file system
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#
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# CONFIG_RT_USING_DFS is not set
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#
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# Device Drivers
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#
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CONFIG_RT_USING_DEVICE_IPC=y
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CONFIG_RT_PIPE_BUFSZ=512
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# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
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CONFIG_RT_USING_SERIAL=y
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CONFIG_RT_SERIAL_USING_DMA=y
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CONFIG_RT_SERIAL_RB_BUFSZ=64
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# CONFIG_RT_USING_CAN is not set
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# CONFIG_RT_USING_HWTIMER is not set
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# CONFIG_RT_USING_CPUTIME is not set
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# CONFIG_RT_USING_I2C is not set
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CONFIG_RT_USING_PIN=y
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# CONFIG_RT_USING_ADC is not set
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# CONFIG_RT_USING_PWM is not set
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# CONFIG_RT_USING_MTD_NOR is not set
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# CONFIG_RT_USING_MTD_NAND is not set
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# CONFIG_RT_USING_PM is not set
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# CONFIG_RT_USING_RTC is not set
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# CONFIG_RT_USING_SDIO is not set
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# CONFIG_RT_USING_SPI is not set
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# CONFIG_RT_USING_WDT is not set
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# CONFIG_RT_USING_AUDIO is not set
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# CONFIG_RT_USING_SENSOR is not set
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# CONFIG_RT_USING_TOUCH is not set
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# CONFIG_RT_USING_HWCRYPTO is not set
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# CONFIG_RT_USING_PULSE_ENCODER is not set
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# CONFIG_RT_USING_INPUT_CAPTURE is not set
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# CONFIG_RT_USING_WIFI is not set
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#
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# Using USB
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#
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# CONFIG_RT_USING_USB_HOST is not set
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# CONFIG_RT_USING_USB_DEVICE is not set
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#
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# POSIX layer and C standard library
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#
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CONFIG_RT_USING_LIBC=y
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# CONFIG_RT_USING_PTHREADS is not set
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# CONFIG_RT_USING_MODULE is not set
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#
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# Network
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#
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#
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# Socket abstraction layer
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#
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# CONFIG_RT_USING_SAL is not set
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#
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# Network interface device
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#
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# CONFIG_RT_USING_NETDEV is not set
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#
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# light weight TCP/IP stack
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#
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# CONFIG_RT_USING_LWIP is not set
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#
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# AT commands
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#
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# CONFIG_RT_USING_AT is not set
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#
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# VBUS(Virtual Software BUS)
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#
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# CONFIG_RT_USING_VBUS is not set
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#
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# Utilities
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#
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# CONFIG_RT_USING_RYM is not set
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# CONFIG_RT_USING_ULOG is not set
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# CONFIG_RT_USING_UTEST is not set
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#
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# RT-Thread MIPS CPU
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#
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# CONFIG_RT_USING_FPU is not set
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#
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# RT-Thread online packages
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#
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#
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# IoT - internet of things
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#
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# CONFIG_PKG_USING_PAHOMQTT is not set
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# CONFIG_PKG_USING_WEBCLIENT is not set
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# CONFIG_PKG_USING_WEBNET is not set
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# CONFIG_PKG_USING_MONGOOSE is not set
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# CONFIG_PKG_USING_MYMQTT is not set
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# CONFIG_PKG_USING_WEBTERMINAL is not set
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# CONFIG_PKG_USING_CJSON is not set
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# CONFIG_PKG_USING_JSMN is not set
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# CONFIG_PKG_USING_LIBMODBUS is not set
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# CONFIG_PKG_USING_FREEMODBUS is not set
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# CONFIG_PKG_USING_LJSON is not set
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# CONFIG_PKG_USING_EZXML is not set
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# CONFIG_PKG_USING_NANOPB is not set
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#
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# Wi-Fi
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#
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#
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# Marvell WiFi
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#
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# CONFIG_PKG_USING_WLANMARVELL is not set
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#
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# Wiced WiFi
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#
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# CONFIG_PKG_USING_WLAN_WICED is not set
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# CONFIG_PKG_USING_RW007 is not set
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# CONFIG_PKG_USING_COAP is not set
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# CONFIG_PKG_USING_NOPOLL is not set
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# CONFIG_PKG_USING_NETUTILS is not set
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# CONFIG_PKG_USING_PPP_DEVICE is not set
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# CONFIG_PKG_USING_AT_DEVICE is not set
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# CONFIG_PKG_USING_ATSRV_SOCKET is not set
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# CONFIG_PKG_USING_WIZNET is not set
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#
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# IoT Cloud
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#
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# CONFIG_PKG_USING_ONENET is not set
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# CONFIG_PKG_USING_GAGENT_CLOUD is not set
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# CONFIG_PKG_USING_ALI_IOTKIT is not set
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# CONFIG_PKG_USING_AZURE is not set
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# CONFIG_PKG_USING_TENCENT_IOTHUB is not set
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# CONFIG_PKG_USING_JIOT-C-SDK is not set
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# CONFIG_PKG_USING_NIMBLE is not set
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# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
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# CONFIG_PKG_USING_IPMSG is not set
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# CONFIG_PKG_USING_LSSDP is not set
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# CONFIG_PKG_USING_AIRKISS_OPEN is not set
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# CONFIG_PKG_USING_LIBRWS is not set
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# CONFIG_PKG_USING_TCPSERVER is not set
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# CONFIG_PKG_USING_PROTOBUF_C is not set
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# CONFIG_PKG_USING_ONNX_PARSER is not set
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# CONFIG_PKG_USING_ONNX_BACKEND is not set
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# CONFIG_PKG_USING_DLT645 is not set
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# CONFIG_PKG_USING_QXWZ is not set
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# CONFIG_PKG_USING_SMTP_CLIENT is not set
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# CONFIG_PKG_USING_ABUP_FOTA is not set
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||||||
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||||||
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#
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||||||
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# security packages
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||||||
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#
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# CONFIG_PKG_USING_MBEDTLS is not set
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# CONFIG_PKG_USING_libsodium is not set
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# CONFIG_PKG_USING_TINYCRYPT is not set
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||||||
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||||||
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#
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||||||
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# language packages
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||||||
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#
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||||||
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# CONFIG_PKG_USING_LUA is not set
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||||||
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# CONFIG_PKG_USING_JERRYSCRIPT is not set
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||||||
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# CONFIG_PKG_USING_MICROPYTHON is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# multimedia packages
|
||||||
|
#
|
||||||
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# CONFIG_PKG_USING_OPENMV is not set
|
||||||
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# CONFIG_PKG_USING_MUPDF is not set
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||||||
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# CONFIG_PKG_USING_STEMWIN is not set
|
||||||
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# CONFIG_PKG_USING_WAVPLAYER is not set
|
||||||
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# CONFIG_PKG_USING_TJPGD is not set
|
||||||
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|
||||||
|
#
|
||||||
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# tools packages
|
||||||
|
#
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||||||
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# CONFIG_PKG_USING_CMBACKTRACE is not set
|
||||||
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# CONFIG_PKG_USING_EASYFLASH is not set
|
||||||
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# CONFIG_PKG_USING_EASYLOGGER is not set
|
||||||
|
# CONFIG_PKG_USING_SYSTEMVIEW is not set
|
||||||
|
# CONFIG_PKG_USING_RDB is not set
|
||||||
|
# CONFIG_PKG_USING_QRCODE is not set
|
||||||
|
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
|
||||||
|
# CONFIG_PKG_USING_ADBD is not set
|
||||||
|
# CONFIG_PKG_USING_COREMARK is not set
|
||||||
|
# CONFIG_PKG_USING_DHRYSTONE is not set
|
||||||
|
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
|
||||||
|
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
|
||||||
|
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
|
||||||
|
# CONFIG_PKG_USING_BS8116A is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# system packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_GUIENGINE is not set
|
||||||
|
# CONFIG_PKG_USING_CAIRO is not set
|
||||||
|
# CONFIG_PKG_USING_PIXMAN is not set
|
||||||
|
# CONFIG_PKG_USING_LWEXT4 is not set
|
||||||
|
# CONFIG_PKG_USING_PARTITION is not set
|
||||||
|
# CONFIG_PKG_USING_FAL is not set
|
||||||
|
# CONFIG_PKG_USING_SQLITE is not set
|
||||||
|
# CONFIG_PKG_USING_RTI is not set
|
||||||
|
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
|
||||||
|
# CONFIG_PKG_USING_CMSIS is not set
|
||||||
|
# CONFIG_PKG_USING_DFS_YAFFS is not set
|
||||||
|
# CONFIG_PKG_USING_LITTLEFS is not set
|
||||||
|
# CONFIG_PKG_USING_THREAD_POOL is not set
|
||||||
|
# CONFIG_PKG_USING_ROBOTS is not set
|
||||||
|
# CONFIG_PKG_USING_EV is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# peripheral libraries and drivers
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
|
||||||
|
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
|
||||||
|
# CONFIG_PKG_USING_SHT2X is not set
|
||||||
|
# CONFIG_PKG_USING_SHT3X is not set
|
||||||
|
# CONFIG_PKG_USING_STM32_SDIO is not set
|
||||||
|
# CONFIG_PKG_USING_ICM20608 is not set
|
||||||
|
# CONFIG_PKG_USING_U8G2 is not set
|
||||||
|
# CONFIG_PKG_USING_BUTTON is not set
|
||||||
|
# CONFIG_PKG_USING_PCF8574 is not set
|
||||||
|
# CONFIG_PKG_USING_SX12XX is not set
|
||||||
|
# CONFIG_PKG_USING_SIGNAL_LED is not set
|
||||||
|
# CONFIG_PKG_USING_LEDBLINK is not set
|
||||||
|
# CONFIG_PKG_USING_WM_LIBRARIES is not set
|
||||||
|
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
|
||||||
|
# CONFIG_PKG_USING_INFRARED is not set
|
||||||
|
# CONFIG_PKG_USING_ROSSERIAL is not set
|
||||||
|
# CONFIG_PKG_USING_AGILE_BUTTON is not set
|
||||||
|
# CONFIG_PKG_USING_AGILE_LED is not set
|
||||||
|
# CONFIG_PKG_USING_AT24CXX is not set
|
||||||
|
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
|
||||||
|
# CONFIG_PKG_USING_AD7746 is not set
|
||||||
|
# CONFIG_PKG_USING_PCA9685 is not set
|
||||||
|
# CONFIG_PKG_USING_I2C_TOOLS is not set
|
||||||
|
# CONFIG_PKG_USING_NRF24L01 is not set
|
||||||
|
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
|
||||||
|
# CONFIG_PKG_USING_MAX17048 is not set
|
||||||
|
# CONFIG_PKG_USING_RPLIDAR is not set
|
||||||
|
# CONFIG_PKG_USING_AS608 is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# miscellaneous packages
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_LIBCSV is not set
|
||||||
|
# CONFIG_PKG_USING_OPTPARSE is not set
|
||||||
|
# CONFIG_PKG_USING_FASTLZ is not set
|
||||||
|
# CONFIG_PKG_USING_MINILZO is not set
|
||||||
|
# CONFIG_PKG_USING_QUICKLZ is not set
|
||||||
|
# CONFIG_PKG_USING_MULTIBUTTON is not set
|
||||||
|
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
|
||||||
|
# CONFIG_PKG_USING_CANFESTIVAL is not set
|
||||||
|
# CONFIG_PKG_USING_ZLIB is not set
|
||||||
|
# CONFIG_PKG_USING_DSTR is not set
|
||||||
|
# CONFIG_PKG_USING_TINYFRAME is not set
|
||||||
|
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
|
||||||
|
# CONFIG_PKG_USING_DIGITALCTRL is not set
|
||||||
|
# CONFIG_PKG_USING_UPACKER is not set
|
||||||
|
# CONFIG_PKG_USING_UPARAM is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# samples: kernel and components samples
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
|
||||||
|
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
|
||||||
|
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
|
||||||
|
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
|
||||||
|
# CONFIG_PKG_USING_HELLO is not set
|
||||||
|
# CONFIG_PKG_USING_VI is not set
|
||||||
|
# CONFIG_PKG_USING_NNOM is not set
|
||||||
|
# CONFIG_PKG_USING_LIBANN is not set
|
||||||
|
# CONFIG_PKG_USING_ELAPACK is not set
|
||||||
|
# CONFIG_PKG_USING_ARMv7M_DWT is not set
|
||||||
|
# CONFIG_PKG_USING_VT100 is not set
|
||||||
|
# CONFIG_PKG_USING_ULAPACK is not set
|
||||||
|
# CONFIG_PKG_USING_UKAL is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Privated Packages of RealThread
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_CODEC is not set
|
||||||
|
# CONFIG_PKG_USING_PLAYER is not set
|
||||||
|
# CONFIG_PKG_USING_MPLAYER is not set
|
||||||
|
# CONFIG_PKG_USING_PERSIMMON_SRC is not set
|
||||||
|
# CONFIG_PKG_USING_JS_PERSIMMON is not set
|
||||||
|
# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Network Utilities
|
||||||
|
#
|
||||||
|
# CONFIG_PKG_USING_WICED is not set
|
||||||
|
# CONFIG_PKG_USING_CLOUDSDK is not set
|
||||||
|
# CONFIG_PKG_USING_POWER_MANAGER is not set
|
||||||
|
# CONFIG_PKG_USING_RT_OTA is not set
|
||||||
|
# CONFIG_PKG_USING_RDBD_SRC is not set
|
||||||
|
# CONFIG_PKG_USING_RTINSIGHT is not set
|
||||||
|
# CONFIG_PKG_USING_SMARTCONFIG is not set
|
||||||
|
# CONFIG_PKG_USING_RTX is not set
|
||||||
|
# CONFIG_RT_USING_TESTCASE is not set
|
||||||
|
# CONFIG_PKG_USING_NGHTTP2 is not set
|
||||||
|
# CONFIG_PKG_USING_AVS is not set
|
||||||
|
# CONFIG_PKG_USING_JOYLINK is not set
|
||||||
|
# CONFIG_PKG_USING_STS is not set
|
||||||
|
# CONFIG_PKG_USING_DLMS is not set
|
||||||
|
# CONFIG_PKG_USING_AUDIO_FRAMEWORK is not set
|
||||||
|
# CONFIG_PKG_USING_ZBAR is not set
|
||||||
|
CONFIG_SOC_LS2K1000=y
|
||||||
|
|
@ -0,0 +1,32 @@
|
||||||
|
mainmenu "RT-Thread Configuration"
|
||||||
|
|
||||||
|
config BSP_DIR
|
||||||
|
string
|
||||||
|
option env="BSP_ROOT"
|
||||||
|
default "."
|
||||||
|
|
||||||
|
config RTT_DIR
|
||||||
|
string
|
||||||
|
option env="RTT_ROOT"
|
||||||
|
default "../.."
|
||||||
|
|
||||||
|
# you can change the RTT_ROOT default "../.." to your rtthread_root,
|
||||||
|
# example : default "F:/git_repositories/rt-thread"
|
||||||
|
|
||||||
|
config PKGS_DIR
|
||||||
|
string
|
||||||
|
option env="PKGS_ROOT"
|
||||||
|
default "packages"
|
||||||
|
|
||||||
|
source "$RTT_DIR/Kconfig"
|
||||||
|
source "$RTT_DIR/libcpu/mips/common/Kconfig"
|
||||||
|
source "$PKGS_DIR/Kconfig"
|
||||||
|
|
||||||
|
config SOC_LS2K1000
|
||||||
|
bool
|
||||||
|
select ARCH_MIPS64
|
||||||
|
select RT_USING_COMPONENTS_INIT
|
||||||
|
select RT_USING_USER_MAIN
|
||||||
|
select RT_USING_DEVICE
|
||||||
|
default y
|
||||||
|
|
||||||
|
|
@ -0,0 +1,90 @@
|
||||||
|
# loongson_pi2 板级支持包说明
|
||||||
|
|
||||||
|
## 1. 简介
|
||||||
|
|
||||||
|
2K龙芯派采是首款采用2K1000低功耗处理的嵌入式方案验证板，具有资源丰富、接口齐全、低功耗、高可靠的特点。
|
||||||
|
|
||||||
|
| 硬件 | 描述 |
|
||||||
|
| -- | -- |
|
||||||
|
|芯片型号| 2K1000 |
|
||||||
|
|CPU| GS264 |
|
||||||
|
|主频| 1GHz |
|
||||||
|
|DDR3| 2GB |
|
||||||
|
|片外Flash| 8Mb SPI FLASH |
|
||||||
|
|
||||||
|
[龙芯派][1]搭载 2K1000 处理器（主频 1GHz），板载 DDR3 颗粒，实现 DDR3 的运行存储功能。实现了 GPIO 的输入输出，中断功能。板上集成 1 个网 口，集成 3 个 USB 接口，HDMI 接口，LCD 接口，音频输入/输出，集成 SD 卡接口，集成 2 个 CAN 接口，集成 RTC 计时功能。可以外扩 WIFI 模块。2K 龙芯派可以广泛应用于信息安 全、电力、轨道交通、工业控制、信号处理、数据通信、信息教育等领域。
|
||||||
|
|
||||||
|
|
||||||
|
## 2. 编译说明
|
||||||
|
|
||||||
|
环境搭建在Ubuntu上进行，首先下载[mips-sde-elf-gcc][2]。该文件存放在网盘中，提取码为ucb2。
|
||||||
|
|
||||||
|
解压到指定的目录，然后修改当前bsp目录下的`rtconfig.py`文件。
|
||||||
|
|
||||||
|
```python
|
||||||
|
if CROSS_TOOL == 'gcc':
|
||||||
|
PLATFORM = 'gcc'
|
||||||
|
EXEC_PATH = "/opt/mips-2015.05-19-mips-sde-elf-i686-pc-linux-gnu/mips-2015.05/bin/"
|
||||||
|
```
|
||||||
|
|
||||||
|
然后在控制台输入`scons`即可，可以生成`rtthread.elf`、`rtthread.bin`文件，其中`rtthread.elf`是下载到开发板上的程序。
|
||||||
|
|
||||||
|
## 3.程序运行
|
||||||
|
|
||||||
|
rt-thread固件目前在龙芯派上推荐使用[pmon][3]通过tftp的方式下载到设备内存中运行。
|
||||||
|
|
||||||
|
其中龙芯派硬件分布如下图所示：
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
首先板子接上12V的电源，然后连接串口，该串口为RS232，所以需要RS232转USB线来进行连接。接着连接`LAN0`网口。
|
||||||
|
|
||||||
|
初次上电时，需要按下开发板的`START`按键，听到`滴`启动声后可以在控制台看到串口打印信息。通过启动时在控制台不停的按下字符`c`直到进入到pmon控制台。
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
需要让开发板和主机处于同一网段，利用pmon的tftp进行固件传输。首先查看主机的ip地址，如果`ifconfig`查看ip是`192.168.12.35`。输入以下指令开始运行。
|
||||||
|
|
||||||
|
```
|
||||||
|
ifaddr syn0 192.168.12.100
|
||||||
|
load tftp://192.168.12.35/rtthread.elf;
|
||||||
|
g
|
||||||
|
```
|
||||||
|
|
||||||
|
其中`ifaddr`是设置pmon设置网络的命令，`syn0`表示第一个网卡。然后从tftp的主机上加载`rtthread.elf`文件，此时主机必须有tftp服务器。`g`表示程序跳转运行。
|
||||||
|
|
||||||
|
而后可以看到rtthread程序正常的运行。
|
||||||
|
|
||||||
|
```
|
||||||
|
zero at v0 v1 a0 a1 a2 a3
|
||||||
|
00000000 00000000 00000000 00000000 00000003 aafffea8 8f800000 8f1371d0
|
||||||
|
t0 t1 t2 t3 t4 t5 t6 t7
|
||||||
|
00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
|
||||||
|
s0 s1 s2 s3 s4 s5 s6 s7
|
||||||
|
00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
|
||||||
|
t8 t9 k0 k1 gp sp s8 ra
|
||||||
|
00000000 00000000 00000000 00000000 00000000 aafffe88 00000000 8f0b1418
|
||||||
|
Current SR: 0x10008080
|
||||||
|
|
||||||
|
\ | /
|
||||||
|
- RT - Thread Operating System
|
||||||
|
/ | \ 4.0.3 build Apr 7 2020
|
||||||
|
2006 - 2020 Copyright by rt-thread team
|
||||||
|
Hi, this is RT-Thread!!
|
||||||
|
msh >
|
||||||
|
```
|
||||||
|
|
||||||
|
## 4. 支持情况
|
||||||
|
|
||||||
|
| 驱动 | 支持情况 | 备注 |
|
||||||
|
| ------ | ---- | :------: |
|
||||||
|
| UART | 支持 | UART0|
|
||||||
|
|
||||||
|
## 5. 联系人信息
|
||||||
|
|
||||||
|
维护人：[bernard][4]
|
||||||
|
|
||||||
|
[1]: http://ftp.loongnix.org/loongsonpi/pi_2/doc
|
||||||
|
[2]: https://pan.baidu.com/s/17dbdOE4NAJ-qEW7drVRq2w
|
||||||
|
[3]: http://ftp.loongnix.org/embedd/ls2k/
|
||||||
|
[4]: https://github.com/BernardXiong
|
||||||
|
|
@ -0,0 +1,12 @@
|
||||||
|
from building import *
|
||||||
|
|
||||||
|
cwd = GetCurrentDir()
|
||||||
|
objs = []
|
||||||
|
list = os.listdir(cwd)
|
||||||
|
|
||||||
|
for d in list:
|
||||||
|
path = os.path.join(cwd, d)
|
||||||
|
if os.path.isfile(os.path.join(path, 'SConscript')):
|
||||||
|
objs = objs + SConscript(os.path.join(d, 'SConscript'))
|
||||||
|
|
||||||
|
Return('objs')
|
||||||
|
|
@ -0,0 +1,39 @@
|
||||||
|
import os
|
||||||
|
import sys
|
||||||
|
import rtconfig
|
||||||
|
|
||||||
|
from rtconfig import RTT_ROOT
|
||||||
|
|
||||||
|
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
|
||||||
|
from building import *
|
||||||
|
|
||||||
|
TARGET = 'rtthread.' + rtconfig.TARGET_EXT
|
||||||
|
|
||||||
|
rtconfig.AFLAGS += ' -I' + str(Dir('#'))
|
||||||
|
|
||||||
|
DefaultEnvironment(tools=[])
|
||||||
|
env = Environment(tools = ['mingw'],
|
||||||
|
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
|
||||||
|
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
|
||||||
|
AR = rtconfig.AR, ARFLAGS = '-rc',
|
||||||
|
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
|
||||||
|
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
|
||||||
|
|
||||||
|
Export('RTT_ROOT')
|
||||||
|
Export('rtconfig')
|
||||||
|
|
||||||
|
|
||||||
|
# prepare building environment
|
||||||
|
objs = PrepareBuilding(env, RTT_ROOT)
|
||||||
|
|
||||||
|
rtconfig.LFLAGS += " -Ttext 0xffffffff80200000"
|
||||||
|
env.Replace(LINKFLAGS = rtconfig.LFLAGS)
|
||||||
|
|
||||||
|
if GetDepend('RT_USING_FPU'):
|
||||||
|
env['CCFLAGS'] = env['CCFLAGS'].replace('-msoft-float', '-mhard-float')
|
||||||
|
env['ASFLAGS'] = env['ASFLAGS'].replace('-msoft-float', '-mhard-float')
|
||||||
|
env['CXXFLAGS'] = env['CXXFLAGS'].replace('-msoft-float', '-mhard-float')
|
||||||
|
env['LINKFLAGS'] = env['LINKFLAGS'].replace('-msoft-float', '-mhard-float')
|
||||||
|
|
||||||
|
# make a building
|
||||||
|
DoBuilding(TARGET, objs)
|
||||||
|
|
@ -0,0 +1,8 @@
|
||||||
|
from building import *
|
||||||
|
|
||||||
|
cwd = GetCurrentDir()
|
||||||
|
src = Glob('*.c')
|
||||||
|
|
||||||
|
group = DefineGroup('Applications', src, depend = [''])
|
||||||
|
|
||||||
|
Return('group')
|
||||||
|
|
@ -0,0 +1,17 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-04-05 bigmagic first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
|
||||||
|
int main(int argc, char** argv)
|
||||||
|
{
|
||||||
|
rt_kprintf("Hi, this is RT-Thread!!\n");
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,10 @@
|
||||||
|
from building import *
|
||||||
|
|
||||||
|
cwd = GetCurrentDir()
|
||||||
|
src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
|
||||||
|
|
||||||
|
CPPPATH = [cwd]
|
||||||
|
|
||||||
|
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
|
||||||
|
|
||||||
|
Return('group')
|
||||||
|
|
@ -0,0 +1,98 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-04-05 bigmagic Initial version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
#include <rthw.h>
|
||||||
|
|
||||||
|
#include "mips_regs.h"
|
||||||
|
#include "exception.h"
|
||||||
|
#include "drv_uart.h"
|
||||||
|
#include "board.h"
|
||||||
|
/**
|
||||||
|
* this function will reset CPU
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
void rt_hw_cpu_reset(void)
|
||||||
|
{
|
||||||
|
rt_kprintf("reboot system...\n");
|
||||||
|
while (1);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* this function will shutdown CPU
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
void rt_hw_cpu_shutdown(void)
|
||||||
|
{
|
||||||
|
rt_kprintf("shutdown...\n");
|
||||||
|
|
||||||
|
while (1);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* This is the timer interrupt service routine.
|
||||||
|
*/
|
||||||
|
void rt_hw_timer_handler(void)
|
||||||
|
{
|
||||||
|
unsigned int count;
|
||||||
|
|
||||||
|
count = read_c0_compare();
|
||||||
|
write_c0_compare(count);
|
||||||
|
write_c0_count(0);
|
||||||
|
/* increase a OS tick */
|
||||||
|
rt_tick_increase();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* This function will initial OS timer
|
||||||
|
*/
|
||||||
|
void rt_hw_timer_init(void)
|
||||||
|
{
|
||||||
|
write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
|
||||||
|
write_c0_count(0);
|
||||||
|
mips_unmask_cpu_irq(7);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Board level initialization
|
||||||
|
*/
|
||||||
|
void rt_hw_board_init(void)
|
||||||
|
{
|
||||||
|
rt_hw_exception_init();
|
||||||
|
/* init hardware interrupt */
|
||||||
|
rt_hw_interrupt_init();
|
||||||
|
|
||||||
|
#ifdef RT_USING_FPU
|
||||||
|
/* init hardware fpu */
|
||||||
|
rt_hw_fpu_init();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef RT_USING_SERIAL
|
||||||
|
/* init hardware UART device */
|
||||||
|
rt_hw_uart_init();
|
||||||
|
/* set console device */
|
||||||
|
rt_console_set_device("uart");
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef RT_USING_HEAP
|
||||||
|
rt_system_heap_init((void*)RT_HW_HEAP_BEGIN, (void*)RT_HW_HEAP_END);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* init operating system timer */
|
||||||
|
rt_hw_timer_init();
|
||||||
|
|
||||||
|
#ifdef RT_USING_COMPONENTS_INIT
|
||||||
|
rt_components_board_init();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
rt_kprintf("Current SR: 0x%08x\n", read_c0_status());
|
||||||
|
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,24 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-04-05 bigmagic the first version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef BOARD_H__
|
||||||
|
#define BOARD_H__
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
extern unsigned char __bss_end;
|
||||||
|
|
||||||
|
#define CPU_HZ (100 * 1000 * 1000)
|
||||||
|
#define RT_HW_HEAP_BEGIN KSEG1BASE//(void*)&__bss_end
|
||||||
|
#define RT_HW_HEAP_END (void*)(RT_HW_HEAP_BEGIN + 64 * 1024 * 1024)
|
||||||
|
|
||||||
|
void rt_hw_board_init(void);
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,178 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-04-05 bigmagic Initial version
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @addtogroup ls2k
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*@{*/
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
#include <rtdevice.h>
|
||||||
|
#include <rthw.h>
|
||||||
|
#include "drv_uart.h"
|
||||||
|
|
||||||
|
#define TRUE 1
|
||||||
|
#define FALSE 0
|
||||||
|
|
||||||
|
struct rt_uart_ls2k
|
||||||
|
{
|
||||||
|
void *base;
|
||||||
|
rt_uint32_t IRQ;
|
||||||
|
};
|
||||||
|
|
||||||
|
static rt_err_t mipssim_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
|
||||||
|
{
|
||||||
|
struct rt_uart_ls2k *uart_dev = RT_NULL;
|
||||||
|
|
||||||
|
RT_ASSERT(serial != RT_NULL);
|
||||||
|
RT_ASSERT(cfg != RT_NULL);
|
||||||
|
|
||||||
|
uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
|
||||||
|
|
||||||
|
UART_IER(uart_dev->base) = 0; /* clear interrupt */
|
||||||
|
UART_FCR(uart_dev->base) = 0xc1; /* reset UART Rx/Tx */
|
||||||
|
/* set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
|
||||||
|
UART_LCR(uart_dev->base) = 0x3;
|
||||||
|
UART_MCR(uart_dev->base) = 0x3;
|
||||||
|
UART_LSR(uart_dev->base) = 0x60;
|
||||||
|
UART_MSR(uart_dev->base) = 0xb0;
|
||||||
|
|
||||||
|
return RT_EOK;
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_err_t mipssim_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
|
||||||
|
{
|
||||||
|
struct rt_uart_ls2k *uart_dev = RT_NULL;
|
||||||
|
|
||||||
|
RT_ASSERT(serial != RT_NULL);
|
||||||
|
uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
|
||||||
|
|
||||||
|
switch (cmd)
|
||||||
|
{
|
||||||
|
case RT_DEVICE_CTRL_CLR_INT: /* Disable RX IRQ */
|
||||||
|
rt_hw_interrupt_mask(uart_dev->IRQ);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case RT_DEVICE_CTRL_SET_INT: /* Enable RX IRQ */
|
||||||
|
rt_hw_interrupt_umask(uart_dev->IRQ);
|
||||||
|
UART_IER(uart_dev->base) |= (IER_IRxE|IER_ILE);
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
return RT_EOK;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
static rt_bool_t uart_is_transmit_empty(struct rt_uart_ls2k *uart_dev)
|
||||||
|
{
|
||||||
|
unsigned char status = UART_LSR(uart_dev->base);
|
||||||
|
|
||||||
|
if (status & (UARTLSR_TE | UARTLSR_TFE))
|
||||||
|
{
|
||||||
|
return TRUE;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
return FALSE;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static int mipssim_uart_putc(struct rt_serial_device *serial, char c)
|
||||||
|
{
|
||||||
|
struct rt_uart_ls2k *uart_dev = RT_NULL;
|
||||||
|
|
||||||
|
RT_ASSERT(serial != RT_NULL);
|
||||||
|
|
||||||
|
uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
|
||||||
|
|
||||||
|
while (FALSE == uart_is_transmit_empty(uart_dev))
|
||||||
|
;
|
||||||
|
|
||||||
|
UART_DAT(uart_dev->base) = c;
|
||||||
|
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int mipssim_uart_getc(struct rt_serial_device *serial)
|
||||||
|
{
|
||||||
|
struct rt_uart_ls2k *uart_dev = RT_NULL;
|
||||||
|
|
||||||
|
RT_ASSERT(serial != RT_NULL);
|
||||||
|
|
||||||
|
uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
|
||||||
|
|
||||||
|
if (LSR_RXRDY & UART_LSR(uart_dev->base))
|
||||||
|
{
|
||||||
|
return UART_DAT(uart_dev->base);
|
||||||
|
}
|
||||||
|
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* UART interrupt handler */
|
||||||
|
static void uart_irq_handler(int vector, void *param)
|
||||||
|
{
|
||||||
|
struct rt_serial_device *serial = (struct rt_serial_device *)param;
|
||||||
|
struct rt_uart_ls2k *uart_dev = RT_NULL;
|
||||||
|
|
||||||
|
RT_ASSERT(serial != RT_NULL);
|
||||||
|
|
||||||
|
uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
|
||||||
|
unsigned char iir = UART_IIR(uart_dev->base);
|
||||||
|
|
||||||
|
/* Find out interrupt reason */
|
||||||
|
if ((IIR_RXTOUT & iir) || (IIR_RXRDY & iir))
|
||||||
|
{
|
||||||
|
rt_interrupt_enter();
|
||||||
|
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
|
||||||
|
rt_interrupt_leave();
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
static const struct rt_uart_ops mipssim_uart_ops =
|
||||||
|
{
|
||||||
|
mipssim_uart_configure,
|
||||||
|
mipssim_uart_control,
|
||||||
|
mipssim_uart_putc,
|
||||||
|
mipssim_uart_getc,
|
||||||
|
};
|
||||||
|
|
||||||
|
struct rt_uart_ls2k uart_dev0 =
|
||||||
|
{
|
||||||
|
(void *)UART0_BASE,
|
||||||
|
4,
|
||||||
|
};
|
||||||
|
struct rt_serial_device serial;
|
||||||
|
|
||||||
|
|
||||||
|
void rt_hw_uart_init(void)
|
||||||
|
{
|
||||||
|
struct rt_uart_ls2k *uart;
|
||||||
|
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
|
||||||
|
|
||||||
|
uart = &uart_dev0;
|
||||||
|
|
||||||
|
serial.ops = &mipssim_uart_ops;
|
||||||
|
serial.config = config;
|
||||||
|
|
||||||
|
rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial, "UART");
|
||||||
|
|
||||||
|
/* register UART device */
|
||||||
|
rt_hw_serial_register(&serial,
|
||||||
|
"uart",
|
||||||
|
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
||||||
|
uart);
|
||||||
|
}
|
||||||
|
/*@}*/
|
||||||
|
|
@ -0,0 +1,114 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2019-04-05 bigmagic Initial version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _DRV_UART_H__
|
||||||
|
#define _DRV_UART_H__
|
||||||
|
|
||||||
|
#include "ls2k1000.h"
|
||||||
|
#include <rthw.h>
|
||||||
|
|
||||||
|
/* UART registers */
|
||||||
|
#define UART_DAT(base) HWREG8(base + 0x00)
|
||||||
|
#define UART_IER(base) HWREG8(base + 0x01)
|
||||||
|
#define UART_IIR(base) HWREG8(base + 0x02)
|
||||||
|
#define UART_FCR(base) HWREG8(base + 0x02)
|
||||||
|
#define UART_LCR(base) HWREG8(base + 0x03)
|
||||||
|
#define UART_MCR(base) HWREG8(base + 0x04)
|
||||||
|
#define UART_LSR(base) HWREG8(base + 0x05)
|
||||||
|
#define UART_MSR(base) HWREG8(base + 0x06)
|
||||||
|
|
||||||
|
#define UART_LSB(base) HWREG8(base + 0x00)
|
||||||
|
#define UART_MSB(base) HWREG8(base + 0x01)
|
||||||
|
|
||||||
|
/* interrupt enable register */
|
||||||
|
#define IER_IRxE 0x1
|
||||||
|
#define IER_ITxE 0x2
|
||||||
|
#define IER_ILE 0x4
|
||||||
|
#define IER_IME 0x8
|
||||||
|
|
||||||
|
/* interrupt identification register */
|
||||||
|
#define IIR_IMASK 0xf /* mask */
|
||||||
|
#define IIR_RXTOUT 0xc /* receive timeout */
|
||||||
|
#define IIR_RLS 0x6 /* receive line status */
|
||||||
|
#define IIR_RXRDY 0x4 /* receive ready */
|
||||||
|
#define IIR_TXRDY 0x2 /* transmit ready */
|
||||||
|
#define IIR_NOPEND 0x1 /* nothing */
|
||||||
|
#define IIR_MLSC 0x0 /* modem status */
|
||||||
|
#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */
|
||||||
|
|
||||||
|
/* fifo control register */
|
||||||
|
#define FIFO_ENABLE 0x01 /* enable fifo */
|
||||||
|
#define FIFO_RCV_RST 0x02 /* reset receive fifo */
|
||||||
|
#define FIFO_XMT_RST 0x04 /* reset transmit fifo */
|
||||||
|
#define FIFO_DMA_MODE 0x08 /* enable dma mode */
|
||||||
|
#define FIFO_TRIGGER_1 0x00 /* trigger at 1 char */
|
||||||
|
#define FIFO_TRIGGER_4 0x40 /* trigger at 4 chars */
|
||||||
|
#define FIFO_TRIGGER_8 0x80 /* trigger at 8 chars */
|
||||||
|
#define FIFO_TRIGGER_14 0xc0 /* trigger at 14 chars */
|
||||||
|
|
||||||
|
// 线路控制寄存器
|
||||||
|
/* character format control register */
|
||||||
|
#define CFCR_DLAB 0x80 /* divisor latch */
|
||||||
|
#define CFCR_SBREAK 0x40 /* send break */
|
||||||
|
#define CFCR_PZERO 0x30 /* zero parity */
|
||||||
|
#define CFCR_PONE 0x20 /* one parity */
|
||||||
|
#define CFCR_PEVEN 0x10 /* even parity */
|
||||||
|
#define CFCR_PODD 0x00 /* odd parity */
|
||||||
|
#define CFCR_PENAB 0x08 /* parity enable */
|
||||||
|
#define CFCR_STOPB 0x04 /* 2 stop bits */
|
||||||
|
#define CFCR_8BITS 0x03 /* 8 data bits */
|
||||||
|
#define CFCR_7BITS 0x02 /* 7 data bits */
|
||||||
|
#define CFCR_6BITS 0x01 /* 6 data bits */
|
||||||
|
#define CFCR_5BITS 0x00 /* 5 data bits */
|
||||||
|
|
||||||
|
/* modem control register */
|
||||||
|
#define MCR_LOOPBACK 0x10 /* loopback */
|
||||||
|
#define MCR_IENABLE 0x08 /* output 2 = int enable */
|
||||||
|
#define MCR_DRS 0x04 /* output 1 = xxx */
|
||||||
|
#define MCR_RTS 0x02 /* enable RTS */
|
||||||
|
#define MCR_DTR 0x01 /* enable DTR */
|
||||||
|
|
||||||
|
/* line status register */
|
||||||
|
#define LSR_RCV_FIFO 0x80 /* error in receive fifo */
|
||||||
|
#define LSR_TSRE 0x40 /* transmitter empty */
|
||||||
|
#define LSR_TXRDY 0x20 /* transmitter ready */
|
||||||
|
#define LSR_BI 0x10 /* break detected */
|
||||||
|
#define LSR_FE 0x08 /* framing error */
|
||||||
|
#define LSR_PE 0x04 /* parity error */
|
||||||
|
#define LSR_OE 0x02 /* overrun error */
|
||||||
|
#define LSR_RXRDY 0x01 /* receiver ready */
|
||||||
|
#define LSR_RCV_MASK 0x1f
|
||||||
|
|
||||||
|
|
||||||
|
/* UART interrupt enable register value */
|
||||||
|
#define UARTIER_IME (1 << 3)
|
||||||
|
#define UARTIER_ILE (1 << 2)
|
||||||
|
#define UARTIER_ITXE (1 << 1)
|
||||||
|
#define UARTIER_IRXE (1 << 0)
|
||||||
|
|
||||||
|
/* UART line control register value */
|
||||||
|
#define UARTLCR_DLAB (1 << 7)
|
||||||
|
#define UARTLCR_BCB (1 << 6)
|
||||||
|
#define UARTLCR_SPB (1 << 5)
|
||||||
|
#define UARTLCR_EPS (1 << 4)
|
||||||
|
#define UARTLCR_PE (1 << 3)
|
||||||
|
#define UARTLCR_SB (1 << 2)
|
||||||
|
|
||||||
|
/* UART line status register value */
|
||||||
|
#define UARTLSR_ERROR (1 << 7)
|
||||||
|
#define UARTLSR_TE (1 << 6)
|
||||||
|
#define UARTLSR_TFE (1 << 5)
|
||||||
|
#define UARTLSR_BI (1 << 4)
|
||||||
|
#define UARTLSR_FE (1 << 3)
|
||||||
|
#define UARTLSR_PE (1 << 2)
|
||||||
|
#define UARTLSR_OE (1 << 1)
|
||||||
|
#define UARTLSR_DR (1 << 0)
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,89 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2019, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-04-05 bigmagic Initial version
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @addtogroup ls2k
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*@{*/
|
||||||
|
|
||||||
|
#include <rtthread.h>
|
||||||
|
#include <rthw.h>
|
||||||
|
#include <exception.h>
|
||||||
|
|
||||||
|
#define MAX_INTR 32
|
||||||
|
|
||||||
|
static struct rt_irq_desc irq_handle_table[MAX_INTR];
|
||||||
|
|
||||||
|
static void rt_hw_interrupt_handler(int vector, void *param)
|
||||||
|
{
|
||||||
|
rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* This function will initialize hardware interrupt
|
||||||
|
*/
|
||||||
|
void rt_hw_interrupt_init(void)
|
||||||
|
{
|
||||||
|
rt_uint32_t idx;
|
||||||
|
rt_memset(irq_handle_table, 0x00, sizeof(irq_handle_table));
|
||||||
|
for (idx = 0; idx < MAX_INTR; idx ++)
|
||||||
|
{
|
||||||
|
irq_handle_table[idx].handler = rt_hw_interrupt_handler;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
|
||||||
|
void *param, const char *name)
|
||||||
|
{
|
||||||
|
rt_isr_handler_t old_handler = RT_NULL;
|
||||||
|
|
||||||
|
if (vector >= 0 && vector < MAX_INTR)
|
||||||
|
{
|
||||||
|
old_handler = irq_handle_table[vector].handler;
|
||||||
|
|
||||||
|
#ifdef RT_USING_INTERRUPT_INFO
|
||||||
|
rt_strncpy(irq_handle_table[vector].name, name, RT_NAME_MAX);
|
||||||
|
#endif /* RT_USING_INTERRUPT_INFO */
|
||||||
|
irq_handle_table[vector].handler = handler;
|
||||||
|
irq_handle_table[vector].param = param;
|
||||||
|
}
|
||||||
|
|
||||||
|
return old_handler;
|
||||||
|
}
|
||||||
|
|
||||||
|
void rt_hw_timer_handler(void);
|
||||||
|
|
||||||
|
void rt_do_mips_cpu_irq(rt_uint32_t ip)
|
||||||
|
{
|
||||||
|
void *param;
|
||||||
|
rt_isr_handler_t irq_func;
|
||||||
|
|
||||||
|
if (ip == 7) {
|
||||||
|
rt_hw_timer_handler();
|
||||||
|
} else {
|
||||||
|
irq_func = irq_handle_table[ip].handler;
|
||||||
|
param = irq_handle_table[ip].param;
|
||||||
|
|
||||||
|
/* do interrupt */
|
||||||
|
irq_func(ip, param);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void rt_hw_interrupt_umask(int irq)
|
||||||
|
{
|
||||||
|
mips_unmask_cpu_irq(irq);
|
||||||
|
}
|
||||||
|
|
||||||
|
void rt_hw_interrupt_mask(int irq)
|
||||||
|
{
|
||||||
|
mips_mask_cpu_irq(irq);
|
||||||
|
}
|
||||||
|
/*@}*/
|
||||||
|
|
@ -0,0 +1,13 @@
|
||||||
|
#ifndef _LS2K1000_H__
|
||||||
|
#define _LS2K1000_H__
|
||||||
|
|
||||||
|
#include <mips.h>
|
||||||
|
|
||||||
|
#define UART0_BASE_ADDR 0xbfe00000
|
||||||
|
#define UART0_OFF 0x0
|
||||||
|
#define UART0_BASE CKSEG1ADDR(UART0_BASE_ADDR + UART0_OFF)
|
||||||
|
|
||||||
|
void rt_hw_timer_handler(void);
|
||||||
|
void rt_hw_uart_init(void);
|
||||||
|
|
||||||
|
#endif
|
||||||
Binary file not shown.
|
After Width: | Height: | Size: 469 KiB |
|
|
@ -0,0 +1,141 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-04-05 bigmagic Initial version
|
||||||
|
*/
|
||||||
|
|
||||||
|
OUTPUT_ARCH(mips)
|
||||||
|
GROUP(-lgcc -lc)
|
||||||
|
|
||||||
|
ENTRY(_start)
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
. = 0xffffffff82000000 ;
|
||||||
|
.text :
|
||||||
|
{
|
||||||
|
__ebase_entry = .;
|
||||||
|
KEEP(*(.exc_vectors))
|
||||||
|
__ebase_end = .;
|
||||||
|
start = .;
|
||||||
|
*(.start);
|
||||||
|
. = ALIGN(4);
|
||||||
|
*(.text)
|
||||||
|
*(.text.*)
|
||||||
|
*(.rodata)
|
||||||
|
*(.rodata.*)
|
||||||
|
*(.rodata1)
|
||||||
|
*(.rodata1.*)
|
||||||
|
|
||||||
|
|
||||||
|
/* section information for finsh shell */
|
||||||
|
. = ALIGN(4);
|
||||||
|
__fsymtab_start = .;
|
||||||
|
KEEP(*(FSymTab))
|
||||||
|
__fsymtab_end = .;
|
||||||
|
. = ALIGN(4);
|
||||||
|
__vsymtab_start = .;
|
||||||
|
KEEP(*(VSymTab))
|
||||||
|
__vsymtab_end = .;
|
||||||
|
. = ALIGN(4);
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
__rt_init_start = .;
|
||||||
|
KEEP(*(SORT(.rti_fn*)))
|
||||||
|
__rt_init_end = .;
|
||||||
|
. = ALIGN(4);
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
__rt_utest_tc_tab_start = .;
|
||||||
|
KEEP(*(UtestTcTab))
|
||||||
|
__rt_utest_tc_tab_end = .;
|
||||||
|
. = ALIGN(4);
|
||||||
|
}
|
||||||
|
|
||||||
|
.eh_frame_hdr :
|
||||||
|
{
|
||||||
|
*(.eh_frame_hdr)
|
||||||
|
*(.eh_frame_entry)
|
||||||
|
}
|
||||||
|
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
.data :
|
||||||
|
{
|
||||||
|
*(.data)
|
||||||
|
*(.data.*)
|
||||||
|
|
||||||
|
*(.data1)
|
||||||
|
*(.data1.*)
|
||||||
|
|
||||||
|
. = ALIGN(8);
|
||||||
|
_gp = ABSOLUTE(.); /* Base of small data */
|
||||||
|
|
||||||
|
*(.sdata)
|
||||||
|
*(.sdata.*)
|
||||||
|
}
|
||||||
|
|
||||||
|
.stack :
|
||||||
|
{
|
||||||
|
. = ALIGN(8);
|
||||||
|
_system_stack_start = .;
|
||||||
|
. = . + 0x1000;
|
||||||
|
_system_stack = .;
|
||||||
|
}
|
||||||
|
|
||||||
|
.sbss :
|
||||||
|
{
|
||||||
|
__bss_start = .;
|
||||||
|
*(.sbss)
|
||||||
|
*(.sbss.*)
|
||||||
|
*(.dynsbss)
|
||||||
|
*(.scommon)
|
||||||
|
}
|
||||||
|
|
||||||
|
.bss :
|
||||||
|
{
|
||||||
|
*(.bss)
|
||||||
|
*(.bss.*)
|
||||||
|
*(.dynbss)
|
||||||
|
*(COMMON)
|
||||||
|
__bss_end = .;
|
||||||
|
}
|
||||||
|
_end = .;
|
||||||
|
|
||||||
|
/* Stabs debugging sections. */
|
||||||
|
.stab 0 : { *(.stab) }
|
||||||
|
.stabstr 0 : { *(.stabstr) }
|
||||||
|
.stab.excl 0 : { *(.stab.excl) }
|
||||||
|
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||||
|
.stab.index 0 : { *(.stab.index) }
|
||||||
|
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||||
|
.comment 0 : { *(.comment) }
|
||||||
|
/* DWARF debug sections.
|
||||||
|
* Symbols in the DWARF debugging sections are relative to the beginning
|
||||||
|
* of the section so we begin them at 0. */
|
||||||
|
/* DWARF 1 */
|
||||||
|
.debug 0 : { *(.debug) }
|
||||||
|
.line 0 : { *(.line) }
|
||||||
|
/* GNU DWARF 1 extensions */
|
||||||
|
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||||
|
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||||
|
/* DWARF 1.1 and DWARF 2 */
|
||||||
|
.debug_aranges 0 : { *(.debug_aranges) }
|
||||||
|
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||||
|
/* DWARF 2 */
|
||||||
|
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||||
|
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||||
|
.debug_line 0 : { *(.debug_line) }
|
||||||
|
.debug_frame 0 : { *(.debug_frame) }
|
||||||
|
.debug_str 0 : { *(.debug_str) }
|
||||||
|
.debug_loc 0 : { *(.debug_loc) }
|
||||||
|
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||||
|
/* SGI/MIPS DWARF 2 extensions */
|
||||||
|
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||||
|
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||||
|
.debug_typenames 0 : { *(.debug_typenames) }
|
||||||
|
.debug_varnames 0 : { *(.debug_varnames) }
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,158 @@
|
||||||
|
#ifndef RT_CONFIG_H__
|
||||||
|
#define RT_CONFIG_H__
|
||||||
|
|
||||||
|
/* Automatically generated file; DO NOT EDIT. */
|
||||||
|
/* RT-Thread Configuration */
|
||||||
|
|
||||||
|
/* RT-Thread Kernel */
|
||||||
|
|
||||||
|
#define RT_NAME_MAX 8
|
||||||
|
#define RT_ALIGN_SIZE 4
|
||||||
|
#define RT_THREAD_PRIORITY_32
|
||||||
|
#define RT_THREAD_PRIORITY_MAX 32
|
||||||
|
#define RT_TICK_PER_SECOND 100
|
||||||
|
#define RT_USING_OVERFLOW_CHECK
|
||||||
|
#define RT_USING_HOOK
|
||||||
|
#define RT_USING_IDLE_HOOK
|
||||||
|
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||||
|
#define IDLE_THREAD_STACK_SIZE 2048
|
||||||
|
#define RT_DEBUG
|
||||||
|
|
||||||
|
/* Inter-Thread communication */
|
||||||
|
|
||||||
|
#define RT_USING_SEMAPHORE
|
||||||
|
#define RT_USING_MUTEX
|
||||||
|
#define RT_USING_EVENT
|
||||||
|
#define RT_USING_MAILBOX
|
||||||
|
#define RT_USING_MESSAGEQUEUE
|
||||||
|
|
||||||
|
/* Memory Management */
|
||||||
|
|
||||||
|
#define RT_USING_MEMPOOL
|
||||||
|
#define RT_USING_SMALL_MEM
|
||||||
|
#define RT_USING_HEAP
|
||||||
|
|
||||||
|
/* Kernel Device Object */
|
||||||
|
|
||||||
|
#define RT_USING_DEVICE
|
||||||
|
#define RT_USING_CONSOLE
|
||||||
|
#define RT_CONSOLEBUF_SIZE 256
|
||||||
|
#define RT_CONSOLE_DEVICE_NAME "uart"
|
||||||
|
#define RT_VER_NUM 0x40003
|
||||||
|
#define ARCH_MIPS64
|
||||||
|
|
||||||
|
/* RT-Thread Components */
|
||||||
|
|
||||||
|
#define RT_USING_COMPONENTS_INIT
|
||||||
|
#define RT_USING_USER_MAIN
|
||||||
|
#define RT_MAIN_THREAD_STACK_SIZE 2048
|
||||||
|
#define RT_MAIN_THREAD_PRIORITY 10
|
||||||
|
|
||||||
|
/* C++ features */
|
||||||
|
|
||||||
|
|
||||||
|
/* Command shell */
|
||||||
|
|
||||||
|
#define RT_USING_FINSH
|
||||||
|
#define FINSH_THREAD_NAME "tshell"
|
||||||
|
#define FINSH_USING_HISTORY
|
||||||
|
#define FINSH_HISTORY_LINES 5
|
||||||
|
#define FINSH_USING_SYMTAB
|
||||||
|
#define FINSH_USING_DESCRIPTION
|
||||||
|
#define FINSH_THREAD_PRIORITY 20
|
||||||
|
#define FINSH_THREAD_STACK_SIZE 4096
|
||||||
|
#define FINSH_CMD_SIZE 80
|
||||||
|
#define FINSH_USING_MSH
|
||||||
|
#define FINSH_USING_MSH_DEFAULT
|
||||||
|
#define FINSH_ARG_MAX 10
|
||||||
|
|
||||||
|
/* Device virtual file system */
|
||||||
|
|
||||||
|
|
||||||
|
/* Device Drivers */
|
||||||
|
|
||||||
|
#define RT_USING_DEVICE_IPC
|
||||||
|
#define RT_PIPE_BUFSZ 512
|
||||||
|
#define RT_USING_SERIAL
|
||||||
|
#define RT_SERIAL_USING_DMA
|
||||||
|
#define RT_SERIAL_RB_BUFSZ 64
|
||||||
|
#define RT_USING_PIN
|
||||||
|
|
||||||
|
/* Using USB */
|
||||||
|
|
||||||
|
|
||||||
|
/* POSIX layer and C standard library */
|
||||||
|
|
||||||
|
#define RT_USING_LIBC
|
||||||
|
|
||||||
|
/* Network */
|
||||||
|
|
||||||
|
/* Socket abstraction layer */
|
||||||
|
|
||||||
|
|
||||||
|
/* Network interface device */
|
||||||
|
|
||||||
|
|
||||||
|
/* light weight TCP/IP stack */
|
||||||
|
|
||||||
|
|
||||||
|
/* AT commands */
|
||||||
|
|
||||||
|
|
||||||
|
/* VBUS(Virtual Software BUS) */
|
||||||
|
|
||||||
|
|
||||||
|
/* Utilities */
|
||||||
|
|
||||||
|
|
||||||
|
/* RT-Thread MIPS CPU */
|
||||||
|
|
||||||
|
|
||||||
|
/* RT-Thread online packages */
|
||||||
|
|
||||||
|
/* IoT - internet of things */
|
||||||
|
|
||||||
|
|
||||||
|
/* Wi-Fi */
|
||||||
|
|
||||||
|
/* Marvell WiFi */
|
||||||
|
|
||||||
|
|
||||||
|
/* Wiced WiFi */
|
||||||
|
|
||||||
|
|
||||||
|
/* IoT Cloud */
|
||||||
|
|
||||||
|
|
||||||
|
/* security packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* language packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* multimedia packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* tools packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* system packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* peripheral libraries and drivers */
|
||||||
|
|
||||||
|
|
||||||
|
/* miscellaneous packages */
|
||||||
|
|
||||||
|
|
||||||
|
/* samples: kernel and components samples */
|
||||||
|
|
||||||
|
|
||||||
|
/* Privated Packages of RealThread */
|
||||||
|
|
||||||
|
|
||||||
|
/* Network Utilities */
|
||||||
|
|
||||||
|
#define SOC_LS2K1000
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,60 @@
|
||||||
|
import os
|
||||||
|
# CPU options
|
||||||
|
ARCH='mips'
|
||||||
|
CPU ='gs264'
|
||||||
|
|
||||||
|
if os.getenv('RTT_ROOT'):
|
||||||
|
RTT_ROOT = os.getenv('RTT_ROOT')
|
||||||
|
else:
|
||||||
|
RTT_ROOT = '../..'
|
||||||
|
|
||||||
|
# toolchains options
|
||||||
|
CROSS_TOOL = 'gcc'
|
||||||
|
|
||||||
|
if os.getenv('RTT_CC'):
|
||||||
|
CROSS_TOOL = os.getenv('RTT_CC')
|
||||||
|
|
||||||
|
if CROSS_TOOL == 'gcc':
|
||||||
|
PLATFORM = 'gcc'
|
||||||
|
EXEC_PATH = "/opt/mips-2015.05-19-mips-sde-elf-i686-pc-linux-gnu/mips-2015.05/bin/"
|
||||||
|
# EXEC_PATH = r'D:\mgc\embedded\codebench\bin'
|
||||||
|
else:
|
||||||
|
print('================ERROR===========================')
|
||||||
|
print('Not support %s yet!' % CROSS_TOOL)
|
||||||
|
print('=================================================')
|
||||||
|
exit(0)
|
||||||
|
|
||||||
|
if os.getenv('RTT_EXEC_PATH'):
|
||||||
|
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
|
||||||
|
|
||||||
|
BUILD = 'debug'
|
||||||
|
|
||||||
|
PREFIX = 'mips-sde-elf-'
|
||||||
|
CC = PREFIX + 'gcc'
|
||||||
|
AS = PREFIX + 'gcc'
|
||||||
|
AR = PREFIX + 'ar'
|
||||||
|
LINK = PREFIX + 'gcc'
|
||||||
|
TARGET_EXT = 'elf'
|
||||||
|
SIZE = PREFIX + 'size'
|
||||||
|
OBJDUMP = PREFIX + 'objdump'
|
||||||
|
OBJCPY = PREFIX + 'objcopy'
|
||||||
|
READELF = PREFIX + 'readelf'
|
||||||
|
|
||||||
|
DEVICE = ' -march=mips64r2 -mabi=64 -msoft-float -EL'
|
||||||
|
CFLAGS = DEVICE + ' -G0 -mno-abicalls -fno-pic -fno-builtin -fno-exceptions -ffunction-sections -fomit-frame-pointer'
|
||||||
|
AFLAGS = ' -c' + DEVICE + ' -fno-pic -fno-builtin -mno-abicalls -x assembler-with-cpp'
|
||||||
|
LFLAGS = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T ls2k_ram.lds'
|
||||||
|
CXXFLAGS = CFLAGS
|
||||||
|
|
||||||
|
CPATH = ''
|
||||||
|
LPATH = ''
|
||||||
|
|
||||||
|
if BUILD == 'debug':
|
||||||
|
CFLAGS += ' -O0 -gdwarf-2'
|
||||||
|
AFLAGS += ' -gdwarf-2'
|
||||||
|
else:
|
||||||
|
CFLAGS += ' -O2'
|
||||||
|
|
||||||
|
DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
|
||||||
|
READELF_ACTION = READELF + ' -a $TARGET > rtt.map\n'
|
||||||
|
POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
|
||||||
|
|
@ -77,6 +77,9 @@ config ARCH_ARM_CORTEX_A9
|
||||||
config ARCH_MIPS
|
config ARCH_MIPS
|
||||||
bool
|
bool
|
||||||
|
|
||||||
|
config ARCH_MIPS64
|
||||||
|
bool
|
||||||
|
|
||||||
config ARCH_MIPS_XBURST
|
config ARCH_MIPS_XBURST
|
||||||
bool
|
bool
|
||||||
select ARCH_MIPS
|
select ARCH_MIPS
|
||||||
|
|
|
||||||
|
|
@ -14,6 +14,7 @@
|
||||||
#ifndef __ASM_H__
|
#ifndef __ASM_H__
|
||||||
#define __ASM_H__
|
#define __ASM_H__
|
||||||
|
|
||||||
|
#include <rtconfig.h>
|
||||||
/*
|
/*
|
||||||
* LEAF - declare leaf routine
|
* LEAF - declare leaf routine
|
||||||
*/
|
*/
|
||||||
|
|
@ -117,7 +118,94 @@ symbol = value
|
||||||
/*
|
/*
|
||||||
* Macros to handle different pointer/register sizes for 32/64-bit code
|
* Macros to handle different pointer/register sizes for 32/64-bit code
|
||||||
*/
|
*/
|
||||||
|
#if defined ARCH_MIPS64
|
||||||
|
/*
|
||||||
|
* Size of a register
|
||||||
|
*/
|
||||||
|
#define SZREG 8
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Use the following macros in assemblercode to load/store registers,
|
||||||
|
* pointers etc.
|
||||||
|
*/
|
||||||
|
#define REG_S sd
|
||||||
|
#define REG_L ld
|
||||||
|
#define REG_SUBU dsubu
|
||||||
|
#define REG_ADDU daddu
|
||||||
|
|
||||||
|
/*
|
||||||
|
* How to add/sub/load/store/shift C int variables.
|
||||||
|
*/
|
||||||
|
#define INT_ADD dadd
|
||||||
|
#define INT_ADDU daddu
|
||||||
|
#define INT_ADDI daddi
|
||||||
|
#define INT_ADDIU daddiu
|
||||||
|
#define INT_SUB dsub
|
||||||
|
#define INT_SUBU dsubu
|
||||||
|
#define INT_L ld
|
||||||
|
#define INT_S sd
|
||||||
|
#define INT_SLL dsll
|
||||||
|
#define INT_SLLV dsllv
|
||||||
|
#define INT_SRL dsrl
|
||||||
|
#define INT_SRLV dsrlv
|
||||||
|
#define INT_SRA dsra
|
||||||
|
#define INT_SRAV dsrav
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Use the following macros in assemblercode to load/store registers,
|
||||||
|
* pointers etc.
|
||||||
|
*/
|
||||||
|
#define LONG_ADD dadd
|
||||||
|
#define LONG_ADDU daddu
|
||||||
|
#define LONG_ADDI daddi
|
||||||
|
#define LONG_ADDIU daddiu
|
||||||
|
#define LONG_SUB dsub
|
||||||
|
#define LONG_SUBU dsubu
|
||||||
|
#define LONG_L ld
|
||||||
|
#define LONG_S sd
|
||||||
|
#define LONG_SP sdp
|
||||||
|
#define LONG_SLL dsll
|
||||||
|
#define LONG_SLLV dsllv
|
||||||
|
#define LONG_SRL dsrl
|
||||||
|
#define LONG_SRLV dsrlv
|
||||||
|
#define LONG_SRA dsra
|
||||||
|
#define LONG_SRAV dsrav
|
||||||
|
|
||||||
|
#define LONG .dword
|
||||||
|
#define LONGSIZE 8
|
||||||
|
#define LONGMASK 7
|
||||||
|
#define LONGLOG 3
|
||||||
|
|
||||||
|
/*
|
||||||
|
* How to add/sub/load/store/shift pointers.
|
||||||
|
*/
|
||||||
|
#define PTR_ADD dadd
|
||||||
|
#define PTR_ADDU daddu
|
||||||
|
#define PTR_ADDI daddi
|
||||||
|
#define PTR_ADDIU daddiu
|
||||||
|
#define PTR_SUB dsub
|
||||||
|
#define PTR_SUBU dsubu
|
||||||
|
#define PTR_L ld
|
||||||
|
#define PTR_S sd
|
||||||
|
#define PTR_LA dla
|
||||||
|
#define PTR_LI dli
|
||||||
|
#define PTR_SLL dsll
|
||||||
|
#define PTR_SLLV dsllv
|
||||||
|
#define PTR_SRL dsrl
|
||||||
|
#define PTR_SRLV dsrlv
|
||||||
|
#define PTR_SRA dsra
|
||||||
|
#define PTR_SRAV dsrav
|
||||||
|
|
||||||
|
#define PTR_SCALESHIFT 3
|
||||||
|
|
||||||
|
#define PTR .dword
|
||||||
|
#define PTRSIZE 8
|
||||||
|
#define PTRLOG 3
|
||||||
|
|
||||||
|
#define MFC0 dmfc0
|
||||||
|
#define MTC0 dmtc0
|
||||||
|
|
||||||
|
#else
|
||||||
/*
|
/*
|
||||||
* Size of a register
|
* Size of a register
|
||||||
*/
|
*/
|
||||||
|
|
@ -173,7 +261,11 @@ symbol = value
|
||||||
#define LONG_SRAV srav
|
#define LONG_SRAV srav
|
||||||
|
|
||||||
#define LONG .word
|
#define LONG .word
|
||||||
|
#ifdef ARCH_MIPS64
|
||||||
|
#define LONGSIZE 8
|
||||||
|
#else
|
||||||
#define LONGSIZE 4
|
#define LONGSIZE 4
|
||||||
|
#endif
|
||||||
#define LONGMASK 3
|
#define LONGMASK 3
|
||||||
#define LONGLOG 2
|
#define LONGLOG 2
|
||||||
|
|
||||||
|
|
@ -211,6 +303,7 @@ symbol = value
|
||||||
#define MFC0 mfc0
|
#define MFC0 mfc0
|
||||||
#define MTC0 mtc0
|
#define MTC0 mtc0
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
#define SSNOP sll zero, zero, 1
|
#define SSNOP sll zero, zero, 1
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -25,11 +25,11 @@
|
||||||
*/
|
*/
|
||||||
.globl rt_hw_context_switch
|
.globl rt_hw_context_switch
|
||||||
rt_hw_context_switch:
|
rt_hw_context_switch:
|
||||||
mtc0 ra, CP0_EPC
|
MTC0 ra, CP0_EPC
|
||||||
SAVE_ALL
|
SAVE_ALL
|
||||||
|
|
||||||
sw sp, 0(a0) /* store sp in preempted tasks TCB */
|
REG_S sp, 0(a0) /* store sp in preempted tasks TCB */
|
||||||
lw sp, 0(a1) /* get new task stack pointer */
|
REG_L sp, 0(a1) /* get new task stack pointer */
|
||||||
|
|
||||||
RESTORE_ALL_AND_RET
|
RESTORE_ALL_AND_RET
|
||||||
|
|
||||||
|
|
@ -39,7 +39,7 @@ rt_hw_context_switch:
|
||||||
*/
|
*/
|
||||||
.globl rt_hw_context_switch_to
|
.globl rt_hw_context_switch_to
|
||||||
rt_hw_context_switch_to:
|
rt_hw_context_switch_to:
|
||||||
lw sp, 0(a0) /* get new task stack pointer */
|
REG_L sp, 0(a0) /* get new task stack pointer */
|
||||||
RESTORE_ALL_AND_RET
|
RESTORE_ALL_AND_RET
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
@ -50,17 +50,17 @@ rt_hw_context_switch_to:
|
||||||
.globl rt_interrupt_to_thread
|
.globl rt_interrupt_to_thread
|
||||||
.globl rt_hw_context_switch_interrupt
|
.globl rt_hw_context_switch_interrupt
|
||||||
rt_hw_context_switch_interrupt:
|
rt_hw_context_switch_interrupt:
|
||||||
la t0, rt_thread_switch_interrupt_flag
|
PTR_LA t0, rt_thread_switch_interrupt_flag
|
||||||
lw t1, 0(t0)
|
REG_L t1, 0(t0)
|
||||||
nop
|
nop
|
||||||
bnez t1, _reswitch
|
bnez t1, _reswitch
|
||||||
nop
|
nop
|
||||||
li t1, 0x01 /* set rt_thread_switch_interrupt_flag to 1 */
|
li t1, 0x01 /* set rt_thread_switch_interrupt_flag to 1 */
|
||||||
sw t1, 0(t0)
|
sw t1, 0(t0)
|
||||||
la t0, rt_interrupt_from_thread /* set rt_interrupt_from_thread */
|
PTR_LA t0, rt_interrupt_from_thread /* set rt_interrupt_from_thread */
|
||||||
sw a0, 0(t0)
|
sw a0, 0(t0)
|
||||||
_reswitch:
|
_reswitch:
|
||||||
la t0, rt_interrupt_to_thread /* set rt_interrupt_to_thread */
|
PTR_LA t0, rt_interrupt_to_thread /* set rt_interrupt_to_thread */
|
||||||
sw a1, 0(t0)
|
sw a1, 0(t0)
|
||||||
jr ra
|
jr ra
|
||||||
nop
|
nop
|
||||||
|
|
@ -78,7 +78,7 @@ mips_irq_handle:
|
||||||
/* let k0 keep the current context sp */
|
/* let k0 keep the current context sp */
|
||||||
move k0, sp
|
move k0, sp
|
||||||
/* switch to kernel stack */
|
/* switch to kernel stack */
|
||||||
la sp, _system_stack
|
PTR_LA sp, _system_stack
|
||||||
|
|
||||||
jal rt_interrupt_enter
|
jal rt_interrupt_enter
|
||||||
nop
|
nop
|
||||||
|
|
@ -96,7 +96,7 @@ mips_irq_handle:
|
||||||
* if rt_thread_switch_interrupt_flag set, jump to
|
* if rt_thread_switch_interrupt_flag set, jump to
|
||||||
* rt_hw_context_switch_interrupt_do and do not return
|
* rt_hw_context_switch_interrupt_do and do not return
|
||||||
*/
|
*/
|
||||||
la k0, rt_thread_switch_interrupt_flag
|
PTR_LA k0, rt_thread_switch_interrupt_flag
|
||||||
lw k1, 0(k0)
|
lw k1, 0(k0)
|
||||||
beqz k1, spurious_interrupt
|
beqz k1, spurious_interrupt
|
||||||
nop
|
nop
|
||||||
|
|
@ -106,12 +106,12 @@ mips_irq_handle:
|
||||||
/*
|
/*
|
||||||
* switch to the new thread
|
* switch to the new thread
|
||||||
*/
|
*/
|
||||||
la k0, rt_interrupt_from_thread
|
PTR_LA k0, rt_interrupt_from_thread
|
||||||
lw k1, 0(k0)
|
lw k1, 0(k0)
|
||||||
nop
|
nop
|
||||||
sw sp, 0(k1) /* store sp in preempted task TCB */
|
sw sp, 0(k1) /* store sp in preempted task TCB */
|
||||||
|
|
||||||
la k0, rt_interrupt_to_thread
|
PTR_LA k0, rt_interrupt_to_thread
|
||||||
lw k1, 0(k0)
|
lw k1, 0(k0)
|
||||||
nop
|
nop
|
||||||
lw sp, 0(k1) /* get new task stack pointer */
|
lw sp, 0(k1) /* get new task stack pointer */
|
||||||
|
|
|
||||||
|
|
@ -13,6 +13,9 @@
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#include <mips.h>
|
#include <mips.h>
|
||||||
|
#include <rtconfig.h>
|
||||||
|
|
||||||
|
#include "asm.h"
|
||||||
#include <rtconfig.h>
|
#include <rtconfig.h>
|
||||||
|
|
||||||
.section ".start", "ax"
|
.section ".start", "ax"
|
||||||
|
|
@ -25,27 +28,33 @@ _rtthread_entry:
|
||||||
.globl _start
|
.globl _start
|
||||||
_start:
|
_start:
|
||||||
#endif
|
#endif
|
||||||
la ra, _rtthread_entry
|
PTR_LA ra, _rtthread_entry
|
||||||
|
|
||||||
/* disable interrupt */
|
/* disable interrupt */
|
||||||
mtc0 zero, CP0_CAUSE
|
MTC0 zero, CP0_CAUSE
|
||||||
mtc0 zero, CP0_STATUS # Set CPU to disable interrupt.
|
MTC0 zero, CP0_STATUS # Set CPU to disable interrupt.
|
||||||
ehb
|
ehb
|
||||||
|
|
||||||
|
#ifdef ARCH_MIPS64
|
||||||
|
dli t0, ST0_KX
|
||||||
|
MTC0 t0, CP0_STATUS
|
||||||
|
#endif
|
||||||
|
|
||||||
/* setup stack pointer */
|
/* setup stack pointer */
|
||||||
la sp, _system_stack
|
PTR_LA sp, _system_stack
|
||||||
la gp, _gp
|
PTR_LA gp, _gp
|
||||||
|
|
||||||
bal rt_cpu_early_init
|
bal rt_cpu_early_init
|
||||||
nop
|
nop
|
||||||
|
|
||||||
/* clear bss */
|
/* clear bss */
|
||||||
la t0, __bss_start
|
PTR_LA t0, __bss_start
|
||||||
la t1, __bss_end
|
PTR_LA t1, __bss_end
|
||||||
|
|
||||||
_clr_bss_loop:
|
_clr_bss_loop:
|
||||||
sw zero, 0(t0)
|
sw zero, 0(t0)
|
||||||
bne t0, t1, _clr_bss_loop
|
bne t1, t0, _clr_bss_loop
|
||||||
addiu t0, t0, 4
|
addu t0, 4
|
||||||
|
|
||||||
/* jump to RT-Thread RTOS */
|
/* jump to RT-Thread RTOS */
|
||||||
jal rtthread_startup
|
jal rtthread_startup
|
||||||
nop
|
nop
|
||||||
|
|
|
||||||
|
|
@ -19,10 +19,10 @@
|
||||||
|
|
||||||
/*@{*/
|
/*@{*/
|
||||||
|
|
||||||
extern rt_uint32_t __ebase_entry;
|
extern rt_ubase_t __ebase_entry;
|
||||||
rt_uint32_t rt_interrupt_from_thread;
|
rt_ubase_t rt_interrupt_from_thread;
|
||||||
rt_uint32_t rt_interrupt_to_thread;
|
rt_ubase_t rt_interrupt_to_thread;
|
||||||
rt_uint32_t rt_thread_switch_interrupt_flag;
|
rt_ubase_t rt_thread_switch_interrupt_flag;
|
||||||
|
|
||||||
rt_base_t rt_hw_interrupt_disable(void)
|
rt_base_t rt_hw_interrupt_disable(void)
|
||||||
{
|
{
|
||||||
|
|
@ -101,7 +101,10 @@ static void install_default_exception_handler(void)
|
||||||
|
|
||||||
int rt_hw_exception_init(void)
|
int rt_hw_exception_init(void)
|
||||||
{
|
{
|
||||||
rt_uint32_t ebase = (rt_uint32_t)&__ebase_entry;
|
rt_ubase_t ebase = (rt_ubase_t)&__ebase_entry;
|
||||||
|
#ifdef ARCH_MIPS64
|
||||||
|
ebase |= 0xffffffff00000000;
|
||||||
|
#endif
|
||||||
write_c0_ebase(ebase);
|
write_c0_ebase(ebase);
|
||||||
clear_c0_status(ST0_BEV | ST0_ERL | ST0_EXL);
|
clear_c0_status(ST0_BEV | ST0_ERL | ST0_EXL);
|
||||||
clear_c0_status(ST0_IM | ST0_IE);
|
clear_c0_status(ST0_IM | ST0_IE);
|
||||||
|
|
@ -114,14 +117,14 @@ int rt_hw_exception_init(void)
|
||||||
|
|
||||||
void rt_general_exc_dispatch(struct pt_regs *regs)
|
void rt_general_exc_dispatch(struct pt_regs *regs)
|
||||||
{
|
{
|
||||||
rt_uint32_t cause, exccode;
|
rt_ubase_t exccode = 0;
|
||||||
|
|
||||||
exccode = (cause & CAUSEF_EXCCODE) >> CAUSEB_EXCCODE;
|
|
||||||
|
|
||||||
if (exccode == 0) {
|
if (exccode == 0) {
|
||||||
rt_uint32_t status, pending;
|
rt_ubase_t status, pending;
|
||||||
status = read_c0_status();
|
status = read_c0_status();
|
||||||
pending = (cause & CAUSEF_IP) & (status & ST0_IM);
|
|
||||||
|
pending = (CAUSEF_IP) & (status & ST0_IM);
|
||||||
if (pending & CAUSEF_IP0)
|
if (pending & CAUSEF_IP0)
|
||||||
rt_do_mips_cpu_irq(0);
|
rt_do_mips_cpu_irq(0);
|
||||||
if (pending & CAUSEF_IP1)
|
if (pending & CAUSEF_IP1)
|
||||||
|
|
|
||||||
|
|
@ -7,6 +7,11 @@
|
||||||
* Date Author Notes
|
* Date Author Notes
|
||||||
* 2019-12-04 Jiaxun Yang Initial version
|
* 2019-12-04 Jiaxun Yang Initial version
|
||||||
*/
|
*/
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
#define __ASSEMBLY__
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <mips.h>
|
||||||
|
|
||||||
.section ".exc_vectors", "ax"
|
.section ".exc_vectors", "ax"
|
||||||
.extern tlb_refill_handler
|
.extern tlb_refill_handler
|
||||||
|
|
@ -45,15 +50,15 @@ irq_exception:
|
||||||
/* general exception handler */
|
/* general exception handler */
|
||||||
_general_exception_handler:
|
_general_exception_handler:
|
||||||
.set noreorder
|
.set noreorder
|
||||||
la $k0, mips_irq_handle
|
PTR_LA k0, mips_irq_handle
|
||||||
jr $k0
|
jr k0
|
||||||
nop
|
nop
|
||||||
.set reorder
|
.set reorder
|
||||||
|
|
||||||
/* interrupt handler */
|
/* interrupt handler */
|
||||||
_irq_handler:
|
_irq_handler:
|
||||||
.set noreorder
|
.set noreorder
|
||||||
la $k0, mips_irq_handle
|
PTR_LA k0, mips_irq_handle
|
||||||
jr $k0
|
jr k0
|
||||||
nop
|
nop
|
||||||
.set reorder
|
.set reorder
|
||||||
|
|
|
||||||
|
|
@ -24,7 +24,7 @@
|
||||||
#define _ATYPE_ __PTRDIFF_TYPE__
|
#define _ATYPE_ __PTRDIFF_TYPE__
|
||||||
#define _ATYPE32_ int
|
#define _ATYPE32_ int
|
||||||
#define _ATYPE64_ __s64
|
#define _ATYPE64_ __s64
|
||||||
#ifdef CONFIG_64BIT
|
#ifdef ARCH_MIPS64
|
||||||
#define _CONST64_(x) x ## L
|
#define _CONST64_(x) x ## L
|
||||||
#else
|
#else
|
||||||
#define _CONST64_(x) x ## LL
|
#define _CONST64_(x) x ## LL
|
||||||
|
|
@ -54,7 +54,7 @@
|
||||||
#define XPHYSADDR(a) ((_ACAST64_(a)) & \
|
#define XPHYSADDR(a) ((_ACAST64_(a)) & \
|
||||||
_CONST64_(0x000000ffffffffff))
|
_CONST64_(0x000000ffffffffff))
|
||||||
|
|
||||||
#ifdef CONFIG_64BIT
|
#ifdef ARCH_MIPS64
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Memory segments (64bit kernel mode addresses)
|
* Memory segments (64bit kernel mode addresses)
|
||||||
|
|
@ -75,6 +75,12 @@
|
||||||
#define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
|
#define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2)
|
||||||
#define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
|
#define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3)
|
||||||
|
|
||||||
|
#define KUSEGBASE 0xffffffff00000000
|
||||||
|
#define KSEG0BASE 0xffffffff80000000
|
||||||
|
#define KSEG1BASE 0xffffffffa0000000
|
||||||
|
#define KSEG2BASE 0xffffffffc0000000
|
||||||
|
#define KSEG3BASE 0xffffffffe0000000
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
|
||||||
#define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0BASE)
|
#define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0BASE)
|
||||||
|
|
@ -90,6 +96,12 @@
|
||||||
#define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2BASE)
|
#define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2BASE)
|
||||||
#define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3BASE)
|
#define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3BASE)
|
||||||
|
|
||||||
|
#define CKUSEG 0x00000000
|
||||||
|
#define CKSEG0 0x80000000
|
||||||
|
#define CKSEG1 0xa0000000
|
||||||
|
#define CKSEG2 0xc0000000
|
||||||
|
#define CKSEG3 0xe0000000
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Memory segments (32bit kernel mode addresses)
|
* Memory segments (32bit kernel mode addresses)
|
||||||
* These are the traditional names used in the 32-bit universe.
|
* These are the traditional names used in the 32-bit universe.
|
||||||
|
|
@ -100,14 +112,9 @@
|
||||||
#define KSEG2BASE 0xc0000000
|
#define KSEG2BASE 0xc0000000
|
||||||
#define KSEG3BASE 0xe0000000
|
#define KSEG3BASE 0xe0000000
|
||||||
|
|
||||||
#define CKUSEG 0x00000000
|
|
||||||
#define CKSEG0 0x80000000
|
|
||||||
#define CKSEG1 0xa0000000
|
|
||||||
#define CKSEG2 0xc0000000
|
|
||||||
#define CKSEG3 0xe0000000
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Cache modes for XKPHYS address conversion macros
|
* Cache modes for XKPHYS address conversion macros
|
||||||
*/
|
*/
|
||||||
|
|
|
||||||
|
|
@ -10,13 +10,14 @@
|
||||||
|
|
||||||
#ifndef _MIPS_REGS_H_
|
#ifndef _MIPS_REGS_H_
|
||||||
#define _MIPS_REGS_H_
|
#define _MIPS_REGS_H_
|
||||||
|
#include <rtconfig.h>
|
||||||
#define REG_A0 4
|
#define REG_A0 4
|
||||||
#define REG_SP 29
|
#define REG_SP 29
|
||||||
#define REG_GP 28
|
#define REG_GP 28
|
||||||
#define REG_FP 30
|
#define REG_FP 30
|
||||||
#define REG_RA 31
|
#define REG_RA 31
|
||||||
|
|
||||||
|
#ifndef ARCH_MIPS64
|
||||||
#define zero $0 /* wired zero */
|
#define zero $0 /* wired zero */
|
||||||
#define AT $1 /* assembler temp - uppercase because of ".set at" */
|
#define AT $1 /* assembler temp - uppercase because of ".set at" */
|
||||||
#define v0 $2 /* return value */
|
#define v0 $2 /* return value */
|
||||||
|
|
@ -56,6 +57,49 @@
|
||||||
#define s8 $30 /* same like fp! */
|
#define s8 $30 /* same like fp! */
|
||||||
#define ra $31 /* return address */
|
#define ra $31 /* return address */
|
||||||
|
|
||||||
|
#else
|
||||||
|
|
||||||
|
#define zero $0 /* wired zero */
|
||||||
|
#define AT $at /* assembler temp - uppercase because of ".set at" */
|
||||||
|
#define v0 $2 /* return value - caller saved */
|
||||||
|
#define v1 $3
|
||||||
|
#define a0 $4 /* argument registers */
|
||||||
|
#define a1 $5
|
||||||
|
#define a2 $6
|
||||||
|
#define a3 $7
|
||||||
|
#define a4 $8 /* arg reg 64 bit; caller saved in 32 bit */
|
||||||
|
#define ta0 $8
|
||||||
|
#define a5 $9
|
||||||
|
#define ta1 $9
|
||||||
|
#define a6 $10
|
||||||
|
#define ta2 $10
|
||||||
|
#define a7 $11
|
||||||
|
#define ta3 $11
|
||||||
|
#define t0 $12 /* caller saved */
|
||||||
|
#define t1 $13
|
||||||
|
#define t2 $14
|
||||||
|
#define t3 $15
|
||||||
|
#define s0 $16 /* callee saved */
|
||||||
|
#define s1 $17
|
||||||
|
#define s2 $18
|
||||||
|
#define s3 $19
|
||||||
|
#define s4 $20
|
||||||
|
#define s5 $21
|
||||||
|
#define s6 $22
|
||||||
|
#define s7 $23
|
||||||
|
#define t8 $24 /* caller saved */
|
||||||
|
#define t9 $25 /* callee address for PIC/temp */
|
||||||
|
#define jp $25 /* PIC jump register */
|
||||||
|
#define k0 $26 /* kernel temporary */
|
||||||
|
#define k1 $27
|
||||||
|
#define gp $28 /* global pointer - caller saved for PIC */
|
||||||
|
#define sp $29 /* stack pointer */
|
||||||
|
#define fp $30 /* frame pointer */
|
||||||
|
#define s8 $30 /* callee saved */
|
||||||
|
#define ra $31 /* return address */
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
#define fv0 $f0 /* return value */
|
#define fv0 $f0 /* return value */
|
||||||
#define fv0f $f1
|
#define fv0f $f1
|
||||||
#define fv1 $f2
|
#define fv1 $f2
|
||||||
|
|
|
||||||
|
|
@ -14,6 +14,8 @@
|
||||||
#include "asm.h"
|
#include "asm.h"
|
||||||
#include "mips_regs.h"
|
#include "mips_regs.h"
|
||||||
|
|
||||||
|
#define HI_LO_SIZE 4
|
||||||
|
|
||||||
#define FP_REG_SIZE 8
|
#define FP_REG_SIZE 8
|
||||||
#define NUM_FPU_REGS 16
|
#define NUM_FPU_REGS 16
|
||||||
|
|
||||||
|
|
@ -27,6 +29,7 @@ struct mips_fpu_struct {
|
||||||
};
|
};
|
||||||
|
|
||||||
struct pt_regs {
|
struct pt_regs {
|
||||||
|
#ifndef ARCH_MIPS64
|
||||||
/* Only O32 Need This! */
|
/* Only O32 Need This! */
|
||||||
/* Pad bytes for argument save space on the stack. */
|
/* Pad bytes for argument save space on the stack. */
|
||||||
rt_uint32_t pad0[8];
|
rt_uint32_t pad0[8];
|
||||||
|
|
@ -41,6 +44,18 @@ struct pt_regs {
|
||||||
rt_uint32_t cp0_badvaddr;
|
rt_uint32_t cp0_badvaddr;
|
||||||
rt_uint32_t cp0_cause;
|
rt_uint32_t cp0_cause;
|
||||||
rt_uint32_t cp0_epc;
|
rt_uint32_t cp0_epc;
|
||||||
|
#else
|
||||||
|
/* Saved main processor registers. */
|
||||||
|
unsigned long regs[32];
|
||||||
|
|
||||||
|
/* Saved special registers. */
|
||||||
|
rt_uint32_t cp0_status;
|
||||||
|
rt_uint32_t hi;
|
||||||
|
rt_uint32_t lo;
|
||||||
|
unsigned long cp0_badvaddr;
|
||||||
|
rt_uint32_t cp0_cause;
|
||||||
|
unsigned long cp0_epc;
|
||||||
|
#endif
|
||||||
|
|
||||||
#ifdef RT_USING_FPU
|
#ifdef RT_USING_FPU
|
||||||
/* FPU Registers */
|
/* FPU Registers */
|
||||||
|
|
@ -52,7 +67,11 @@ struct pt_regs {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Note: For call stack o32 ABI has 0x8 shadowsoace Here */
|
/* Note: For call stack o32 ABI has 0x8 shadowsoace Here */
|
||||||
|
#ifdef ARCH_MIPS64
|
||||||
|
#define PT_R0 (0x0 * LONGSIZE) /* 0 */
|
||||||
|
#else
|
||||||
#define PT_R0 (0x8 * LONGSIZE) /* 0 */
|
#define PT_R0 (0x8 * LONGSIZE) /* 0 */
|
||||||
|
#endif
|
||||||
#define PT_R1 ((PT_R0) + LONGSIZE) /* 1 */
|
#define PT_R1 ((PT_R0) + LONGSIZE) /* 1 */
|
||||||
#define PT_R2 ((PT_R1) + LONGSIZE) /* 2 */
|
#define PT_R2 ((PT_R1) + LONGSIZE) /* 2 */
|
||||||
#define PT_R3 ((PT_R2) + LONGSIZE) /* 3 */
|
#define PT_R3 ((PT_R2) + LONGSIZE) /* 3 */
|
||||||
|
|
@ -89,8 +108,8 @@ struct pt_regs {
|
||||||
* Saved special registers
|
* Saved special registers
|
||||||
*/
|
*/
|
||||||
#define PT_STATUS ((PT_R31) + LONGSIZE) /* 32 */
|
#define PT_STATUS ((PT_R31) + LONGSIZE) /* 32 */
|
||||||
#define PT_HI ((PT_STATUS) + LONGSIZE) /* 33 */
|
#define PT_HI ((PT_STATUS) + HI_LO_SIZE) /* 33 */
|
||||||
#define PT_LO ((PT_HI) + LONGSIZE) /* 34 */
|
#define PT_LO ((PT_HI) + HI_LO_SIZE) /* 34 */
|
||||||
#define PT_BADVADDR ((PT_LO) + LONGSIZE) /* 35 */
|
#define PT_BADVADDR ((PT_LO) + LONGSIZE) /* 35 */
|
||||||
#define PT_CAUSE ((PT_BADVADDR) + LONGSIZE) /* 36 */
|
#define PT_CAUSE ((PT_BADVADDR) + LONGSIZE) /* 36 */
|
||||||
#define PT_EPC ((PT_CAUSE) + LONGSIZE) /* 37 */
|
#define PT_EPC ((PT_CAUSE) + LONGSIZE) /* 37 */
|
||||||
|
|
@ -115,9 +134,9 @@ struct pt_regs {
|
||||||
#define PT_FPU_R28 ((PT_FPU_R26) + FP_REG_SIZE)
|
#define PT_FPU_R28 ((PT_FPU_R26) + FP_REG_SIZE)
|
||||||
#define PT_FPU_R30 ((PT_FPU_R28) + FP_REG_SIZE)
|
#define PT_FPU_R30 ((PT_FPU_R28) + FP_REG_SIZE)
|
||||||
#define PT_FPU_FCSR31 ((PT_FPU_R30) + FP_REG_SIZE)
|
#define PT_FPU_FCSR31 ((PT_FPU_R30) + FP_REG_SIZE)
|
||||||
#define PT_FPU_PAD0 ((PT_FPU_FCSR31) + LONGSIZE)
|
#define PT_FPU_PAD0 ((PT_FPU_FCSR31) + 4)
|
||||||
|
|
||||||
#define PT_FPU_END ((PT_FPU_PAD0) + LONGSIZE)
|
#define PT_FPU_END ((PT_FPU_PAD0) + 4)
|
||||||
#define PT_SIZE PT_FPU_END
|
#define PT_SIZE PT_FPU_END
|
||||||
#else
|
#else
|
||||||
#define PT_SIZE PT_REG_END
|
#define PT_SIZE PT_REG_END
|
||||||
|
|
|
||||||
|
|
@ -16,8 +16,8 @@ register rt_uint32_t $GP __asm__ ("$28");
|
||||||
|
|
||||||
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_addr, void *texit)
|
rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_addr, void *texit)
|
||||||
{
|
{
|
||||||
static rt_uint32_t wSR=0;
|
static rt_ubase_t wSR=0;
|
||||||
static rt_uint32_t wGP;
|
static rt_ubase_t wGP;
|
||||||
rt_uint8_t *stk;
|
rt_uint8_t *stk;
|
||||||
|
|
||||||
struct pt_regs *pt;
|
struct pt_regs *pt;
|
||||||
|
|
@ -25,26 +25,27 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_ad
|
||||||
rt_uint32_t i;
|
rt_uint32_t i;
|
||||||
|
|
||||||
/* Get stack aligned */
|
/* Get stack aligned */
|
||||||
stk = (rt_uint8_t *)RT_ALIGN_DOWN((rt_uint32_t)stack_addr, 8);
|
stk = (rt_uint8_t *)RT_ALIGN_DOWN((rt_ubase_t)stack_addr, 8);
|
||||||
stk -= sizeof(struct pt_regs);
|
stk -= sizeof(struct pt_regs);
|
||||||
pt = (struct pt_regs*)stk;
|
pt = (struct pt_regs*)stk;
|
||||||
|
|
||||||
|
#ifndef ARCH_MIPS64
|
||||||
for (i = 0; i < 8; ++i)
|
for (i = 0; i < 8; ++i)
|
||||||
{
|
{
|
||||||
pt->pad0[i] = 0xdeadbeef;
|
pt->pad0[i] = 0xdeadbeef;
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
/* Fill Stack register numbers */
|
/* Fill Stack register numbers */
|
||||||
for (i = 0; i < 32; ++i)
|
for (i = 0; i < 32; ++i)
|
||||||
{
|
{
|
||||||
pt->regs[i] = 0xdeadbeef;
|
pt->regs[i] = 0xdeadbeef;
|
||||||
}
|
}
|
||||||
|
|
||||||
pt->regs[REG_SP] = (rt_uint32_t)stk;
|
pt->regs[REG_SP] = (rt_ubase_t)stk;
|
||||||
pt->regs[REG_A0] = (rt_uint32_t)parameter;
|
pt->regs[REG_A0] = (rt_ubase_t)parameter;
|
||||||
pt->regs[REG_GP] = (rt_uint32_t)$GP;
|
pt->regs[REG_GP] = (rt_ubase_t)$GP;
|
||||||
pt->regs[REG_FP] = (rt_uint32_t)0x0;
|
pt->regs[REG_FP] = (rt_ubase_t)0x0;
|
||||||
pt->regs[REG_RA] = (rt_uint32_t)texit;
|
pt->regs[REG_RA] = (rt_ubase_t)texit;
|
||||||
|
|
||||||
pt->hi = 0x0;
|
pt->hi = 0x0;
|
||||||
pt->lo = 0x0;
|
pt->lo = 0x0;
|
||||||
|
|
@ -53,7 +54,7 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_ad
|
||||||
pt->cp0_status |= (ST0_CU1 | ST0_FR);
|
pt->cp0_status |= (ST0_CU1 | ST0_FR);
|
||||||
#endif
|
#endif
|
||||||
pt->cp0_cause = read_c0_cause();
|
pt->cp0_cause = read_c0_cause();
|
||||||
pt->cp0_epc = (rt_uint32_t)tentry;
|
pt->cp0_epc = (rt_ubase_t)tentry;
|
||||||
pt->cp0_badvaddr = 0x0;
|
pt->cp0_badvaddr = 0x0;
|
||||||
|
|
||||||
return stk;
|
return stk;
|
||||||
|
|
|
||||||
|
|
@ -60,11 +60,11 @@
|
||||||
mfhi v1
|
mfhi v1
|
||||||
LONG_S $8, PT_R8(sp)
|
LONG_S $8, PT_R8(sp)
|
||||||
LONG_S $9, PT_R9(sp)
|
LONG_S $9, PT_R9(sp)
|
||||||
LONG_S v1, PT_HI(sp)
|
sw v1, PT_HI(sp)
|
||||||
mflo v1
|
mflo v1
|
||||||
LONG_S $10, PT_R10(sp)
|
LONG_S $10, PT_R10(sp)
|
||||||
LONG_S $11, PT_R11(sp)
|
LONG_S $11, PT_R11(sp)
|
||||||
LONG_S v1, PT_LO(sp)
|
sw v1, PT_LO(sp)
|
||||||
LONG_S $12, PT_R12(sp)
|
LONG_S $12, PT_R12(sp)
|
||||||
LONG_S $13, PT_R13(sp)
|
LONG_S $13, PT_R13(sp)
|
||||||
LONG_S $14, PT_R14(sp)
|
LONG_S $14, PT_R14(sp)
|
||||||
|
|
@ -159,11 +159,11 @@
|
||||||
.endm
|
.endm
|
||||||
|
|
||||||
.macro RESTORE_TEMP
|
.macro RESTORE_TEMP
|
||||||
LONG_L $24, PT_LO(sp)
|
lw $24, PT_LO(sp)
|
||||||
LONG_L $8, PT_R8(sp)
|
LONG_L $8, PT_R8(sp)
|
||||||
LONG_L $9, PT_R9(sp)
|
LONG_L $9, PT_R9(sp)
|
||||||
mtlo $24
|
mtlo $24
|
||||||
LONG_L $24, PT_HI(sp)
|
lw $24, PT_HI(sp)
|
||||||
LONG_L $10, PT_R10(sp)
|
LONG_L $10, PT_R10(sp)
|
||||||
LONG_L $11, PT_R11(sp)
|
LONG_L $11, PT_R11(sp)
|
||||||
mthi $24
|
mthi $24
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,14 @@
|
||||||
|
# RT-Thread building script for component
|
||||||
|
|
||||||
|
from building import *
|
||||||
|
|
||||||
|
Import('rtconfig')
|
||||||
|
|
||||||
|
cwd = GetCurrentDir()
|
||||||
|
src = Glob('*.c') + Glob('*.cpp') + Glob('*_gcc.S')
|
||||||
|
CPPPATH = [cwd]
|
||||||
|
ASFLAGS = ''
|
||||||
|
|
||||||
|
group = DefineGroup('cpu', src, depend = [''], CPPPATH = CPPPATH, ASFLAGS = ASFLAGS)
|
||||||
|
|
||||||
|
Return('group')
|
||||||
|
|
@ -0,0 +1,26 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2006-2020, RT-Thread Development Team
|
||||||
|
*
|
||||||
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
|
*
|
||||||
|
* Change Logs:
|
||||||
|
* Date Author Notes
|
||||||
|
* 2020-04-05 bigmagic Initial version
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
#define __ASSEMBLY__
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <mips.h>
|
||||||
|
|
||||||
|
.section ".text", "ax"
|
||||||
|
.set noreorder
|
||||||
|
|
||||||
|
.globl rt_cpu_early_init
|
||||||
|
rt_cpu_early_init:
|
||||||
|
mfc0 t0, CP0_CONFIG
|
||||||
|
ori t0, 3
|
||||||
|
mtc0 t0, CP0_CONFIG
|
||||||
|
ehb
|
||||||
|
jr ra
|
||||||
Loading…
Reference in New Issue