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mirror of https://github.com/RT-Thread/rt-thread.git synced 2025-01-18 17:03:30 +08:00

[bsp][stm32][stm32f767-atk-apollo] Add LCD driver port

This commit is contained in:
gbcwbz 2019-09-17 13:59:14 +08:00
parent ae7a33c27c
commit b789721307
10 changed files with 614 additions and 238 deletions

View File

@ -7,6 +7,7 @@
# RT-Thread Kernel # RT-Thread Kernel
# #
CONFIG_RT_NAME_MAX=8 CONFIG_RT_NAME_MAX=8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set # CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE=4 CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set # CONFIG_RT_THREAD_PRIORITY_8 is not set
@ -47,11 +48,11 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
# Memory Management # Memory Management
# #
CONFIG_RT_USING_MEMPOOL=y CONFIG_RT_USING_MEMPOOL=y
# CONFIG_RT_USING_MEMHEAP is not set CONFIG_RT_USING_MEMHEAP=y
# CONFIG_RT_USING_NOHEAP is not set # CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM=y # CONFIG_RT_USING_SMALL_MEM is not set
# CONFIG_RT_USING_SLAB is not set # CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMTRACE is not set CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
CONFIG_RT_USING_HEAP=y CONFIG_RT_USING_HEAP=y
# #
@ -63,8 +64,9 @@ CONFIG_RT_USING_DEVICE=y
CONFIG_RT_USING_CONSOLE=y CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_RT_VER_NUM=0x40000 CONFIG_RT_VER_NUM=0x40002
CONFIG_ARCH_ARM=y CONFIG_ARCH_ARM=y
CONFIG_RT_USING_CPU_FFS=y
CONFIG_ARCH_ARM_CORTEX_M=y CONFIG_ARCH_ARM_CORTEX_M=y
CONFIG_ARCH_ARM_CORTEX_M7=y CONFIG_ARCH_ARM_CORTEX_M7=y
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
@ -111,8 +113,10 @@ CONFIG_FINSH_ARG_MAX=10
# #
CONFIG_RT_USING_DEVICE_IPC=y CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512 CONFIG_RT_PIPE_BUFSZ=512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL=y CONFIG_RT_USING_SERIAL=y
CONFIG_RT_SERIAL_USING_DMA=y CONFIG_RT_SERIAL_USING_DMA=y
CONFIG_RT_SERIAL_RB_BUFSZ=64
# CONFIG_RT_USING_CAN is not set # CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set # CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set # CONFIG_RT_USING_CPUTIME is not set
@ -122,17 +126,17 @@ CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_PWM is not set # CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set # CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set # CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_MTD is not set
# CONFIG_RT_USING_PM is not set # CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set # CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set # CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set # CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set # CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set # CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# # CONFIG_RT_USING_TOUCH is not set
# Using WiFi # CONFIG_RT_USING_HWCRYPTO is not set
# # CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_WIFI is not set # CONFIG_RT_USING_WIFI is not set
# #
@ -146,6 +150,7 @@ CONFIG_RT_USING_PIN=y
# #
# CONFIG_RT_USING_LIBC is not set # CONFIG_RT_USING_LIBC is not set
# CONFIG_RT_USING_PTHREADS is not set # CONFIG_RT_USING_PTHREADS is not set
CONFIG_RT_LIBC_USING_TIME=y
# #
# Network # Network
@ -156,16 +161,16 @@ CONFIG_RT_USING_PIN=y
# #
# CONFIG_RT_USING_SAL is not set # CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
# #
# light weight TCP/IP stack # light weight TCP/IP stack
# #
# CONFIG_RT_USING_LWIP is not set # CONFIG_RT_USING_LWIP is not set
#
# Modbus master and slave stack
#
# CONFIG_RT_USING_MODBUS is not set
# #
# AT commands # AT commands
# #
@ -179,16 +184,9 @@ CONFIG_RT_USING_PIN=y
# #
# Utilities # Utilities
# #
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set # CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set # CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set # CONFIG_RT_USING_UTEST is not set
#
# ARM CMSIS
#
# CONFIG_RT_USING_CMSIS_OS is not set
# CONFIG_RT_USING_RTT_CMSIS is not set
# CONFIG_RT_USING_LWP is not set # CONFIG_RT_USING_LWP is not set
# #
@ -205,6 +203,8 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_WEBTERMINAL is not set # CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set # CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set # CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set # CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set # CONFIG_PKG_USING_NANOPB is not set
@ -222,10 +222,12 @@ CONFIG_RT_USING_PIN=y
# Wiced WiFi # Wiced WiFi
# #
# CONFIG_PKG_USING_WLAN_WICED is not set # CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set # CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set # CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set # CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_AT_DEVICE is not set # CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set # CONFIG_PKG_USING_WIZNET is not set
# #
@ -235,7 +237,14 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_GAGENT_CLOUD is not set # CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set # CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set # CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOTKIT is not set # CONFIG_PKG_USING_TENCENT_IOTHUB is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# #
# security packages # security packages
@ -256,6 +265,8 @@ CONFIG_RT_USING_PIN=y
# #
# CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set # CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
# #
# tools packages # tools packages
@ -267,6 +278,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_RDB is not set # CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set # CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ADBD is not set
# #
# system packages # system packages
@ -284,21 +296,35 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_CMSIS is not set # CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set # CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set # CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
# #
# peripheral libraries and drivers # peripheral libraries and drivers
# #
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set # CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set # CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AHT10 is not set
# CONFIG_PKG_USING_AP3216C is not set
# CONFIG_PKG_USING_STM32_SDIO is not set # CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set # CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set # CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_MPU6XXX is not set
# CONFIG_PKG_USING_PCF8574 is not set # CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set # CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_LCD_DRIVERS is not set
# #
# miscellaneous packages # miscellaneous packages
@ -314,6 +340,7 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_DSTR is not set # CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set # CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set # CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# #
# samples: kernel and components samples # samples: kernel and components samples
@ -324,6 +351,8 @@ CONFIG_RT_USING_PIN=y
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set # CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set # CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
CONFIG_SOC_FAMILY_STM32=y CONFIG_SOC_FAMILY_STM32=y
CONFIG_SOC_SERIES_STM32F7=y CONFIG_SOC_SERIES_STM32F7=y
@ -337,12 +366,13 @@ CONFIG_SOC_STM32F767IG=y
# #
CONFIG_BSP_USING_USB_TO_USART=y CONFIG_BSP_USING_USB_TO_USART=y
# CONFIG_BSP_USING_RS232 is not set # CONFIG_BSP_USING_RS232 is not set
# CONFIG_BSP_USING_SDRAM is not set CONFIG_BSP_USING_SDRAM=y
# CONFIG_BSP_USING_QSPI_FLASH is not set # CONFIG_BSP_USING_QSPI_FLASH is not set
# CONFIG_BSP_USING_MPU9250 is not set # CONFIG_BSP_USING_MPU9250 is not set
# CONFIG_BSP_USING_ETH is not set # CONFIG_BSP_USING_ETH is not set
# CONFIG_BSP_USING_POT is not set # CONFIG_BSP_USING_POT is not set
# CONFIG_BSP_USING_SDCARD is not set # CONFIG_BSP_USING_SDCARD is not set
CONFIG_BSP_USING_LCD=y
# #
# On-chip Peripheral Drivers # On-chip Peripheral Drivers
@ -364,6 +394,10 @@ CONFIG_BSP_USING_UART1=y
# CONFIG_BSP_USING_ONCHIP_RTC is not set # CONFIG_BSP_USING_ONCHIP_RTC is not set
# CONFIG_BSP_USING_WDT is not set # CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_SDIO is not set # CONFIG_BSP_USING_SDIO is not set
CONFIG_BSP_USING_LTDC=y
# CONFIG_BSP_USING_CRC is not set
# CONFIG_BSP_USING_RNG is not set
# CONFIG_BSP_USING_UDID is not set
# #
# Board extended module Drivers # Board extended module Drivers

File diff suppressed because one or more lines are too long

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@ -17,123 +17,144 @@ KeepUserPlacement=false
Mcu.Family=STM32F7 Mcu.Family=STM32F7
Mcu.IP0=ADC1 Mcu.IP0=ADC1
Mcu.IP1=CORTEX_M7 Mcu.IP1=CORTEX_M7
Mcu.IP10=SPI2 Mcu.IP10=SDMMC1
Mcu.IP11=SYS Mcu.IP11=SPI2
Mcu.IP12=TIM2 Mcu.IP12=SYS
Mcu.IP13=TIM3 Mcu.IP13=TIM2
Mcu.IP14=TIM11 Mcu.IP14=TIM3
Mcu.IP15=TIM13 Mcu.IP15=TIM11
Mcu.IP16=TIM14 Mcu.IP16=TIM13
Mcu.IP17=USART1 Mcu.IP17=TIM14
Mcu.IP18=USART2 Mcu.IP18=USART1
Mcu.IP19=USART2
Mcu.IP2=ETH Mcu.IP2=ETH
Mcu.IP3=FMC Mcu.IP3=FMC
Mcu.IP4=IWDG Mcu.IP4=IWDG
Mcu.IP5=NVIC Mcu.IP5=LTDC
Mcu.IP6=QUADSPI Mcu.IP6=NVIC
Mcu.IP7=RCC Mcu.IP7=QUADSPI
Mcu.IP8=RTC Mcu.IP8=RCC
Mcu.IP9=SDMMC1 Mcu.IP9=RTC
Mcu.IPNb=19 Mcu.IPNb=20
Mcu.Name=STM32F767I(G-I)Tx Mcu.Name=STM32F767I(G-I)Tx
Mcu.Package=LQFP176 Mcu.Package=LQFP176
Mcu.Pin0=PC14/OSC32_IN Mcu.Pin0=PC14/OSC32_IN
Mcu.Pin1=PC15/OSC32_OUT Mcu.Pin1=PC15/OSC32_OUT
Mcu.Pin10=PF8 Mcu.Pin10=PF5
Mcu.Pin11=PF9 Mcu.Pin100=VP_TIM14_VS_ClockSourceINT
Mcu.Pin12=PH0/OSC_IN Mcu.Pin11=PF6
Mcu.Pin13=PH1/OSC_OUT Mcu.Pin12=PF7
Mcu.Pin14=PC0 Mcu.Pin13=PF8
Mcu.Pin15=PC1 Mcu.Pin14=PF9
Mcu.Pin16=PC2 Mcu.Pin15=PF10
Mcu.Pin17=PC3 Mcu.Pin16=PH0/OSC_IN
Mcu.Pin18=PA1 Mcu.Pin17=PH1/OSC_OUT
Mcu.Pin19=PA2 Mcu.Pin18=PC0
Mcu.Pin2=PF0 Mcu.Pin19=PC1
Mcu.Pin20=PA3 Mcu.Pin2=PI9
Mcu.Pin21=PA5 Mcu.Pin20=PC2
Mcu.Pin22=PA7 Mcu.Pin21=PC3
Mcu.Pin23=PC4 Mcu.Pin22=PA1
Mcu.Pin24=PC5 Mcu.Pin23=PA2
Mcu.Pin25=PB0 Mcu.Pin24=PH4
Mcu.Pin26=PB2 Mcu.Pin25=PA3
Mcu.Pin27=PF11 Mcu.Pin26=PA5
Mcu.Pin28=PF12 Mcu.Pin27=PA6
Mcu.Pin29=PF13 Mcu.Pin28=PA7
Mcu.Pin3=PF1 Mcu.Pin29=PC4
Mcu.Pin30=PF14 Mcu.Pin3=PI10
Mcu.Pin31=PF15 Mcu.Pin30=PC5
Mcu.Pin32=PG0 Mcu.Pin31=PB0
Mcu.Pin33=PG1 Mcu.Pin32=PB1
Mcu.Pin34=PE7 Mcu.Pin33=PB2
Mcu.Pin35=PE8 Mcu.Pin34=PF11
Mcu.Pin36=PE9 Mcu.Pin35=PF12
Mcu.Pin37=PE10 Mcu.Pin36=PF13
Mcu.Pin38=PE11 Mcu.Pin37=PF14
Mcu.Pin39=PE12 Mcu.Pin38=PF15
Mcu.Pin4=PF2 Mcu.Pin39=PG0
Mcu.Pin40=PE13 Mcu.Pin4=PI11
Mcu.Pin41=PE14 Mcu.Pin40=PG1
Mcu.Pin42=PE15 Mcu.Pin41=PE7
Mcu.Pin43=PB11 Mcu.Pin42=PE8
Mcu.Pin44=PB13 Mcu.Pin43=PE9
Mcu.Pin45=PB14 Mcu.Pin44=PE10
Mcu.Pin46=PB15 Mcu.Pin45=PE11
Mcu.Pin47=PD8 Mcu.Pin46=PE12
Mcu.Pin48=PD9 Mcu.Pin47=PE13
Mcu.Pin49=PD10 Mcu.Pin48=PE14
Mcu.Pin5=PF3 Mcu.Pin49=PE15
Mcu.Pin50=PD14 Mcu.Pin5=PF0
Mcu.Pin51=PD15 Mcu.Pin50=PB10
Mcu.Pin52=PG2 Mcu.Pin51=PB11
Mcu.Pin53=PG4 Mcu.Pin52=PH9
Mcu.Pin54=PG5 Mcu.Pin53=PH10
Mcu.Pin55=PG8 Mcu.Pin54=PH11
Mcu.Pin56=PC8 Mcu.Pin55=PB13
Mcu.Pin57=PC9 Mcu.Pin56=PB14
Mcu.Pin58=PA9 Mcu.Pin57=PB15
Mcu.Pin59=PA10 Mcu.Pin58=PD8
Mcu.Pin6=PF4 Mcu.Pin59=PD9
Mcu.Pin60=PA13 Mcu.Pin6=PF1
Mcu.Pin61=PA14 Mcu.Pin60=PD10
Mcu.Pin62=PC10 Mcu.Pin61=PD14
Mcu.Pin63=PC11 Mcu.Pin62=PD15
Mcu.Pin64=PC12 Mcu.Pin63=PG2
Mcu.Pin65=PD0 Mcu.Pin64=PG4
Mcu.Pin66=PD1 Mcu.Pin65=PG5
Mcu.Pin67=PD2 Mcu.Pin66=PG6
Mcu.Pin68=PD5 Mcu.Pin67=PG7
Mcu.Pin69=PD6 Mcu.Pin68=PG8
Mcu.Pin7=PF5 Mcu.Pin69=PC8
Mcu.Pin70=PG13 Mcu.Pin7=PF2
Mcu.Pin71=PG14 Mcu.Pin70=PC9
Mcu.Pin72=PG15 Mcu.Pin71=PA8
Mcu.Pin73=PB6 Mcu.Pin72=PA9
Mcu.Pin74=VP_IWDG_VS_IWDG Mcu.Pin73=PA10
Mcu.Pin75=VP_RTC_VS_RTC_Activate Mcu.Pin74=PA13
Mcu.Pin76=VP_SYS_VS_Systick Mcu.Pin75=PH14
Mcu.Pin77=VP_TIM3_VS_ClockSourceINT Mcu.Pin76=PI2
Mcu.Pin78=VP_TIM11_VS_ClockSourceINT Mcu.Pin77=PA14
Mcu.Pin79=VP_TIM13_VS_ClockSourceINT Mcu.Pin78=PC10
Mcu.Pin8=PF6 Mcu.Pin79=PC11
Mcu.Pin80=VP_TIM14_VS_ClockSourceINT Mcu.Pin8=PF3
Mcu.Pin9=PF7 Mcu.Pin80=PC12
Mcu.PinsNb=81 Mcu.Pin81=PD0
Mcu.Pin82=PD1
Mcu.Pin83=PD2
Mcu.Pin84=PD5
Mcu.Pin85=PD6
Mcu.Pin86=PG12
Mcu.Pin87=PG13
Mcu.Pin88=PG14
Mcu.Pin89=PG15
Mcu.Pin9=PF4
Mcu.Pin90=PB6
Mcu.Pin91=PB8
Mcu.Pin92=PB9
Mcu.Pin93=PI5
Mcu.Pin94=VP_IWDG_VS_IWDG
Mcu.Pin95=VP_RTC_VS_RTC_Activate
Mcu.Pin96=VP_SYS_VS_Systick
Mcu.Pin97=VP_TIM3_VS_ClockSourceINT
Mcu.Pin98=VP_TIM11_VS_ClockSourceINT
Mcu.Pin99=VP_TIM13_VS_ClockSourceINT
Mcu.PinsNb=101
Mcu.ThirdPartyNb=0 Mcu.ThirdPartyNb=0
Mcu.UserConstants= Mcu.UserConstants=
Mcu.UserName=STM32F767IGTx Mcu.UserName=STM32F767IGTx
MxCube.Version=5.0.0 MxCube.Version=5.3.0
MxDb.Version=DB.5.0.0 MxDb.Version=DB.5.0.30
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
PA1.Mode=RMII PA1.Mode=RMII
PA1.Signal=ETH_REF_CLK PA1.Signal=ETH_REF_CLK
PA10.Locked=true PA10.Locked=true
@ -147,13 +168,21 @@ PA2.Mode=RMII
PA2.Signal=ETH_MDIO PA2.Signal=ETH_MDIO
PA3.Signal=S_TIM2_CH4 PA3.Signal=S_TIM2_CH4
PA5.Signal=ADCx_IN5 PA5.Signal=ADCx_IN5
PA6.Mode=RGB565
PA6.Signal=LTDC_G2
PA7.Mode=RMII PA7.Mode=RMII
PA7.Signal=ETH_CRS_DV PA7.Signal=ETH_CRS_DV
PA8.Mode=RGB565
PA8.Signal=LTDC_B3
PA9.Locked=true PA9.Locked=true
PA9.Mode=Asynchronous PA9.Mode=Asynchronous
PA9.Signal=USART1_TX PA9.Signal=USART1_TX
PB0.Locked=true PB0.Locked=true
PB0.Signal=S_TIM3_CH3 PB0.Signal=S_TIM3_CH3
PB1.Mode=RGB565
PB1.Signal=LTDC_R6
PB10.Mode=RGB565
PB10.Signal=LTDC_G4
PB11.Locked=true PB11.Locked=true
PB11.Mode=RMII PB11.Mode=RMII
PB11.Signal=ETH_TX_EN PB11.Signal=ETH_TX_EN
@ -172,6 +201,10 @@ PB2.Signal=QUADSPI_CLK
PB6.Locked=true PB6.Locked=true
PB6.Mode=Single Bank 1 PB6.Mode=Single Bank 1
PB6.Signal=QUADSPI_BK1_NCS PB6.Signal=QUADSPI_BK1_NCS
PB8.Mode=RGB565
PB8.Signal=LTDC_B6
PB9.Mode=RGB565
PB9.Signal=LTDC_B7
PC0.Signal=FMC_SDNWE PC0.Signal=FMC_SDNWE
PC1.Mode=RMII PC1.Mode=RMII
PC1.Signal=ETH_MDC PC1.Signal=ETH_MDC
@ -229,6 +262,8 @@ PE8.Signal=FMC_D5_DA5
PE9.Signal=FMC_D6_DA6 PE9.Signal=FMC_D6_DA6
PF0.Signal=FMC_A0 PF0.Signal=FMC_A0
PF1.Signal=FMC_A1 PF1.Signal=FMC_A1
PF10.Mode=RGB565
PF10.Signal=LTDC_DE
PF11.Signal=FMC_SDNRAS PF11.Signal=FMC_SDNRAS
PF12.Signal=FMC_A6 PF12.Signal=FMC_A6
PF13.Signal=FMC_A7 PF13.Signal=FMC_A7
@ -252,6 +287,8 @@ PF9.Mode=Single Bank 1
PF9.Signal=QUADSPI_BK1_IO1 PF9.Signal=QUADSPI_BK1_IO1
PG0.Signal=FMC_A10 PG0.Signal=FMC_A10
PG1.Signal=FMC_A11 PG1.Signal=FMC_A11
PG12.Mode=RGB565
PG12.Signal=LTDC_B4
PG13.Locked=true PG13.Locked=true
PG13.Mode=RMII PG13.Mode=RMII
PG13.Signal=ETH_TXD0 PG13.Signal=ETH_TXD0
@ -261,11 +298,35 @@ PG15.Signal=FMC_SDNCAS
PG2.Signal=FMC_A12 PG2.Signal=FMC_A12
PG4.Signal=FMC_A14_BA0 PG4.Signal=FMC_A14_BA0
PG5.Signal=FMC_A15_BA1 PG5.Signal=FMC_A15_BA1
PG6.Mode=RGB565
PG6.Signal=LTDC_R7
PG7.Mode=RGB565
PG7.Signal=LTDC_CLK
PG8.Signal=FMC_SDCLK PG8.Signal=FMC_SDCLK
PH0/OSC_IN.Mode=HSE-External-Oscillator PH0/OSC_IN.Mode=HSE-External-Oscillator
PH0/OSC_IN.Signal=RCC_OSC_IN PH0/OSC_IN.Signal=RCC_OSC_IN
PH1/OSC_OUT.Mode=HSE-External-Oscillator PH1/OSC_OUT.Mode=HSE-External-Oscillator
PH1/OSC_OUT.Signal=RCC_OSC_OUT PH1/OSC_OUT.Signal=RCC_OSC_OUT
PH10.Mode=RGB565
PH10.Signal=LTDC_R4
PH11.Mode=RGB565
PH11.Signal=LTDC_R5
PH14.Mode=RGB565
PH14.Signal=LTDC_G3
PH4.Mode=RGB565
PH4.Signal=LTDC_G5
PH9.Mode=RGB565
PH9.Signal=LTDC_R3
PI10.Mode=RGB565
PI10.Signal=LTDC_HSYNC
PI11.Mode=RGB565
PI11.Signal=LTDC_G6
PI2.Mode=RGB565
PI2.Signal=LTDC_G7
PI5.Mode=RGB565
PI5.Signal=LTDC_B5
PI9.Mode=RGB565
PI9.Signal=LTDC_VSYNC
PinOutPanel.RotationAngle=0 PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false ProjectManager.BackupPrevious=false
@ -303,7 +364,7 @@ RCC.APB2Freq_Value=108000000
RCC.APB2TimFreq_Value=216000000 RCC.APB2TimFreq_Value=216000000
RCC.CECFreq_Value=32786.88524590164 RCC.CECFreq_Value=32786.88524590164
RCC.CortexFreq_Value=216000000 RCC.CortexFreq_Value=216000000
RCC.DFSDMAudioFreq_Value=96000000 RCC.DFSDMAudioFreq_Value=144000000
RCC.DFSDMFreq_Value=108000000 RCC.DFSDMFreq_Value=108000000
RCC.EthernetFreq_Value=216000000 RCC.EthernetFreq_Value=216000000
RCC.FCLKCortexFreq_Value=216000000 RCC.FCLKCortexFreq_Value=216000000
@ -316,8 +377,8 @@ RCC.I2C2Freq_Value=54000000
RCC.I2C3Freq_Value=54000000 RCC.I2C3Freq_Value=54000000
RCC.I2C4Freq_Value=54000000 RCC.I2C4Freq_Value=54000000
RCC.I2SFreq_Value=96000000 RCC.I2SFreq_Value=96000000
RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,DFSDMAudioFreq_Value,DFSDMFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LCDTFTFreq_Value,LPTIM1Freq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLRFreq_Value,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIRCLKFreq_Value,PLLSAIoutputFreq_Value,PLLSourceVirtual,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC2Freq_Value,SDMMCClockSelection,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value RCC.IPParameters=AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CECFreq_Value,CortexFreq_Value,DFSDMAudioFreq_Value,DFSDMFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2C4Freq_Value,I2SFreq_Value,LCDTFTFreq_Value,LPTIM1Freq_Value,LSI_VALUE,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SPCLKFreq_Value,PLLI2SQCLKFreq_Value,PLLI2SRCLKFreq_Value,PLLI2SRoutputFreq_Value,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLQoutputFreq_Value,PLLRFreq_Value,PLLSAIN,PLLSAIPCLKFreq_Value,PLLSAIQCLKFreq_Value,PLLSAIR,PLLSAIRCLKFreq_Value,PLLSAIRDiv,PLLSAIoutputFreq_Value,PLLSourceVirtual,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMC2Freq_Value,SDMMCClockSelection,SDMMCFreq_Value,SPDIFRXFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,UART5Freq_Value,UART7Freq_Value,UART8Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USART6Freq_Value,USBFreq_Value,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAIOutputFreq_Value
RCC.LCDTFTFreq_Value=48000000 RCC.LCDTFTFreq_Value=9000000
RCC.LPTIM1Freq_Value=54000000 RCC.LPTIM1Freq_Value=54000000
RCC.LSI_VALUE=32000 RCC.LSI_VALUE=32000
RCC.MCO2PinFreq_Value=216000000 RCC.MCO2PinFreq_Value=216000000
@ -332,16 +393,19 @@ RCC.PLLQ=9
RCC.PLLQCLKFreq_Value=48000000 RCC.PLLQCLKFreq_Value=48000000
RCC.PLLQoutputFreq_Value=48000000 RCC.PLLQoutputFreq_Value=48000000
RCC.PLLRFreq_Value=216000000 RCC.PLLRFreq_Value=216000000
RCC.PLLSAIPCLKFreq_Value=96000000 RCC.PLLSAIN=288
RCC.PLLSAIQCLKFreq_Value=96000000 RCC.PLLSAIPCLKFreq_Value=144000000
RCC.PLLSAIRCLKFreq_Value=96000000 RCC.PLLSAIQCLKFreq_Value=144000000
RCC.PLLSAIoutputFreq_Value=96000000 RCC.PLLSAIR=4
RCC.PLLSAIRCLKFreq_Value=72000000
RCC.PLLSAIRDiv=RCC_PLLSAIDIVR_8
RCC.PLLSAIoutputFreq_Value=144000000
RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE
RCC.RNGFreq_Value=48000000 RCC.RNGFreq_Value=48000000
RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
RCC.RTCFreq_Value=32768 RCC.RTCFreq_Value=32768
RCC.SAI1Freq_Value=96000000 RCC.SAI1Freq_Value=144000000
RCC.SAI2Freq_Value=96000000 RCC.SAI2Freq_Value=144000000
RCC.SDMMC2Freq_Value=216000000 RCC.SDMMC2Freq_Value=216000000
RCC.SDMMCClockSelection=RCC_SDMMC1CLKSOURCE_CLK48 RCC.SDMMCClockSelection=RCC_SDMMC1CLKSOURCE_CLK48
RCC.SDMMCFreq_Value=48000000 RCC.SDMMCFreq_Value=48000000
@ -360,7 +424,7 @@ RCC.USBFreq_Value=48000000
RCC.VCOI2SOutputFreq_Value=192000000 RCC.VCOI2SOutputFreq_Value=192000000
RCC.VCOInputFreq_Value=1000000 RCC.VCOInputFreq_Value=1000000
RCC.VCOOutputFreq_Value=432000000 RCC.VCOOutputFreq_Value=432000000
RCC.VCOSAIOutputFreq_Value=192000000 RCC.VCOSAIOutputFreq_Value=288000000
SH.ADCx_IN5.0=ADC1_IN5,IN5 SH.ADCx_IN5.0=ADC1_IN5,IN5
SH.ADCx_IN5.ConfNb=1 SH.ADCx_IN5.ConfNb=1
SH.FMC_A0.0=FMC_A0,13b-sda1 SH.FMC_A0.0=FMC_A0,13b-sda1

View File

@ -1,33 +1,20 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32f7xx_hal_conf.h * @file stm32f7xx_hal_conf_template.h
* @brief HAL configuration file. * @author MCD Application Team
* @brief HAL configuration template file.
* This file should be copied to the application folder and renamed
* to stm32f7xx_hal_conf.h.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2018 STMicroelectronics</center></h2> * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * This software component is licensed by ST under BSD 3-Clause license,
* are permitted provided that the following conditions are met: * the "License"; You may not use this file except in compliance with the
* 1. Redistributions of source code must retain the above copyright notice, * License. You may obtain a copy of the License at:
* this list of conditions and the following disclaimer. * opensource.org/licenses/BSD-3-Clause
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
@ -49,7 +36,7 @@
*/ */
#define HAL_MODULE_ENABLED #define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED #define HAL_ADC_MODULE_ENABLED
/* #define HAL_CRYP_MODULE_ENABLED */ /* #define HAL_CRYP_MODULE_ENABLED */
/* #define HAL_CAN_MODULE_ENABLED */ /* #define HAL_CAN_MODULE_ENABLED */
/* #define HAL_CEC_MODULE_ENABLED */ /* #define HAL_CEC_MODULE_ENABLED */
@ -67,7 +54,7 @@
/* #define HAL_I2S_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED #define HAL_IWDG_MODULE_ENABLED
/* #define HAL_LPTIM_MODULE_ENABLED */ /* #define HAL_LPTIM_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */ #define HAL_LTDC_MODULE_ENABLED
#define HAL_QSPI_MODULE_ENABLED #define HAL_QSPI_MODULE_ENABLED
/* #define HAL_RNG_MODULE_ENABLED */ /* #define HAL_RNG_MODULE_ENABLED */
#define HAL_RTC_MODULE_ENABLED #define HAL_RTC_MODULE_ENABLED
@ -89,9 +76,9 @@
/* #define HAL_JPEG_MODULE_ENABLED */ /* #define HAL_JPEG_MODULE_ENABLED */
/* #define HAL_MDIOS_MODULE_ENABLED */ /* #define HAL_MDIOS_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */ /* #define HAL_SMBUS_MODULE_ENABLED */
/* #define HAL_MMC_MODULE_ENABLED */
/* #define HAL_EXTI_MODULE_ENABLED */ /* #define HAL_EXTI_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED #define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED #define HAL_DMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED #define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED #define HAL_FLASH_MODULE_ENABLED
@ -221,12 +208,12 @@
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */ #define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
/* Section 4: Extended PHY Registers */ /* Section 4: Extended PHY Registers */
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ #define PHY_SR ((uint16_t)0x1FU) /*!< PHY status register Offset */
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ #define PHY_SPEED_STATUS ((uint16_t)0x0004U) /*!< PHY Speed mask */
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ #define PHY_DUPLEX_STATUS ((uint16_t)0x0010U) /*!< PHY Duplex mask */
#define PHY_ISFR ((uint16_t)0x000BU) /*!< PHY Interrupt Source Flag register Offset */ #define PHY_ISFR ((uint16_t)0x001DU) /*!< PHY Interrupt Source Flag register Offset */
#define PHY_ISFR_INT4 ((uint16_t)0x000BU) /*!< PHY Link down inturrupt */ #define PHY_ISFR_INT4 ((uint16_t)0x000BU) /*!< PHY Link down inturrupt */
/* ################## SPI peripheral configuration ########################## */ /* ################## SPI peripheral configuration ########################## */

View File

@ -68,6 +68,8 @@ ETH_HandleTypeDef heth;
IWDG_HandleTypeDef hiwdg; IWDG_HandleTypeDef hiwdg;
LTDC_HandleTypeDef hltdc;
QSPI_HandleTypeDef hqspi; QSPI_HandleTypeDef hqspi;
RTC_HandleTypeDef hrtc; RTC_HandleTypeDef hrtc;
@ -109,6 +111,7 @@ static void MX_TIM11_Init(void);
static void MX_TIM13_Init(void); static void MX_TIM13_Init(void);
static void MX_TIM14_Init(void); static void MX_TIM14_Init(void);
static void MX_TIM3_Init(void); static void MX_TIM3_Init(void);
static void MX_LTDC_Init(void);
/* USER CODE BEGIN PFP */ /* USER CODE BEGIN PFP */
/* USER CODE END PFP */ /* USER CODE END PFP */
@ -128,6 +131,7 @@ int main(void)
/* USER CODE END 1 */ /* USER CODE END 1 */
/* Enable I-Cache---------------------------------------------------------*/ /* Enable I-Cache---------------------------------------------------------*/
SCB_EnableICache(); SCB_EnableICache();
@ -167,6 +171,7 @@ int main(void)
MX_TIM13_Init(); MX_TIM13_Init();
MX_TIM14_Init(); MX_TIM14_Init();
MX_TIM3_Init(); MX_TIM3_Init();
MX_LTDC_Init();
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */
/* USER CODE END 2 */ /* USER CODE END 2 */
@ -192,15 +197,15 @@ void SystemClock_Config(void)
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
/**Configure LSE Drive Capability /** Configure LSE Drive Capability
*/ */
HAL_PWR_EnableBkUpAccess(); HAL_PWR_EnableBkUpAccess();
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
/**Configure the main internal regulator output voltage /** Configure the main internal regulator output voltage
*/ */
__HAL_RCC_PWR_CLK_ENABLE(); __HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/**Initializes the CPU, AHB and APB busses clocks /** Initializes the CPU, AHB and APB busses clocks
*/ */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE
|RCC_OSCILLATORTYPE_LSE; |RCC_OSCILLATORTYPE_LSE;
@ -217,13 +222,13 @@ void SystemClock_Config(void)
{ {
Error_Handler(); Error_Handler();
} }
/**Activate the Over-Drive mode /** Activate the Over-Drive mode
*/ */
if (HAL_PWREx_EnableOverDrive() != HAL_OK) if (HAL_PWREx_EnableOverDrive() != HAL_OK)
{ {
Error_Handler(); Error_Handler();
} }
/**Initializes the CPU, AHB and APB busses clocks /** Initializes the CPU, AHB and APB busses clocks
*/ */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
@ -236,9 +241,15 @@ void SystemClock_Config(void)
{ {
Error_Handler(); Error_Handler();
} }
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1 PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC|RCC_PERIPHCLK_RTC
|RCC_PERIPHCLK_USART2|RCC_PERIPHCLK_SDMMC1 |RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART2
|RCC_PERIPHCLK_CLK48; |RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_CLK48;
PeriphClkInitStruct.PLLSAI.PLLSAIN = 288;
PeriphClkInitStruct.PLLSAI.PLLSAIR = 4;
PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2;
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV2;
PeriphClkInitStruct.PLLSAIDivQ = 1;
PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_8;
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
PeriphClkInitStruct.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; PeriphClkInitStruct.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
@ -267,7 +278,7 @@ static void MX_ADC1_Init(void)
/* USER CODE BEGIN ADC1_Init 1 */ /* USER CODE BEGIN ADC1_Init 1 */
/* USER CODE END ADC1_Init 1 */ /* USER CODE END ADC1_Init 1 */
/**Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
*/ */
hadc1.Instance = ADC1; hadc1.Instance = ADC1;
hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
@ -285,7 +296,7 @@ static void MX_ADC1_Init(void)
{ {
Error_Handler(); Error_Handler();
} }
/**Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time. /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
*/ */
sConfig.Channel = ADC_CHANNEL_5; sConfig.Channel = ADC_CHANNEL_5;
sConfig.Rank = ADC_REGULAR_RANK_1; sConfig.Rank = ADC_REGULAR_RANK_1;
@ -374,6 +385,88 @@ static void MX_IWDG_Init(void)
} }
/**
* @brief LTDC Initialization Function
* @param None
* @retval None
*/
static void MX_LTDC_Init(void)
{
/* USER CODE BEGIN LTDC_Init 0 */
/* USER CODE END LTDC_Init 0 */
LTDC_LayerCfgTypeDef pLayerCfg = {0};
LTDC_LayerCfgTypeDef pLayerCfg1 = {0};
/* USER CODE BEGIN LTDC_Init 1 */
/* USER CODE END LTDC_Init 1 */
hltdc.Instance = LTDC;
hltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;
hltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;
hltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;
hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;
hltdc.Init.HorizontalSync = 7;
hltdc.Init.VerticalSync = 3;
hltdc.Init.AccumulatedHBP = 14;
hltdc.Init.AccumulatedVBP = 5;
hltdc.Init.AccumulatedActiveW = 654;
hltdc.Init.AccumulatedActiveH = 485;
hltdc.Init.TotalWidth = 660;
hltdc.Init.TotalHeigh = 487;
hltdc.Init.Backcolor.Blue = 0;
hltdc.Init.Backcolor.Green = 0;
hltdc.Init.Backcolor.Red = 0;
if (HAL_LTDC_Init(&hltdc) != HAL_OK)
{
Error_Handler();
}
pLayerCfg.WindowX0 = 0;
pLayerCfg.WindowX1 = 0;
pLayerCfg.WindowY0 = 0;
pLayerCfg.WindowY1 = 0;
pLayerCfg.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
pLayerCfg.Alpha = 0;
pLayerCfg.Alpha0 = 0;
pLayerCfg.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
pLayerCfg.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
pLayerCfg.FBStartAdress = 0;
pLayerCfg.ImageWidth = 0;
pLayerCfg.ImageHeight = 0;
pLayerCfg.Backcolor.Blue = 0;
pLayerCfg.Backcolor.Green = 0;
pLayerCfg.Backcolor.Red = 0;
if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg, 0) != HAL_OK)
{
Error_Handler();
}
pLayerCfg1.WindowX0 = 0;
pLayerCfg1.WindowX1 = 0;
pLayerCfg1.WindowY0 = 0;
pLayerCfg1.WindowY1 = 0;
pLayerCfg1.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888;
pLayerCfg1.Alpha = 0;
pLayerCfg1.Alpha0 = 0;
pLayerCfg1.BlendingFactor1 = LTDC_BLENDING_FACTOR1_CA;
pLayerCfg1.BlendingFactor2 = LTDC_BLENDING_FACTOR2_CA;
pLayerCfg1.FBStartAdress = 0;
pLayerCfg1.ImageWidth = 0;
pLayerCfg1.ImageHeight = 0;
pLayerCfg1.Backcolor.Blue = 0;
pLayerCfg1.Backcolor.Green = 0;
pLayerCfg1.Backcolor.Red = 0;
if (HAL_LTDC_ConfigLayer(&hltdc, &pLayerCfg1, 1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN LTDC_Init 2 */
/* USER CODE END LTDC_Init 2 */
}
/** /**
* @brief QUADSPI Initialization Function * @brief QUADSPI Initialization Function
* @param None * @param None
@ -424,7 +517,7 @@ static void MX_RTC_Init(void)
/* USER CODE BEGIN RTC_Init 1 */ /* USER CODE BEGIN RTC_Init 1 */
/* USER CODE END RTC_Init 1 */ /* USER CODE END RTC_Init 1 */
/**Initialize RTC Only /** Initialize RTC Only
*/ */
hrtc.Instance = RTC; hrtc.Instance = RTC;
hrtc.Init.HourFormat = RTC_HOURFORMAT_24; hrtc.Init.HourFormat = RTC_HOURFORMAT_24;
@ -793,7 +886,16 @@ static void MX_USART2_UART_Init(void)
/* FMC initialization function */ /* FMC initialization function */
static void MX_FMC_Init(void) static void MX_FMC_Init(void)
{ {
FMC_SDRAM_TimingTypeDef SdramTiming;
/* USER CODE BEGIN FMC_Init 0 */
/* USER CODE END FMC_Init 0 */
FMC_SDRAM_TimingTypeDef SdramTiming = {0};
/* USER CODE BEGIN FMC_Init 1 */
/* USER CODE END FMC_Init 1 */
/** Perform the SDRAM1 memory initialization sequence /** Perform the SDRAM1 memory initialization sequence
*/ */
@ -823,6 +925,9 @@ static void MX_FMC_Init(void)
Error_Handler( ); Error_Handler( );
} }
/* USER CODE BEGIN FMC_Init 2 */
/* USER CODE END FMC_Init 2 */
} }
/** /**
@ -835,6 +940,7 @@ static void MX_GPIO_Init(void)
/* GPIO Ports Clock Enable */ /* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE(); __HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOI_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE(); __HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE(); __HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE();

View File

@ -107,7 +107,6 @@ void HAL_MspInit(void)
*/ */
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{ {
GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hadc->Instance==ADC1) if(hadc->Instance==ADC1)
{ {
@ -139,10 +138,8 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
* @param hadc: ADC handle pointer * @param hadc: ADC handle pointer
* @retval None * @retval None
*/ */
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
{ {
if(hadc->Instance==ADC1) if(hadc->Instance==ADC1)
{ {
/* USER CODE BEGIN ADC1_MspDeInit 0 */ /* USER CODE BEGIN ADC1_MspDeInit 0 */
@ -171,7 +168,6 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
*/ */
void HAL_ETH_MspInit(ETH_HandleTypeDef* heth) void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
{ {
GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if(heth->Instance==ETH) if(heth->Instance==ETH)
{ {
@ -237,10 +233,8 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef* heth)
* @param heth: ETH handle pointer * @param heth: ETH handle pointer
* @retval None * @retval None
*/ */
void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth) void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
{ {
if(heth->Instance==ETH) if(heth->Instance==ETH)
{ {
/* USER CODE BEGIN ETH_MspDeInit 0 */ /* USER CODE BEGIN ETH_MspDeInit 0 */
@ -275,6 +269,194 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
} }
/**
* @brief LTDC MSP Initialization
* This function configures the hardware resources used in this example
* @param hltdc: LTDC handle pointer
* @retval None
*/
void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hltdc->Instance==LTDC)
{
/* USER CODE BEGIN LTDC_MspInit 0 */
/* USER CODE END LTDC_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_LTDC_CLK_ENABLE();
__HAL_RCC_GPIOI_CLK_ENABLE();
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOG_CLK_ENABLE();
/**LTDC GPIO Configuration
PI9 ------> LTDC_VSYNC
PI10 ------> LTDC_HSYNC
PI11 ------> LTDC_G6
PF10 ------> LTDC_DE
PH4 ------> LTDC_G5
PA6 ------> LTDC_G2
PB1 ------> LTDC_R6
PB10 ------> LTDC_G4
PH9 ------> LTDC_R3
PH10 ------> LTDC_R4
PH11 ------> LTDC_R5
PG6 ------> LTDC_R7
PG7 ------> LTDC_CLK
PA8 ------> LTDC_B3
PH14 ------> LTDC_G3
PI2 ------> LTDC_G7
PG12 ------> LTDC_B4
PB8 ------> LTDC_B6
PB9 ------> LTDC_B7
PI5 ------> LTDC_B5
*/
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_2|GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_11;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_4;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_1;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_8|GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_14;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_8;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF13_LTDC;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF9_LTDC;
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
/* USER CODE BEGIN LTDC_MspInit 1 */
/* USER CODE END LTDC_MspInit 1 */
}
}
/**
* @brief LTDC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hltdc: LTDC handle pointer
* @retval None
*/
void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
{
if(hltdc->Instance==LTDC)
{
/* USER CODE BEGIN LTDC_MspDeInit 0 */
/* USER CODE END LTDC_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_LTDC_CLK_DISABLE();
/**LTDC GPIO Configuration
PI9 ------> LTDC_VSYNC
PI10 ------> LTDC_HSYNC
PI11 ------> LTDC_G6
PF10 ------> LTDC_DE
PH4 ------> LTDC_G5
PA6 ------> LTDC_G2
PB1 ------> LTDC_R6
PB10 ------> LTDC_G4
PH9 ------> LTDC_R3
PH10 ------> LTDC_R4
PH11 ------> LTDC_R5
PG6 ------> LTDC_R7
PG7 ------> LTDC_CLK
PA8 ------> LTDC_B3
PH14 ------> LTDC_G3
PI2 ------> LTDC_G7
PG12 ------> LTDC_B4
PB8 ------> LTDC_B6
PB9 ------> LTDC_B7
PI5 ------> LTDC_B5
*/
HAL_GPIO_DeInit(GPIOI, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_2
|GPIO_PIN_5);
HAL_GPIO_DeInit(GPIOF, GPIO_PIN_10);
HAL_GPIO_DeInit(GPIOH, GPIO_PIN_4|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|GPIO_PIN_14);
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_6|GPIO_PIN_8);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_1|GPIO_PIN_10|GPIO_PIN_8|GPIO_PIN_9);
HAL_GPIO_DeInit(GPIOG, GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_12);
/* USER CODE BEGIN LTDC_MspDeInit 1 */
/* USER CODE END LTDC_MspDeInit 1 */
}
}
/** /**
* @brief QSPI MSP Initialization * @brief QSPI MSP Initialization
* This function configures the hardware resources used in this example * This function configures the hardware resources used in this example
@ -283,7 +465,6 @@ void HAL_ETH_MspDeInit(ETH_HandleTypeDef* heth)
*/ */
void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi) void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi)
{ {
GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hqspi->Instance==QUADSPI) if(hqspi->Instance==QUADSPI)
{ {
@ -344,10 +525,8 @@ void HAL_QSPI_MspInit(QSPI_HandleTypeDef* hqspi)
* @param hqspi: QSPI handle pointer * @param hqspi: QSPI handle pointer
* @retval None * @retval None
*/ */
void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi) void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi)
{ {
if(hqspi->Instance==QUADSPI) if(hqspi->Instance==QUADSPI)
{ {
/* USER CODE BEGIN QUADSPI_MspDeInit 0 */ /* USER CODE BEGIN QUADSPI_MspDeInit 0 */
@ -383,7 +562,6 @@ void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* hqspi)
*/ */
void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc) void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
{ {
if(hrtc->Instance==RTC) if(hrtc->Instance==RTC)
{ {
/* USER CODE BEGIN RTC_MspInit 0 */ /* USER CODE BEGIN RTC_MspInit 0 */
@ -404,10 +582,8 @@ void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
* @param hrtc: RTC handle pointer * @param hrtc: RTC handle pointer
* @retval None * @retval None
*/ */
void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc) void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
{ {
if(hrtc->Instance==RTC) if(hrtc->Instance==RTC)
{ {
/* USER CODE BEGIN RTC_MspDeInit 0 */ /* USER CODE BEGIN RTC_MspDeInit 0 */
@ -430,7 +606,6 @@ void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
*/ */
void HAL_SD_MspInit(SD_HandleTypeDef* hsd) void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
{ {
GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hsd->Instance==SDMMC1) if(hsd->Instance==SDMMC1)
{ {
@ -478,10 +653,8 @@ void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
* @param hsd: SD handle pointer * @param hsd: SD handle pointer
* @retval None * @retval None
*/ */
void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd) void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
{ {
if(hsd->Instance==SDMMC1) if(hsd->Instance==SDMMC1)
{ {
/* USER CODE BEGIN SDMMC1_MspDeInit 0 */ /* USER CODE BEGIN SDMMC1_MspDeInit 0 */
@ -518,7 +691,6 @@ void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
*/ */
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{ {
GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hspi->Instance==SPI2) if(hspi->Instance==SPI2)
{ {
@ -554,10 +726,8 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
* @param hspi: SPI handle pointer * @param hspi: SPI handle pointer
* @retval None * @retval None
*/ */
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
{ {
if(hspi->Instance==SPI2) if(hspi->Instance==SPI2)
{ {
/* USER CODE BEGIN SPI2_MspDeInit 0 */ /* USER CODE BEGIN SPI2_MspDeInit 0 */
@ -588,7 +758,6 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
*/ */
void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm) void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
{ {
if(htim_pwm->Instance==TIM2) if(htim_pwm->Instance==TIM2)
{ {
/* USER CODE BEGIN TIM2_MspInit 0 */ /* USER CODE BEGIN TIM2_MspInit 0 */
@ -611,7 +780,6 @@ void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* htim_pwm)
*/ */
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{ {
if(htim_base->Instance==TIM3) if(htim_base->Instance==TIM3)
{ {
/* USER CODE BEGIN TIM3_MspInit 0 */ /* USER CODE BEGIN TIM3_MspInit 0 */
@ -661,7 +829,6 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{ {
GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if(htim->Instance==TIM2) if(htim->Instance==TIM2)
{ {
@ -712,10 +879,8 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
* @param htim_pwm: TIM_PWM handle pointer * @param htim_pwm: TIM_PWM handle pointer
* @retval None * @retval None
*/ */
void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm) void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
{ {
if(htim_pwm->Instance==TIM2) if(htim_pwm->Instance==TIM2)
{ {
/* USER CODE BEGIN TIM2_MspDeInit 0 */ /* USER CODE BEGIN TIM2_MspDeInit 0 */
@ -736,10 +901,8 @@ void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* htim_pwm)
* @param htim_base: TIM_Base handle pointer * @param htim_base: TIM_Base handle pointer
* @retval None * @retval None
*/ */
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base) void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{ {
if(htim_base->Instance==TIM3) if(htim_base->Instance==TIM3)
{ {
/* USER CODE BEGIN TIM3_MspDeInit 0 */ /* USER CODE BEGIN TIM3_MspDeInit 0 */
@ -795,7 +958,6 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
*/ */
void HAL_UART_MspInit(UART_HandleTypeDef* huart) void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{ {
GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if(huart->Instance==USART1) if(huart->Instance==USART1)
{ {
@ -854,10 +1016,8 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
* @param huart: UART handle pointer * @param huart: UART handle pointer
* @retval None * @retval None
*/ */
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
{ {
if(huart->Instance==USART1) if(huart->Instance==USART1)
{ {
/* USER CODE BEGIN USART1_MspDeInit 0 */ /* USER CODE BEGIN USART1_MspDeInit 0 */
@ -903,7 +1063,7 @@ static void HAL_FMC_MspInit(void){
/* USER CODE BEGIN FMC_MspInit 0 */ /* USER CODE BEGIN FMC_MspInit 0 */
/* USER CODE END FMC_MspInit 0 */ /* USER CODE END FMC_MspInit 0 */
GPIO_InitTypeDef GPIO_InitStruct; GPIO_InitTypeDef GPIO_InitStruct ={0};
if (FMC_Initialized) { if (FMC_Initialized) {
return; return;
} }

View File

@ -71,6 +71,7 @@
/* USER CODE END 0 */ /* USER CODE END 0 */
/* External variables --------------------------------------------------------*/ /* External variables --------------------------------------------------------*/
/* USER CODE BEGIN EV */ /* USER CODE BEGIN EV */
/* USER CODE END EV */ /* USER CODE END EV */

View File

@ -61,6 +61,11 @@ menu "Onboard Peripheral Drivers"
select RT_USING_DFS select RT_USING_DFS
select RT_USING_DFS_ELMFAT select RT_USING_DFS_ELMFAT
default n default n
config BSP_USING_LCD
bool "Enable LCD"
select BSP_USING_LTDC
select BSP_USING_SDRAM
default n
endmenu endmenu
@ -247,6 +252,10 @@ menu "On-chip Peripheral Drivers"
select RT_USING_DFS select RT_USING_DFS
default n default n
config BSP_USING_LTDC
bool "Enable LTDC"
default n
source "../libraries/HAL_Drivers/Kconfig" source "../libraries/HAL_Drivers/Kconfig"
endmenu endmenu

View File

@ -16,36 +16,38 @@ void SystemClock_Config(void)
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
/**Configure LSE Drive Capability /** Configure LSE Drive Capability
*/ */
HAL_PWR_EnableBkUpAccess(); HAL_PWR_EnableBkUpAccess();
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
/**Configure the main internal regulator output voltage /** Configure the main internal regulator output voltage
*/ */
__HAL_RCC_PWR_CLK_ENABLE(); __HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/**Initializes the CPU, AHB and APB busses clocks /** Initializes the CPU, AHB and APB busses clocks
*/ */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE; RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE
|RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON; RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.LSEState = RCC_LSE_ON; RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 25; RCC_OscInitStruct.PLL.PLLM = 25;
RCC_OscInitStruct.PLL.PLLN = 432; RCC_OscInitStruct.PLL.PLLN = 432;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 2; RCC_OscInitStruct.PLL.PLLQ = 9;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{ {
Error_Handler(); Error_Handler();
} }
/**Activate the Over-Drive mode /** Activate the Over-Drive mode
*/ */
if (HAL_PWREx_EnableOverDrive() != HAL_OK) if (HAL_PWREx_EnableOverDrive() != HAL_OK)
{ {
Error_Handler(); Error_Handler();
} }
/**Initializes the CPU, AHB and APB busses clocks /** Initializes the CPU, AHB and APB busses clocks
*/ */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
@ -58,9 +60,20 @@ void SystemClock_Config(void)
{ {
Error_Handler(); Error_Handler();
} }
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1; PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC|RCC_PERIPHCLK_RTC
|RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART2
|RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_CLK48;
PeriphClkInitStruct.PLLSAI.PLLSAIN = 288;
PeriphClkInitStruct.PLLSAI.PLLSAIR = 4;
PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2;
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV2;
PeriphClkInitStruct.PLLSAIDivQ = 1;
PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_8;
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE; PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
PeriphClkInitStruct.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{ {
Error_Handler(); Error_Handler();

View File

@ -30,7 +30,8 @@
/* Memory Management */ /* Memory Management */
#define RT_USING_MEMPOOL #define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM #define RT_USING_MEMHEAP
#define RT_USING_MEMHEAP_AS_HEAP
#define RT_USING_HEAP #define RT_USING_HEAP
/* Kernel Device Object */ /* Kernel Device Object */
@ -39,8 +40,9 @@
#define RT_USING_CONSOLE #define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1" #define RT_CONSOLE_DEVICE_NAME "uart1"
#define RT_VER_NUM 0x40000 #define RT_VER_NUM 0x40002
#define ARCH_ARM #define ARCH_ARM
#define RT_USING_CPU_FFS
#define ARCH_ARM_CORTEX_M #define ARCH_ARM_CORTEX_M
#define ARCH_ARM_CORTEX_M7 #define ARCH_ARM_CORTEX_M7
@ -79,28 +81,27 @@
#define RT_PIPE_BUFSZ 512 #define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL #define RT_USING_SERIAL
#define RT_SERIAL_USING_DMA #define RT_SERIAL_USING_DMA
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN #define RT_USING_PIN
/* Using WiFi */
/* Using USB */ /* Using USB */
/* POSIX layer and C standard library */ /* POSIX layer and C standard library */
#define RT_LIBC_USING_TIME
/* Network */ /* Network */
/* Socket abstraction layer */ /* Socket abstraction layer */
/* Network interface device */
/* light weight TCP/IP stack */ /* light weight TCP/IP stack */
/* Modbus master and slave stack */
/* AT commands */ /* AT commands */
@ -110,9 +111,6 @@
/* Utilities */ /* Utilities */
/* ARM CMSIS */
/* RT-Thread online packages */ /* RT-Thread online packages */
/* IoT - internet of things */ /* IoT - internet of things */
@ -162,12 +160,15 @@
/* Onboard Peripheral Drivers */ /* Onboard Peripheral Drivers */
#define BSP_USING_USB_TO_USART #define BSP_USING_USB_TO_USART
#define BSP_USING_SDRAM
#define BSP_USING_LCD
/* On-chip Peripheral Drivers */ /* On-chip Peripheral Drivers */
#define BSP_USING_GPIO #define BSP_USING_GPIO
#define BSP_USING_UART #define BSP_USING_UART
#define BSP_USING_UART1 #define BSP_USING_UART1
#define BSP_USING_LTDC
/* Board extended module Drivers */ /* Board extended module Drivers */