bsp: cvitek: fix c906_little IRQ_MAX_NR error num

Analysis: The IRQ_MAX_NR value of c906_little is wrong.
interrupt.h relies on IRQ_MAX_NR defined in rtconfig.h but
does not explicitly include this header file.

Solution: Change IRQ_MAX_NR to the correct value 61 in
the datasheet. Explicitly include rtconfig.h in interrupt.h.

Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
This commit is contained in:
Z8MAN8 2024-08-06 22:37:52 +08:00 committed by Rbb666
parent bce592e949
commit b6c26d4537
4 changed files with 9 additions and 6 deletions

View File

@ -417,6 +417,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PARSON is not set
# CONFIG_PKG_USING_RYAN_JSON is not set
# end of JSON: JavaScript Object Notation, a lightweight data-interchange format
#
@ -627,6 +628,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
#
# STM32 HAL & SDK Drivers
#
# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
# CONFIG_PKG_USING_STM32WB55_SDK is not set
@ -821,6 +824,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
# CONFIG_PKG_USING_BT_MX01 is not set
# CONFIG_PKG_USING_RGPOWER is not set
# CONFIG_PKG_USING_BT_MX02 is not set
# CONFIG_PKG_USING_SPI_TOOLS is not set
# end of peripheral libraries and drivers
@ -1177,7 +1181,7 @@ CONFIG_UART_IRQ_BASE=30
CONFIG_BSP_USING_C906_LITTLE=y
CONFIG_PLIC_PHY_ADDR=0x70000000
CONFIG_IRQ_MAX_NR=128
CONFIG_IRQ_MAX_NR=61
CONFIG_TIMER_CLK_FREQ=25000000
CONFIG_GPIO_IRQ_BASE=41
CONFIG_SYS_GPIO_IRQ_BASE=47

View File

@ -24,7 +24,7 @@ config PLIC_PHY_ADDR
config IRQ_MAX_NR
int
default 128
default 61
config TIMER_CLK_FREQ
int

View File

@ -11,12 +11,11 @@
#ifndef __INTERRUPT_H__
#define __INTERRUPT_H__
#include <rtconfig.h>
#define NR_CPUS 1
#define IRQ_OFFSET 16
#ifndef IRQ_MAX_NR
#define IRQ_MAX_NR 207
#endif
#define INTERRUPTS_MAX (IRQ_OFFSET + IRQ_MAX_NR)
#define PLIC_BASE 0x70000000

View File

@ -330,7 +330,7 @@
/* end of General Drivers Configuration */
#define BSP_USING_C906_LITTLE
#define PLIC_PHY_ADDR 0x70000000
#define IRQ_MAX_NR 128
#define IRQ_MAX_NR 61
#define TIMER_CLK_FREQ 25000000
#define GPIO_IRQ_BASE 41
#define SYS_GPIO_IRQ_BASE 47