bsp: cvitek: fix c906_little IRQ_MAX_NR error num
Analysis: The IRQ_MAX_NR value of c906_little is wrong. interrupt.h relies on IRQ_MAX_NR defined in rtconfig.h but does not explicitly include this header file. Solution: Change IRQ_MAX_NR to the correct value 61 in the datasheet. Explicitly include rtconfig.h in interrupt.h. Signed-off-by: Shicheng Chu <1468559561@qq.com> Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
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@ -417,6 +417,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_JSMN is not set
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# CONFIG_PKG_USING_JSMN is not set
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# CONFIG_PKG_USING_AGILE_JSMN is not set
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# CONFIG_PKG_USING_AGILE_JSMN is not set
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# CONFIG_PKG_USING_PARSON is not set
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# CONFIG_PKG_USING_PARSON is not set
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# CONFIG_PKG_USING_RYAN_JSON is not set
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# end of JSON: JavaScript Object Notation, a lightweight data-interchange format
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# end of JSON: JavaScript Object Notation, a lightweight data-interchange format
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#
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#
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@ -627,6 +628,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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#
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#
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# STM32 HAL & SDK Drivers
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# STM32 HAL & SDK Drivers
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#
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#
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# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
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# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
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# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
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# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
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# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
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# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
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# CONFIG_PKG_USING_STM32WB55_SDK is not set
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# CONFIG_PKG_USING_STM32WB55_SDK is not set
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@ -821,6 +824,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
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# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
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# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
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# CONFIG_PKG_USING_BT_MX01 is not set
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# CONFIG_PKG_USING_BT_MX01 is not set
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# CONFIG_PKG_USING_RGPOWER is not set
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# CONFIG_PKG_USING_RGPOWER is not set
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# CONFIG_PKG_USING_BT_MX02 is not set
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# CONFIG_PKG_USING_SPI_TOOLS is not set
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# CONFIG_PKG_USING_SPI_TOOLS is not set
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# end of peripheral libraries and drivers
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# end of peripheral libraries and drivers
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@ -1177,7 +1181,7 @@ CONFIG_UART_IRQ_BASE=30
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CONFIG_BSP_USING_C906_LITTLE=y
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CONFIG_BSP_USING_C906_LITTLE=y
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CONFIG_PLIC_PHY_ADDR=0x70000000
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CONFIG_PLIC_PHY_ADDR=0x70000000
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CONFIG_IRQ_MAX_NR=128
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CONFIG_IRQ_MAX_NR=61
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CONFIG_TIMER_CLK_FREQ=25000000
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CONFIG_TIMER_CLK_FREQ=25000000
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CONFIG_GPIO_IRQ_BASE=41
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CONFIG_GPIO_IRQ_BASE=41
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CONFIG_SYS_GPIO_IRQ_BASE=47
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CONFIG_SYS_GPIO_IRQ_BASE=47
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@ -24,7 +24,7 @@ config PLIC_PHY_ADDR
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config IRQ_MAX_NR
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config IRQ_MAX_NR
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int
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int
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default 128
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default 61
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config TIMER_CLK_FREQ
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config TIMER_CLK_FREQ
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int
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int
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@ -11,12 +11,11 @@
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#ifndef __INTERRUPT_H__
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#ifndef __INTERRUPT_H__
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#define __INTERRUPT_H__
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#define __INTERRUPT_H__
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#include <rtconfig.h>
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#define NR_CPUS 1
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#define NR_CPUS 1
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#define IRQ_OFFSET 16
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#define IRQ_OFFSET 16
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#ifndef IRQ_MAX_NR
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#define IRQ_MAX_NR 207
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#endif
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#define INTERRUPTS_MAX (IRQ_OFFSET + IRQ_MAX_NR)
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#define INTERRUPTS_MAX (IRQ_OFFSET + IRQ_MAX_NR)
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#define PLIC_BASE 0x70000000
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#define PLIC_BASE 0x70000000
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@ -330,7 +330,7 @@
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/* end of General Drivers Configuration */
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/* end of General Drivers Configuration */
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#define BSP_USING_C906_LITTLE
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#define BSP_USING_C906_LITTLE
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#define PLIC_PHY_ADDR 0x70000000
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#define PLIC_PHY_ADDR 0x70000000
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#define IRQ_MAX_NR 128
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#define IRQ_MAX_NR 61
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#define TIMER_CLK_FREQ 25000000
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#define TIMER_CLK_FREQ 25000000
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#define GPIO_IRQ_BASE 41
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#define GPIO_IRQ_BASE 41
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#define SYS_GPIO_IRQ_BASE 47
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#define SYS_GPIO_IRQ_BASE 47
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