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[BSP][Nuclei] Format source code of drivers of gd32vf103 

Signed-off-by: Huaqi Fang <578567190@qq.com>
This commit is contained in:
Huaqi Fang 2020-04-15 11:58:28 +08:00
parent 7366173d74
commit b432308b20
6 changed files with 264 additions and 225 deletions
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9
bsp/nuclei/libraries/gd32vf103/HAL_Drivers/SConscript
View File

@ -14,15 +14,6 @@ if GetDepend(['RT_USING_PIN']):
if GetDepend(['RT_USING_SERIAL']):
src += ['drv_usart.c']
if GetDepend(['RT_USING_HWTIMER']):
src += ['drv_hwtimer.c']
if GetDepend(['RT_USING_PWM']):
src += ['drv_pwm.c']
if GetDepend(['RT_USING_SPI']):
src += ['drv_spi.c']
path = [cwd]
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)

2
bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_config.h
View File

@ -5,7 +5,7 @@
*
* Change Logs:
* Date Author Notes
* 2020-04-08 Huaqi first version
* 2020-04-08 hqfang first version
*/
#ifndef __DRV_CONFIG_H__

24
bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_gpio.c
View File

@ -13,7 +13,7 @@
#ifdef RT_USING_PIN
static const struct pin_index pins[] =
{
{
__GD32_PIN(0, A, 0),
__GD32_PIN(1, A, 1),
@ -102,7 +102,7 @@ static const struct pin_index pins[] =
};
static const struct pin_irq_map pin_irq_map[] =
{
{
{GPIO_PIN_0, EXTI0_IRQn},
{GPIO_PIN_1, EXTI1_IRQn},
{GPIO_PIN_2, EXTI2_IRQn},
@ -122,7 +122,7 @@ static const struct pin_irq_map pin_irq_map[] =
};
static struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
{
{
{-1, 0, RT_NULL, RT_NULL},
{-1, 0, RT_NULL, RT_NULL},
{-1, 0, RT_NULL, RT_NULL},
@ -205,7 +205,8 @@ static void gd32_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
pin_mode = GPIO_MODE_OUT_PP;
switch (mode) {
switch (mode)
{
case PIN_MODE_OUTPUT:
/* output setting */
pin_mode = GPIO_MODE_OUT_PP;
@ -362,7 +363,8 @@ static rt_err_t gd32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqmap = &pin_irq_map[irqindex];
switch (pin_irq_hdr_tab[irqindex].mode) {
switch (pin_irq_hdr_tab[irqindex].mode)
{
case PIN_IRQ_MODE_RISING:
trigger_mode = EXTI_TRIG_RISING;
break;
@ -398,16 +400,16 @@ static rt_err_t gd32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
{
return RT_EINVAL;
}
if (( irqmap->pinbit>=GPIO_PIN_5 )&&( irqmap->pinbit<=GPIO_PIN_9 ))
if ((irqmap->pinbit >= GPIO_PIN_5) && (irqmap->pinbit <= GPIO_PIN_9))
{
if(!(pin_irq_enable_mask&(GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9)))
if (!(pin_irq_enable_mask & (GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9)))
{
ECLIC_DisableIRQ(irqmap->irqno);
}
}
else if (( irqmap->pinbit>=GPIO_PIN_10 )&&( irqmap->pinbit<=GPIO_PIN_15 ))
else if ((irqmap->pinbit >= GPIO_PIN_10) && (irqmap->pinbit <= GPIO_PIN_15))
{
if(!(pin_irq_enable_mask&(GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15)))
if (!(pin_irq_enable_mask & (GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15)))
{
ECLIC_DisableIRQ(irqmap->irqno);
}
@ -425,7 +427,7 @@ static rt_err_t gd32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
return RT_EOK;
}
const static struct rt_pin_ops _gd32_pin_ops =
{
{
gd32_pin_mode,
gd32_pin_write,
gd32_pin_read,
@ -444,7 +446,7 @@ rt_inline void pin_irq_hdr(int irqno)
void GD32_GPIO_EXTI_IRQHandler(rt_int8_t exti_line)
{
if(RESET != exti_interrupt_flag_get((exti_line_enum)(1 << exti_line)))
if (RESET != exti_interrupt_flag_get((exti_line_enum)(1 << exti_line)))
{
pin_irq_hdr(exti_line);
exti_interrupt_flag_clear((exti_line_enum)(1 << exti_line));

3
bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_gpio.h
View File

@ -1,11 +1,12 @@
/*
* Copyright (c) 2006-2018, RT-Thread Development Team
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-11-06 balanceTWK first version
* 2020-04-15 hqfang Modify for gd32vf103
*/
#ifndef __DRV_GPIO_H__

108
bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_usart.c
View File

@ -6,7 +6,7 @@
* Change Logs:
* Date Author Notes
* 2019-07-23 tyustli first version
* 2020-04-02 fanghuaqi Modified for Nuclei
* 2020-04-02 hqfang modified for Nuclei
*/
#include <drv_usart.h>
@ -19,7 +19,8 @@
/* this driver can be disabled at menuconfig -> RT-Thread Components -> Device Drivers */
#endif
enum {
enum
{
#ifdef BSP_USING_UART0
GDUART0_INDEX,
#endif
@ -37,38 +38,50 @@ enum {
#endif
};
static struct gd32_uart_config uart_config[] = {
static struct gd32_uart_config uart_config[] =
{
#ifdef BSP_USING_UART0
{ "uart0",
{
"uart0",
USART0,
USART0_IRQn, },
USART0_IRQn,
},
#endif
#ifdef BSP_USING_UART1
{ "uart1",
{
"uart1",
USART1,
USART1_IRQn, },
USART1_IRQn,
},
#endif
#ifdef BSP_USING_UART2
{ "uart2",
{
"uart2",
USART2,
USART2_IRQn, },
USART2_IRQn,
},
#endif
#ifdef BSP_USING_UART3
{ "uart3",
{
"uart3",
USART3,
USART3_IRQn, },
USART3_IRQn,
},
#endif
#ifdef BSP_USING_UART4
{ "uart4",
{
"uart4",
UART4,
UART4_IRQn, },
UART4_IRQn,
},
#endif
};
static struct gd32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
static rt_err_t gd32_configure(struct rt_serial_device *serial,
struct serial_configure *cfg) {
struct serial_configure *cfg)
{
struct gd32_uart *usart_obj;
struct gd32_uart_config *usart;
RT_ASSERT(serial != RT_NULL);
@ -81,7 +94,8 @@ static rt_err_t gd32_configure(struct rt_serial_device *serial,
usart_deinit(usart->uart_base);
usart_baudrate_set(usart->uart_base, cfg->baud_rate);
switch (cfg->data_bits) {
switch (cfg->data_bits)
{
case DATA_BITS_8:
usart_word_length_set(usart->uart_base, USART_WL_8BIT);
break;
@ -94,7 +108,8 @@ static rt_err_t gd32_configure(struct rt_serial_device *serial,
break;
}
switch (cfg->stop_bits) {
switch (cfg->stop_bits)
{
case STOP_BITS_1:
usart_stop_bit_set(usart->uart_base, USART_STB_1BIT);
break;
@ -106,7 +121,8 @@ static rt_err_t gd32_configure(struct rt_serial_device *serial,
break;
}
switch (cfg->parity) {
switch (cfg->parity)
{
case PARITY_NONE:
usart_parity_config(usart->uart_base, USART_PM_NONE);
break;
@ -130,7 +146,8 @@ static rt_err_t gd32_configure(struct rt_serial_device *serial,
}
static rt_err_t gd32_control(struct rt_serial_device *serial, int cmd,
void *arg) {
void *arg)
{
struct gd32_uart *usart_obj;
struct gd32_uart_config *usart;
@ -139,7 +156,8 @@ static rt_err_t gd32_control(struct rt_serial_device *serial, int cmd,
usart = usart_obj->config;
RT_ASSERT(usart != RT_NULL);
switch (cmd) {
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT:
ECLIC_DisableIRQ(usart->irqn);
usart_interrupt_disable(usart->uart_base, USART_INT_RBNE);
@ -154,7 +172,8 @@ static rt_err_t gd32_control(struct rt_serial_device *serial, int cmd,
return RT_EOK;
}
static int gd32_putc(struct rt_serial_device *serial, char ch) {
static int gd32_putc(struct rt_serial_device *serial, char ch)
{
struct gd32_uart *usart_obj;
struct gd32_uart_config *usart;
@ -169,7 +188,8 @@ static int gd32_putc(struct rt_serial_device *serial, char ch) {
return 1;
}
static int gd32_getc(struct rt_serial_device *serial) {
static int gd32_getc(struct rt_serial_device *serial)
{
int ch;
struct gd32_uart *usart_obj;
struct gd32_uart_config *usart;
@ -180,7 +200,8 @@ static int gd32_getc(struct rt_serial_device *serial) {
RT_ASSERT(usart != RT_NULL);
ch = -1;
if (RESET != usart_flag_get(usart->uart_base, USART_FLAG_RBNE)) {
if (RESET != usart_flag_get(usart->uart_base, USART_FLAG_RBNE))
{
ch = usart_data_receive(usart->uart_base) & 0xff;
}
@ -189,9 +210,11 @@ static int gd32_getc(struct rt_serial_device *serial) {
static const struct rt_uart_ops gd32_uart_ops = { gd32_configure, gd32_control,
gd32_putc, gd32_getc,
RT_NULL };
RT_NULL
};
static void usart_isr(struct rt_serial_device *serial) {
static void usart_isr(struct rt_serial_device *serial)
{
struct gd32_uart *usart_obj;
struct gd32_uart_config *usart;
@ -202,20 +225,26 @@ static void usart_isr(struct rt_serial_device *serial) {
if ((usart_interrupt_flag_get(usart->uart_base, USART_INT_FLAG_RBNE)
!= RESET)
&& (RESET != usart_flag_get(usart->uart_base, USART_FLAG_RBNE))) {
&& (RESET != usart_flag_get(usart->uart_base, USART_FLAG_RBNE)))
{
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
usart_interrupt_flag_clear(usart->uart_base, USART_INT_FLAG_RBNE);
usart_flag_clear(usart->uart_base, USART_FLAG_RBNE);
} else {
if (usart_flag_get(usart->uart_base, USART_FLAG_CTSF) != RESET) {
}
else
{
if (usart_flag_get(usart->uart_base, USART_FLAG_CTSF) != RESET)
{
usart_flag_clear(usart->uart_base, USART_FLAG_CTSF);
}
if (usart_flag_get(usart->uart_base, USART_FLAG_LBDF) != RESET) {
if (usart_flag_get(usart->uart_base, USART_FLAG_LBDF) != RESET)
{
usart_flag_clear(usart->uart_base, USART_FLAG_LBDF);
}
if (usart_flag_get(usart->uart_base, USART_FLAG_TC) != RESET) {
if (usart_flag_get(usart->uart_base, USART_FLAG_TC) != RESET)
{
usart_flag_clear(usart->uart_base, USART_FLAG_TC);
}
}
@ -223,7 +252,8 @@ static void usart_isr(struct rt_serial_device *serial) {
#ifdef BSP_USING_UART0
void USART0_IRQHandler(void) {
void USART0_IRQHandler(void)
{
rt_interrupt_enter();
usart_isr(&uart_obj[GDUART0_INDEX].serial);
@ -235,7 +265,8 @@ void USART0_IRQHandler(void) {
#ifdef BSP_USING_UART1
void USART1_IRQHandler(void) {
void USART1_IRQHandler(void)
{
rt_interrupt_enter();
usart_isr(&uart_obj[GDUART1_INDEX].serial);
@ -247,7 +278,8 @@ void USART1_IRQHandler(void) {
#ifdef BSP_USING_UART2
void USART2_IRQHandler(void) {
void USART2_IRQHandler(void)
{
rt_interrupt_enter();
usart_isr(&uart_obj[GDUART2_INDEX].serial);
@ -259,7 +291,8 @@ void USART2_IRQHandler(void) {
#ifdef BSP_USING_UART3
void UART3_IRQHandler(void) {
void UART3_IRQHandler(void)
{
rt_interrupt_enter();
usart_isr(&uart_obj[GDUART3_INDEX].serial);
@ -271,7 +304,8 @@ void UART3_IRQHandler(void) {
#ifdef BSP_USING_UART4
void UART4_IRQHandler(void) {
void UART4_IRQHandler(void)
{
rt_interrupt_enter();
usart_isr(&uart_obj[GDUART4_INDEX].serial);
@ -281,7 +315,8 @@ void UART4_IRQHandler(void) {
#endif
int rt_hw_usart_init(void) {
int rt_hw_usart_init(void)
{
rt_size_t obj_num;
int index;
@ -289,7 +324,8 @@ int rt_hw_usart_init(void) {
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
rt_err_t result = 0;
for (index = 0; index < obj_num; index++) {
for (index = 0; index < obj_num; index++)
{
/* init UART object */
uart_obj[index].config = &uart_config[index];
uart_obj[index].serial.ops = &gd32_uart_ops;

9
bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_usart.h
View File

@ -1,3 +1,12 @@
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-04-15 hqfang first version
*/
#ifndef __DRV_UART_H__
#define __DRV_UART_H__