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[bsp][hc32]添加hc32f460系列WDT外设驱动 (#6158) 

* 添加hc32f460系列外设WDT驱动

* format kconfig

* Update drv_wdt.c

Co-authored-by: Man, Jianting (Meco) <920369182@qq.com>
This commit is contained in:
xiaoxiaolisunny 2022-08-03 10:46:35 +08:00 committed by GitHub
parent 3363586cbb
commit af82606dd3
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 132 additions and 17 deletions
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39
bsp/hc32/ev_hc32f460_lqfp100_v2/board/Kconfig
View File

@ -1,7 +1,7 @@
menu "Hardware Drivers Config"
config SOC_HC32F460PE
bool
bool
select SOC_SERIES_HC32F4
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
@ -53,7 +53,7 @@ menu "On-chip Peripheral Drivers"
depends on BSP_USING_UART2
select RT_SERIAL_USING_DMA
default n
config BSP_USING_UART3
bool "Enable UART3"
default n
@ -61,33 +61,33 @@ menu "On-chip Peripheral Drivers"
config BSP_UART3_RX_USING_DMA
bool "Enable UART3 RX DMA"
depends on BSP_USING_UART3
select RT_SERIAL_USING_DMA
select RT_SERIAL_USING_DMA
default n
config BSP_UART3_TX_USING_DMA
bool "Enable UART3 TX DMA"
depends on BSP_USING_UART3
select RT_SERIAL_USING_DMA
select RT_SERIAL_USING_DMA
default n
config BSP_USING_UART4
bool "Enable UART4"
default n
config BSP_UART4_RX_USING_DMA
bool "Enable UART4 RX DMA"
depends on BSP_USING_UART4
select RT_SERIAL_USING_DMA
select RT_SERIAL_USING_DMA
default n
config BSP_UART4_TX_USING_DMA
bool "Enable UART4 TX DMA"
depends on BSP_USING_UART4
select RT_SERIAL_USING_DMA
select RT_SERIAL_USING_DMA
default n
endif
menuconfig BSP_USING_CAN
menuconfig BSP_USING_CAN
bool "Enable CAN"
default n
select RT_USING_CAN
@ -96,8 +96,8 @@ menu "On-chip Peripheral Drivers"
bool "using can1"
default n
endif
menuconfig BSP_USING_ADC
menuconfig BSP_USING_ADC
bool "Enable ADC"
default n
select RT_USING_ADC
@ -126,13 +126,13 @@ menu "On-chip Peripheral Drivers"
bool "RTC USING LRC"
endchoice
endif
menuconfig BSP_USING_I2C2
bool "Enable I2C2 BUS (software simulation)"
default n
select RT_USING_I2C
select RT_USING_I2C_BITOPS
select RT_USING_PIN
select RT_USING_PIN
if BSP_USING_I2C2
config BSP_I2C2_SCL_PIN
int "i2c2 scl pin number"
@ -142,8 +142,13 @@ menu "On-chip Peripheral Drivers"
int "I2C2 sda pin number"
range 1 100
default 49
endif
endif
config BSP_USING_WDT
bool "Enable Watchdog Timer"
select RT_USING_WDT
default n
menuconfig BSP_USING_PWM_TMRA
bool "Enable timerA output PWM"
depends on (!BSP_USING_UART3)
@ -162,11 +167,11 @@ menu "On-chip Peripheral Drivers"
default n
endif
endif
endmenu
menu "Board extended module Drivers"
endmenu
endmenu

3
bsp/hc32/libraries/hc32_drivers/SConscript
View File

@ -32,6 +32,9 @@ if GetDepend(['RT_USING_CAN']):
if GetDepend(['RT_USING_RTC']):
src += ['drv_rtc.c']
if GetDepend(['RT_USING_WDT']):
src += ['drv_wdt.c']
if GetDepend(['RT_USING_PWM', 'BSP_USING_PWM_TMRA']):
src += ['drv_pwm_tmra.c']

107
bsp/hc32/libraries/hc32_drivers/drv_wdt.c Normal file
View File

@ -0,0 +1,107 @@
/*
* Copyright (c) 2006-2022, RT-Thread Development Team
* Copyright (c) 2022, xiaoxiaolisunny
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2022-07-11 xiaoxiaolisunny first version
*/
#include <drv_config.h>
#include <board_config.h>
#include "drv_irq.h"
#ifdef RT_USING_WDT
#define LOG_TAG "drv.dwt"
#include <drv_log.h>
struct hc32_wdt_obj
{
rt_watchdog_t watchdog;
stc_wdt_init_t hiwdg;
rt_uint16_t is_start;
};
static struct hc32_wdt_obj hc32_wdt;
static struct rt_watchdog_ops ops;
static rt_err_t wdt_init(rt_watchdog_t *wdt)
{
return RT_EOK;
}
/* timeout(s) = PERI * CKS / PCLK3
16384 * 8192 / 50M = 2.68s
*/
static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
{
switch (cmd)
{
/* feed the watchdog */
case RT_DEVICE_CTRL_WDT_KEEPALIVE:
WDT_FeedDog();
break;
/* set watchdog timeout */
case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
hc32_wdt.hiwdg.u32CountPeriod = WDT_CNT_PERIOD16384;
if(hc32_wdt.hiwdg.u32RefreshRange > 0xFFFF)
{
LOG_E("wdg set timeout parameter too large, please less than %ds", 0xFFFF);
return -RT_EINVAL;
}
if(hc32_wdt.is_start)
{
if (WDT_Init(&hc32_wdt.hiwdg) != LL_OK)
{
LOG_E("wdg set timeout failed.");
return -RT_ERROR;
}
}
break;
case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
(*((rt_uint32_t*)arg)) = 16384 * 8192 / 50000000;
break;
case RT_DEVICE_CTRL_WDT_START:
if (WDT_Init(&hc32_wdt.hiwdg) != LL_OK)
{
LOG_E("wdt start failed.");
return -RT_ERROR;
}
hc32_wdt.is_start = 1;
break;
default:
LOG_W("This command is not supported.");
return -RT_ERROR;
}
return RT_EOK;
}
int rt_wdt_init(void)
{
hc32_wdt.hiwdg.u32ClockDiv = WDT_CLK_DIV8192;
hc32_wdt.hiwdg.u32CountPeriod = WDT_CNT_PERIOD16384;
hc32_wdt.hiwdg.u32RefreshRange = WDT_RANGE_0TO100PCT;
hc32_wdt.hiwdg.u32LPMCount = WDT_LPM_CNT_STOP;
hc32_wdt.hiwdg.u32ExceptionType = WDT_EXP_TYPE_RST;
hc32_wdt.is_start = 0;
ops.init = &wdt_init;
ops.control = &wdt_control;
hc32_wdt.watchdog.ops = &ops;
/* register watchdog device */
if (rt_hw_watchdog_register(&hc32_wdt.watchdog, "wdt", RT_DEVICE_FLAG_DEACTIVATE, RT_NULL) != RT_EOK)
{
LOG_E("wdt device register failed.");
return -RT_ERROR;
}
LOG_D("wdt device register success.");
return RT_EOK;
}
INIT_BOARD_EXPORT(rt_wdt_init);
#endif