modify format
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1844 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
parent
08f25161d9
commit
ae73bd59bc
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@ -11,7 +11,7 @@
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* Date Author Notes
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* Date Author Notes
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* 2006-08-23 Bernard first implementation
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* 2006-08-23 Bernard first implementation
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*
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*
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* 2011-12-17 nl1031 for MacroBlaze
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* 2011-12-17 nl1031 for MicroBlaze
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*
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*
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*/
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*/
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@ -49,8 +49,6 @@ XUartLite uart_lite; /* Instance of the UartLite device */
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XIntc int_ctl; /* The instance of the Interrupt Controller */
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XIntc int_ctl; /* The instance of the Interrupt Controller */
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static rt_uint32_t led_data;
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static rt_uint32_t led_data;
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static void rt_hw_board_led_init(void);
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static void rt_hw_board_led_init(void);
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/**
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/**
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@ -98,7 +96,6 @@ void rt_hw_board_led_off(rt_uint32_t led)
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XGpio_DiscreteWrite(&gpio_output, 1, led_data);
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XGpio_DiscreteWrite(&gpio_output, 1, led_data);
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}
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}
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void rt_hw_led_flash(void)
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void rt_hw_led_flash(void)
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{
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{
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rt_uint32_t i;
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rt_uint32_t i;
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@ -110,7 +107,6 @@ void rt_hw_led_flash(void)
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for (i = 0; i < 20000; i++) ;
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for (i = 0; i < 20000; i++) ;
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}
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}
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#ifdef RT_USING_CONSOLE
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#ifdef RT_USING_CONSOLE
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/*
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/*
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@ -151,7 +147,6 @@ static void rt_hw_console_init()
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}
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}
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#endif
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#endif
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void rt_hw_timer_handler(void)
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void rt_hw_timer_handler(void)
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{
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{
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rt_uint32_t csr;
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rt_uint32_t csr;
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@ -162,12 +157,12 @@ void rt_hw_timer_handler(void)
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if (csr & XTC_CSR_INT_OCCURED_MASK)
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if (csr & XTC_CSR_INT_OCCURED_MASK)
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{
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{
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rt_tick_increase();
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rt_tick_increase();
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XTmrCtr_WriteReg(timer.BaseAddress, TIMER_CNTR_0, XTC_TCSR_OFFSET, csr | XTC_CSR_INT_OCCURED_MASK);
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XTmrCtr_WriteReg(timer.BaseAddress, TIMER_CNTR_0, XTC_TCSR_OFFSET, csr | XTC_CSR_INT_OCCURED_MASK);
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}
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}
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}
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}
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/*
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/*
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*********************************************************************************************************
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*********************************************************************************************************
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* rt_intc_init()
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* rt_intc_init()
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@ -191,26 +186,26 @@ void rt_intc_init (void)
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/* install interrupt handler */
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/* install interrupt handler */
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rt_hw_interrupt_install(XPAR_INTC_0_TMRCTR_0_VEC_ID, (rt_isr_handler_t) rt_hw_timer_handler, RT_NULL);
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rt_hw_interrupt_install(XPAR_INTC_0_TMRCTR_0_VEC_ID, (rt_isr_handler_t) rt_hw_timer_handler, RT_NULL);
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rt_hw_interrupt_umask(XPAR_INTC_0_TMRCTR_0_VEC_ID);
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rt_hw_interrupt_umask(XPAR_INTC_0_TMRCTR_0_VEC_ID);
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XIntc_Start(&int_ctl, XIN_REAL_MODE);
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XIntc_Start(&int_ctl, XIN_REAL_MODE);
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}
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}
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void rt_tmr_init(void)
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void rt_tmr_init(void)
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{
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{
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rt_uint32_t ctl;
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rt_uint32_t ctl;
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XStatus status;
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XStatus status;
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status = XTmrCtr_Initialize(&timer, XPAR_AXI_TIMER_0_DEVICE_ID);
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status = XTmrCtr_Initialize(&timer, XPAR_AXI_TIMER_0_DEVICE_ID);
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XTmrCtr_WriteReg(timer.BaseAddress, TIMER_CNTR_0, XTC_TLR_OFFSET, PIV);
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XTmrCtr_WriteReg(timer.BaseAddress, TIMER_CNTR_0, XTC_TLR_OFFSET, PIV);
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ctl = XTC_CSR_ENABLE_TMR_MASK | XTC_CSR_ENABLE_INT_MASK | XTC_CSR_AUTO_RELOAD_MASK | XTC_CSR_DOWN_COUNT_MASK;
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ctl = XTC_CSR_ENABLE_TMR_MASK | XTC_CSR_ENABLE_INT_MASK | XTC_CSR_AUTO_RELOAD_MASK | XTC_CSR_DOWN_COUNT_MASK;
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XTmrCtr_WriteReg(timer.BaseAddress, TIMER_CNTR_0, XTC_TCSR_OFFSET, ctl);
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XTmrCtr_WriteReg(timer.BaseAddress, TIMER_CNTR_0, XTC_TCSR_OFFSET, ctl);
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}
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}
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/**
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/**
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* This function will initial SPARTAN 6 LX9 board.
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* This function will initial SPARTAN 6 LX9 board.
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*/
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*/
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@ -228,5 +223,4 @@ void rt_hw_board_init()
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/* timer init */
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/* timer init */
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rt_tmr_init();
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rt_tmr_init();
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}
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}
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#define __BOARD_H__
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#define __BOARD_H__
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#define MCK 50000000
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void rt_hw_board_led_on(rt_uint32_t);
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void rt_hw_board_led_on(rt_uint32_t);
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void rt_hw_board_led_off(rt_uint32_t);
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void rt_hw_board_led_off(rt_uint32_t);
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@ -16,7 +16,6 @@
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/* Tick per Second*/
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/* Tick per Second*/
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#define RT_TICK_PER_SECOND 100
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#define RT_TICK_PER_SECOND 100
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/* SECTION: RT_DEBUG */
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/* SECTION: RT_DEBUG */
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/* Thread Debug*/
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/* Thread Debug*/
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/* #define RT_THREAD_DEBUG */
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/* #define RT_THREAD_DEBUG */
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#define FINSH_THREAD_STACK_SIZE 8192
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#define FINSH_THREAD_STACK_SIZE 8192
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#define RT_USING_TC
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#define RT_USING_TC
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/* SECTION: a runtime libc library */
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/* SECTION: a runtime libc library */
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/* a runtime libc library*/
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/* a runtime libc library*/
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/* #define RT_USING_NEWLIB */
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/* #define RT_USING_NEWLIB */
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#include <rthw.h>
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtthread.h>
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//#include <AT91SAM7S.h>
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#include "board.h"
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#include "board.h"
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#ifdef RT_USING_FINSH
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#ifdef RT_USING_FINSH
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@ -26,7 +25,6 @@ extern void finsh_system_init(void);
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extern void rt_hw_led_flash(void);
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extern void rt_hw_led_flash(void);
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/*@{*/
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/*@{*/
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#ifdef __CC_ARM
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#ifdef __CC_ARM
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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@ -83,12 +81,12 @@ void rtthread_startup(void)
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rt_thread_idle_sethook(rt_hw_led_flash);
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rt_thread_idle_sethook(rt_hw_led_flash);
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#endif
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#endif
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//#ifdef RT_USING_DEVICE
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#ifdef RT_USING_DEVICE
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/* init hardware serial device */
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/* init hardware serial device */
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rt_hw_serial_init();
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rt_hw_serial_init();
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/* init all device */
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/* init all device */
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rt_device_init_all();
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rt_device_init_all();
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//#endif
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#endif
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/* init application */
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/* init application */
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rt_application_init();
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rt_application_init();
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*
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*
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*/
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*/
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#include "microbalze.inc"
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#include "microblaze.inc"
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.text
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.text
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.globl rt_interrupt_enter
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.globl rt_interrupt_enter
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RT_ASSERT(serial->peripheral_id != XPAR_INTC_0_UARTLITE_1_VEC_ID);
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RT_ASSERT(serial->peripheral_id != XPAR_INTC_0_UARTLITE_1_VEC_ID);
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// serial->hw_base->CTRL_REG = XUL_CR_FIFO_RX_RESET | /* Reset Receiver */
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// XUL_CR_FIFO_TX_RESET; /* Reset Transmitter */
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/* reset rx index */
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/* reset rx index */
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serial->save_index = 0;
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serial->save_index = 0;
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serial->read_index = 0;
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serial->read_index = 0;
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serial->read_index++;
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serial->read_index++;
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if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
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if (serial->read_index >= RT_UART_RX_BUFFER_SIZE)
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serial->read_index = 0;
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serial->read_index = 0;
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}
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} else
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else
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{
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{
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/* no data in rx buffer */
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/* no data in rx buffer */
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/* enable interrupt */
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/* enable interrupt */
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rt_hw_interrupt_enable(level);
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rt_hw_interrupt_enable(level);
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ptr ++; size --;
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ptr++;
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size--;
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}
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}
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return (rt_uint32_t) ptr - (rt_uint32_t) buffer;
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return (rt_uint32_t) ptr - (rt_uint32_t) buffer;
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}
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} else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
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else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
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{
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{
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/* not support right now */
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/* not support right now */
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RT_ASSERT(0);
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RT_ASSERT(0);
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}
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} else
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else
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{
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{
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/* poll mode */
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/* poll mode */
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while (size)
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while (size)
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{
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{
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/* Wait for Full Rx Buffer */
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/* Wait for Full Rx Buffer */
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while (!(serial->hw_base->STAT_REG & XUL_SR_RX_FIFO_VALID_DATA));
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while (!(serial->hw_base->STAT_REG & XUL_SR_RX_FIFO_VALID_DATA))
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;
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/* Read Character */
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/* Read Character */
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*ptr = serial->hw_base->Rx_FIFO;
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*ptr = serial->hw_base->Rx_FIFO;
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/* stream mode */
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/* stream mode */
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if (*ptr == '\n')
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if (*ptr == '\n')
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{
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{
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while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY));
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while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY))
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;
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serial->hw_base->Tx_FIFO = '\r';
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serial->hw_base->Tx_FIFO = '\r';
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}
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}
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/* Transmit Character */
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/* Transmit Character */
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serial->hw_base->Tx_FIFO = *ptr;
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serial->hw_base->Tx_FIFO = *ptr;
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ptr ++; size --;
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ptr++;
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size--;
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}
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}
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}
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}
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else
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else
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while (size)
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while (size)
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{
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{
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/* Wait for Empty Tx Buffer */
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/* Wait for Empty Tx Buffer */
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while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY));
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while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY))
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;
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/* Transmit Character */
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/* Transmit Character */
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serial->hw_base->Tx_FIFO = *ptr;
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serial->hw_base->Tx_FIFO = *ptr;
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ptr ++; size --;
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ptr++;
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size--;
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}
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}
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}
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}
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}
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}
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rt_device_register(device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
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rt_device_register(device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
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#endif
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#endif
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return RT_EOK;
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return RT_EOK;
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}
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}
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@ -16,8 +16,6 @@
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extern void *_SDA_BASE_;
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extern void *_SDA_BASE_;
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extern void *_SDA2_BASE_;
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extern void *_SDA2_BASE_;
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/**
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/**
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* This function will initialize thread stack
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* This function will initialize thread stack
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*
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*
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@ -28,8 +26,7 @@ extern void *_SDA2_BASE_;
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*
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*
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* @return stack address
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* @return stack address
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*/
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*/
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rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
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rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter, rt_uint8_t *stack_addr, void *texit)
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rt_uint8_t *stack_addr, void *texit)
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{
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{
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unsigned long *stk;
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unsigned long *stk;
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@ -20,17 +20,14 @@
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#include "xintc_i.h"
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#include "xintc_i.h"
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#include "xintc_l.h"
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#include "xintc_l.h"
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#define MAX_HANDLERS XPAR_INTC_MAX_NUM_INTR_INPUTS
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#define MAX_HANDLERS XPAR_INTC_MAX_NUM_INTR_INPUTS
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extern XIntc int_ctl; /* The instance of the Interrupt Controller */
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extern XIntc int_ctl; /* The instance of the Interrupt Controller */
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extern rt_uint32_t rt_interrupt_nest;
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extern rt_uint32_t rt_interrupt_nest;
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rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
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rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
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rt_uint32_t rt_thread_switch_interrupt_flag;
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rt_uint32_t rt_thread_switch_interrupt_flag;
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void rt_hw_interrupt_handler(int vector)
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void rt_hw_interrupt_handler(int vector)
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{
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{
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rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
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rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
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XIntc_Config *CfgPtr;
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XIntc_Config *CfgPtr;
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CfgPtr = &XIntc_ConfigTable[0];
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CfgPtr = &XIntc_ConfigTable[0];
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for (index = 0; index < MAX_HANDLERS; index++)
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for (index = 0; index < MAX_HANDLERS; index++)
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{
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{
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CfgPtr->HandlerTable[index].Handler = (XInterruptHandler) rt_hw_interrupt_handler;
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CfgPtr->HandlerTable[index].Handler = (XInterruptHandler) rt_hw_interrupt_handler;
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@ -94,8 +89,10 @@ void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_ha
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if (vector >= 0 && vector < MAX_HANDLERS)
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if (vector >= 0 && vector < MAX_HANDLERS)
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{
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{
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if (*old_handler != RT_NULL) *old_handler = (rt_isr_handler_t)CfgPtr->HandlerTable[vector].Handler;
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if (*old_handler != RT_NULL)
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if (new_handler != RT_NULL) CfgPtr->HandlerTable[vector].Handler = (XInterruptHandler)new_handler;
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*old_handler = (rt_isr_handler_t) CfgPtr->HandlerTable[vector].Handler;
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if (new_handler != RT_NULL)
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CfgPtr->HandlerTable[vector].Handler = (XInterruptHandler) new_handler;
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}
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}
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}
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}
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@ -128,7 +125,6 @@ void rt_hw_interrupt_install(int vector, rt_isr_handler_t new_handler, rt_isr_ha
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*
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*
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******************************************************************************/
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******************************************************************************/
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|
|
||||||
|
|
||||||
void rt_hw_trap_irq(void)
|
void rt_hw_trap_irq(void)
|
||||||
{
|
{
|
||||||
u32 intr_status;
|
u32 intr_status;
|
||||||
|
@ -137,7 +133,6 @@ void rt_hw_trap_irq(void )
|
||||||
volatile u32 reg; /* used as bit bucket */
|
volatile u32 reg; /* used as bit bucket */
|
||||||
XIntc_Config *cfg_ptr;
|
XIntc_Config *cfg_ptr;
|
||||||
|
|
||||||
|
|
||||||
/* Get the configuration data using the device ID */
|
/* Get the configuration data using the device ID */
|
||||||
cfg_ptr = &XIntc_ConfigTable[0];
|
cfg_ptr = &XIntc_ConfigTable[0];
|
||||||
|
|
||||||
|
@ -208,4 +203,3 @@ void rt_hw_trap_irq(void )
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue