[bsp]support AC6 for some bsp.

This commit is contained in:
yangjie 2019-05-06 15:09:11 +08:00
parent f22753aa5b
commit ad3cbf6ed9
7 changed files with 8 additions and 8 deletions

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@ -17,7 +17,7 @@
#define ES32F0_SRAM_SIZE 0x8000
#define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE)
#ifdef __CC_ARM
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__

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@ -17,7 +17,7 @@
#define ES32F0_SRAM_SIZE 0x8000
#define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE)
#ifdef __CC_ARM
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__

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@ -25,7 +25,7 @@ extern char __ICFEDIT_region_RAM_end__;
#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
#endif
#ifdef __ARMCC_VERSION
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__

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@ -16,7 +16,7 @@
#define SRAM_SIZE 0x2000
#define SRAM_END (SRAM_BASE + SRAM_SIZE)
#ifdef __CC_ARM
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__

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@ -29,7 +29,7 @@ extern int finsh_system_init(void);
extern void finsh_set_device(const char* device);
#endif
#ifdef __CC_ARM
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define M451_SRAM_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__

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@ -29,7 +29,7 @@ extern void finsh_system_init(void);
extern void finsh_set_device(const char* device);
#endif
#ifdef __CC_ARM
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__
#pragma section="HEAP"
@ -78,7 +78,7 @@ void rtthread_startup(void)
rt_system_timer_init();
#ifdef RT_USING_HEAP
#ifdef __CC_ARM
#if defined(__CC_ARM) || defined(__CLANG_ARM)
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)CHIP_SRAM_END);
#elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)CHIP_SRAM_END);

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@ -24,7 +24,7 @@
#endif
#define SRAM_END (SRAM_BASE + SRAM_SIZE)
#ifdef __CC_ARM
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__