[bsp]support AC6 for some bsp.
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@ -17,7 +17,7 @@
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#define ES32F0_SRAM_SIZE 0x8000
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#define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -17,7 +17,7 @@
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#define ES32F0_SRAM_SIZE 0x8000
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#define ES32F0_SRAM_END (0x20000000 + ES32F0_SRAM_SIZE)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -25,7 +25,7 @@ extern char __ICFEDIT_region_RAM_end__;
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#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
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#endif
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#ifdef __ARMCC_VERSION
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -16,7 +16,7 @@
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#define SRAM_SIZE 0x2000
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#define SRAM_END (SRAM_BASE + SRAM_SIZE)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -29,7 +29,7 @@ extern int finsh_system_init(void);
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extern void finsh_set_device(const char* device);
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#endif
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define M451_SRAM_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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@ -29,7 +29,7 @@ extern void finsh_system_init(void);
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extern void finsh_set_device(const char* device);
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#endif
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#elif __ICCARM__
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#pragma section="HEAP"
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@ -78,7 +78,7 @@ void rtthread_startup(void)
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rt_system_timer_init();
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#ifdef RT_USING_HEAP
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)CHIP_SRAM_END);
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#elif __ICCARM__
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rt_system_heap_init(__segment_end("HEAP"), (void*)CHIP_SRAM_END);
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@ -24,7 +24,7 @@
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#endif
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#define SRAM_END (SRAM_BASE + SRAM_SIZE)
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#ifdef __CC_ARM
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#if defined(__CC_ARM) || defined(__CLANG_ARM)
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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