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Merge pull request #1424 from zhuangwei123/master 

[bsp/ls1cdev]重写uart驱动，开启main为用户程序入口
This commit is contained in:
Bernard Xiong 2018-05-11 11:25:31 +08:00 committed by GitHub
parent e47775cd63 71ce1e8cb4
commit aa430d0f8c
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
17 changed files with 927 additions and 663 deletions
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42
bsp/ls1cdev/.config
View File

@ -57,7 +57,8 @@ CONFIG_RT_CONSOLE_DEVICE_NAME="uart2"
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
# CONFIG_RT_USING_USER_MAIN is not set
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
#
# C++ features
@ -73,6 +74,7 @@ CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_CMD_SIZE=80
@ -168,7 +170,9 @@ CONFIG_RT_LWIP_IGMP=y
CONFIG_RT_LWIP_ICMP=y
# CONFIG_RT_LWIP_SNMP is not set
CONFIG_RT_LWIP_DNS=y
# CONFIG_RT_LWIP_DHCP is not set
CONFIG_RT_LWIP_DHCP=y
CONFIG_IP_SOF_BROADCAST=1
CONFIG_IP_SOF_BROADCAST_RECV=1
#
# Static IPv4 Address
@ -227,6 +231,13 @@ CONFIG_LWIP_NETIF_LOOPBACK=0
#
# system packages
#
#
# RT-Thread GUI Engine
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_LVGL is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
@ -239,14 +250,34 @@ CONFIG_LWIP_NETIF_LOOPBACK=0
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
#
# language packages
@ -257,19 +288,26 @@ CONFIG_LWIP_NETIF_LOOPBACK=0
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_IPERF is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_SAMPLES is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
#
# example package: hello

61
bsp/ls1cdev/applications/application.c
View File

@ -1,61 +0,0 @@
/*
* File : application.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2010-06-25 Bernard first version
* 2011-08-08 lgnq modified for Loongson LS1B
* 2015-07-06 chinesebear modified for Loongson LS1C
* 2018-02-08 sundm75 modified for Loongson LS1C SmartLoongV3
*/
#include <rtthread.h>
#include "net/synopGMAC.h"
#include <lwip/api.h>
void rt_init_thread_entry(void *parameter)
{
#ifdef RT_USING_COMPONENTS_INIT
/* initialization RT-Thread Components */
rt_components_init();
#endif
#if defined(RT_USING_DFS) && defined(RT_USING_DFS_ELMFAT)
/* mount sd card fat partition 1 as root directory */
if( dfs_mount("sd0", "/", "elm", 0, 0) == 0)
{
rt_kprintf("File System initialized!\n");
}
else
{
rt_kprintf("File System initialzation failed!\n");
}
#endif /* RT_USING_DFS && RT_USING_DFS_ELMFAT */
/*网口EMAC初始化*/
rt_hw_eth_init();
#if defined(RT_USING_RTGUI)
/*触摸屏使用SPI总线SPI1 CS0 初始化*/
rtgui_touch_hw_init("spi10");
#endif
}
int rt_application_init(void)
{
rt_thread_t tid;
/* create initialization thread */
tid = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
4096, RT_THREAD_PRIORITY_MAX/3, 20);
if (tid != RT_NULL)
rt_thread_startup(tid);
return 0;
}

30
bsp/ls1cdev/applications/main.c Normal file
View File

@ -0,0 +1,30 @@
/*
* File : main.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2008 - 2017, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2018-05-10 zhuangwei first version
*/
#include <rtthread.h>
int main(int argc, char** argv)
{
return 0;
}

93
bsp/ls1cdev/applications/startup.c
View File

@ -1,93 +0,0 @@
/*
* File : startup.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2010-06-25 Bernard first version
* 2011-08-08 lgnq modified for Loongson LS1B
* 2015-07-06 chinesebear modified for Loongson LS1C
*/
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
#define A_K0BASE 0x80000000
/**
* @addtogroup Loongson LS1B
*/
/*@{*/
extern unsigned char __bss_end;
extern int rt_application_init(void);
extern void tlb_refill_exception(void);
extern void general_exception(void);
extern void irq_exception(void);
extern void rt_hw_cache_init(void);
extern void invalidate_writeback_dcache_all(void);
extern void invalidate_icache_all(void);
/**
* This function will startup RT-Thread RTOS.
*/
void rtthread_startup(void)
{
/* disable interrupt first */
rt_hw_interrupt_disable();
/* init cache */
rt_hw_cache_init();
/* init hardware interrupt */
rt_hw_interrupt_init();
/* copy vector */
rt_memcpy((void *)A_K0BASE, tlb_refill_exception, 0x80);
rt_memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x80);
rt_memcpy((void *)(A_K0BASE + 0x200), irq_exception, 0x80);
invalidate_writeback_dcache_all();
invalidate_icache_all();
/* init board */
rt_hw_board_init();
/* show version */
rt_show_version();
#ifdef RT_USING_HEAP
rt_system_heap_init((void*)&__bss_end, (void*)RT_HW_HEAP_END);
#endif
/* init scheduler system */
rt_system_scheduler_init();
/* initialize timer */
rt_system_timer_init();
/* initialize timer thread */
rt_system_timer_thread_init();
/* init idle thread */
rt_thread_idle_init();
/* init application */
rt_application_init();
/* start scheduler */
rt_system_scheduler_start();
/* never reach here */
return;
}
/*@}*/

70
bsp/ls1cdev/drivers/board.c
View File

@ -18,9 +18,22 @@
#include <rthw.h>
#include "board.h"
#include "uart.h"
#include "drv_uart.h"
#include "ls1c.h"
#define A_K0BASE 0x80000000
extern unsigned char __bss_end;
extern void tlb_refill_exception(void);
extern void general_exception(void);
extern void irq_exception(void);
extern void rt_hw_cache_init(void);
extern void invalidate_writeback_dcache_all(void);
extern void invalidate_icache_all(void);
/**
* @addtogroup Loongson LS1B
*/
@ -81,6 +94,24 @@ void rt_hw_fpu_init(void)
*/
void rt_hw_board_init(void)
{
/* init cache */
rt_hw_cache_init();
/* init hardware interrupt */
rt_hw_interrupt_init();
/* copy vector */
rt_memcpy((void *)A_K0BASE, tlb_refill_exception, 0x80);
rt_memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x80);
rt_memcpy((void *)(A_K0BASE + 0x200), irq_exception, 0x80);
invalidate_writeback_dcache_all();
invalidate_icache_all();
#ifdef RT_USING_HEAP
rt_system_heap_init((void*)&__bss_end, (void*)RT_HW_HEAP_END);
#endif
#ifdef RT_USING_SERIAL
/* init hardware UART device */
rt_hw_uart_init();
@ -105,41 +136,4 @@ void rt_hw_board_init(void)
rt_kprintf("current sr: 0x%08x\n", read_c0_status());
}
#define __raw_out_put(unr) \
while (*ptr) \
{ \
if (*ptr == '\n') \
{ \
/* FIFO status, contain valid data */ \
while (!(UART_LSR(UART##unr##_BASE) & (UARTLSR_TE | UARTLSR_TFE))); \
/* write data */ \
UART_DAT(UART##unr##_BASE) = '\r'; \
} \
/* FIFO status, contain valid data */ \
while (!(UART_LSR(UART##unr##_BASE) & (UARTLSR_TE | UARTLSR_TFE))); \
/* write data */ \
UART_DAT(UART##unr##_BASE) = *ptr; \
ptr ++; \
}
/* UART line status register value */
#define UARTLSR_ERROR (1 << 7)
#define UARTLSR_TE (1 << 6)
#define UARTLSR_TFE (1 << 5)
#define UARTLSR_BI (1 << 4)
#define UARTLSR_FE (1 << 3)
#define UARTLSR_PE (1 << 2)
#define UARTLSR_OE (1 << 1)
#define UARTLSR_DR (1 << 0)
void rt_hw_console_output(const char *ptr)
{
#if defined(RT_USING_UART0)
__raw_out_put(0);
#elif defined(RT_USING_UART2)
__raw_out_put(2);
#elif defined(RT_USING_UART3)
__raw_out_put(3);
#endif
}
/*@}*/

177
bsp/ls1cdev/drivers/drv_uart.c Normal file
View File

@ -0,0 +1,177 @@
/*
* File : drv_uart.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2018-05-08 zhuangwei the first version
*/
#include <rtthread.h>
#include <rtdevice.h>
#include <rthw.h>
#include "drv_uart.h"
#include "ls1c_pin.h"
#include "ls1c_uart.h"
/* STM32 uart driver */
struct rt_uart_ls1c
{
ls1c_uart_t UARTx;
rt_uint32_t IRQ;
};
static rt_err_t ls1c_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
{
struct rt_uart_ls1c *uart_dev = RT_NULL;
ls1c_uart_info_t uart_info = {0};
RT_ASSERT(serial != RT_NULL);
RT_ASSERT(cfg != RT_NULL);
uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
// 初始化串口
uart_info.UARTx = uart_dev->UARTx;
uart_info.baudrate = cfg->baud_rate;
uart_info.rx_enable = TRUE;
uart_init(&uart_info);
return RT_EOK;
}
static rt_err_t ls1c_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
{
struct rt_uart_ls1c *uart_dev = RT_NULL;
RT_ASSERT(serial != RT_NULL);
uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
switch (cmd)
{
case RT_DEVICE_CTRL_CLR_INT: /* disable rx irq */
rt_hw_interrupt_mask(uart_dev->IRQ);
break;
case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */
rt_hw_interrupt_umask(uart_dev->IRQ);
break;
default:
break;
}
return RT_EOK;
}
static int ls1c_uart_putc(struct rt_serial_device *serial, char c)
{
struct rt_uart_ls1c *uart_dev = RT_NULL;
RT_ASSERT(serial != RT_NULL);
uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
uart_putc(uart_dev->UARTx, c);
return 1;
}
static int ls1c_uart_getc(struct rt_serial_device *serial)
{
struct rt_uart_ls1c *uart_dev = RT_NULL;
RT_ASSERT(serial != RT_NULL);
uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
void *uart_base = uart_get_base(uart_dev->UARTx);
if (LSR_RXRDY & reg_read_8(uart_base + LS1C_UART_LSR_OFFSET))
{
return reg_read_8(uart_base + LS1C_UART_DAT_OFFSET);
}
return -1;
}
/* UART interrupt handler */
static void uart_irq_handler(int vector, void *param)
{
struct rt_serial_device *serial = (struct rt_serial_device *)param;
struct rt_uart_ls1c *uart_dev = RT_NULL;
RT_ASSERT(serial != RT_NULL);
uart_dev = (struct rt_uart_ls1c *)serial->parent.user_data;
void *uart_base = uart_get_base(uart_dev->UARTx);
unsigned char iir = reg_read_8(uart_base + LS1C_UART_IIR_OFFSET);
// 判断是否为接收超时或接收到有效数据
if ((IIR_RXTOUT & iir) || (IIR_RXRDY & iir))
{
rt_interrupt_enter();
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
rt_interrupt_leave();
}
}
static const struct rt_uart_ops stm32_uart_ops =
{
ls1c_uart_configure,
ls1c_uart_control,
ls1c_uart_putc,
ls1c_uart_getc,
};
#if defined(RT_USING_UART2)
struct rt_uart_ls1c uart2 =
{
LS1C_UART2,
LS1C_UART2_IRQ,
};
struct rt_serial_device serial2;
#endif /* RT_USING_UART1 */
void rt_hw_uart_init(void)
{
struct rt_uart_ls1c *uart;
struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
#ifdef RT_USING_UART2
uart = &uart2;
serial2.ops = &stm32_uart_ops;
serial2.config = config;
pin_set_purpose(36, PIN_PURPOSE_OTHER);
pin_set_purpose(37, PIN_PURPOSE_OTHER);
pin_set_remap(36, PIN_REMAP_SECOND);
pin_set_remap(37, PIN_REMAP_SECOND);
rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial2, "UART2");
/* register UART1 device */
rt_hw_serial_register(&serial2,
"uart2",
//RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_RX,
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
uart);
#endif /* RT_USING_UART1 */
}

113
bsp/ls1cdev/drivers/drv_uart.h Normal file
View File

@ -0,0 +1,113 @@
/*
* File : drv_uart.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2018-05-08 zhuangwei the first version
*/
#ifndef __DRV_UART_H__
#define __DRV_UART_H__
#include "ls1c.h"
#define DEV_CLK 252000000 // 252MHz
#define UART_BAUDRATE 115200
#define UART0_BASE 0xBFE40000
//#define UART0_1_BASE 0xBFE41000
#define UART1_BASE 0xBFE44000
#define UART2_BASE 0xBFE48000
#define UART3_BASE 0xBFE4C000
#define UART4_BASE 0xBFE4C400
#define UART5_BASE 0xBFE4C500
#define UART6_BASE 0xBFE4C600
#define UART7_BASE 0xBFE4C700
#define UART8_BASE 0xBFE4C800
#define UART9_BASE 0xBFE4C900
#define UART10_BASE 0xBFE4Ca00
#define UART11_BASE 0xBFE4Cb00
/* UART registers */
#define UART_DAT(base) __REG8(base + 0x00)
#define UART_IER(base) __REG8(base + 0x01)
#define UART_IIR(base) __REG8(base + 0x02)
#define UART_FCR(base) __REG8(base + 0x02)
#define UART_LCR(base) __REG8(base + 0x03)
#define UART_MCR(base) __REG8(base + 0x04)
#define UART_LSR(base) __REG8(base + 0x05)
#define UART_MSR(base) __REG8(base + 0x06)
#define UART_LSB(base) __REG8(base + 0x00)
#define UART_MSB(base) __REG8(base + 0x01)
/* UART0 registers */
#define UART0_DAT __REG8(UART0_BASE + 0x00)
#define UART0_IER __REG8(UART0_BASE + 0x01)
#define UART0_IIR __REG8(UART0_BASE + 0x02)
#define UART0_FCR __REG8(UART0_BASE + 0x02)
#define UART0_LCR __REG8(UART0_BASE + 0x03)
#define UART0_MCR __REG8(UART0_BASE + 0x04)
#define UART0_LSR __REG8(UART0_BASE + 0x05)
#define UART0_MSR __REG8(UART0_BASE + 0x06)
#define UART0_LSB __REG8(UART0_BASE + 0x00)
#define UART0_MSB __REG8(UART0_BASE + 0x01)
/* UART1 registers */
#define UART1_DAT __REG8(UART1_BASE + 0x00)
#define UART1_IER __REG8(UART1_BASE + 0x01)
#define UART1_IIR __REG8(UART1_BASE + 0x02)
#define UART1_FCR __REG8(UART1_BASE + 0x02)
#define UART1_LCR __REG8(UART1_BASE + 0x03)
#define UART1_MCR __REG8(UART1_BASE + 0x04)
#define UART1_LSR __REG8(UART1_BASE + 0x05)
#define UART1_MSR __REG8(UART1_BASE + 0x06)
#define UART1_LSB __REG8(UART1_BASE + 0x00)
#define UART1_MSB __REG8(UART1_BASE + 0x01)
/* UART interrupt enable register value */
#define UARTIER_IME (1 << 3)
#define UARTIER_ILE (1 << 2)
#define UARTIER_ITXE (1 << 1)
#define UARTIER_IRXE (1 << 0)
/* UART line control register value */
#define UARTLCR_DLAB (1 << 7)
#define UARTLCR_BCB (1 << 6)
#define UARTLCR_SPB (1 << 5)
#define UARTLCR_EPS (1 << 4)
#define UARTLCR_PE (1 << 3)
#define UARTLCR_SB (1 << 2)
/* UART line status register value */
#define UARTLSR_ERROR (1 << 7)
#define UARTLSR_TE (1 << 6)
#define UARTLSR_TFE (1 << 5)
#define UARTLSR_BI (1 << 4)
#define UARTLSR_FE (1 << 3)
#define UARTLSR_PE (1 << 2)
#define UARTLSR_OE (1 << 1)
#define UARTLSR_DR (1 << 0)
void rt_hw_uart_init(void);
#endif

7
bsp/ls1cdev/drivers/net/synopGMAC.c
View File

@ -860,7 +860,7 @@ void eth_rx_irq(int irqno,void *param)
return;
}
void rt_hw_eth_init(void)
int rt_hw_eth_init(void)
{
u64 base_addr = Gmac_base;
struct synopGMACNetworkAdapter * synopGMACadapter;
@ -925,4 +925,9 @@ void rt_hw_eth_init(void)
eth_dev.parent.eth_rx = rt_eth_rx;
eth_device_init(&(eth_dev.parent), "e0");
return 0;
}
INIT_DEVICE_EXPORT(rt_hw_eth_init);

2
bsp/ls1cdev/drivers/net/synopGMAC.h
View File

@ -32,6 +32,6 @@
#include "mii.h"
#include "synopGMAC_types.h"
void rt_hw_eth_init(void);
int rt_hw_eth_init(void);
#endif /*__SYNOPGMAC__H*/

4
bsp/ls1cdev/drivers/net/synopGMAC_plat.h
View File

@ -117,8 +117,8 @@ typedef int bool;
*/
//sw: nothing to display
#define TR0(fmt, args...) rt_kprintf(fmt, ##args)
#define TR(fmt, args...) rt_kprintf(fmt, ##args)
#define TR0(fmt, args...) //rt_kprintf(fmt, ##args)
#define TR(fmt, args...) //rt_kprintf(fmt, ##args)
//#define TR rt_kprintf
//typedef int bool;

286
bsp/ls1cdev/drivers/uart.c
View File

@ -1,286 +0,0 @@
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2011-08-08 lgnq first version
* 2015-07-09 chinesebear modified for loongson 1c
*/
#include <rthw.h>
#include <rtthread.h>
#include "uart.h"
/**
* @addtogroup Loongson LS1B
*/
/*@{*/
#if defined(RT_USING_SERIAL) && defined(RT_USING_DEVICE)
struct rt_uart_ls1c
{
struct rt_device parent;
rt_uint32_t hw_base;
rt_uint32_t irq;
/* buffer for reception */
rt_uint8_t read_index, save_index;
rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
}uart_device;
static void rt_uart_irqhandler(int irqno, void *param)
{
rt_ubase_t level;
rt_uint8_t isr;
struct rt_uart_ls1c *uart = &uart_device;
/* read interrupt status and clear it */
isr = UART_IIR(uart->hw_base);
isr = (isr >> 1) & 0x3;
/* receive data available */
if (isr & 0x02)
{
/* Receive Data Available */
while (UART_LSR(uart->hw_base) & UARTLSR_DR)
{
uart->rx_buffer[uart->save_index] = UART_DAT(uart->hw_base);
level = rt_hw_interrupt_disable();
uart->save_index ++;
if (uart->save_index >= RT_UART_RX_BUFFER_SIZE)
uart->save_index = 0;
rt_hw_interrupt_enable(level);
}
/* invoke callback */
if (uart->parent.rx_indicate != RT_NULL)
{
rt_size_t length;
if (uart->read_index > uart->save_index)
length = RT_UART_RX_BUFFER_SIZE - uart->read_index + uart->save_index;
else
length = uart->save_index - uart->read_index;
uart->parent.rx_indicate(&uart->parent, length);
}
}
return;
}
static rt_err_t rt_uart_init(rt_device_t dev)
{
rt_uint32_t baud_div;
struct rt_uart_ls1c *uart = (struct rt_uart_ls1c *)dev;
RT_ASSERT(uart != RT_NULL);
//#if 0
/* init UART Hardware */
UART_IER(uart->hw_base) = 0; /* clear interrupt */
UART_FCR(uart->hw_base) = 0xc3; /* reset UART Rx/Tx */
/* enable UART clock */
/* set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
UART_LCR(uart->hw_base) = 0x80;
/* set baudrate */
baud_div = DEV_CLK / 16 / UART_BAUDRATE /2;
UART_MSB(uart->hw_base) = (baud_div >> 8) & 0xff;
UART_LSB(uart->hw_base) = baud_div & 0xff;
UART_LCR(uart->hw_base) = 0x03;
/* Enable UART unit, enable and clear FIFO */
//UART_FCR(uart->hw_base) = UARTFCR_UUE | UARTFCR_FE | UARTFCR_TFLS | UARTFCR_RFLS;
/* enable RX interrupt */
UART_IER(uart->hw_base) = UARTIER_IRXE|UARTIER_ILE;
//#endif
return RT_EOK;
}
static rt_err_t rt_uart_open(rt_device_t dev, rt_uint16_t oflag)
{
struct rt_uart_ls1c *uart = (struct rt_uart_ls1c *)dev;
RT_ASSERT(uart != RT_NULL);
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
/* Enable the UART Interrupt */
UART_IER(uart->hw_base) |= UARTIER_IRXE;
/* install interrupt */
rt_hw_interrupt_install(uart->irq, rt_uart_irqhandler, RT_NULL, "UART");
rt_hw_interrupt_umask(uart->irq);
}
return RT_EOK;
}
static rt_err_t rt_uart_close(rt_device_t dev)
{
struct rt_uart_ls1c *uart = (struct rt_uart_ls1c *)dev;
RT_ASSERT(uart != RT_NULL);
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
/* Disable the UART Interrupt */
UART_IER(uart->hw_base) &= ~(UARTIER_IRXE);
}
return RT_EOK;
}
static rt_size_t rt_uart_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
{
rt_uint8_t *ptr;
struct rt_uart_ls1c *uart = (struct rt_uart_ls1c *)dev;
RT_ASSERT(uart != RT_NULL);
/* point to buffer */
ptr = (rt_uint8_t *)buffer;
if (dev->flag & RT_DEVICE_FLAG_INT_RX)
{
while (size)
{
/* interrupt receive */
rt_base_t level;
/* disable interrupt */
level = rt_hw_interrupt_disable();
if (uart->read_index != uart->save_index)
{
*ptr = uart->rx_buffer[uart->read_index];
uart->read_index ++;
if (uart->read_index >= RT_UART_RX_BUFFER_SIZE)
uart->read_index = 0;
}
else
{
/* no data in rx buffer */
/* enable interrupt */
rt_hw_interrupt_enable(level);
break;
}
/* enable interrupt */
rt_hw_interrupt_enable(level);
ptr ++;
size --;
}
return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
}
return 0;
}
static rt_size_t rt_uart_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
{
char *ptr;
struct rt_uart_ls1c *uart = (struct rt_uart_ls1c *)dev;
RT_ASSERT(uart != RT_NULL);
ptr = (char *)buffer;
if (dev->flag & RT_DEVICE_FLAG_STREAM)
{
/* stream mode */
while (size)
{
if (*ptr == '\n')
{
/* FIFO status, contain valid data */
while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
/* write data */
UART_DAT(uart->hw_base) = '\r';
}
/* FIFO status, contain valid data */
while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
/* write data */
UART_DAT(uart->hw_base) = *ptr;
ptr ++;
size --;
}
}
else
{
while (size != 0)
{
/* FIFO status, contain valid data */
while (!(UART_LSR(uart->hw_base) & (UARTLSR_TE | UARTLSR_TFE)));
/* write data */
UART_DAT(uart->hw_base) = *ptr;
ptr++;
size--;
}
}
return (rt_size_t)ptr - (rt_size_t)buffer;
}
void rt_hw_uart_init(void)
{
struct rt_uart_ls1c *uart;
/* get uart device */
uart = &uart_device;
/* device initialization */
uart->parent.type = RT_Device_Class_Char;
rt_memset(uart->rx_buffer, 0, sizeof(uart->rx_buffer));
uart->read_index = uart->save_index = 0;
#if defined(RT_USING_UART0)
uart->hw_base = UART0_BASE;
uart->irq = LS1C_UART0_IRQ;
#elif defined(RT_USING_UART2)
uart->hw_base = UART2_BASE;
uart->irq = LS1C_UART2_IRQ;
#elif defined(RT_USING_UART3)
uart->hw_base = UART3_BASE;
uart->irq = LS1C_UART3_IRQ;
#endif
/* device interface */
uart->parent.init = rt_uart_init;
uart->parent.open = rt_uart_open;
uart->parent.close = rt_uart_close;
uart->parent.read = rt_uart_read;
uart->parent.write = rt_uart_write;
uart->parent.control = RT_NULL;
uart->parent.user_data = RT_NULL;
rt_device_register(&uart->parent, "uart2",
RT_DEVICE_FLAG_RDWR |
RT_DEVICE_FLAG_STREAM |
RT_DEVICE_FLAG_INT_RX);
}
#endif /* end of UART */
/*@}*/

103
bsp/ls1cdev/drivers/uart.h
View File

@ -1,103 +0,0 @@
/*
* File : uart.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2011-08-08 lgnq first version for LS1B
* 2015-07-06 chinesebear modified for loongson 1c
*/
#ifndef __UART_H__
#define __UART_H__
#include "ls1c.h"
#define DEV_CLK 252000000 // 252MHz
#define UART_BAUDRATE 115200
#define UART0_BASE 0xBFE40000
//#define UART0_1_BASE 0xBFE41000
#define UART1_BASE 0xBFE44000
#define UART2_BASE 0xBFE48000
#define UART3_BASE 0xBFE4C000
#define UART4_BASE 0xBFE4C400
#define UART5_BASE 0xBFE4C500
#define UART6_BASE 0xBFE4C600
#define UART7_BASE 0xBFE4C700
#define UART8_BASE 0xBFE4C800
#define UART9_BASE 0xBFE4C900
#define UART10_BASE 0xBFE4Ca00
#define UART11_BASE 0xBFE4Cb00
/* UART registers */
#define UART_DAT(base) __REG8(base + 0x00)
#define UART_IER(base) __REG8(base + 0x01)
#define UART_IIR(base) __REG8(base + 0x02)
#define UART_FCR(base) __REG8(base + 0x02)
#define UART_LCR(base) __REG8(base + 0x03)
#define UART_MCR(base) __REG8(base + 0x04)
#define UART_LSR(base) __REG8(base + 0x05)
#define UART_MSR(base) __REG8(base + 0x06)
#define UART_LSB(base) __REG8(base + 0x00)
#define UART_MSB(base) __REG8(base + 0x01)
/* UART0 registers */
#define UART0_DAT __REG8(UART0_BASE + 0x00)
#define UART0_IER __REG8(UART0_BASE + 0x01)
#define UART0_IIR __REG8(UART0_BASE + 0x02)
#define UART0_FCR __REG8(UART0_BASE + 0x02)
#define UART0_LCR __REG8(UART0_BASE + 0x03)
#define UART0_MCR __REG8(UART0_BASE + 0x04)
#define UART0_LSR __REG8(UART0_BASE + 0x05)
#define UART0_MSR __REG8(UART0_BASE + 0x06)
#define UART0_LSB __REG8(UART0_BASE + 0x00)
#define UART0_MSB __REG8(UART0_BASE + 0x01)
/* UART1 registers */
#define UART1_DAT __REG8(UART1_BASE + 0x00)
#define UART1_IER __REG8(UART1_BASE + 0x01)
#define UART1_IIR __REG8(UART1_BASE + 0x02)
#define UART1_FCR __REG8(UART1_BASE + 0x02)
#define UART1_LCR __REG8(UART1_BASE + 0x03)
#define UART1_MCR __REG8(UART1_BASE + 0x04)
#define UART1_LSR __REG8(UART1_BASE + 0x05)
#define UART1_MSR __REG8(UART1_BASE + 0x06)
#define UART1_LSB __REG8(UART1_BASE + 0x00)
#define UART1_MSB __REG8(UART1_BASE + 0x01)
/* UART interrupt enable register value */
#define UARTIER_IME (1 << 3)
#define UARTIER_ILE (1 << 2)
#define UARTIER_ITXE (1 << 1)
#define UARTIER_IRXE (1 << 0)
/* UART line control register value */
#define UARTLCR_DLAB (1 << 7)
#define UARTLCR_BCB (1 << 6)
#define UARTLCR_SPB (1 << 5)
#define UARTLCR_EPS (1 << 4)
#define UARTLCR_PE (1 << 3)
#define UARTLCR_SB (1 << 2)
/* UART line status register value */
#define UARTLSR_ERROR (1 << 7)
#define UARTLSR_TE (1 << 6)
#define UARTLSR_TFE (1 << 5)
#define UARTLSR_BI (1 << 4)
#define UARTLSR_FE (1 << 3)
#define UARTLSR_PE (1 << 2)
#define UARTLSR_OE (1 << 1)
#define UARTLSR_DR (1 << 0)
void rt_hw_uart_init(void);
#endif

4
bsp/ls1cdev/kconfig
View File

@ -16,8 +16,8 @@ config $PKGS_DIR
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/KConfig"
source "$PKGS_DIR/KConfig"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
if RT_USING_SERIAL
config RT_USING_UART2

13
bsp/ls1cdev/libraries/ls1c_regs.h
View File

@ -125,9 +125,20 @@
// 串口寄存器
#define LS1C_UART0_BASE (0xbfe40000)
#define LS1C_UART00_BASE (0xbfe40000)
#define LS1C_UART01_BASE (0xbfe41000)
#define LS1C_UART1_BASE (0xbfe44000)
#define LS1C_UART2_BASE (0xbfe48000)
#define LS1C_UART3_BASE (0xbfe4c000)
#define LS1C_UART4_BASE (0xbfe4c400)
#define LS1C_UART5_BASE (0xbfe4c500)
#define LS1C_UART6_BASE (0xbfe4c600)
#define LS1C_UART7_BASE (0xbfe4c700)
#define LS1C_UART8_BASE (0xbfe4c800)
#define LS1C_UART9_BASE (0xbfe4c900)
#define LS1C_UART10_BASE (0xbfe4ca00)
#define LS1C_UART11_BASE (0xbfe4cb00)
#endif

316
bsp/ls1cdev/libraries/ls1c_uart.c Normal file
View File

@ -0,0 +1,316 @@
// 串口相关源码
#include <stdio.h>
#include <stdarg.h>
#include "ls1c_public.h"
#include "ls1c_regs.h"
#include "ls1c_pin.h"
#include "ls1c_uart.h"
#include "ls1c_clock.h"
#include "ls1c.h"
// 串口线路状态寄存器的位域
#define LS1C_UART_LSR_TE (1 << 6)
#define LS1C_UART_LSR_TFE (1 << 5)
// 打印缓存的大小
#define LS1C_UART_PRINT_BUF_SIZE (256)
// 调试串口信息
ls1c_uart_info_t debug_uart_info = {0};
/*
* 获取指定串口模块的基地址
* @UARTx 串口编号
* @ret 基地址
*/
void *uart_get_base(ls1c_uart_t UARTx)
{
void *base = NULL;
switch (UARTx)
{
case LS1C_UART00:
base = (void *)LS1C_UART00_BASE;
break;
case LS1C_UART01:
base = (void *)LS1C_UART01_BASE;
break;
case LS1C_UART1:
base = (void *)LS1C_UART1_BASE;
break;
case LS1C_UART2:
base = (void *)LS1C_UART2_BASE;
break;
case LS1C_UART3:
base = (void *)LS1C_UART3_BASE;
break;
case LS1C_UART4:
base = (void *)LS1C_UART4_BASE;
break;
case LS1C_UART5:
base = (void *)LS1C_UART5_BASE;
break;
case LS1C_UART6:
base = (void *)LS1C_UART6_BASE;
break;
case LS1C_UART7:
base = (void *)LS1C_UART7_BASE;
break;
case LS1C_UART8:
base = (void *)LS1C_UART8_BASE;
break;
case LS1C_UART9:
base = (void *)LS1C_UART9_BASE;
break;
case LS1C_UART10:
base = (void *)LS1C_UART10_BASE;
break;
case LS1C_UART11:
base = (void *)LS1C_UART11_BASE;
break;
default:
break;
}
return base;
}
/*
* 初始化指定的串口模块
* @uart_info_p 串口模块信息
*/
void uart_init(ls1c_uart_info_t *uart_info_p)
{
void *uart_base = uart_get_base(uart_info_p->UARTx);
unsigned long baudrate_div = 0;
// 禁止所有中断
reg_write_8(0, uart_base + LS1C_UART_IER_OFFSET);
// 接收FIFO的中断申请Trigger为14字节，清空发送和接收FIFO，并复位
reg_write_8(0xc3, uart_base + LS1C_UART_FCR_OFFSET);
// 设置波特率
reg_write_8(0x80, uart_base + LS1C_UART_LCR_OFFSET);
baudrate_div = clk_get_cpu_rate() / 16 / uart_info_p->baudrate / 2;
reg_write_8((baudrate_div >> 8) & 0xff, uart_base + LS1C_UART_MSB_OFFSET);
reg_write_8(baudrate_div & 0xff, uart_base + LS1C_UART_LSB_OFFSET);
// 8个数据位，1个停止位，无校验
reg_write_8(0x03, uart_base + LS1C_UART_LCR_OFFSET);
// 使能接收中断
if (TRUE == uart_info_p->rx_enable)
{
reg_write_8(IER_IRxE|IER_ILE , uart_base + LS1C_UART_IER_OFFSET);
}
return ;
}
/*
* 判断FIFO是否为空
* @uartx 串口号
* @ret TRUE or FALSE
*/
BOOL uart_is_transmit_empty(ls1c_uart_t uartx)
{
void *uart_base = uart_get_base(uartx);
unsigned char status = reg_read_8(uart_base + LS1C_UART_LSR_OFFSET);
if (status & (LS1C_UART_LSR_TE | LS1C_UART_LSR_TFE))
{
return TRUE;
}
else
{
return FALSE;
}
}
/*
* 发送一个字节
* @uartx 串口号
* @ch 待发送的字符串
*/
void uart_putc(ls1c_uart_t uartx, unsigned char ch)
{
void *uart_base = uart_get_base(uartx);
// 等待
while (FALSE == uart_is_transmit_empty(uartx))
;
// 发送
reg_write_8(ch, uart_base + LS1C_UART_DAT_OFFSET);
return ;
}
/*
* 打印一个字符串到指定串口
* @uartx 串口号
* @str 待打印的字符串
*/
void uart_print(ls1c_uart_t uartx, const char *str)
{
while ('\0' != *str) // 判断是否为字符串结束符
{
uart_putc(uartx, *str); // 发送一个字符
str++;
}
return ;
}
/*
* 初始化串口2
*/
void uart2_init(void)
{
unsigned int tx_gpio = 37;
unsigned int rx_gpio = 36;
// 设置复用
pin_set_remap(tx_gpio, PIN_REMAP_SECOND);
pin_set_remap(rx_gpio, PIN_REMAP_SECOND);
// 初始化相关寄存器
debug_uart_info.UARTx = LS1C_UART2;
debug_uart_info.baudrate = 115200;
debug_uart_info.rx_enable = FALSE; // 调试串口只需要打印(发送)功能，不需要接收功能
uart_init(&debug_uart_info);
return ;
}
/*
* 在串口2上打印字符串
* @str 待打印的字符串
*/
void uart2_print(const char *str)
{
uart_print(LS1C_UART2, str);
return ;
}
/*
* 在调试串口打印字符串
* @str 待打印的字符串
*/
void uart_debug_print(const char *str)
{
uart_print(debug_uart_info.UARTx, str);
return ;
}
/*
* 在调试串口打印一个字符
* @ch 待打印的字符
*/
void uart_debug_putc(unsigned char ch)
{
uart_putc(debug_uart_info.UARTx, ch);
return ;
}
/*
* 把中断号转换为串口号
* @IRQn 中断号
* @ret 串口号
*/
ls1c_uart_t uart_irqn_to_uartx(int IRQn)
{
ls1c_uart_t uartx = LS1C_UART2;
switch (IRQn)
{
/* 串口UART00和UART01的中断号还待确定
case LS1C_UART00_IRQ:
uartx = LS1C_UART00;
break;
case LS1C_UART01_IRQ:
uartx = LS1C_UART01;
break;
*/
case LS1C_UART1_IRQ:
uartx = LS1C_UART1;
break;
case LS1C_UART2_IRQ:
uartx = LS1C_UART2;
break;
case LS1C_UART3_IRQ:
uartx = LS1C_UART3;
break;
case LS1C_UART4_IRQ:
uartx = LS1C_UART4;
break;
case LS1C_UART5_IRQ:
uartx = LS1C_UART5;
break;
case LS1C_UART6_IRQ:
uartx = LS1C_UART6;
break;
case LS1C_UART7_IRQ:
uartx = LS1C_UART7;
break;
case LS1C_UART8_IRQ:
uartx = LS1C_UART8;
break;
case LS1C_UART9_IRQ:
uartx = LS1C_UART9;
break;
case LS1C_UART10_IRQ:
uartx = LS1C_UART10;
break;
case LS1C_UART11_IRQ:
uartx = LS1C_UART11;
break;
default:
uartx = LS1C_UART2;
break;
}
return uartx;
}

180
bsp/ls1cdev/libraries/ls1c_uart.h Normal file
View File

@ -0,0 +1,180 @@
// 串口相关头文件
#ifndef __OPENLOONGSON_UART_H
#define __OPENLOONGSON_UART_H
#include "ls1c_public.h"
// 串口各寄存器相对基地址的偏移
#define LS1C_UART_DAT_OFFSET (0)
#define LS1C_UART_IER_OFFSET (1)
#define LS1C_UART_IIR_OFFSET (2)
#define LS1C_UART_FCR_OFFSET (2)
#define LS1C_UART_LCR_OFFSET (3)
#define LS1C_UART_MCR_OFFSET (4)
#define LS1C_UART_LSR_OFFSET (5)
#define LS1C_UART_MSR_OFFSET (6)
#define LS1C_UART_LSB_OFFSET (0) // 分频锁存器1
#define LS1C_UART_MSB_OFFSET (1) // 分频锁存器2
/* interrupt enable register */
#define IER_IRxE 0x1 /* 接收有效数据中断使能 */
#define IER_ITxE 0x2 /* 传输保存寄存器为空中断使能 */
#define IER_ILE 0x4 /* 接收器线路状态中断使能 */
#define IER_IME 0x8 /* Modem状态中断使能 */
/* interrupt identification register */
#define IIR_IMASK 0xf /* mask */
#define IIR_RXTOUT 0xc /* receive timeout */
#define IIR_RLS 0x6 /* receive line status */
#define IIR_RXRDY 0x4 /* receive ready */
#define IIR_TXRDY 0x2 /* transmit ready */
#define IIR_NOPEND 0x1 /* nothing */
#define IIR_MLSC 0x0 /* modem status */
#define IIR_FIFO_MASK 0xc0 /* set if FIFOs are enabled */
/* fifo control register */
#define FIFO_ENABLE 0x01 /* enable fifo */
#define FIFO_RCV_RST 0x02 /* reset receive fifo */
#define FIFO_XMT_RST 0x04 /* reset transmit fifo */
#define FIFO_DMA_MODE 0x08 /* enable dma mode */
#define FIFO_TRIGGER_1 0x00 /* trigger at 1 char */
#define FIFO_TRIGGER_4 0x40 /* trigger at 4 chars */
#define FIFO_TRIGGER_8 0x80 /* trigger at 8 chars */
#define FIFO_TRIGGER_14 0xc0 /* trigger at 14 chars */
// 线路控制寄存器
/* character format control register */
#define CFCR_DLAB 0x80 /* divisor latch */
#define CFCR_SBREAK 0x40 /* send break */
#define CFCR_PZERO 0x30 /* zero parity */
#define CFCR_PONE 0x20 /* one parity */
#define CFCR_PEVEN 0x10 /* even parity */
#define CFCR_PODD 0x00 /* odd parity */
#define CFCR_PENAB 0x08 /* parity enable */
#define CFCR_STOPB 0x04 /* 2 stop bits */
#define CFCR_8BITS 0x03 /* 8 data bits */
#define CFCR_7BITS 0x02 /* 7 data bits */
#define CFCR_6BITS 0x01 /* 6 data bits */
#define CFCR_5BITS 0x00 /* 5 data bits */
/* modem control register */
#define MCR_LOOPBACK 0x10 /* loopback */
#define MCR_IENABLE 0x08 /* output 2 = int enable */
#define MCR_DRS 0x04 /* output 1 = xxx */
#define MCR_RTS 0x02 /* enable RTS */
#define MCR_DTR 0x01 /* enable DTR */
/* line status register */
#define LSR_RCV_FIFO 0x80 /* error in receive fifo */
#define LSR_TSRE 0x40 /* transmitter empty */
#define LSR_TXRDY 0x20 /* transmitter ready */
#define LSR_BI 0x10 /* break detected */
#define LSR_FE 0x08 /* framing error */
#define LSR_PE 0x04 /* parity error */
#define LSR_OE 0x02 /* overrun error */
#define LSR_RXRDY 0x01 /* receiver ready */
#define LSR_RCV_MASK 0x1f
// 串口模块编号
typedef enum
{
LS1C_UART00 = 0, // 全功能串口UART0可以分为两个四线串口UART00和UART01
LS1C_UART01,
LS1C_UART1,
LS1C_UART2,
LS1C_UART3,
LS1C_UART4,
LS1C_UART5,
LS1C_UART6,
LS1C_UART7,
LS1C_UART8,
LS1C_UART9,
LS1C_UART10,
LS1C_UART11
}ls1c_uart_t;
// 串口信息
typedef struct
{
ls1c_uart_t UARTx; // 串口模块编号
unsigned int baudrate; // 波特率
BOOL rx_enable; // 是否需要使用串口接收数据(使能接收中断)，发送默认使能
}ls1c_uart_info_t;
/*
* 获取指定串口模块的基地址
* @UARTx 串口编号
* @ret 基地址
*/
void *uart_get_base(ls1c_uart_t UARTx);
/*
* 初始化指定的串口模块
* @uart_info_p 串口模块信息
*/
void uart_init(ls1c_uart_info_t *uart_info_p);
/*
* 初始化串口2
*/
void uart2_init(void);
/*
* 在串口2上打印字符串
* @str 待打印的字符串
*/
void uart2_print(const char *str);
/*
* 在调试串口打印字符串
* @str 待打印的字符串
*/
void uart_debug_print(const char *str);
/*
* 在调试串口打印一个字符
* @ch 待打印的字符
*/
void uart_debug_putc(unsigned char ch);
/*
* 把中断号转换为串口号
* @IRQn 中断号
* @ret 串口号
*/
ls1c_uart_t uart_irqn_to_uartx(int IRQn);
/*
* 发送一个字节
* @uartx 串口号
* @ch 待发送的字符串
*/
void uart_putc(ls1c_uart_t uartx, unsigned char ch);
/*
* 打印一个字符串到指定串口
* @uartx 串口号
* @str 待打印的字符串
*/
void uart_print(ls1c_uart_t uartx, const char *str);
#endif

89
bsp/ls1cdev/rtconfig.h
View File

@ -8,9 +8,7 @@
#define RT_NAME_MAX 10
#define RT_ALIGN_SIZE 8
/* RT_THREAD_PRIORITY_8 is not set */
#define RT_THREAD_PRIORITY_32
/* RT_THREAD_PRIORITY_256 is not set */
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 1000
#define RT_DEBUG
@ -19,7 +17,6 @@
#define RT_DEBUG_THREAD 0
#define RT_USING_HOOK
#define IDLE_THREAD_STACK_SIZE 1024
/* RT_USING_TIMER_SOFT is not set */
/* Inter-Thread communication */
@ -28,17 +25,12 @@
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* RT_USING_SIGNALS is not set */
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_MEMHEAP
/* RT_USING_NOHEAP is not set */
#define RT_USING_SMALL_MEM
/* RT_USING_SLAB is not set */
/* RT_USING_MEMHEAP_AS_HEAP is not set */
/* RT_USING_MEMTRACE is not set */
#define RT_USING_HEAP
/* Kernel Device Object */
@ -48,16 +40,15 @@
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart2"
/* RT_USING_MODULE is not set */
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
/* RT_USING_USER_MAIN is not set */
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
/* C++ features */
/* RT_USING_CPLUSPLUS is not set */
/* Command shell */
@ -70,10 +61,8 @@
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_CMD_SIZE 80
/* FINSH_USING_AUTH is not set */
#define FINSH_USING_MSH
#define FINSH_USING_MSH_DEFAULT
/* FINSH_USING_MSH_ONLY is not set */
/* Device virtual file system */
@ -89,22 +78,11 @@
#define RT_DFS_ELM_CODE_PAGE 936
#define RT_DFS_ELM_WORD_ACCESS
#define RT_DFS_ELM_USE_LFN_0
/* RT_DFS_ELM_USE_LFN_1 is not set */
/* RT_DFS_ELM_USE_LFN_2 is not set */
/* RT_DFS_ELM_USE_LFN_3 is not set */
#define RT_DFS_ELM_USE_LFN 0
#define RT_DFS_ELM_MAX_LFN 64
#define RT_DFS_ELM_DRIVES 2
#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
/* RT_DFS_ELM_USE_ERASE is not set */
#define RT_DFS_ELM_REENTRANT
/* RT_USING_DFS_DEVFS is not set */
/* RT_USING_DFS_NET is not set */
/* RT_USING_DFS_ROMFS is not set */
/* RT_USING_DFS_RAMFS is not set */
/* RT_USING_DFS_UFFS is not set */
/* RT_USING_DFS_JFFS2 is not set */
/* RT_USING_DFS_NFS is not set */
/* Device Drivers */
@ -112,36 +90,19 @@
#define RT_USING_SERIAL
#define RT_USING_CAN
#define RT_CAN_USING_HDR
/* RT_USING_HWTIMER is not set */
/* RT_USING_CPUTIME is not set */
#define RT_USING_I2C
#define RT_USING_I2C_BITOPS
#define RT_USING_PIN
/* RT_USING_MTD_NOR is not set */
/* RT_USING_MTD_NAND is not set */
/* RT_USING_RTC is not set */
/* RT_USING_SDIO is not set */
#define RT_USING_SPI
#define RT_USING_SPI_MSD
/* RT_USING_SFUD is not set */
/* RT_USING_W25QXX is not set */
/* RT_USING_GD is not set */
/* RT_USING_ENC28J60 is not set */
/* RT_USING_SPI_WIFI is not set */
/* RT_USING_WDT is not set */
/* RT_USING_WIFI is not set */
/* Using USB */
/* RT_USING_USB_HOST is not set */
/* RT_USING_USB_DEVICE is not set */
/* POSIX layer and C standard library */
#define RT_USING_LIBC
#define RT_USING_PTHREADS
/* RT_USING_POSIX is not set */
/* HAVE_SYS_SIGNALS is not set */
/* Network stack */
@ -149,12 +110,12 @@
#define RT_USING_LWIP
#define RT_USING_LWIP141
/* RT_USING_LWIP202 is not set */
#define RT_LWIP_IGMP
#define RT_LWIP_ICMP
/* RT_LWIP_SNMP is not set */
#define RT_LWIP_DNS
/* RT_LWIP_DHCP is not set */
#define RT_LWIP_DHCP
#define IP_SOF_BROADCAST 1
#define IP_SOF_BROADCAST_RECV 1
/* Static IPv4 Address */
@ -163,8 +124,6 @@
#define RT_LWIP_MSKADDR "255.255.255.0"
#define RT_LWIP_UDP
#define RT_LWIP_TCP
/* RT_LWIP_RAW is not set */
/* RT_LWIP_PPP is not set */
#define RT_MEMP_NUM_NETCONN 8
#define RT_LWIP_PBUF_NUM 4
#define RT_LWIP_RAW_PCB_NUM 4
@ -179,73 +138,57 @@
#define RT_LWIP_ETHTHREAD_PRIORITY 14
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 8
/* RT_LWIP_REASSEMBLY_FRAG is not set */
#define LWIP_NETIF_STATUS_CALLBACK 1
#define SO_REUSE 1
#define LWIP_SO_RCVTIMEO 1
#define LWIP_SO_SNDTIMEO 1
#define LWIP_SO_RCVBUF 1
/* RT_LWIP_NETIF_LOOPBACK is not set */
#define LWIP_NETIF_LOOPBACK 0
/* Modbus master and slave stack */
/* RT_USING_MODBUS is not set */
/* LWIP_USING_DHCPD is not set */
/* VBUS(Virtual Software BUS) */
/* RT_USING_VBUS is not set */
/* Utilities */
/* RT_USING_LOGTRACE is not set */
/* RT_USING_RYM is not set */
/* RT-Thread online packages */
/* system packages */
/* PKG_USING_PARTITION is not set */
/* PKG_USING_SQLITE is not set */
/* PKG_USING_RTI is not set */
/* RT-Thread GUI Engine */
/* IoT - internet of things */
/* PKG_USING_PAHOMQTT is not set */
/* PKG_USING_WEBCLIENT is not set */
/* PKG_USING_MONGOOSE is not set */
/* PKG_USING_WEBTERMINAL is not set */
/* PKG_USING_CJSON is not set */
/* PKG_USING_EZXML is not set */
/* PKG_USING_NANOPB is not set */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* security packages */
/* PKG_USING_MBEDTLS is not set */
/* PKG_USING_libsodium is not set */
/* language packages */
/* PKG_USING_JERRYSCRIPT is not set */
/* PKG_USING_MICROPYTHON is not set */
/* multimedia packages */
/* tools packages */
/* PKG_USING_CMBACKTRACE is not set */
/* PKG_USING_EASYLOGGER is not set */
/* PKG_USING_SYSTEMVIEW is not set */
/* miscellaneous packages */
/* PKG_USING_FASTLZ is not set */
/* PKG_USING_MINILZO is not set */
/* example package: hello */
/* PKG_USING_HELLO is not set */
#define RT_USING_UART2
#define RT_UART_RX_BUFFER_SIZE 64
#define RT_USING_GMAC_INT_MODE