change the default project to simple led project.

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@508 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
bernard.xiong 2010-03-18 05:51:39 +00:00
parent a352c48a76
commit a9d2a38042
9 changed files with 584 additions and 1168 deletions

View File

@ -1,7 +1,7 @@
/* /*
* File : application.c * File : application.c
* This file is part of RT-Thread RTOS * This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team * COPYRIGHT (C) 2006, RT-Thread Development Team
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
@ -17,103 +17,69 @@
*/ */
/*@{*/ /*@{*/
#include <board.h>
#include <rtthread.h> #include <rtthread.h>
#include "led.h"
#ifdef RT_USING_DFS char thread_led1_stack[512];
/* dfs init */ struct rt_thread thread_led1;
#include <dfs_init.h> static void rt_thread_entry_led1(void* parameter)
/* dfs filesystem:EFS filesystem init */
#include <dfs_elm.h>
/* dfs Filesystem APIs */
#include <dfs_fs.h>
#endif
#ifdef RT_USING_LWIP
#include <lwip/sys.h>
#include <lwip/api.h>
#include <netif/ethernetif.h>
#endif
void rt_init_thread_entry(void* parameter)
{ {
/* Filesystem Initialization */ /* init led configuration */
#ifdef RT_USING_DFS rt_hw_led_init();
while (1)
{ {
/* init the device filesystem */ /* led on */
dfs_init(); rt_kprintf("led1 on\r\n");
rt_hw_led_on(0);
rt_thread_delay(50); /* sleep 0.5 second and switch to other thread */
#ifdef RT_USING_DFS_EFSL /* led off */
/* init the efsl filesystam*/ rt_kprintf("led1 off\r\n");
efsl_init(); rt_hw_led_off(0);
rt_thread_delay(50);
}
}
/* mount sd card fat partition 1 as root directory */ char thread_led2_stack[512];
if (dfs_mount("sd0", "/", "efs", 0, 0) == 0) struct rt_thread thread_led2;
void rt_thread_entry_led2(void* parameter)
{
unsigned int count=0;
while (1)
{ {
rt_kprintf("File System initialized!\n"); /* led on */
rt_kprintf("led2 on,count : %d\r\n",count);
count++;
rt_hw_led_on(1);
rt_thread_delay(RT_TICK_PER_SECOND);
/* led off */
rt_kprintf("led2 off\r\n");
rt_hw_led_off(1);
rt_thread_delay(RT_TICK_PER_SECOND);
} }
else
rt_kprintf("File System initialzation failed!\n");
#elif defined(RT_USING_DFS_ELMFAT)
/* init the elm chan FatFs filesystam*/
elm_init();
/* mount sd card fat partition 1 as root directory */
if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
{
rt_kprintf("File System initialized!\n");
}
else
rt_kprintf("File System initialzation failed!\n");
#endif
}
#endif
/* LwIP Initialization */
#ifdef RT_USING_LWIP
{
extern void lwip_sys_init(void);
/* register ethernetif device */
eth_system_device_init();
#ifdef STM32F10X_CL
rt_hw_stm32_eth_init();
#else
/* STM32F103 */
#if STM32_ETH_IF == 0
rt_hw_enc28j60_init();
#elif STM32_ETH_IF == 1
rt_hw_dm9000_init();
#endif
#endif
/* re-init device driver */
rt_device_init_all();
/* init lwip system */
lwip_sys_init();
rt_kprintf("TCP/IP initialized!\n");
}
#endif
} }
int rt_application_init() int rt_application_init()
{ {
rt_thread_t init_thread; /* init led1 thread */
rt_thread_init(&thread_led1,
"led1",
rt_thread_entry_led1,
RT_NULL,
&thread_led1_stack[0],
sizeof(thread_led1_stack),10,10);
rt_thread_startup(&thread_led1);
#if (RT_THREAD_PRIORITY_MAX == 32) /* init led2 thread */
init_thread = rt_thread_create("init", rt_thread_init(&thread_led2,
rt_init_thread_entry, RT_NULL, "led2",
2048, 8, 20); rt_thread_entry_led2,
#else RT_NULL,
init_thread = rt_thread_create("init", &thread_led2_stack[0],
rt_init_thread_entry, RT_NULL, sizeof(thread_led2_stack),10,10);
2048, 80, 20); rt_thread_startup(&thread_led2);
#endif
if (init_thread != RT_NULL)
rt_thread_startup(init_thread);
return 0; return 0;
} }

View File

@ -14,6 +14,15 @@
#include <rtthread.h> #include <rtthread.h>
#include <stm32f10x.h> #include <stm32f10x.h>
#ifdef STM32_SIMULATOR
#define led1_rcc RCC_APB2Periph_GPIOA
#define led1_gpio GPIOA
#define led1_pin (GPIO_Pin_5)
#define led2_rcc RCC_APB2Periph_GPIOA
#define led2_gpio GPIOA
#define led2_pin (GPIO_Pin_6)
#else
#define led1_rcc RCC_APB2Periph_GPIOF #define led1_rcc RCC_APB2Periph_GPIOF
#define led1_gpio GPIOF #define led1_gpio GPIOF
#define led1_pin (GPIO_Pin_6 | GPIO_Pin_7) #define led1_pin (GPIO_Pin_6 | GPIO_Pin_7)
@ -21,6 +30,7 @@
#define led2_rcc RCC_APB2Periph_GPIOF #define led2_rcc RCC_APB2Periph_GPIOF
#define led2_gpio GPIOF #define led2_gpio GPIOF
#define led2_pin (GPIO_Pin_8) #define led2_pin (GPIO_Pin_8)
#endif
void rt_hw_led_init(void) void rt_hw_led_init(void)
{ {

View File

@ -2,30 +2,23 @@
### Do not modify ! ### Do not modify !
Target (RT-Thread STM32), 0x0004 // Tools: 'ARM-ADS' Target (RT-Thread STM32), 0x0004 // Tools: 'ARM-ADS'
Target (RT-Thread STM32 Simulator), 0x0004 // Tools: 'ARM-ADS'
Group (Startup) Group (Startup)
Group (StdPeriph_Driver) Group (StdPeriph_Driver)
Group (CMSIS) Group (CMSIS)
Group (Kernel) Group (Kernel)
Group (STM32) Group (STM32)
Group (finsh)
Group (Filesystem)
Group (LwIP)
File 1,1,<.\stm32f10x_it.c><stm32f10x_it.c> File 1,1,<.\stm32f10x_it.c><stm32f10x_it.c>
File 1,1,<.\board.c><board.c> File 1,1,<.\board.c><board.c>
File 1,1,<.\application.c><application.c> File 1,1,<.\application.c><application.c>
File 1,1,<.\startup.c><startup.c> File 1,1,<.\startup.c><startup.c>
File 1,1,<.\led.c><led.c> File 1,1,<.\led.c><led.c>
File 1,1,<.\usart.c><usart.c>
File 1,1,<.\sdcard.c><sdcard.c>
File 1,1,<.\msd.c><msd.c>
File 1,1,<.\enc28j60.c><enc28j60.c>
File 1,1,<.\dm9000a.c><dm9000a.c>
File 1,1,<.\rtc.c><rtc.c>
File 1,5,<.\rtconfig.h><rtconfig.h> File 1,5,<.\rtconfig.h><rtconfig.h>
File 1,5,<.\board.h><board.h> File 1,5,<.\board.h><board.h>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c><misc.c> File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c><misc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c><stm32f10x_adc.c> File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_adc.c><stm32f10x_adc.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c><stm32f10x_bkp.c> File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_bkp.c><stm32f10x_bkp.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c><stm32f10x_can.c> File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_can.c><stm32f10x_can.c>
@ -46,7 +39,6 @@ File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_sdio.c><stm32f10x
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c><stm32f10x_spi.c> File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_spi.c><stm32f10x_spi.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c><stm32f10x_tim.c> File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_tim.c><stm32f10x_tim.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c><stm32f10x_usart.c> File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_usart.c><stm32f10x_usart.c>
File 2,1,<.\Libraries\STM32F10x_StdPeriph_Driver\src\stm32f10x_wwdg.c><stm32f10x_wwdg.c>
File 3,1,<.\Libraries\CMSIS\Core\CM3\core_cm3.c><core_cm3.c> File 3,1,<.\Libraries\CMSIS\Core\CM3\core_cm3.c><core_cm3.c>
File 3,1,<.\Libraries\CMSIS\Core\CM3\system_stm32f10x.c><system_stm32f10x.c> File 3,1,<.\Libraries\CMSIS\Core\CM3\system_stm32f10x.c><system_stm32f10x.c>
File 4,1,<..\..\src\clock.c><clock.c> File 4,1,<..\..\src\clock.c><clock.c>
@ -66,63 +58,9 @@ File 5,1,<..\..\libcpu\arm\stm32\cpu.c><cpu.c>
File 5,1,<..\..\libcpu\arm\stm32\fault.c><fault.c> File 5,1,<..\..\libcpu\arm\stm32\fault.c><fault.c>
File 5,1,<..\..\libcpu\arm\stm32\interrupt.c><interrupt.c> File 5,1,<..\..\libcpu\arm\stm32\interrupt.c><interrupt.c>
File 5,1,<..\..\libcpu\arm\stm32\stack.c><stack.c> File 5,1,<..\..\libcpu\arm\stm32\stack.c><stack.c>
File 5,1,<..\..\libcpu\arm\stm32\serial.c><serial.c>
File 5,2,<..\..\libcpu\arm\stm32\context_rvds.S><context_rvds.S> File 5,2,<..\..\libcpu\arm\stm32\context_rvds.S><context_rvds.S>
File 5,2,<..\..\libcpu\arm\stm32\fault_rvds.S><fault_rvds.S> File 5,2,<..\..\libcpu\arm\stm32\fault_rvds.S><fault_rvds.S>
File 5,2,<..\..\libcpu\arm\stm32\start_rvds.s><start_rvds.s> File 5,2,<..\..\libcpu\arm\stm32\start_rvds.s><start_rvds.s>
File 6,1,<..\..\finsh\symbol.c><symbol.c>
File 6,1,<..\..\finsh\cmd.c><cmd.c>
File 6,1,<..\..\finsh\finsh_compiler.c><finsh_compiler.c>
File 6,1,<..\..\finsh\finsh_error.c><finsh_error.c>
File 6,1,<..\..\finsh\finsh_heap.c><finsh_heap.c>
File 6,1,<..\..\finsh\finsh_init.c><finsh_init.c>
File 6,1,<..\..\finsh\finsh_node.c><finsh_node.c>
File 6,1,<..\..\finsh\finsh_ops.c><finsh_ops.c>
File 6,1,<..\..\finsh\finsh_parser.c><finsh_parser.c>
File 6,1,<..\..\finsh\finsh_token.c><finsh_token.c>
File 6,1,<..\..\finsh\finsh_var.c><finsh_var.c>
File 6,1,<..\..\finsh\finsh_vm.c><finsh_vm.c>
File 6,1,<..\..\finsh\shell.c><shell.c>
File 7,1,<..\..\filesystem\dfs\src\dfs_util.c><dfs_util.c>
File 7,1,<..\..\filesystem\dfs\src\dfs_fs.c><dfs_fs.c>
File 7,1,<..\..\filesystem\dfs\src\dfs_init.c><dfs_init.c>
File 7,1,<..\..\filesystem\dfs\src\dfs_posix.c><dfs_posix.c>
File 7,1,<..\..\filesystem\dfs\src\dfs_raw.c><dfs_raw.c>
File 7,1,<..\..\filesystem\dfs\filesystems\elmfat\ff.c><ff.c>
File 7,1,<..\..\filesystem\dfs\filesystems\elmfat\dfs_elm.c><dfs_elm.c>
File 8,1,<..\..\net\lwip\src\core\dhcp.c><dhcp.c>
File 8,1,<..\..\net\lwip\src\core\dns.c><dns.c>
File 8,1,<..\..\net\lwip\src\core\init.c><init.c>
File 8,1,<..\..\net\lwip\src\core\memp.c><memp.c>
File 8,1,<..\..\net\lwip\src\core\netif.c><netif.c>
File 8,1,<..\..\net\lwip\src\core\pbuf.c><pbuf.c>
File 8,1,<..\..\net\lwip\src\core\raw.c><raw.c>
File 8,1,<..\..\net\lwip\src\core\stats.c><stats.c>
File 8,1,<..\..\net\lwip\src\core\sys.c><sys.c>
File 8,1,<..\..\net\lwip\src\core\tcp.c><tcp.c>
File 8,1,<..\..\net\lwip\src\core\tcp_in.c><tcp_in.c>
File 8,1,<..\..\net\lwip\src\core\tcp_out.c><tcp_out.c>
File 8,1,<..\..\net\lwip\src\core\udp.c><udp.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\ip_frag.c><ip_frag.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\autoip.c><autoip.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\icmp.c><icmp.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\igmp.c><igmp.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\inet.c><inet.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\inet_chksum.c><inet_chksum.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\ip.c><ip.c>
File 8,1,<..\..\net\lwip\src\core\ipv4\ip_addr.c><ip_addr.c>
File 8,1,<..\..\net\lwip\src\api\tcpip.c><tcpip.c>
File 8,1,<..\..\net\lwip\src\api\api_lib.c><api_lib.c>
File 8,1,<..\..\net\lwip\src\api\api_msg.c><api_msg.c>
File 8,1,<..\..\net\lwip\src\api\err.c><err.c>
File 8,1,<..\..\net\lwip\src\api\netbuf.c><netbuf.c>
File 8,1,<..\..\net\lwip\src\api\netdb.c><netdb.c>
File 8,1,<..\..\net\lwip\src\api\netifapi.c><netifapi.c>
File 8,1,<..\..\net\lwip\src\api\sockets.c><sockets.c>
File 8,1,<..\..\net\lwip\src\netif\ethernetif.c><ethernetif.c>
File 8,1,<..\..\net\lwip\src\netif\etharp.c><etharp.c>
File 8,1,<..\..\net\lwip\src\arch\sys_arch_init.c><sys_arch_init.c>
File 8,1,<..\..\net\lwip\src\arch\sys_arch.c><sys_arch.c>
Options 1,0,0 // Target 'RT-Thread STM32' Options 1,0,0 // Target 'RT-Thread STM32'
@ -183,7 +121,7 @@ Options 1,0,0 // Target 'RT-Thread STM32'
ADSCMISC () ADSCMISC ()
ADSCDEFN (USE_STDPERIPH_DRIVER, STM32F10X_HD,) ADSCDEFN (USE_STDPERIPH_DRIVER, STM32F10X_HD,)
ADSCUDEF () ADSCUDEF ()
ADSCINCD (.\Libraries\STM32F10x_StdPeriph_Driver\inc;.\Libraries\CMSIS\Core\CM3;..\..\include;.;..\..\libcpu\arm\stm32;..\..\filesystem\dfs;..\..\filesystem\dfs\include;..\..\net\lwip\src;..\..\net\lwip\src\include;..\..\net\lwip\src\arch\include;..\..\net\lwip\src\include\ipv4;..\..\finsh) ADSCINCD (.\Libraries\STM32F10x_StdPeriph_Driver\inc;.\Libraries\CMSIS\Core\CM3;..\..\include;.;..\..\libcpu\arm\stm32)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 } ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC () ADSAMISC ()
ADSADEFN () ADSADEFN ()
@ -204,14 +142,104 @@ Options 1,0,0 // Target 'RT-Thread STM32'
ADSLDSC () ADSLDSC ()
ADSLDIB () ADSLDIB ()
ADSLDIC () ADSLDIC ()
ADSLDMC (--keep __fsym_* --keep __vsym_*) ADSLDMC ()
ADSLDIF () ADSLDIF ()
ADSLDDW () ADSLDDW ()
OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F107xCSchedule)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F107xC) OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE)
OPTDBG 49149,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()() OPTDBG 49150,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
FLASH1 { 9,0,0,0,1,0,0,0,6,16,0,0,0,0,0,0,0,0,0,0 } FLASH1 { 9,0,0,0,1,0,0,0,5,16,0,0,0,0,0,0,0,0,0,0 }
FLASH2 (Segger\JL2CM3.dll) FLASH2 (Segger\JL2CM3.dll)
FLASH3 ("" ()) FLASH3 ("" ())
FLASH4 () FLASH4 ()
EndOpt EndOpt
Options 2,0,0 // Target 'RT-Thread STM32 Simulator'
Device (STM32F103ZE)
Vendor (STMicroelectronics)
Cpu (IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3"))
FlashUt ()
StupF ("STARTUP\ST\STM32F10x.s" ("STM32 Startup Code"))
FlashDR (UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000))
DevID (4216)
Rgf (stm32f10x_lib.h)
Mem ()
C ()
A ()
RL ()
OH ()
DBC_IFX ()
DBC_CMS ()
DBC_AMS ()
DBC_LMS ()
UseEnv=0
EnvBin ()
EnvInc ()
EnvLib ()
EnvReg (ÿST\STM32F10x\)
OrgReg (ÿST\STM32F10x\)
TgStat=16
OutDir (.\obj\)
OutName (rtthread-stm32)
GenApp=1
GenLib=0
GenHex=0
Debug=1
Browse=0
LstDir (.\obj\)
HexSel=1
MG32K=0
TGMORE=0
RunUsr 0 0 <>
RunUsr 1 0 <>
BrunUsr 0 0 <>
BrunUsr 1 0 <>
CrunUsr 0 0 <>
CrunUsr 1 0 <>
SVCSID <>
GLFLAGS=1790
ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ACPUTYP ("Cortex-M3")
RVDEV ()
ADSTFLGA { 0,12,0,2,99,0,0,66,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSIRAM { 0,0,0,0,32,0,0,1,0 }
OCMADSIROM { 1,0,0,0,8,0,0,8,0 }
OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }
OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,8,0,0,8,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,0,1,0,0,0,0,0,0,0,0,0,0 }
RV_STAVEC ()
ADSCCFLG { 5,32,0,4,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSCMISC ()
ADSCDEFN (USE_STDPERIPH_DRIVER, STM32F10X_HD, STM32_SIMULATOR)
ADSCUDEF ()
ADSCINCD (.\Libraries\STM32F10x_StdPeriph_Driver\inc;.\Libraries\CMSIS\Core\CM3;..\..\include;.;..\..\libcpu\arm\stm32)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
ADSAUDEF ()
ADSAINCD ()
PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
IncBld=1
AlwaysBuild=0
GenAsm=0
AsmAsm=0
PublicsOnly=0
StopCode=3
CustArgs ()
LibMods ()
ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSLDTA (0x08000000)
ADSLDDA (0x20000000)
ADSLDSC ()
ADSLDIB ()
ADSLDIC ()
ADSLDMC ()
ADSLDIF ()
ADSLDDW ()
OPTDL (SARMCM3.DLL)()(DARMSTM.DLL)(-pSTM32F103ZE)(SARMCM3.DLL)()(TARMSTM.DLL)(-pSTM32F103ZE)
OPTDBG 49149,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
FLASH1 { 9,0,0,0,1,0,0,0,5,16,0,0,0,0,0,0,0,0,0,0 }
FLASH2 (Segger\JLTAgdi.dll)
FLASH3 ("" ())
FLASH4 ()
EndOpt

View File

@ -285,16 +285,6 @@
<state>$PROJ_DIR$\Libraries\CMSIS\Core\CM3</state> <state>$PROJ_DIR$\Libraries\CMSIS\Core\CM3</state>
<state>$PROJ_DIR$\..\..\include</state> <state>$PROJ_DIR$\..\..\include</state>
<state>$PROJ_DIR$\..\..\libcpu\arm\stm32</state> <state>$PROJ_DIR$\..\..\libcpu\arm\stm32</state>
<state>$PROJ_DIR$\..\..\finsh</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\include</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\include</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\include</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\include</state>
<state>$PROJ_DIR$\..\..\net\lwip\src</state>
<state>$PROJ_DIR$\..\..\net\lwip\src\include</state>
<state>$PROJ_DIR$\..\..\net\lwip\src\arch\include</state>
<state>$PROJ_DIR$\..\..\net\lwip\src\include\ipv4</state>
</option> </option>
<option> <option>
<name>CCStdIncCheck</name> <name>CCStdIncCheck</name>
@ -1089,16 +1079,6 @@
<state>$PROJ_DIR$\Libraries\CMSIS\Core\CM3</state> <state>$PROJ_DIR$\Libraries\CMSIS\Core\CM3</state>
<state>$PROJ_DIR$\..\..\include</state> <state>$PROJ_DIR$\..\..\include</state>
<state>$PROJ_DIR$\..\..\libcpu\arm\stm32</state> <state>$PROJ_DIR$\..\..\libcpu\arm\stm32</state>
<state>$PROJ_DIR$\..\..\finsh</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\include</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\include</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\include</state>
<state>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\include</state>
<state>$PROJ_DIR$\..\..\net\lwip\src</state>
<state>$PROJ_DIR$\..\..\net\lwip\src\include</state>
<state>$PROJ_DIR$\..\..\net\lwip\src\arch\include</state>
<state>$PROJ_DIR$\..\..\net\lwip\src\include\ipv4</state>
</option> </option>
<option> <option>
<name>CCStdIncCheck</name> <name>CCStdIncCheck</name>
@ -1618,102 +1598,6 @@
<name>$PROJ_DIR$\Libraries\CMSIS\Core\CM3\system_stm32f10x.c</name> <name>$PROJ_DIR$\Libraries\CMSIS\Core\CM3\system_stm32f10x.c</name>
</file> </file>
</group> </group>
<group>
<name>Filesystem</name>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\src\dfs_cache.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\src\dfs_fs.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\src\dfs_init.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\src\dfs_posix.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\src\dfs_raw.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\src\dfs_util.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\dir.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\efs.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\extract.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fat.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\file.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fs.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ls.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\partition.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\base\plibc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\time.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ui.c</name>
</file>
</group>
<group>
<name>finsh</name>
<file>
<name>$PROJ_DIR$\..\..\finsh\cmd.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_compiler.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_error.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_heap.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_init.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_node.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_ops.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_parser.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_token.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_var.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\finsh_vm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\shell.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\finsh\symbol.c</name>
</file>
</group>
<group> <group>
<name>Kernel</name> <name>Kernel</name>
<file> <file>
@ -1756,108 +1640,6 @@
<name>$PROJ_DIR$\..\..\src\timer.c</name> <name>$PROJ_DIR$\..\..\src\timer.c</name>
</file> </file>
</group> </group>
<group>
<name>LwIP</name>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\api_lib.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\api_msg.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\autoip.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\dhcp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\dns.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\err.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\netif\etharp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\netif\ethernetif.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\icmp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\igmp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\inet.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\inet_chksum.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\init.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\ip.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\ip_addr.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\ipv4\ip_frag.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\memp_tiny.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\netbuf.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\netdb.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\netif.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\netifapi.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\pbuf.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\raw.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\sockets.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\stats.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\sys.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\arch\sys_arch.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\arch\sys_arch_init.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\tcp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\tcp_in.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\tcp_out.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\api\tcpip.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\net\lwip\src\core\udp.c</name>
</file>
</group>
<group> <group>
<name>Startup</name> <name>Startup</name>
<file> <file>
@ -1866,39 +1648,18 @@
<file> <file>
<name>$PROJ_DIR$\board.c</name> <name>$PROJ_DIR$\board.c</name>
</file> </file>
<file>
<name>$PROJ_DIR$\board.h</name>
</file>
<file>
<name>$PROJ_DIR$\dm9000a.c</name>
</file>
<file>
<name>$PROJ_DIR$\enc28j60.c</name>
</file>
<file> <file>
<name>$PROJ_DIR$\led.c</name> <name>$PROJ_DIR$\led.c</name>
</file> </file>
<file>
<name>$PROJ_DIR$\msd.c</name>
</file>
<file>
<name>$PROJ_DIR$\rtc.c</name>
</file>
<file> <file>
<name>$PROJ_DIR$\rtconfig.h</name> <name>$PROJ_DIR$\rtconfig.h</name>
</file> </file>
<file>
<name>$PROJ_DIR$\sdcard.c</name>
</file>
<file> <file>
<name>$PROJ_DIR$\startup.c</name> <name>$PROJ_DIR$\startup.c</name>
</file> </file>
<file> <file>
<name>$PROJ_DIR$\stm32f10x_it.c</name> <name>$PROJ_DIR$\stm32f10x_it.c</name>
</file> </file>
<file>
<name>$PROJ_DIR$\usart.c</name>
</file>
</group> </group>
<group> <group>
<name>StdPeriph_Driver</name> <name>StdPeriph_Driver</name>
@ -1986,9 +1747,6 @@
<file> <file>
<name>$PROJ_DIR$\..\..\libcpu\arm\stm32\interrupt.c</name> <name>$PROJ_DIR$\..\..\libcpu\arm\stm32\interrupt.c</name>
</file> </file>
<file>
<name>$PROJ_DIR$\..\..\libcpu\arm\stm32\serial.c</name>
</file>
<file> <file>
<name>$PROJ_DIR$\..\..\libcpu\arm\stm32\stack.c</name> <name>$PROJ_DIR$\..\..\libcpu\arm\stm32\stack.c</name>
</file> </file>

View File

@ -17,21 +17,15 @@
/* SECTION: RT_DEBUG */ /* SECTION: RT_DEBUG */
/* Thread Debug */ /* Thread Debug */
#define RT_DEBUG #define RT_DEBUG
/* #define RT_THREAD_DEBUG */ #define RT_THREAD_DEBUG
#define RT_USING_OVERFLOW_CHECK #define RT_USING_OVERFLOW_CHECK
/* Using Hook */ /* Using Hook */
#define RT_USING_HOOK #define RT_USING_HOOK
/* Using Software Timer */
/* #define RT_USING_TIMER_SOFT */
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_TIMER_TICK_PER_SECOND 10
/* SECTION: IPC */ /* SECTION: IPC */
/* Using Semaphore */ /* Using Semaphore*/
#define RT_USING_SEMAPHORE #define RT_USING_SEMAPHORE
/* Using Mutex */ /* Using Mutex */
@ -51,7 +45,7 @@
#define RT_USING_MEMPOOL #define RT_USING_MEMPOOL
/* Using Dynamic Heap Management */ /* Using Dynamic Heap Management */
#define RT_USING_HEAP /* #define RT_USING_HEAP */
/* Using Small MM */ /* Using Small MM */
#define RT_USING_SMALL_MEM #define RT_USING_SMALL_MEM
@ -62,70 +56,7 @@
#define RT_USING_UART1 #define RT_USING_UART1
/* SECTION: Console options */ /* SECTION: Console options */
/* the buffer size of console */ /* the buffer size of console*/
#define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLEBUF_SIZE 128
/* SECTION: finsh, a C-Express shell */
/* Using FinSH as Shell*/
#define RT_USING_FINSH
/* Using symbol table */
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
/* SECTION: device filesystem support */
#define RT_USING_DFS
#define RT_USING_DFS_ELMFAT
#define RT_DFS_ELM_WORD_ACCESS
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 2
/* the max number of opened files */
#define DFS_FD_MAX 4
/* the max number of cached sector */
#define DFS_CACHE_MAX_NUM 4
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
#define RT_USING_LWIP
/* LwIP uses RT-Thread Memory Management */
#define RT_LWIP_USING_RT_MEM
/* Enable ICMP protocol*/
#define RT_LWIP_ICMP
/* Enable UDP protocol*/
#define RT_LWIP_UDP
/* Enable TCP protocol*/
#define RT_LWIP_TCP
/* Enable DNS */
#define RT_LWIP_DNS
/* the number of simulatenously active TCP connections*/
#define RT_LWIP_TCP_PCB_NUM 5
/* ip address of target*/
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
#define RT_LWIP_IPADDR2 1
#define RT_LWIP_IPADDR3 30
/* gateway address of target*/
#define RT_LWIP_GWADDR0 192
#define RT_LWIP_GWADDR1 168
#define RT_LWIP_GWADDR2 1
#define RT_LWIP_GWADDR3 1
/* mask address of target*/
#define RT_LWIP_MSKADDR0 255
#define RT_LWIP_MSKADDR1 255
#define RT_LWIP_MSKADDR2 255
#define RT_LWIP_MSKADDR3 0
/* tcp thread options */
#define RT_LWIP_TCPTHREAD_PRIORITY 12
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
/* ethernet if thread options */
#define RT_LWIP_ETHTHREAD_PRIORITY 15
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
#endif #endif

View File

@ -1,15 +1,15 @@
/* /*
* File : startup.c * File : startup.c
* This file is part of RT-Thread RTOS * This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team * COPYRIGHT (C) 2006, RT-Thread Develop Team
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE * http://openlab.rt-thread.com/license/LICENSE
* *
* Change Logs: * Change Logs:
* Date Author Notes * Date Author Notes
* 2009-01-05 Bernard first implementation * 2006-08-31 Bernard first implementation
*/ */
#include <rthw.h> #include <rthw.h>
@ -17,7 +17,6 @@
#include "stm32f10x.h" #include "stm32f10x.h"
#include "board.h" #include "board.h"
#include "rtc.h"
/** /**
* @addtogroup STM32 * @addtogroup STM32
@ -26,18 +25,6 @@
/*@{*/ /*@{*/
extern int rt_application_init(void); extern int rt_application_init(void);
#ifdef RT_USING_FINSH
extern void finsh_system_init(void);
extern void finsh_set_device(const char* device);
#endif
#ifdef __CC_ARM
extern int Image$$RW_IRAM1$$ZI$$Limit;
#elif __ICCARM__
#pragma section="HEAP"
#else
extern int __bss_end;
#endif
#ifdef DEBUG #ifdef DEBUG
/******************************************************************************* /*******************************************************************************
@ -79,53 +66,12 @@ void rtthread_startup(void)
/* init timer system */ /* init timer system */
rt_system_timer_init(); rt_system_timer_init();
#ifdef RT_USING_HEAP
#if STM32_EXT_SRAM
rt_system_heap_init((void*)STM32_EXT_SRAM_BEGIN, (void*)STM32_EXT_SRAM_END);
#else
#ifdef __CC_ARM
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)STM32_SRAM_END);
#elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)STM32_SRAM_END);
#else
/* init memory system */
rt_system_heap_init((void*)&__bss_end, (void*)STM32_SRAM_END);
#endif
#endif
#endif
/* init scheduler system */ /* init scheduler system */
rt_system_scheduler_init(); rt_system_scheduler_init();
/* init hardware serial device */
rt_hw_usart_init();
#ifdef RT_USING_DFS
/* init sdcard driver */
#if STM32_USE_SDIO
rt_hw_sdcard_init();
#else
rt_hw_msd_init();
#endif
#endif
rt_hw_rtc_init();
/* init all device */
rt_device_init_all();
/* init application */ /* init application */
rt_application_init(); rt_application_init();
#ifdef RT_USING_FINSH
/* init finsh */
finsh_system_init();
finsh_set_device("uart1");
#endif
/* init timer thread */
rt_system_timer_thread_init();
/* init idle thread */ /* init idle thread */
rt_thread_idle_init(); rt_thread_idle_init();

View File

@ -22,8 +22,6 @@
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32f10x_it.h" #include "stm32f10x_it.h"
#include <board.h>
#include <rtthread.h>
/** @addtogroup Template_Project /** @addtogroup Template_Project
* @{ * @{
@ -126,227 +124,6 @@ void DebugMon_Handler(void)
/* file (startup_stm32f10x_xx.s). */ /* file (startup_stm32f10x_xx.s). */
/******************************************************************************/ /******************************************************************************/
/*******************************************************************************
* Function Name : DMA1_Channel2_IRQHandler
* Description : This function handles DMA1 Channel 2 interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void DMA1_Channel2_IRQHandler(void)
{
#ifdef RT_USING_UART3
extern struct rt_device uart3_device;
extern void rt_hw_serial_dma_tx_isr(struct rt_device *device);
/* enter interrupt */
rt_interrupt_enter();
if (DMA_GetITStatus(DMA1_IT_TC2))
{
/* transmission complete, invoke serial dma tx isr */
rt_hw_serial_dma_tx_isr(&uart3_device);
}
/* clear DMA flag */
DMA_ClearFlag(DMA1_FLAG_TC2 | DMA1_FLAG_TE2);
/* leave interrupt */
rt_interrupt_leave();
#endif
}
/*******************************************************************************
* Function Name : DMA1_Channel6_IRQHandler
* Description : This function handles DMA1 Channel 6 interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void DMA1_Channel6_IRQHandler(void)
{
#ifdef RT_USING_UART2
extern struct rt_device uart2_device;
extern void rt_hw_serial_dma_rx_isr(struct rt_device *device);
/* enter interrupt */
rt_interrupt_enter();
/* clear DMA flag */
DMA_ClearFlag(DMA1_FLAG_TC6 | DMA1_FLAG_TE6);
rt_hw_serial_dma_rx_isr(&uart2_device);
/* leave interrupt */
rt_interrupt_leave();
#endif
}
/*******************************************************************************
* Function Name : USART1_IRQHandler
* Description : This function handles USART1 global interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void USART1_IRQHandler(void)
{
#ifdef RT_USING_UART1
extern struct rt_device uart1_device;
extern void rt_hw_serial_isr(struct rt_device *device);
/* enter interrupt */
rt_interrupt_enter();
rt_hw_serial_isr(&uart1_device);
/* leave interrupt */
rt_interrupt_leave();
#endif
}
/*******************************************************************************
* Function Name : USART2_IRQHandler
* Description : This function handles USART2 global interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void USART2_IRQHandler(void)
{
#ifdef RT_USING_UART2
extern struct rt_device uart2_device;
extern void rt_hw_serial_isr(struct rt_device *device);
/* enter interrupt */
rt_interrupt_enter();
rt_hw_serial_isr(&uart2_device);
/* leave interrupt */
rt_interrupt_leave();
#endif
}
/*******************************************************************************
* Function Name : USART3_IRQHandler
* Description : This function handles USART3 global interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void USART3_IRQHandler(void)
{
#ifdef RT_USING_UART3
extern struct rt_device uart3_device;
extern void rt_hw_serial_isr(struct rt_device *device);
/* enter interrupt */
rt_interrupt_enter();
rt_hw_serial_isr(&uart3_device);
/* leave interrupt */
rt_interrupt_leave();
#endif
}
#if defined(RT_USING_DFS) && STM32_USE_SDIO
/*******************************************************************************
* Function Name : SDIO_IRQHandler
* Description : This function handles SDIO global interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void SDIO_IRQHandler(void)
{
extern int SD_ProcessIRQSrc(void);
/* enter interrupt */
rt_interrupt_enter();
/* Process All SDIO Interrupt Sources */
SD_ProcessIRQSrc();
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#ifdef RT_USING_LWIP
#ifdef STM32F10X_CL
/*******************************************************************************
* Function Name : ETH_IRQHandler
* Description : This function handles ETH interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void ETH_IRQHandler(void)
{
extern void rt_hw_stm32_eth_isr(void);
/* enter interrupt */
rt_interrupt_enter();
rt_hw_stm32_eth_isr();
/* leave interrupt */
rt_interrupt_leave();
}
#else
#if (STM32_ETH_IF == 0)
/*******************************************************************************
* Function Name : EXTI0_IRQHandler
* Description : This function handles External interrupt Line 0 request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void EXTI0_IRQHandler(void)
{
extern void enc28j60_isr(void);
/* enter interrupt */
rt_interrupt_enter();
enc28j60_isr();
/* Clear the Key Button EXTI line pending bit */
EXTI_ClearITPendingBit(EXTI_Line0);
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#if (STM32_ETH_IF == 1)
/*******************************************************************************
* Function Name : EXTI9_5_IRQHandler
* Description : This function handles External lines 9 to 5 interrupt request.
* Input : None
* Output : None
* Return : None
*******************************************************************************/
void EXTI9_5_IRQHandler(void)
{
extern void rt_dm9000_isr(void);
/* enter interrupt */
rt_interrupt_enter();
rt_dm9000_isr();
/* Clear the Key Button EXTI line pending bit */
EXTI_ClearITPendingBit(EXTI_Line7);
/* leave interrupt */
rt_interrupt_leave();
}
#endif
#endif
#endif /* end of RT_USING_LWIP */
/** /**
* @} * @}
*/ */