From a5a89c439f905f68fee98f7b329b348a1c2171b3 Mon Sep 17 00:00:00 2001
From: heyuanjie87 <943313837@qq.com>
Date: Mon, 24 Jun 2024 21:36:32 +0800
Subject: [PATCH] =?UTF-8?q?[rv]=E4=BF=AE=E6=AD=A3signal=E9=80=80=E5=87=BA?=
 =?UTF-8?q?=E5=90=8E=E7=94=A8=E6=88=B7=E6=80=81sp=E5=B0=918=E7=9A=84?=
 =?UTF-8?q?=E9=97=AE=E9=A2=98=20(#9080)?=
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---
 components/lwp/arch/risc-v/rv64/lwp_gcc.S | 3 ++-
 libcpu/risc-v/virt64/context_gcc.S        | 2 ++
 libcpu/risc-v/virt64/cpuport.c            | 1 +
 libcpu/risc-v/virt64/cpuport.h            | 4 ++--
 libcpu/risc-v/virt64/stack.h              | 1 +
 5 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/components/lwp/arch/risc-v/rv64/lwp_gcc.S b/components/lwp/arch/risc-v/rv64/lwp_gcc.S
index c0936623bf..c207285c6f 100644
--- a/components/lwp/arch/risc-v/rv64/lwp_gcc.S
+++ b/components/lwp/arch/risc-v/rv64/lwp_gcc.S
@@ -107,6 +107,7 @@ arch_signal_quit:
     call arch_signal_ucontext_restore
 
     /* reset kernel sp to the stack */
+    addi sp, sp, CTX_REG_NR * REGBYTES
     STORE sp, FRAME_OFF_SP(a0)
     /* return value is user sp */
     mv sp, a0
@@ -280,7 +281,7 @@ arch_syscall_exit:
     CLOSE_INTERRUPT
 
     #if defined(ARCH_MM_MMU)
-        LOAD s0, 2 * REGBYTES(sp)
+        LOAD s0, FRAME_OFF_SSTATUS(sp)
         andi s0, s0, 0x100
         bnez s0, dont_ret_to_user
         j arch_ret_to_user
diff --git a/libcpu/risc-v/virt64/context_gcc.S b/libcpu/risc-v/virt64/context_gcc.S
index 733d15890c..486a787e61 100644
--- a/libcpu/risc-v/virt64/context_gcc.S
+++ b/libcpu/risc-v/virt64/context_gcc.S
@@ -44,9 +44,11 @@
     li      s10, (SSTATUS_SPP)
     or      s11, s11, s10
     PUSH_8  s11
+    addi    sp, sp, -8
 .endm
 
 .macro RESTORE_CONTEXT
+    addi    sp, sp, 8
     POP_8   s11
     csrw    sstatus, s11
     POP_8   s11
diff --git a/libcpu/risc-v/virt64/cpuport.c b/libcpu/risc-v/virt64/cpuport.c
index 126ec9f825..92394bcc22 100644
--- a/libcpu/risc-v/virt64/cpuport.c
+++ b/libcpu/risc-v/virt64/cpuport.c
@@ -52,6 +52,7 @@ void *_rt_hw_stack_init(rt_ubase_t *sp, rt_ubase_t ra, rt_ubase_t sstatus)
     (*--sp) = 0;                                /* s10 */
     (*--sp) = 0;                                /* s11 */
     (*--sp) = sstatus;                          /* sstatus */
+    --sp; /* align to 16bytes */
 
     return (void *)sp;
 }
diff --git a/libcpu/risc-v/virt64/cpuport.h b/libcpu/risc-v/virt64/cpuport.h
index 92a3af32d7..8caccd100c 100644
--- a/libcpu/risc-v/virt64/cpuport.h
+++ b/libcpu/risc-v/virt64/cpuport.h
@@ -23,8 +23,8 @@
 #error "Not supported XLEN"
 #endif
 
-/* 33 general register */
-#define CTX_GENERAL_REG_NR  33
+/* 33 general register + 1 padding */
+#define CTX_GENERAL_REG_NR  34
 
 #ifdef ENABLE_FPU
 /* 32 fpu register */
diff --git a/libcpu/risc-v/virt64/stack.h b/libcpu/risc-v/virt64/stack.h
index d619d3fd35..4899c6f2c8 100644
--- a/libcpu/risc-v/virt64/stack.h
+++ b/libcpu/risc-v/virt64/stack.h
@@ -47,6 +47,7 @@ struct rt_hw_stack_frame
     rt_ubase_t t5;         /* x30 - t5     - temporary register 5                */
     rt_ubase_t t6;         /* x31 - t6     - temporary register 6                */
     rt_ubase_t user_sp_exc_stack;    /* sscratch - user mode sp/exception stack  */
+    rt_ubase_t __padding; /* align to 16bytes */
 #ifdef ENABLE_FPU
     rt_ubase_t f[CTX_FPU_REG_NR];      /* f0~f31 */
 #endif