commit
a55fd4b9c1
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@ -47,9 +47,9 @@ void rtthread_startup(void)
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rt_hw_interrupt_init();
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/* copy vector */
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memcpy((void *)A_K0BASE, tlb_refill_exception, 0x20);
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memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x20);
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memcpy((void *)(A_K0BASE + 0x200), irq_exception, 0x20);
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rt_memcpy((void *)A_K0BASE, tlb_refill_exception, 0x20);
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rt_memcpy((void *)(A_K0BASE + 0x180), general_exception, 0x20);
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rt_memcpy((void *)(A_K0BASE + 0x200), irq_exception, 0x20);
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/* init board */
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rt_hw_board_init();
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@ -64,9 +64,6 @@ void rtthread_startup(void)
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/* init scheduler system */
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rt_system_scheduler_init();
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/* init application */
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rt_application_init();
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/* initialize timer */
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rt_system_timer_init();
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@ -76,11 +73,14 @@ void rtthread_startup(void)
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/* init idle thread */
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rt_thread_idle_init();
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/* init application */
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rt_application_init();
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/* start scheduler */
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rt_system_scheduler_start();
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/* never reach here */
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return ;
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return;
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}
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/*@}*/
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@ -71,6 +71,23 @@ void rt_hw_board_init(void)
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rt_kprintf("current sr: 0x%08x\n", read_c0_status());
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}
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#define __raw_out_put(unr) \
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while (*ptr) \
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{ \
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if (*ptr == '\n') \
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{ \
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/* FIFO status, contain valid data */ \
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while (!(UART_LSR(UART##unr##_BASE) & (UARTLSR_TE | UARTLSR_TFE))); \
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/* write data */ \
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UART_DAT(UART##unr##_BASE) = '\r'; \
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} \
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/* FIFO status, contain valid data */ \
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while (!(UART_LSR(UART##unr##_BASE) & (UARTLSR_TE | UARTLSR_TFE))); \
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/* write data */ \
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UART_DAT(UART##unr##_BASE) = *ptr; \
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ptr ++; \
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}
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/* UART line status register value */
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#define UARTLSR_ERROR (1 << 7)
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#define UARTLSR_TE (1 << 6)
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@ -82,24 +99,13 @@ void rt_hw_board_init(void)
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#define UARTLSR_DR (1 << 0)
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void rt_hw_console_output(const char *ptr)
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{
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/* stream mode */
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while (*ptr)
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{
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if (*ptr == '\n')
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{
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/* FIFO status, contain valid data */
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while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
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/* write data */
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UART_DAT(UART0_BASE) = '\r';
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}
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/* FIFO status, contain valid data */
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while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
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/* write data */
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UART_DAT(UART0_BASE) = *ptr;
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ptr ++;
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}
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#if defined(RT_USING_UART0)
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__raw_out_put(0);
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#elif defined(RT_USING_UART1)
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__raw_out_put(1);
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#elif defined(RT_USING_UART3)
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__raw_out_put(3);
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#endif
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}
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/*@}*/
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@ -256,6 +256,9 @@ void rt_hw_uart_init(void)
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#elif defined(RT_USING_UART1)
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uart->hw_base = UART1_BASE;
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uart->irq = LS1B_UART1_IRQ;
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#elif defined(RT_USING_UART3)
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uart->hw_base = UART3_BASE;
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uart->irq = LS1B_UART3_IRQ;
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#endif
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/* device interface */
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@ -30,7 +30,7 @@ void rt_interrupt_dispatch(void *ptreg);
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void rt_hw_timer_handler();
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static struct ls1b_intc_regs volatile *ls1b_hw0_icregs
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= (struct ls1b_intc_regs volatile *)(LS1B_INTREG_BASE);
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= (struct ls1b_intc_regs volatile *)(LS1B_INTREG_BASE);
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/**
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* @addtogroup Loongson LS1B
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@ -104,15 +104,12 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
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{
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old_handler = irq_handle_table[vector].handler;
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if (handler != RT_NULL)
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{
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#ifdef RT_USING_INTERRUPT_INFO
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rt_strncpy(irq_handle_table[vector].name, name, RT_NAME_MAX);
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#endif /* RT_USING_INTERRUPT_INFO */
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irq_handle_table[vector].handler = handler;
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irq_handle_table[vector].param = param;
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}
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}
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return old_handler;
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}
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@ -159,7 +156,7 @@ void rt_interrupt_dispatch(void *ptreg)
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param = irq_handle_table[irq].param;
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/* do interrupt */
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(*irq_func)(irq, param);
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irq_func(irq, param);
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#ifdef RT_USING_INTERRUPT_INFO
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irq_handle_table[irq].counter++;
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