From a5305c05df3e97cd60c621bec87926765ba31228 Mon Sep 17 00:00:00 2001
From: zhangjun <2281979437@qq.com>
Date: Mon, 31 Jul 2017 10:59:59 +0800
Subject: [PATCH] fix bug in context_gcc.s and start_gcc.s: 	save mie into
 stack msh  running normaly

---
 bsp/risc-v/drivers/usart.c       |  1 -
 bsp/risc-v/platform/interrupt.c  |  2 +-
 libcpu/risc-v/e310/context_gcc.S |  6 +++++-
 libcpu/risc-v/e310/stack.c       |  3 ++-
 libcpu/risc-v/e310/start_gcc.S   | 20 ++++++++++++++------
 5 files changed, 22 insertions(+), 10 deletions(-)

diff --git a/bsp/risc-v/drivers/usart.c b/bsp/risc-v/drivers/usart.c
index ee34e17d59..0d82de1ee2 100644
--- a/bsp/risc-v/drivers/usart.c
+++ b/bsp/risc-v/drivers/usart.c
@@ -17,7 +17,6 @@ static void usart_init(int buard)
 static void usart_handler(int vector, void *param)
 {
 	rt_hw_serial_isr((struct rt_serial_device*)param, RT_SERIAL_EVENT_RX_IND);
-	UART0_REG(UART_REG_IP) = 0;
 	return;
 }
 static rt_err_t usart_configure(struct rt_serial_device *serial,
diff --git a/bsp/risc-v/platform/interrupt.c b/bsp/risc-v/platform/interrupt.c
index c4b2d73d95..6ba4408ab7 100644
--- a/bsp/risc-v/platform/interrupt.c
+++ b/bsp/risc-v/platform/interrupt.c
@@ -11,7 +11,7 @@ struct rt_irq_desc irq_desc[MAX_HANDLERS];
 rt_uint32_t rt_interrupt_from_thread;
 rt_uint32_t rt_interrupt_to_thread;
 rt_uint32_t rt_thread_switch_interrupt_flag;
-plic_instance_t g_plic;
+volatile plic_instance_t g_plic;
 /**
  * This function will mask a interrupt.
  * @param vector the interrupt number
diff --git a/libcpu/risc-v/e310/context_gcc.S b/libcpu/risc-v/e310/context_gcc.S
index eee3cc128d..c727396736 100644
--- a/libcpu/risc-v/e310/context_gcc.S
+++ b/libcpu/risc-v/e310/context_gcc.S
@@ -106,9 +106,11 @@ rt_hw_context_switch:
   STORE x26, 26*REGBYTES(sp)
   STORE x27, 27*REGBYTES(sp)
   STORE x28, 28*REGBYTES(sp)
-  STORE x1,  31*REGBYTES(sp)
   STORE x10, 29*REGBYTES(sp)
   STORE x1,  30*REGBYTES(sp)
+  STORE x1,  31*REGBYTES(sp)
+  csrr  x10, mie
+  STORE x10, 0*REGBYTES(sp)
 /*
  *Remain in M-mode after mret
  *enable interrupt in M-mode
@@ -147,6 +149,8 @@ rt_hw_context_switch:
   LOAD x28, 28*REGBYTES(sp)
   LOAD x10, 31*REGBYTES(sp)
   csrw mepc,x10
+  LOAD x10, 0*REGBYTES(sp)
+  csrw mie, x10
   LOAD x10, 29*REGBYTES(sp)
   LOAD x1,  30*REGBYTES(sp)
   
diff --git a/libcpu/risc-v/e310/stack.c b/libcpu/risc-v/e310/stack.c
index 666a2d5bbd..eab608c753 100644
--- a/libcpu/risc-v/e310/stack.c
+++ b/libcpu/risc-v/e310/stack.c
@@ -86,7 +86,8 @@ rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
     *(--stk) = 0xffffffff;          	    /* t6 */
     *(--stk) = 0xffffffff;          	    /* tp */
     *(--stk) = 0xffffffff;          	    /* gp */
+    *(--stk) = 0x880;          	    /* mie */
 //    *(--stk) = (rt_uint32_t)parameter;      /* r0 : argument */
     /* return task's current stack address */
-    return (rt_uint8_t *)--stk;
+    return (rt_uint8_t *)stk;
 }
diff --git a/libcpu/risc-v/e310/start_gcc.S b/libcpu/risc-v/e310/start_gcc.S
index e7aaddcae9..8ed2a03d37 100644
--- a/libcpu/risc-v/e310/start_gcc.S
+++ b/libcpu/risc-v/e310/start_gcc.S
@@ -176,8 +176,17 @@ trap_entry:
   STORE x1,  30*REGBYTES(sp)
   csrr  x10, mepc
   STORE x10, 31*REGBYTES(sp)
+  csrr  x10, mie
+  STORE x10, 0*REGBYTES(sp)
 
 
+/*
+ *Remain in M-mode after mret
+ *enable interrupt in M-mode
+ */
+  li    t0, MSTATUS_MPP
+  csrrs t0, mstatus, t0
+
   call rt_interrupt_enter
   csrr a0, mcause
   lui  a5, 0x80000 
@@ -189,17 +198,13 @@ trap_entry:
   bne  a5, a4, 1f
   call rt_hw_trap_irq
 1:
-  /*Machine software interrupt*/
+  /*Machine timer interrupt*/
   li   a4, 7
   bne  a5, a4, 2f
   call rt_systick_handler
 2:
   call rt_interrupt_leave
 
-  # Remain in M-mode after mret
-  li    t0, 136
-  csrrs t0, mstatus, t0
-
   la   a0, rt_thread_switch_interrupt_flag
   lw   a1, (a0)
   bnez a1, rt_hw_context_switch_interrupt_do
@@ -235,9 +240,10 @@ trap_entry:
   LOAD x28, 28*REGBYTES(sp)
   LOAD x10, 31*REGBYTES(sp)
   csrw mepc,x10
+  LOAD x10, 0*REGBYTES(sp)
+  csrw mie, x10
   LOAD x10, 29*REGBYTES(sp)
   LOAD x1,  30*REGBYTES(sp)
-  
 
   addi sp,  sp, 32*REGBYTES
   mret
@@ -282,6 +288,8 @@ rt_hw_context_switch_interrupt_do:
   LOAD x28, 28*REGBYTES(sp)
   LOAD x10, 31*REGBYTES(sp)
   csrw mepc,x10
+  LOAD x10, 0*REGBYTES(sp)
+  csrw mie, x10
   LOAD x10, 29*REGBYTES(sp)
   LOAD x1,  30*REGBYTES(sp)